diff mbox series

[10/13] net/mlx5: fix insert by index

Message ID 20231029182300.227879-11-getelson@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: support more REG C registers |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Gregory Etelson Oct. 29, 2023, 6:22 p.m. UTC 
  From: Ori Kam <orika@nvidia.com>

Due to mlx5dr internal logic calling the rule_create function
must have items structure.

This commit create such temp structure.

Fixes: fa16fead9a68 ("net/mlx5/hws: support rule update after its creation")
Cc: erezsh@nvidia.com

Signed-off-by: Ori Kam <orika@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Dariusz Sosnowski Oct. 30, 2023, 8:25 a.m. UTC | #1 
Hi,

> -----Original Message-----
> From: Gregory Etelson <getelson@nvidia.com>
> Sent: Sunday, October 29, 2023 19:23
> To: dev@dpdk.org
> Cc: Gregory Etelson <getelson@nvidia.com>; Maayan Kashani
> <mkashani@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>; Ori Kam
> <orika@nvidia.com>; Erez Shitrit <erezsh@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>; Suanming
> Mou <suanmingm@nvidia.com>; Alex Vesker <valex@nvidia.com>
> Subject: [PATCH 10/13] net/mlx5: fix insert by index
> 
> External email: Use caution opening links or attachments
> 
> 
> From: Ori Kam <orika@nvidia.com>
> 
> Due to mlx5dr internal logic calling the rule_create function must have items
> structure.
> 
> This commit create such temp structure.
> 
> Fixes: fa16fead9a68 ("net/mlx5/hws: support rule update after its creation")
> Cc: erezsh@nvidia.com
> 
> Signed-off-by: Ori Kam <orika@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>

Thanks,
Dariusz Sosnowski
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index ea43ebb78b..2148f5a63a 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -2987,6 +2987,7 @@  flow_hw_async_flow_create_by_index(struct rte_eth_dev *dev,
 			  void *user_data,
 			  struct rte_flow_error *error)
 {
+	struct rte_flow_item items[] = {{.type = RTE_FLOW_ITEM_TYPE_END,}};
 	struct mlx5_priv *priv = dev->data->dev_private;
 	struct mlx5dr_rule_attr rule_attr = {
 		.queue_id = queue,
@@ -3050,7 +3051,7 @@  flow_hw_async_flow_create_by_index(struct rte_eth_dev *dev,
 		goto free;
 	}
 	ret = mlx5dr_rule_create(table->matcher,
-				 0, NULL, action_template_index, rule_acts,
+				 0, items, action_template_index, rule_acts,
 				 &rule_attr, (struct mlx5dr_rule *)flow->rule);
 	if (likely(!ret))
 		return (struct rte_flow *)flow;