[v2,12/25] net/axgbe: delay AN timeout during KR training
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Commit Message
AN restart triggered during KR training not only aborts the KR training
process but also move the HW to unstable state. Driver has to wait up to
500ms or until the KR training is completed before restarting AN cycle.
Without the fix the user will face KR training failure issues.
Fixes: a5c7273771e8 ("net/axgbe: add phy programming APIs")
Cc: stable@dpdk.org
Signed-off-by: Venkat Kumar Ande <venkatkumar.ande@amd.com>
---
drivers/net/axgbe/axgbe_ethdev.h | 2 ++
drivers/net/axgbe/axgbe_mdio.c | 25 +++++++++++++++++++++++++
2 files changed, 27 insertions(+)
Comments
[AMD Official Use Only - AMD Internal Distribution Only]
Acked-by: Selwin Sebastian<selwin.sebastian@amd.com>
-----Original Message-----
From: Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>
Sent: Tuesday, May 7, 2024 6:13 PM
To: dev@dpdk.org
Cc: Sebastian, Selwin <Selwin.Sebastian@amd.com>; Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>; stable@dpdk.org
Subject: [PATCH v2 12/25] net/axgbe: delay AN timeout during KR training
AN restart triggered during KR training not only aborts the KR training process but also move the HW to unstable state. Driver has to wait up to 500ms or until the KR training is completed before restarting AN cycle.
Without the fix the user will face KR training failure issues.
Fixes: a5c7273771e8 ("net/axgbe: add phy programming APIs")
Cc: stable@dpdk.org
Signed-off-by: Venkat Kumar Ande <venkatkumar.ande@amd.com>
---
drivers/net/axgbe/axgbe_ethdev.h | 2 ++
drivers/net/axgbe/axgbe_mdio.c | 25 +++++++++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h
index f122dfd516..d1fac667c2 100644
--- a/drivers/net/axgbe/axgbe_ethdev.h
+++ b/drivers/net/axgbe/axgbe_ethdev.h
@@ -111,6 +111,7 @@
/* Auto-negotiation */
#define AXGBE_AN_MS_TIMEOUT 500
#define AXGBE_LINK_TIMEOUT 5
+#define AXGBE_KR_TRAINING_WAIT_ITER 50
#define AXGBE_SGMII_AN_LINK_STATUS BIT(1)
#define AXGBE_SGMII_AN_LINK_SPEED (BIT(2) | BIT(3))
@@ -661,6 +662,7 @@ struct axgbe_port {
unsigned int parallel_detect;
unsigned int fec_ability;
unsigned long an_start;
+ unsigned long kr_start_time;
enum axgbe_an_mode an_mode;
/* I2C support */
diff --git a/drivers/net/axgbe/axgbe_mdio.c b/drivers/net/axgbe/axgbe_mdio.c index b03bc471cb..e1a737cf62 100644
--- a/drivers/net/axgbe/axgbe_mdio.c
+++ b/drivers/net/axgbe/axgbe_mdio.c
@@ -357,6 +357,7 @@ static enum axgbe_an axgbe_an73_tx_training(struct axgbe_port *pdata,
reg |= AXGBE_KR_TRAINING_ENABLE;
reg |= AXGBE_KR_TRAINING_START;
XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);
+ pdata->kr_start_time = rte_get_timer_cycles();
PMD_DRV_LOG(DEBUG, "KR training initiated\n");
if (pdata->phy_if.phy_impl.kr_training_post)
@@ -487,6 +488,7 @@ static enum axgbe_an axgbe_an73_incompat_link(struct axgbe_port *pdata)
axgbe_an_disable(pdata);
axgbe_switch_mode(pdata);
+ pdata->an_result = AXGBE_AN_READY;
axgbe_an_restart(pdata);
return AXGBE_AN_INCOMPAT_LINK;
@@ -967,11 +969,34 @@ static void axgbe_check_link_timeout(struct axgbe_port *pdata) {
unsigned long link_timeout;
unsigned long ticks;
+ unsigned long kr_time;
+ int wait;
link_timeout = pdata->link_check + (AXGBE_LINK_TIMEOUT *
2 * rte_get_timer_hz());
ticks = rte_get_timer_cycles();
if (time_after(ticks, link_timeout)) {
+ if ((axgbe_cur_mode(pdata) == AXGBE_MODE_KR) &&
+ pdata->phy.autoneg == AUTONEG_ENABLE) {
+ /* AN restart should not happen while KR training is in progress.
+ * The while loop ensures no AN restart during KR training,
+ * waits up to 500ms and AN restart is triggered only if KR
+ * training is failed.
+ */
+ wait = AXGBE_KR_TRAINING_WAIT_ITER;
+ while (wait--) {
+ kr_time = pdata->kr_start_time +
+ msecs_to_timer_cycles(AXGBE_AN_MS_TIMEOUT);
+ ticks = rte_get_timer_cycles();
+ if (time_after(ticks, kr_time))
+ break;
+ /* AN restart is not required, if AN result is COMPLETE */
+ if (pdata->an_result == AXGBE_AN_COMPLETE)
+ return;
+ rte_delay_us(10500);
+ }
+ }
+
PMD_DRV_LOG(NOTICE, "AN link timeout\n");
axgbe_phy_config_aneg(pdata);
}
--
2.34.1
@@ -111,6 +111,7 @@
/* Auto-negotiation */
#define AXGBE_AN_MS_TIMEOUT 500
#define AXGBE_LINK_TIMEOUT 5
+#define AXGBE_KR_TRAINING_WAIT_ITER 50
#define AXGBE_SGMII_AN_LINK_STATUS BIT(1)
#define AXGBE_SGMII_AN_LINK_SPEED (BIT(2) | BIT(3))
@@ -661,6 +662,7 @@ struct axgbe_port {
unsigned int parallel_detect;
unsigned int fec_ability;
unsigned long an_start;
+ unsigned long kr_start_time;
enum axgbe_an_mode an_mode;
/* I2C support */
@@ -357,6 +357,7 @@ static enum axgbe_an axgbe_an73_tx_training(struct axgbe_port *pdata,
reg |= AXGBE_KR_TRAINING_ENABLE;
reg |= AXGBE_KR_TRAINING_START;
XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);
+ pdata->kr_start_time = rte_get_timer_cycles();
PMD_DRV_LOG(DEBUG, "KR training initiated\n");
if (pdata->phy_if.phy_impl.kr_training_post)
@@ -487,6 +488,7 @@ static enum axgbe_an axgbe_an73_incompat_link(struct axgbe_port *pdata)
axgbe_an_disable(pdata);
axgbe_switch_mode(pdata);
+ pdata->an_result = AXGBE_AN_READY;
axgbe_an_restart(pdata);
return AXGBE_AN_INCOMPAT_LINK;
@@ -967,11 +969,34 @@ static void axgbe_check_link_timeout(struct axgbe_port *pdata)
{
unsigned long link_timeout;
unsigned long ticks;
+ unsigned long kr_time;
+ int wait;
link_timeout = pdata->link_check + (AXGBE_LINK_TIMEOUT *
2 * rte_get_timer_hz());
ticks = rte_get_timer_cycles();
if (time_after(ticks, link_timeout)) {
+ if ((axgbe_cur_mode(pdata) == AXGBE_MODE_KR) &&
+ pdata->phy.autoneg == AUTONEG_ENABLE) {
+ /* AN restart should not happen while KR training is in progress.
+ * The while loop ensures no AN restart during KR training,
+ * waits up to 500ms and AN restart is triggered only if KR
+ * training is failed.
+ */
+ wait = AXGBE_KR_TRAINING_WAIT_ITER;
+ while (wait--) {
+ kr_time = pdata->kr_start_time +
+ msecs_to_timer_cycles(AXGBE_AN_MS_TIMEOUT);
+ ticks = rte_get_timer_cycles();
+ if (time_after(ticks, kr_time))
+ break;
+ /* AN restart is not required, if AN result is COMPLETE */
+ if (pdata->an_result == AXGBE_AN_COMPLETE)
+ return;
+ rte_delay_us(10500);
+ }
+ }
+
PMD_DRV_LOG(NOTICE, "AN link timeout\n");
axgbe_phy_config_aneg(pdata);
}