diff mbox series

[v2,13/17] common/cnxk: add lmtline init

Message ID	1624599410-29689-14-git-send-email-anoobj@marvell.com (mailing list archive)
State	Accepted, archived
Delegated to:	akhil goyal
Headers	From: Anoob Joseph <anoobj@marvell.com> To: Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net> CC: Anoob Joseph <anoobj@marvell.com>, Jerin Jacob <jerinj@marvell.com>, "Ankur Dwivedi" <adwivedi@marvell.com>, Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org> Date: Fri, 25 Jun 2021 11:06:45 +0530 Message-ID: <1624599410-29689-14-git-send-email-anoobj@marvell.com> In-Reply-To: <1624599410-29689-1-git-send-email-anoobj@marvell.com> References: <patches.dpdk.org/project/dpdk/patch/1622649385-22652-1-git-send-email-anoobj@marvell.com/> <1624599410-29689-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Subject: [dpdk-dev] [PATCH v2 13/17] common/cnxk: add lmtline init Precedence: list Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org>
Series	Add CPT in Marvell CNXK common driver \| [v2,00/17] Add CPT in Marvell CNXK common driver [v2,01/17] common/cnxk: add CPT HW defines [v2,02/17] common/cnxk: update Rx inline IPsec mbox message format [v2,03/17] common/cnxk: add CPT dev config routines [v2,04/17] common/cnxk: add idev CPT set - get [v2,05/17] common/cnxk: add mbox to configure RXC [v2,06/17] common/cnxk: add CPT LF config [v2,07/17] common/cnxk: add CPT diagnostics [v2,08/17] common/cnxk: add CPT LF flush [v2,09/17] common/cnxk: add inline IPsec configuration mbox [v2,10/17] common/cnxk: add SE microcode defines [v2,11/17] common/cnxk: add IE microcode defines [v2,12/17] common/cnxk: add AE microcode defines [v2,13/17] common/cnxk: add lmtline init [v2,14/17] common/cnxk: add fpm tables [v2,15/17] common/cnxk: add EC grp static vectors [v2,16/17] common/cnxk: add IPsec common code [v2,17/17] common/cnxk: add SE set key functions in roc

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK

Commit Message

Anoob Joseph June 25, 2021, 5:36 a.m. UTC

  Add routine to initialize LMTLINE which facilitates instruction
submission to CPT. Add common macros required in the enqueue
operations.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>

---
 drivers/common/cnxk/roc_cpt.c   | 20 ++++++++++++++++++++
 drivers/common/cnxk/roc_cpt.h   | 32 ++++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map |  1 +
 3 files changed, 53 insertions(+)

diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 81e8b15..788b28a 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -806,3 +806,23 @@  roc_cpt_iq_disable(struct roc_cpt_lf *lf)
 	lf_inprog.s.eena = 0x0;
 	plt_write64(lf_inprog.u, lf->rbase + CPT_LF_INPROG);
 }
+
+int
+roc_cpt_lmtline_init(struct roc_cpt *roc_cpt, struct roc_cpt_lmtline *lmtline,
+		     int lf_id)
+{
+	struct roc_cpt_lf *lf;
+
+	lf = roc_cpt->lf[lf_id];
+	if (lf == NULL)
+		return -ENOTSUP;
+
+	lmtline->io_addr = lf->io_addr;
+	if (roc_model_is_cn10k())
+		lmtline->io_addr |= ROC_CN10K_CPT_INST_DW_M1 << 4;
+
+	lmtline->fc_addr = lf->fc_addr;
+	lmtline->lmt_base = lf->lmt_base;
+
+	return 0;
+}
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 5577fea..8dd2b5e 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -16,6 +16,30 @@ 
 #define ROC_CPT_DFLT_ENG_GRP_AE	   2UL
 
 #define ROC_CPT_MAX_LFS 64
+#define ROC_CN10K_CPT_INST_DW_M1                                               \
+	((uint64_t)(((sizeof(struct cpt_inst_s) / 16) - 1) & 0x7))
+#define ROC_CN10K_TWO_CPT_INST_DW_M1                                           \
+	((uint64_t)(((sizeof(struct cpt_inst_s) * 2 / 16) - 1) & 0x7))
+
+/* Vector of sizes in the burst of 16 CPT inst except first in 63:19 of
+ * APT_LMT_ARG_S
+ */
+#define ROC_CN10K_CPT_LMT_ARG                                                  \
+	(ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 0) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 1) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 2) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 3) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 4) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 5) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 6) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 7) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 8) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 9) |                            \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 10) |                           \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 11) |                           \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 12) |                           \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 13) |                           \
+	 ROC_CN10K_CPT_INST_DW_M1 << (19 + 3 * 14))
 
 /* CPT helper macros */
 #define ROC_CPT_AH_HDR_LEN	 12
@@ -51,6 +75,12 @@ 
 #define ROC_CPT_TUNNEL_IPV4_HDR_LEN 20
 #define ROC_CPT_TUNNEL_IPV6_HDR_LEN 40
 
+struct roc_cpt_lmtline {
+	uint64_t io_addr;
+	uint64_t *fc_addr;
+	uintptr_t lmt_base;
+};
+
 struct roc_cpt_lf {
 	/* Input parameters */
 	uint16_t lf_id;
@@ -109,5 +139,7 @@  int __roc_api roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt,
 int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt);
 void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf);
+int __roc_api roc_cpt_lmtline_init(struct roc_cpt *roc_cpt,
+				   struct roc_cpt_lmtline *lmtline, int lf_id);
 
 #endif /* _ROC_CPT_H_ */
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 59d7d91..e079bc7 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -24,6 +24,7 @@  INTERNAL {
 	roc_cpt_lf_init;
 	roc_cpt_lf_fini;
 	roc_cpt_lfs_print;
+	roc_cpt_lmtline_init;
 	roc_cpt_rxc_time_cfg;
 	roc_error_msg_get;
 	roc_idev_cpt_get;