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GET /api/patches/94104/?format=api
{ "id": 94104, "url": "https://patches.dpdk.org/api/patches/94104/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210613000652.28191-9-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210613000652.28191-9-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210613000652.28191-9-ajit.khaparde@broadcom.com", "date": "2021-06-13T00:06:02", "name": "[v2,08/58] net/bnxt: add action SRAM translation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4a1168ddc88a91e17b0585577ff19ae9fd7cfdee", "submitter": { "id": 501, "url": "https://patches.dpdk.org/api/people/501/?format=api", "name": "Ajit Khaparde", "email": "ajit.khaparde@broadcom.com" }, "delegate": { "id": 1766, "url": "https://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210613000652.28191-9-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 17305, "url": "https://patches.dpdk.org/api/series/17305/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17305", "date": "2021-06-13T00:05:54", "name": "enhancements to host based flow table management", "version": 2, "mbox": "https://patches.dpdk.org/series/17305/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94104/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94104/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C0686A0C41;\n\tSun, 13 Jun 2021 02:08:20 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B44BC4115A;\n\tSun, 13 Jun 2021 02:07:14 +0200 (CEST)", "from mail-pg1-f174.google.com (mail-pg1-f174.google.com\n [209.85.215.174])\n by mails.dpdk.org (Postfix) with ESMTP id 0116F41150\n for <dev@dpdk.org>; Sun, 13 Jun 2021 02:07:11 +0200 (CEST)", "by mail-pg1-f174.google.com with SMTP id l184so5615144pgd.8\n for <dev@dpdk.org>; Sat, 12 Jun 2021 17:07:11 -0700 (PDT)", "from localhost.localdomain ([192.19.223.252])\n by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.06\n (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128);\n Sat, 12 Jun 2021 17:07:07 -0700 (PDT)" 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"<20210613000652.28191-1-ajit.khaparde@broadcom.com>", "References": "<20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com>\n <20210613000652.28191-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Type": "multipart/signed; protocol=\"application/pkcs7-signature\";\n micalg=sha-256; boundary=\"000000000000ab14d205c49a851e\"", "X-Content-Filtered-By": "Mailman/MimeDel 2.1.29", "Subject": "[dpdk-dev] [PATCH v2 08/58] net/bnxt: add action SRAM translation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Farah Smith <farah.smith@broadcom.com>\n\n- Translate Truflow action types for Thor to HCAPI RM\n resource defined SRAM banks.\n- move module type enum definitions to tf_core API\n- Switch to subtype concept for RM.\n- alloc/free working for Thor SRAM table type for full AR.\n\nSigned-off-by: Farah Smith <farah.smith@broadcom.com>\nSigned-off-by: Randy Schacher <stuart.schacher@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>\nReviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/bnxt_util.h | 3 +\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h | 339 +++------\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h | 387 +---------\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h | 411 ++++++++++\n drivers/net/bnxt/tf_core/meson.build | 1 -\n drivers/net/bnxt/tf_core/tf_core.h | 24 +\n drivers/net/bnxt/tf_core/tf_device.c | 43 +-\n drivers/net/bnxt/tf_core/tf_device.h | 23 -\n drivers/net/bnxt/tf_core/tf_device_p4.c | 21 +-\n drivers/net/bnxt/tf_core/tf_device_p58.c | 53 +-\n drivers/net/bnxt/tf_core/tf_device_p58.h | 110 ++-\n drivers/net/bnxt/tf_core/tf_em_common.c | 4 +-\n drivers/net/bnxt/tf_core/tf_em_host.c | 6 +-\n drivers/net/bnxt/tf_core/tf_em_internal.c | 4 +-\n drivers/net/bnxt/tf_core/tf_identifier.c | 10 +-\n drivers/net/bnxt/tf_core/tf_if_tbl.c | 2 +-\n drivers/net/bnxt/tf_core/tf_rm.c | 508 ++++++++-----\n drivers/net/bnxt/tf_core/tf_rm.h | 109 ++-\n drivers/net/bnxt/tf_core/tf_shadow_tbl.c | 783 --------------------\n drivers/net/bnxt/tf_core/tf_shadow_tbl.h | 256 -------\n drivers/net/bnxt/tf_core/tf_tbl.c | 238 +-----\n drivers/net/bnxt/tf_core/tf_tcam.c | 20 +-\n drivers/net/bnxt/tf_core/tf_util.c | 36 +-\n drivers/net/bnxt/tf_core/tf_util.h | 26 +-\n 24 files changed, 1130 insertions(+), 2287 deletions(-)\n create mode 100644 drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h\n delete mode 100644 drivers/net/bnxt/tf_core/tf_shadow_tbl.c\n delete mode 100644 drivers/net/bnxt/tf_core/tf_shadow_tbl.h", "diff": "diff --git a/drivers/net/bnxt/bnxt_util.h b/drivers/net/bnxt/bnxt_util.h\nindex 64e97eed15..b243c21ec2 100644\n--- a/drivers/net/bnxt/bnxt_util.h\n+++ b/drivers/net/bnxt/bnxt_util.h\n@@ -9,6 +9,9 @@\n #ifndef BIT\n #define BIT(n)\t(1UL << (n))\n #endif /* BIT */\n+#ifndef BIT_MASK\n+#define BIT_MASK(len) (BIT(len) - 1)\n+#endif /* BIT_MASK */\n \n #define PCI_SUBSYSTEM_ID_OFFSET\t0x2e\n \ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h\nindex b8c85a0fca..c67aa29ad0 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h\n@@ -1,281 +1,126 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2019-2021 Broadcom\n- * All rights reserved.\n+/*\n+ * Copyright(c) Broadcom Limited.\n+ * All rights reserved.\n */\n \n+/*!\n+ * \\file\n+ * \\brief Exported functions for CFA HW programming\n+ */\n #ifndef _HCAPI_CFA_H_\n #define _HCAPI_CFA_H_\n \n #include <stdio.h>\n+#include <stddef.h>\n #include <string.h>\n #include <stdbool.h>\n #include <stdint.h>\n #include <stddef.h>\n+#include <errno.h>\n \n #include \"hcapi_cfa_defs.h\"\n \n-/**\n- * Index used for the sram_entries field\n- */\n-enum hcapi_cfa_resc_type_sram {\n-\tHCAPI_CFA_RESC_TYPE_SRAM_FULL_ACTION,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_MCG,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_ENCAP_8B,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_ENCAP_16B,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_ENCAP_64B,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_SP_SMAC,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_SP_SMAC_IPV4,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_SP_SMAC_IPV6,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_COUNTER_64B,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_NAT_SPORT,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_NAT_DPORT,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_NAT_S_IPV4,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_NAT_D_IPV4,\n-\tHCAPI_CFA_RESC_TYPE_SRAM_MAX\n-};\n-\n-/**\n- * Index used for the hw_entries field in struct cfa_rm_db\n- */\n-enum hcapi_cfa_resc_type_hw {\n-\t/* common HW resources for all chip variants */\n-\tHCAPI_CFA_RESC_TYPE_HW_L2_CTXT_TCAM,\n-\tHCAPI_CFA_RESC_TYPE_HW_PROF_FUNC,\n-\tHCAPI_CFA_RESC_TYPE_HW_PROF_TCAM,\n-\tHCAPI_CFA_RESC_TYPE_HW_EM_PROF_ID,\n-\tHCAPI_CFA_RESC_TYPE_HW_EM_REC,\n-\tHCAPI_CFA_RESC_TYPE_HW_WC_TCAM_PROF_ID,\n-\tHCAPI_CFA_RESC_TYPE_HW_WC_TCAM,\n-\tHCAPI_CFA_RESC_TYPE_HW_METER_PROF,\n-\tHCAPI_CFA_RESC_TYPE_HW_METER_INST,\n-\tHCAPI_CFA_RESC_TYPE_HW_MIRROR,\n-\tHCAPI_CFA_RESC_TYPE_HW_UPAR,\n-\t/* Wh+/SR specific HW resources */\n-\tHCAPI_CFA_RESC_TYPE_HW_SP_TCAM,\n-\t/* Thor, SR2 common HW resources */\n-\tHCAPI_CFA_RESC_TYPE_HW_FKB,\n-\t/* SR specific HW resources */\n-\tHCAPI_CFA_RESC_TYPE_HW_TBL_SCOPE,\n-\tHCAPI_CFA_RESC_TYPE_HW_L2_FUNC,\n-\tHCAPI_CFA_RESC_TYPE_HW_EPOCH0,\n-\tHCAPI_CFA_RESC_TYPE_HW_EPOCH1,\n-\tHCAPI_CFA_RESC_TYPE_HW_METADATA,\n-\tHCAPI_CFA_RESC_TYPE_HW_CT_STATE,\n-\tHCAPI_CFA_RESC_TYPE_HW_RANGE_PROF,\n-\tHCAPI_CFA_RESC_TYPE_HW_RANGE_ENTRY,\n-\tHCAPI_CFA_RESC_TYPE_HW_LAG_ENTRY,\n-\tHCAPI_CFA_RESC_TYPE_HW_MAX\n-};\n-\n-struct hcapi_cfa_key_result {\n-\tuint64_t bucket_mem_ptr;\n-\tuint8_t bucket_idx;\n-};\n-\n-/* common CFA register access macros */\n-#define CFA_REG(x)\t\tOFFSETOF(cfa_reg_t, cfa_##x)\n-\n-#ifndef TF_REG_WR\n-#define TF_REG_WR(_p, x, y) (*((uint32_t volatile *)(x)) = (y))\n-#endif\n-#ifndef TF_REG_RD\n-#define TF_REG_RD(_p, x) (*((uint32_t volatile *)(x)))\n-#endif\n-#ifndef TF_CFA_REG_RD\n-#define TF_CFA_REG_RD(_p, x)\t\\\n-\tTF_REG_RD(0, (uint32_t)(_p)->base_addr + CFA_REG(x))\n-#endif\n-#ifndef TF_CFA_REG_WR\n-#define TF_CFA_REG_WR(_p, x, y)\t\\\n-\tTF_REG_WR(0, (uint32_t)(_p)->base_addr + CFA_REG(x), y)\n-#endif\n+#define INVALID_U64 (0xFFFFFFFFFFFFFFFFULL)\n+#define INVALID_U32 (0xFFFFFFFFUL)\n+#define INVALID_U16 (0xFFFFUL)\n+#define INVALID_U8 (0xFFUL)\n \n-/* Constants used by Resource Manager Registration*/\n-#define RM_CLIENT_NAME_MAX_LEN 32\n+struct hcapi_cfa_devops;\n \n /**\n- * Resource Manager Data Structures used for resource requests\n+ * CFA device information\n */\n-struct hcapi_cfa_resc_req_entry {\n-\tuint16_t min;\n-\tuint16_t max;\n-};\n-\n-struct hcapi_cfa_resc_req {\n-\t/* Wh+/SR specific onchip Action SRAM resources */\n-\t/* Validity of each sram type is indicated by the\n-\t * corresponding sram type bit in the sram_resc_flags. When\n-\t * set to 1, the CFA sram resource type is valid and amount of\n-\t * resources for this type is reserved. Each sram resource\n-\t * pool is identified by the starting index and number of\n-\t * resources in the pool.\n-\t */\n-\tuint32_t sram_resc_flags;\n-\tstruct hcapi_cfa_resc_req_entry sram_resc[HCAPI_CFA_RESC_TYPE_SRAM_MAX];\n-\n-\t/* Validity of each resource type is indicated by the\n-\t * corresponding resource type bit in the hw_resc_flags. When\n-\t * set to 1, the CFA resource type is valid and amount of\n-\t * resource of this type is reserved. Each resource pool is\n-\t * identified by the starting index and the number of\n-\t * resources in the pool.\n-\t */\n-\tuint32_t hw_resc_flags;\n-\tstruct hcapi_cfa_resc_req_entry hw_resc[HCAPI_CFA_RESC_TYPE_HW_MAX];\n-};\n-\n-struct hcapi_cfa_resc_req_db {\n-\tstruct hcapi_cfa_resc_req rx;\n-\tstruct hcapi_cfa_resc_req tx;\n-};\n-\n-struct hcapi_cfa_resc_entry {\n-\tuint16_t start;\n-\tuint16_t stride;\n-\tuint16_t tag;\n-};\n-\n-struct hcapi_cfa_resc {\n-\t/* Wh+/SR specific onchip Action SRAM resources */\n-\t/* Validity of each sram type is indicated by the\n-\t * corresponding sram type bit in the sram_resc_flags. When\n-\t * set to 1, the CFA sram resource type is valid and amount of\n-\t * resources for this type is reserved. Each sram resource\n-\t * pool is identified by the starting index and number of\n-\t * resources in the pool.\n-\t */\n-\tuint32_t sram_resc_flags;\n-\tstruct hcapi_cfa_resc_entry sram_resc[HCAPI_CFA_RESC_TYPE_SRAM_MAX];\n-\n-\t/* Validity of each resource type is indicated by the\n-\t * corresponding resource type bit in the hw_resc_flags. When\n-\t * set to 1, the CFA resource type is valid and amount of\n-\t * resource of this type is reserved. Each resource pool is\n-\t * identified by the starting index and the number of resources\n-\t * in the pool.\n-\t */\n-\tuint32_t hw_resc_flags;\n-\tstruct hcapi_cfa_resc_entry hw_resc[HCAPI_CFA_RESC_TYPE_HW_MAX];\n-};\n-\n-struct hcapi_cfa_resc_db {\n-\tstruct hcapi_cfa_resc rx;\n-\tstruct hcapi_cfa_resc tx;\n+struct hcapi_cfa_devinfo {\n+\t/** [out] CFA device ops function pointer table */\n+\tconst struct hcapi_cfa_devops *devops;\n };\n \n /**\n- * This is the main data structure used by the CFA Resource\n- * Manager. This data structure holds all the state and table\n- * management information.\n+ * \\defgroup CFA_HCAPI_DEVICE_API\n+ * HCAPI used for writing to the hardware\n+ * @{\n */\n-typedef struct hcapi_cfa_rm_data {\n-\tuint32_t dummy_data;\n-} hcapi_cfa_rm_data_t;\n-\n-/* End RM support */\n-\n-struct hcapi_cfa_devops;\n-\n-struct hcapi_cfa_devinfo {\n-\tuint8_t global_cfg_data[CFA_GLOBAL_CFG_DATA_SZ];\n-\tstruct hcapi_cfa_layout_tbl layouts;\n-\tstruct hcapi_cfa_devops *devops;\n-};\n-\n-int hcapi_cfa_dev_bind(enum hcapi_cfa_ver hw_ver,\n-\t\t struct hcapi_cfa_devinfo *dev_info);\n-\n-int hcapi_cfa_key_compile_layout(struct hcapi_cfa_key_template *key_template,\n-\t\t\t\t struct hcapi_cfa_key_layout *key_layout);\n-uint64_t hcapi_cfa_key_hash(uint64_t *key_data, uint16_t bitlen);\n-int\n-hcapi_cfa_action_compile_layout(struct hcapi_cfa_action_template *act_template,\n-\t\t\t\tstruct hcapi_cfa_action_layout *act_layout);\n-int hcapi_cfa_action_init_obj(uint64_t *act_obj,\n-\t\t\t struct hcapi_cfa_action_layout *act_layout);\n-int hcapi_cfa_action_compute_ptr(uint64_t *act_obj,\n-\t\t\t\t struct hcapi_cfa_action_layout *act_layout,\n-\t\t\t\t uint32_t base_ptr);\n-\n-int hcapi_cfa_action_hw_op(struct hcapi_cfa_hwop *op,\n-\t\t\t uint8_t *act_tbl,\n-\t\t\t struct hcapi_cfa_data *act_obj);\n-int hcapi_cfa_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id,\n-\t\t\tstruct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_rm_register_client(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t const char *client_name,\n-\t\t\t\t int *client_id);\n-int hcapi_cfa_rm_unregister_client(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t int client_id);\n-int hcapi_cfa_rm_query_resources(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t int client_id,\n-\t\t\t\t uint16_t chnl_id,\n-\t\t\t\t struct hcapi_cfa_resc_req_db *req_db);\n-int hcapi_cfa_rm_query_resources_one(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t int clien_id,\n-\t\t\t\t struct hcapi_cfa_resc_db *resc_db);\n-int hcapi_cfa_rm_reserve_resources(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t int client_id,\n-\t\t\t\t struct hcapi_cfa_resc_req_db *resc_req,\n-\t\t\t\t struct hcapi_cfa_resc_db *resc_db);\n-int hcapi_cfa_rm_release_resources(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t int client_id,\n-\t\t\t\t struct hcapi_cfa_resc_req_db *resc_req,\n-\t\t\t\t struct hcapi_cfa_resc_db *resc_db);\n-int hcapi_cfa_rm_initialize(hcapi_cfa_rm_data_t *data);\n \n-#if SUPPORT_CFA_HW_P4\n-\n-int hcapi_cfa_p4_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id,\n-\t\t\t struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_prof_l2ctxt_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_prof_l2ctxtrmp_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_prof_tcam_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_prof_tcamrmp_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_wc_tcam_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_wc_tcam_rec_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_mirror_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t struct hcapi_cfa_data *mirror);\n-int hcapi_cfa_p4_global_cfg_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t uint32_t type,\n-\t\t\t\t struct hcapi_cfa_data *config);\n-/* SUPPORT_CFA_HW_P4 */\n-#elif SUPPORT_CFA_HW_P45\n-int hcapi_cfa_p45_mirror_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t struct hcapi_cfa_data *mirror);\n-int hcapi_cfa_p45_global_cfg_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t uint32_t type,\n-\t\t\t\t struct hcapi_cfa_data *config);\n-/* SUPPORT_CFA_HW_P45 */\n-#endif\n-/**\n- * HCAPI CFA device HW operation function callback definition\n- * This is standardized function callback hook to install different\n- * CFA HW table programming function callback.\n+/** CFA device specific function hooks structure\n+ *\n+ * The following device hooks can be defined; unless noted otherwise, they are\n+ * optional and can be filled with a null pointer. The pupose of these hooks\n+ * to support CFA device operations for different device variants.\n */\n+struct hcapi_cfa_devops {\n+\t/** calculate a key hash for the provided key_data\n+\t *\n+\t * This API computes hash for a key.\n+\t *\n+\t * @param[in] key_data\n+\t * A pointer of the key data buffer\n+\t *\n+\t * @param[in] bitlen\n+\t * Number of bits of the key data\n+\t *\n+\t * @return\n+\t * 0 for SUCCESS, negative value for FAILURE\n+\t */\n+\tuint64_t (*hcapi_cfa_key_hash)(uint64_t *key_data, uint16_t bitlen);\n \n-struct hcapi_cfa_tbl_cb {\n-\t/**\n-\t * This function callback provides the functionality to read/write\n-\t * HW table entry from a HW table.\n+\t/** hardware operation on the CFA EM key\n+\t *\n+\t * This API provides the functionality to program the exact match and\n+\t * key data to exact match record memory.\n \t *\n \t * @param[in] op\n \t * A pointer to the Hardware operation parameter\n \t *\n-\t * @param[in] obj_data\n-\t * A pointer to the HW data object for the hardware operation\n+\t * @param[in] key_tbl\n+\t * A pointer to the off-chip EM key table (applicable to EEM and\n+\t * SR2 EM only), set to NULL for on-chip EM key table or WC\n+\t * TCAM table.\n \t *\n+\t * @param[in/out] key_obj\n+\t * A pointer to the key data object for the hardware operation which\n+\t * has the following contents:\n+\t * 1. key record memory offset (index to WC TCAM or EM key hash\n+\t * value)\n+\t * 2. key data\n+\t * When using the HWOP PUT, the key_obj holds the LREC and key to\n+\t * be written.\n+\t * When using the HWOP GET, the key_obj be populated with the LREC\n+\t * and key which was specified by the key location object.\n+\t *\n+\t * @param[in/out] key_loc\n+\t * When using the HWOP PUT, this is a pointer to the key location\n+\t * data structure which holds the information of where the EM key\n+\t * is stored. It holds the bucket index and the data pointer of\n+\t * a dynamic bucket that is chained to static bucket\n+\t * When using the HWOP GET, this is a pointer to the key location\n+\t * which should be retreved.\n+\t *\n+\t * (valid for SR2 only).\n \t * @return\n \t * 0 for SUCCESS, negative value for FAILURE\n \t */\n-\tint (*hwop_cb)(struct hcapi_cfa_hwop *op,\n-\t\t struct hcapi_cfa_data *obj_data);\n+\tint (*hcapi_cfa_key_hw_op)(struct hcapi_cfa_hwop *op,\n+\t\t\t\t struct hcapi_cfa_key_tbl *key_tbl,\n+\t\t\t\t struct hcapi_cfa_key_data *key_data,\n+\t\t\t\t struct hcapi_cfa_key_loc *key_loc);\n };\n \n-#endif /* HCAPI_CFA_H_ */\n+/*@}*/\n+\n+extern const size_t CFA_RM_HANDLE_DATA_SIZE;\n+\n+#if SUPPORT_CFA_HW_ALL\n+extern const struct hcapi_cfa_devops cfa_p4_devops;\n+extern const struct hcapi_cfa_devops cfa_p58_devops;\n+\n+#elif defined(SUPPORT_CFA_HW_P4) && SUPPORT_CFA_HW_P4\n+extern const struct hcapi_cfa_devops cfa_p4_devops;\n+uint64_t hcapi_cfa_p4_key_hash(uint64_t *key_data, uint16_t bitlen);\n+/* SUPPORT_CFA_HW_P4 */\n+#elif defined(SUPPORT_CFA_HW_P58) && SUPPORT_CFA_HW_P58\n+extern const struct hcapi_cfa_devops cfa_p58_devops;\n+uint64_t hcapi_cfa_p58_key_hash(uint64_t *key_data, uint16_t bitlen);\n+/* SUPPORT_CFA_HW_P58 */\n+#endif\n+\n+#endif /* HCAPI_CFA_H_ */\ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h\nindex 08f098ec86..8e5095a6ef 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h\n@@ -30,12 +30,10 @@\n \n #define CFA_GLOBAL_CFG_DATA_SZ (100)\n \n+#if SUPPORT_CFA_HW_ALL\n #include \"hcapi_cfa_p4.h\"\n-#define CFA_PROF_L2CTXT_TCAM_MAX_FIELD_CNT CFA_P40_PROF_L2_CTXT_TCAM_MAX_FLD\n-#define CFA_PROF_L2CTXT_REMAP_MAX_FIELD_CNT CFA_P40_PROF_L2_CTXT_RMP_DR_MAX_FLD\n-#define CFA_PROF_MAX_KEY_CFG_SZ sizeof(struct cfa_p4_prof_key_cfg)\n-#define CFA_KEY_MAX_FIELD_CNT 41\n-#define CFA_ACT_MAX_TEMPLATE_SZ sizeof(struct cfa_p4_action_template)\n+#include \"hcapi_cfa_p58.h\"\n+#endif /* SUPPORT_CFA_HW_ALL */\n \n /**\n * CFA HW version definition\n@@ -87,43 +85,6 @@ enum hcapi_cfa_key_ctrlops {\n \tHCAPI_CFA_KEY_CTRLOPS_MAX\n };\n \n-/**\n- * CFA HW field structure definition\n- */\n-struct hcapi_cfa_field {\n-\t/** [in] Starting bit position pf the HW field within a HW table\n-\t * entry.\n-\t */\n-\tuint16_t bitpos;\n-\t/** [in] Number of bits for the HW field. */\n-\tuint8_t bitlen;\n-};\n-\n-/**\n- * CFA HW table entry layout structure definition\n- */\n-struct hcapi_cfa_layout {\n-\t/** [out] Bit order of layout */\n-\tbool is_msb_order;\n-\t/** [out] Size in bits of entry */\n-\tuint32_t total_sz_in_bits;\n-\t/** [out] data pointer of the HW layout fields array */\n-\tconst struct hcapi_cfa_field *field_array;\n-\t/** [out] number of HW field entries in the HW layout field array */\n-\tuint32_t array_sz;\n-\t/** [out] layout_id - layout id associated with the layout */\n-\tuint16_t layout_id;\n-};\n-\n-/**\n- * CFA HW data object definition\n- */\n-struct hcapi_cfa_data_obj {\n-\t/** [in] HW field identifier. Used as an index to a HW table layout */\n-\tuint16_t field_id;\n-\t/** [in] Value of the HW field */\n-\tuint64_t val;\n-};\n \n /**\n * CFA HW definition\n@@ -280,348 +241,6 @@ struct hcapi_cfa_key_loc {\n \tuint8_t bucket_idx;\n };\n \n-/**\n- * CFA HW layout table definition\n- */\n-struct hcapi_cfa_layout_tbl {\n-\t/** [out] data pointer to an array of fix formatted layouts supported.\n-\t * The index to the array is the CFA HW table ID\n-\t */\n-\tconst struct hcapi_cfa_layout *tbl;\n-\t/** [out] number of fix formatted layouts in the layout array */\n-\tuint16_t num_layouts;\n-};\n-\n-/**\n- * Key template consists of key fields that can be enabled/disabled\n- * individually.\n- */\n-struct hcapi_cfa_key_template {\n-\t/** [in] key field enable field array, set 1 to the correspeonding\n-\t * field enable to make a field valid\n-\t */\n-\tuint8_t field_en[CFA_KEY_MAX_FIELD_CNT];\n-\t/** [in] Identified if the key template is for TCAM. If false, the\n-\t * the key template is for EM. This field is mandantory for device that\n-\t * only support fix key formats.\n-\t */\n-\tbool is_wc_tcam_key;\n-};\n-\n-/**\n- * key layout consist of field array, key bitlen, key ID, and other meta data\n- * pertain to a key\n- */\n-struct hcapi_cfa_key_layout {\n-\t/** [out] key layout data */\n-\tstruct hcapi_cfa_layout *layout;\n-\t/** [out] actual key size in number of bits */\n-\tuint16_t bitlen;\n-\t/** [out] key identifier and this field is only valid for device\n-\t * that supports fix key formats\n-\t */\n-\tuint16_t id;\n-\t/** [out] Identified the key layout is WC TCAM key */\n-\tbool is_wc_tcam_key;\n-\t/** [out] total slices size, valid for WC TCAM key only. It can be\n-\t * used by the user to determine the total size of WC TCAM key slices\n-\t * in bytes.\n-\t */\n-\tuint16_t slices_size;\n-};\n-\n-/**\n- * key layout memory contents\n- */\n-struct hcapi_cfa_key_layout_contents {\n-\t/** key layouts */\n-\tstruct hcapi_cfa_key_layout key_layout;\n-\n-\t/** layout */\n-\tstruct hcapi_cfa_layout layout;\n-\n-\t/** fields */\n-\tstruct hcapi_cfa_field field_array[CFA_KEY_MAX_FIELD_CNT];\n-};\n-\n-/**\n- * Action template consists of action fields that can be enabled/disabled\n- * individually.\n- */\n-struct hcapi_cfa_action_template {\n-\t/** [in] CFA version for the action template */\n-\tenum hcapi_cfa_ver hw_ver;\n-\t/** [in] action field enable field array, set 1 to the correspeonding\n-\t * field enable to make a field valid\n-\t */\n-\tuint8_t data[CFA_ACT_MAX_TEMPLATE_SZ];\n-};\n-\n-/**\n- * action layout consist of field array, action wordlen and action format ID\n- */\n-struct hcapi_cfa_action_layout {\n-\t/** [in] action identifier */\n-\tuint16_t id;\n-\t/** [out] action layout data */\n-\tstruct hcapi_cfa_layout *layout;\n-\t/** [out] actual action record size in number of bits */\n-\tuint16_t wordlen;\n-};\n-\n-/**\n- * \\defgroup CFA_HCAPI_PUT_API\n- * HCAPI used for writing to the hardware\n- * @{\n- */\n-\n-/**\n- * This API provides the functionality to program a specified value to a\n- * HW field based on the provided programming layout.\n- *\n- * @param[in,out] obj_data\n- * A data pointer to a CFA HW key/mask data\n- *\n- * @param[in] layout\n- * A pointer to CFA HW programming layout\n- *\n- * @param[in] field_id\n- * ID of the HW field to be programmed\n- *\n- * @param[in] val\n- * Value of the HW field to be programmed\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int hcapi_cfa_put_field(uint64_t *data_buf,\n-\t\t\tconst struct hcapi_cfa_layout *layout,\n-\t\t\tuint16_t field_id, uint64_t val);\n-\n-/**\n- * This API provides the functionality to program an array of field values\n- * with corresponding field IDs to a number of profiler sub-block fields\n- * based on the fixed profiler sub-block hardware programming layout.\n- *\n- * @param[in, out] obj_data\n- * A pointer to a CFA profiler key/mask object data\n- *\n- * @param[in] layout\n- * A pointer to CFA HW programming layout\n- *\n- * @param[in] field_tbl\n- * A pointer to an array that consists of the object field\n- * ID/value pairs\n- *\n- * @param[in] field_tbl_sz\n- * Number of entries in the table\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int hcapi_cfa_put_fields(uint64_t *obj_data,\n-\t\t\t const struct hcapi_cfa_layout *layout,\n-\t\t\t struct hcapi_cfa_data_obj *field_tbl,\n-\t\t\t uint16_t field_tbl_sz);\n-\n-/**\n- * This API provides the functionality to write a value to a\n- * field within the bit position and bit length of a HW data\n- * object based on a provided programming layout.\n- *\n- * @param[in, out] act_obj\n- * A pointer of the action object to be initialized\n- *\n- * @param[in] layout\n- * A pointer of the programming layout\n- *\n- * @param field_id\n- * [in] Identifier of the HW field\n- *\n- * @param[in] bitpos_adj\n- * Bit position adjustment value\n- *\n- * @param[in] bitlen_adj\n- * Bit length adjustment value\n- *\n- * @param[in] val\n- * HW field value to be programmed\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int hcapi_cfa_put_field_rel(uint64_t *obj_data,\n-\t\t\t const struct hcapi_cfa_layout *layout,\n-\t\t\t uint16_t field_id, int16_t bitpos_adj,\n-\t\t\t int16_t bitlen_adj, uint64_t val);\n-\n-/*@}*/\n-\n-/**\n- * \\defgroup CFA_HCAPI_GET_API\n- * HCAPI used for writing to the hardware\n- * @{\n- */\n-\n-/**\n- * This API provides the functionality to get the word length of\n- * a layout object.\n- *\n- * @param[in] layout\n- * A pointer of the HW layout\n- *\n- * @return\n- * Word length of the layout object\n- */\n-uint16_t hcapi_cfa_get_wordlen(const struct hcapi_cfa_layout *layout);\n-\n-/**\n- * The API provides the functionality to get bit offset and bit\n- * length information of a field from a programming layout.\n- *\n- * @param[in] layout\n- * A pointer of the action layout\n- *\n- * @param[out] slice\n- * A pointer to the action offset info data structure\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int hcapi_cfa_get_slice(const struct hcapi_cfa_layout *layout,\n-\t\t\tuint16_t field_id, struct hcapi_cfa_field *slice);\n-\n-/**\n- * This API provides the functionality to read the value of a\n- * CFA HW field from CFA HW data object based on the hardware\n- * programming layout.\n- *\n- * @param[in] obj_data\n- * A pointer to a CFA HW key/mask object data\n- *\n- * @param[in] layout\n- * A pointer to CFA HW programming layout\n- *\n- * @param[in] field_id\n- * ID of the HW field to be programmed\n- *\n- * @param[out] val\n- * Value of the HW field\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int hcapi_cfa_get_field(uint64_t *obj_data,\n-\t\t\tconst struct hcapi_cfa_layout *layout,\n-\t\t\tuint16_t field_id, uint64_t *val);\n-\n-/**\n- * This API provides the functionality to read a number of\n- * HW fields from a CFA HW data object based on the hardware\n- * programming layout.\n- *\n- * @param[in] obj_data\n- * A pointer to a CFA profiler key/mask object data\n- *\n- * @param[in] layout\n- * A pointer to CFA HW programming layout\n- *\n- * @param[in, out] field_tbl\n- * A pointer to an array that consists of the object field\n- * ID/value pairs\n- *\n- * @param[in] field_tbl_sz\n- * Number of entries in the table\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int hcapi_cfa_get_fields(uint64_t *obj_data,\n-\t\t\t const struct hcapi_cfa_layout *layout,\n-\t\t\t struct hcapi_cfa_data_obj *field_tbl,\n-\t\t\t uint16_t field_tbl_sz);\n-\n-/**\n- * Get a value to a specific location relative to a HW field\n- *\n- * This API provides the functionality to read HW field from\n- * a section of a HW data object identified by the bit position\n- * and bit length from a given programming layout in order to avoid\n- * reading the entire HW data object.\n- *\n- * @param[in] obj_data\n- * A pointer of the data object to read from\n- *\n- * @param[in] layout\n- * A pointer of the programming layout\n- *\n- * @param[in] field_id\n- * Identifier of the HW field\n- *\n- * @param[in] bitpos_adj\n- * Bit position adjustment value\n- *\n- * @param[in] bitlen_adj\n- * Bit length adjustment value\n- *\n- * @param[out] val\n- * Value of the HW field\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int hcapi_cfa_get_field_rel(uint64_t *obj_data,\n-\t\t\t const struct hcapi_cfa_layout *layout,\n-\t\t\t uint16_t field_id, int16_t bitpos_adj,\n-\t\t\t int16_t bitlen_adj, uint64_t *val);\n-\n-/**\n- * This function is used to initialize a layout_contents structure\n- *\n- * The struct hcapi_cfa_key_layout is complex as there are three\n- * layers of abstraction. Each of those layer need to be properly\n- * initialized.\n- *\n- * @param[in] layout_contents\n- * A pointer of the layout contents to initialize\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int\n-hcapi_cfa_init_key_layout_contents(struct hcapi_cfa_key_layout_contents *cont);\n-\n-/**\n- * This function is used to validate a key template\n- *\n- * The struct hcapi_cfa_key_template is complex as there are three\n- * layers of abstraction. Each of those layer need to be properly\n- * validated.\n- *\n- * @param[in] key_template\n- * A pointer of the key template contents to validate\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int\n-hcapi_cfa_is_valid_key_template(struct hcapi_cfa_key_template *key_template);\n-\n-/**\n- * This function is used to validate a key layout\n- *\n- * The struct hcapi_cfa_key_layout is complex as there are three\n- * layers of abstraction. Each of those layer need to be properly\n- * validated.\n- *\n- * @param[in] key_layout\n- * A pointer of the key layout contents to validate\n- *\n- * @return\n- * 0 for SUCCESS, negative value for FAILURE\n- */\n-int hcapi_cfa_is_valid_key_layout(struct hcapi_cfa_key_layout *key_layout);\n-\n /**\n * This function is used to hash E/EM keys\n *\ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h\nnew file mode 100644\nindex 0000000000..b2535098d2\n--- /dev/null\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h\n@@ -0,0 +1,411 @@\n+/*\n+ * Copyright(c) Broadcom Limited.\n+ * All rights reserved.\n+ */\n+\n+#ifndef _HCAPI_CFA_P58_H_\n+#define _HCAPI_CFA_P58_H_\n+\n+/** CFA phase 5.8 fix formatted table(layout) ID definition\n+ *\n+ */\n+enum cfa_p58_tbl_id {\n+\tCFA_P58_TBL_ILT = 0,\n+\tCFA_P58_TBL_L2CTXT_TCAM,\n+\tCFA_P58_TBL_L2CTXT_REMAP,\n+\tCFA_P58_TBL_PROF_TCAM,\n+\tCFA_P58_TBL_PROF_TCAM_REMAP,\n+\tCFA_P58_TBL_WC_TCAM,\n+\tCFA_P58_TBL_WC_TCAM_REC,\n+\tCFA_P58_TBL_VEB_TCAM,\n+\tCFA_P58_TBL_SP_TCAM,\n+\t/** Default Profile TCAM/Lookup Action Record Pointer Table */\n+\tCFA_P58_TBL_PROF_PARIF_DFLT_ACT_REC_PTR,\n+\t/** Error Profile TCAM Miss Action Record Pointer Table */\n+\tCFA_P58_TBL_PROF_PARIF_ERR_ACT_REC_PTR,\n+\t/** SR2 VNIC/SVIF Properties Table */\n+\tCFA_P58_TBL_VSPT,\n+\tCFA_P58_TBL_MAX\n+};\n+\n+#define CFA_P58_PROF_MAX_KEYS 4\n+enum cfa_p58_mac_sel_mode {\n+\tCFA_P58_MAC_SEL_MODE_FIRST = 0,\n+\tCFA_P58_MAC_SEL_MODE_LOWEST = 1,\n+};\n+\n+struct cfa_p58_prof_key_cfg {\n+\tuint8_t mac_sel[CFA_P58_PROF_MAX_KEYS];\n+#define CFA_P58_PROF_MAC_SEL_DMAC0 (1 << 0)\n+#define CFA_P58_PROF_MAC_SEL_T_MAC0 (1 << 1)\n+#define CFA_P58_PROF_MAC_SEL_OUTERMOST_MAC0 (1 << 2)\n+#define CFA_P58_PROF_MAC_SEL_DMAC1 (1 << 3)\n+#define CFA_P58_PROF_MAC_SEL_T_MAC1 (1 << 4)\n+#define CFA_P58_PROF_MAC_OUTERMOST_MAC1 (1 << 5)\n+\tuint8_t vlan_sel[CFA_P58_PROF_MAX_KEYS];\n+#define CFA_P58_PROFILER_VLAN_SEL_INNER_HDR 0\n+#define CFA_P58_PROFILER_VLAN_SEL_TUNNEL_HDR 1\n+#define CFA_P58_PROFILER_VLAN_SEL_OUTERMOST_HDR 2\n+\tuint8_t pass_cnt;\n+\tenum cfa_p58_mac_sel_mode mode;\n+};\n+\n+/**\n+ * CFA action layout definition\n+ */\n+\n+#define CFA_P58_ACTION_MAX_LAYOUT_SIZE 184\n+\n+/**\n+ * Action object template structure\n+ *\n+ * Template structure presents data fields that are necessary to know\n+ * at the beginning of Action Builder (AB) processing. Like before the\n+ * AB compilation. One such example could be a template that is\n+ * flexible in size (Encap Record) and the presence of these fields\n+ * allows for determining the template size as well as where the\n+ * fields are located in the record.\n+ *\n+ * The template may also present fields that are not made visible to\n+ * the caller by way of the action fields.\n+ *\n+ * Template fields also allow for additional checking on user visible\n+ * fields. One such example could be the encap pointer behavior on a\n+ * CFA_P58_ACT_OBJ_TYPE_ACT or CFA_P58_ACT_OBJ_TYPE_ACT_SRAM.\n+ */\n+struct cfa_p58_action_template {\n+\t/** Action Object type\n+\t *\n+\t * Controls the type of the Action Template\n+\t */\n+\tenum {\n+\t\t/** Select this type to build an Action Record Object\n+\t\t */\n+\t\tCFA_P58_ACT_OBJ_TYPE_ACT,\n+\t\t/** Select this type to build an Action Statistics\n+\t\t * Object\n+\t\t */\n+\t\tCFA_P58_ACT_OBJ_TYPE_STAT,\n+\t\t/** Select this type to build a SRAM Action Record\n+\t\t * Object.\n+\t\t */\n+\t\tCFA_P58_ACT_OBJ_TYPE_ACT_SRAM,\n+\t\t/** Select this type to build a SRAM Action\n+\t\t * Encapsulation Object.\n+\t\t */\n+\t\tCFA_P58_ACT_OBJ_TYPE_ENCAP_SRAM,\n+\t\t/** Select this type to build a SRAM Action Modify\n+\t\t * Object, with IPv4 capability.\n+\t\t */\n+\t\t/* In case of Stingray the term Modify is used for the 'NAT\n+\t\t * action'. Action builder is leveraged to fill in the NAT\n+\t\t * object which then can be referenced by the action\n+\t\t * record.\n+\t\t */\n+\t\tCFA_P58_ACT_OBJ_TYPE_MODIFY_IPV4_SRAM,\n+\t\t/** Select this type to build a SRAM Action Source\n+\t\t * Property Object.\n+\t\t */\n+\t\t/* In case of Stingray this is not a 'pure' action record.\n+\t\t * Action builder is leveraged to full in the Source Property\n+\t\t * object which can then be referenced by the action\n+\t\t * record.\n+\t\t */\n+\t\tCFA_P58_ACT_OBJ_TYPE_SRC_PROP_SRAM,\n+\t\t/** Select this type to build a SRAM Action Statistics\n+\t\t * Object\n+\t\t */\n+\t\tCFA_P58_ACT_OBJ_TYPE_STAT_SRAM,\n+\t} obj_type;\n+\n+\t/** Action Control\n+\t *\n+\t * Controls the internals of the Action Template\n+\t *\n+\t * act is valid when:\n+\t * (obj_type == CFA_P58_ACT_OBJ_TYPE_ACT)\n+\t */\n+\t/*\n+\t * Stat and encap are always inline for EEM as table scope\n+\t * allocation does not allow for separate Stats allocation,\n+\t * but has the xx_inline flags as to be forward compatible\n+\t * with Stingray 2, always treated as TRUE.\n+\t */\n+\tstruct {\n+\t\t/** Set to CFA_HCAPI_TRUE to enable statistics\n+\t\t */\n+\t\tuint8_t stat_enable;\n+\t\t/** Set to CFA_HCAPI_TRUE to enable statistics to be inlined\n+\t\t */\n+\t\tuint8_t stat_inline;\n+\n+\t\t/** Set to CFA_HCAPI_TRUE to enable encapsulation\n+\t\t */\n+\t\tuint8_t encap_enable;\n+\t\t/** Set to CFA_HCAPI_TRUE to enable encapsulation to be inlined\n+\t\t */\n+\t\tuint8_t encap_inline;\n+\t} act;\n+\n+\t/** Modify Setting\n+\t *\n+\t * Controls the type of the Modify Action the template is\n+\t * describing\n+\t *\n+\t * modify is valid when:\n+\t * (obj_type == CFA_P58_ACT_OBJ_TYPE_MODIFY_SRAM)\n+\t */\n+\tenum {\n+\t\t/** Set to enable Modify of Source IPv4 Address\n+\t\t */\n+\t\tCFA_P58_MR_REPLACE_SOURCE_IPV4 = 0,\n+\t\t/** Set to enable Modify of Destination IPv4 Address\n+\t\t */\n+\t\tCFA_P58_MR_REPLACE_DEST_IPV4\n+\t} modify;\n+\n+\t/** Encap Control\n+\t * Controls the type of encapsulation the template is\n+\t * describing\n+\t *\n+\t * encap is valid when:\n+\t * ((obj_type == CFA_P58_ACT_OBJ_TYPE_ACT) &&\n+\t * act.encap_enable) ||\n+\t * ((obj_type == CFA_P58_ACT_OBJ_TYPE_SRC_PROP_SRAM)\n+\t */\n+\tstruct {\n+\t\t/* Direction is required as Stingray Encap on RX is\n+\t\t * limited to l2 and VTAG only.\n+\t\t */\n+\t\t/** Receive or Transmit direction\n+\t\t */\n+\t\tuint8_t direction;\n+\t\t/** Set to CFA_HCAPI_TRUE to enable L2 capability in the\n+\t\t * template\n+\t\t */\n+\t\tuint8_t l2_enable;\n+\t\t/** vtag controls the Encap Vector - VTAG Encoding, 4 bits\n+\t\t *\n+\t\t * <ul>\n+\t\t * <li> CFA_P58_ACT_ENCAP_VTAGS_PUSH_0, default, no VLAN\n+\t\t * Tags applied\n+\t\t * <li> CFA_P58_ACT_ENCAP_VTAGS_PUSH_1, adds capability to\n+\t\t * set 1 VLAN Tag. Action Template compile adds\n+\t\t * the following field to the action object\n+\t\t * ::TF_ER_VLAN1\n+\t\t * <li> CFA_P58_ACT_ENCAP_VTAGS_PUSH_2, adds capability to\n+\t\t * set 2 VLAN Tags. Action Template compile adds\n+\t\t * the following fields to the action object\n+\t\t * ::TF_ER_VLAN1 and ::TF_ER_VLAN2\n+\t\t * </ul>\n+\t\t */\n+\t\tenum { CFA_P58_ACT_ENCAP_VTAGS_PUSH_0 = 0,\n+\t\t CFA_P58_ACT_ENCAP_VTAGS_PUSH_1,\n+\t\t CFA_P58_ACT_ENCAP_VTAGS_PUSH_2 } vtag;\n+\n+\t\t/*\n+\t\t * The remaining fields are NOT supported when\n+\t\t * direction is RX and ((obj_type ==\n+\t\t * CFA_P58_ACT_OBJ_TYPE_ACT) && act.encap_enable).\n+\t\t * ab_compile_layout will perform the checking and\n+\t\t * skip remaining fields.\n+\t\t */\n+\t\t/** L3 Encap controls the Encap Vector - L3 Encoding,\n+\t\t * 3 bits. Defines the type of L3 Encapsulation the\n+\t\t * template is describing.\n+\t\t * <ul>\n+\t\t * <li> CFA_P58_ACT_ENCAP_L3_NONE, default, no L3\n+\t\t * Encapsulation processing.\n+\t\t * <li> CFA_P58_ACT_ENCAP_L3_IPV4, enables L3 IPv4\n+\t\t * Encapsulation.\n+\t\t * <li> CFA_P58_ACT_ENCAP_L3_IPV6, enables L3 IPv6\n+\t\t * Encapsulation.\n+\t\t * <li> CFA_P58_ACT_ENCAP_L3_MPLS_8847, enables L3 MPLS\n+\t\t * 8847 Encapsulation.\n+\t\t * <li> CFA_P58_ACT_ENCAP_L3_MPLS_8848, enables L3 MPLS\n+\t\t * 8848 Encapsulation.\n+\t\t * </ul>\n+\t\t */\n+\t\tenum {\n+\t\t\t/** Set to disable any L3 encapsulation\n+\t\t\t * processing, default\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_L3_NONE = 0,\n+\t\t\t/** Set to enable L3 IPv4 encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_L3_IPV4 = 4,\n+\t\t\t/** Set to enable L3 IPv6 encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_L3_IPV6 = 5,\n+\t\t\t/** Set to enable L3 MPLS 8847 encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_L3_MPLS_8847 = 6,\n+\t\t\t/** Set to enable L3 MPLS 8848 encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_L3_MPLS_8848 = 7\n+\t\t} l3;\n+\n+#define CFA_P58_ACT_ENCAP_MAX_MPLS_LABELS 8\n+\t\t/** 1-8 labels, valid when\n+\t\t * (l3 == CFA_P58_ACT_ENCAP_L3_MPLS_8847) ||\n+\t\t * (l3 == CFA_P58_ACT_ENCAP_L3_MPLS_8848)\n+\t\t *\n+\t\t * MAX number of MPLS Labels 8.\n+\t\t */\n+\t\tuint8_t l3_num_mpls_labels;\n+\n+\t\t/** Set to CFA_HCAPI_TRUE to enable L4 capability in the\n+\t\t * template.\n+\t\t *\n+\t\t * CFA_HCAPI_TRUE adds ::TF_EN_UDP_SRC_PORT and\n+\t\t * ::TF_EN_UDP_DST_PORT to the template.\n+\t\t */\n+\t\tuint8_t l4_enable;\n+\n+\t\t/** Tunnel Encap controls the Encap Vector - Tunnel\n+\t\t * Encap, 3 bits. Defines the type of Tunnel\n+\t\t * encapsulation the template is describing\n+\t\t * <ul>\n+\t\t * <li> CFA_P58_ACT_ENCAP_TNL_NONE, default, no Tunnel\n+\t\t * Encapsulation processing.\n+\t\t * <li> CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL\n+\t\t * <li> CFA_P58_ACT_ENCAP_TNL_VXLAN. NOTE: Expects\n+\t\t * l4_enable set to CFA_P58_TRUE;\n+\t\t * <li> CFA_P58_ACT_ENCAP_TNL_NGE. NOTE: Expects l4_enable\n+\t\t * set to CFA_P58_TRUE;\n+\t\t * <li> CFA_P58_ACT_ENCAP_TNL_NVGRE. NOTE: only valid if\n+\t\t * l4_enable set to CFA_HCAPI_FALSE.\n+\t\t * <li> CFA_P58_ACT_ENCAP_TNL_GRE.NOTE: only valid if\n+\t\t * l4_enable set to CFA_HCAPI_FALSE.\n+\t\t * <li> CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4\n+\t\t * <li> CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL\n+\t\t * </ul>\n+\t\t */\n+\t\tenum {\n+\t\t\t/** Set to disable Tunnel header encapsulation\n+\t\t\t * processing, default\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_TNL_NONE = 0,\n+\t\t\t/** Set to enable Tunnel Generic Full header\n+\t\t\t * encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_TNL_GENERIC_FULL,\n+\t\t\t/** Set to enable VXLAN header encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_TNL_VXLAN,\n+\t\t\t/** Set to enable NGE (VXLAN2) header encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_TNL_NGE,\n+\t\t\t/** Set to enable NVGRE header encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_TNL_NVGRE,\n+\t\t\t/** Set to enable GRE header encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_TNL_GRE,\n+\t\t\t/** Set to enable Generic header after Tunnel\n+\t\t\t * L4 encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4,\n+\t\t\t/** Set to enable Generic header after Tunnel\n+\t\t\t * encapsulation\n+\t\t\t */\n+\t\t\tCFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL\n+\t\t} tnl;\n+\n+\t\t/** Number of bytes of generic tunnel header,\n+\t\t * valid when\n+\t\t * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL) ||\n+\t\t * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4) ||\n+\t\t * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL)\n+\t\t */\n+\t\tuint8_t tnl_generic_size;\n+\t\t/** Number of 32b words of nge options,\n+\t\t * valid when\n+\t\t * (tnl == CFA_P58_ACT_ENCAP_TNL_NGE)\n+\t\t */\n+\t\tuint8_t tnl_nge_op_len;\n+\t\t/* Currently not planned */\n+\t\t/* Custom Header */\n+\t\t/*\tuint8_t custom_enable; */\n+\t} encap;\n+};\n+\n+/**\n+ * Enumeration of SRAM entry types, used for allocation of\n+ * fixed SRAM entities. The memory model for CFA HCAPI\n+ * determines if an SRAM entry type is supported.\n+ */\n+enum cfa_p58_action_sram_entry_type {\n+\t/* NOTE: Any additions to this enum must be reflected on FW\n+\t * side as well.\n+\t */\n+\n+\t/** SRAM Action Record */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_ACT,\n+\t/** SRAM Action Encap 8 Bytes */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_ENCAP_8B,\n+\t/** SRAM Action Encap 16 Bytes */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_ENCAP_16B,\n+\t/** SRAM Action Encap 64 Bytes */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_ENCAP_64B,\n+\t/** SRAM Action Modify IPv4 Source */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_MODIFY_IPV4_SRC,\n+\t/** SRAM Action Modify IPv4 Destination */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_MODIFY_IPV4_DEST,\n+\t/** SRAM Action Source Properties SMAC */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_SP_SMAC,\n+\t/** SRAM Action Source Properties SMAC IPv4 */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_SP_SMAC_IPV4,\n+\t/** SRAM Action Source Properties SMAC IPv6 */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_SP_SMAC_IPV6,\n+\t/** SRAM Action Statistics 64 Bits */\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_STATS_64,\n+\tCFA_P58_ACTION_SRAM_ENTRY_TYPE_MAX\n+};\n+\n+/**\n+ * SRAM Action Record structure holding either an action index or an\n+ * action ptr.\n+ */\n+union cfa_p58_action_sram_act_record {\n+\t/** SRAM Action idx specifies the offset of the SRAM\n+\t * element within its SRAM Entry Type block. This\n+\t * index can be written into i.e. an L2 Context. Use\n+\t * this type for all SRAM Action Record types except\n+\t * SRAM Full Action records. Use act_ptr instead.\n+\t */\n+\tuint16_t act_idx;\n+\t/** SRAM Full Action is special in that it needs an\n+\t * action record pointer. This pointer can be written\n+\t * into i.e. a Wildcard TCAM entry.\n+\t */\n+\tuint32_t act_ptr;\n+};\n+\n+/**\n+ * cfa_p58_action_param parameter definition\n+ */\n+struct cfa_p58_action_param {\n+\t/**\n+\t * [in] receive or transmit direction\n+\t */\n+\tuint8_t dir;\n+\t/**\n+\t * [in] type of the sram allocation type\n+\t */\n+\tenum cfa_p58_action_sram_entry_type type;\n+\t/**\n+\t * [in] action record to set. The 'type' specified lists the\n+\t *\trecord definition to use in the passed in record.\n+\t */\n+\tunion cfa_p58_action_sram_act_record record;\n+\t/**\n+\t * [in] number of elements in act_data\n+\t */\n+\tuint32_t act_size;\n+\t/**\n+\t * [in] ptr to array of action data\n+\t */\n+\tuint64_t *act_data;\n+};\n+#endif /* _CFA_HW_P58_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/meson.build b/drivers/net/bnxt/tf_core/meson.build\nindex 373ee0413b..2c02214d83 100644\n--- a/drivers/net/bnxt/tf_core/meson.build\n+++ b/drivers/net/bnxt/tf_core/meson.build\n@@ -22,7 +22,6 @@ sources += files(\n 'tf_device_p4.c',\n 'tf_device_p58.c',\n 'tf_identifier.c',\n- 'tf_shadow_tbl.c',\n 'tf_shadow_tcam.c',\n 'tf_tcam.c',\n 'tf_util.c',\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h\nindex 4fe0590569..0cc3719a1b 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.h\n+++ b/drivers/net/bnxt/tf_core/tf_core.h\n@@ -153,6 +153,30 @@ enum tf_device_type {\n \tTF_DEVICE_TYPE_MAX /**< Maximum */\n };\n \n+/**\n+ * Module types\n+ */\n+enum tf_module_type {\n+\t/**\n+\t * Identifier module\n+\t */\n+\tTF_MODULE_TYPE_IDENTIFIER,\n+\t/**\n+\t * Table type module\n+\t */\n+\tTF_MODULE_TYPE_TABLE,\n+\t/**\n+\t * TCAM module\n+\t */\n+\tTF_MODULE_TYPE_TCAM,\n+\t/**\n+\t * EM module\n+\t */\n+\tTF_MODULE_TYPE_EM,\n+\tTF_MODULE_TYPE_MAX\n+};\n+\n+\n /**\n * Identifier resource types\n */\ndiff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c\nindex d072b9877c..61b3746d8b 100644\n--- a/drivers/net/bnxt/tf_core/tf_device.c\n+++ b/drivers/net/bnxt/tf_core/tf_device.c\n@@ -8,6 +8,7 @@\n #include \"tf_device_p58.h\"\n #include \"tfp.h\"\n #include \"tf_em.h\"\n+#include \"tf_rm.h\"\n \n struct tf;\n \n@@ -18,8 +19,8 @@ static int tf_dev_unbind_p58(struct tf *tfp);\n /**\n * Resource Reservation Check function\n *\n- * [in] tfp\n- * Pointer to TF handle\n+ * [in] count\n+ * Number of module subtypes\n *\n * [in] cfg\n * Pointer to rm element config\n@@ -28,11 +29,10 @@ static int tf_dev_unbind_p58(struct tf *tfp);\n * Pointer to resource reservation array\n *\n * Returns\n- * - (n) number of tables that have non-zero reservation count.\n+ * - (n) number of tables in module that have non-zero reservation count.\n */\n static int\n-tf_dev_reservation_check(struct tf *tfp __rte_unused,\n-\t\t\t uint16_t count,\n+tf_dev_reservation_check(uint16_t count,\n \t\t\t struct tf_rm_element_cfg *cfg,\n \t\t\t uint16_t *reservations)\n {\n@@ -94,8 +94,7 @@ tf_dev_bind_p4(struct tf *tfp,\n \n \t/* Initialize the modules */\n \n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_IDENT_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_IDENT_TYPE_MAX,\n \t\t\t\t\t tf_ident_p4,\n \t\t\t\t\t (uint16_t *)resources->ident_cnt);\n \tif (rsv_cnt) {\n@@ -113,8 +112,7 @@ tf_dev_bind_p4(struct tf *tfp,\n \t\tno_rsv_flag = false;\n \t}\n \n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_TBL_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_TBL_TYPE_MAX,\n \t\t\t\t\t tf_tbl_p4,\n \t\t\t\t\t (uint16_t *)resources->tbl_cnt);\n \tif (rsv_cnt) {\n@@ -132,8 +130,7 @@ tf_dev_bind_p4(struct tf *tfp,\n \t\tno_rsv_flag = false;\n \t}\n \n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_TCAM_TBL_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_TCAM_TBL_TYPE_MAX,\n \t\t\t\t\t tf_tcam_p4,\n \t\t\t\t\t (uint16_t *)resources->tcam_cnt);\n \tif (rsv_cnt) {\n@@ -155,8 +152,7 @@ tf_dev_bind_p4(struct tf *tfp,\n \t */\n \n \tem_cfg.cfg = tf_em_ext_p4;\n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_EM_TBL_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_EM_TBL_TYPE_MAX,\n \t\t\t\t\t em_cfg.cfg,\n \t\t\t\t\t (uint16_t *)resources->em_cnt);\n \tif (rsv_cnt) {\n@@ -175,8 +171,7 @@ tf_dev_bind_p4(struct tf *tfp,\n \t/*\n \t * EM\n \t */\n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_EM_TBL_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_EM_TBL_TYPE_MAX,\n \t\t\t\t\t tf_em_int_p4,\n \t\t\t\t\t (uint16_t *)resources->em_cnt);\n \tif (rsv_cnt) {\n@@ -360,10 +355,7 @@ tf_dev_bind_p58(struct tf *tfp,\n \t/* Initial function initialization */\n \tdev_handle->ops = &tf_dev_ops_p58_init;\n \n-\t/* Initialize the modules */\n-\n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_IDENT_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_IDENT_TYPE_MAX,\n \t\t\t\t\t tf_ident_p58,\n \t\t\t\t\t (uint16_t *)resources->ident_cnt);\n \tif (rsv_cnt) {\n@@ -380,8 +372,7 @@ tf_dev_bind_p58(struct tf *tfp,\n \t\tno_rsv_flag = false;\n \t}\n \n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_TBL_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_TBL_TYPE_MAX,\n \t\t\t\t\t tf_tbl_p58,\n \t\t\t\t\t (uint16_t *)resources->tbl_cnt);\n \tif (rsv_cnt) {\n@@ -398,8 +389,7 @@ tf_dev_bind_p58(struct tf *tfp,\n \t\tno_rsv_flag = false;\n \t}\n \n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_TCAM_TBL_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_TCAM_TBL_TYPE_MAX,\n \t\t\t\t\t tf_tcam_p58,\n \t\t\t\t\t (uint16_t *)resources->tcam_cnt);\n \tif (rsv_cnt) {\n@@ -419,8 +409,7 @@ tf_dev_bind_p58(struct tf *tfp,\n \t/*\n \t * EM\n \t */\n-\trsv_cnt = tf_dev_reservation_check(tfp,\n-\t\t\t\t\t TF_EM_TBL_TYPE_MAX,\n+\trsv_cnt = tf_dev_reservation_check(TF_EM_TBL_TYPE_MAX,\n \t\t\t\t\t tf_em_int_p58,\n \t\t\t\t\t (uint16_t *)resources->em_cnt);\n \tif (rsv_cnt) {\n@@ -593,10 +582,10 @@ tf_dev_bind_ops(enum tf_device_type type,\n \tswitch (type) {\n \tcase TF_DEVICE_TYPE_WH:\n \tcase TF_DEVICE_TYPE_SR:\n-\t\tdev_handle->ops = &tf_dev_ops_p4;\n+\t\tdev_handle->ops = &tf_dev_ops_p4_init;\n \t\tbreak;\n \tcase TF_DEVICE_TYPE_THOR:\n-\t\tdev_handle->ops = &tf_dev_ops_p58;\n+\t\tdev_handle->ops = &tf_dev_ops_p58_init;\n \t\tbreak;\n \tdefault:\n \t\tTFP_DRV_LOG(ERR,\ndiff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h\nindex 4f4120c603..2cbb42fe2a 100644\n--- a/drivers/net/bnxt/tf_core/tf_device.h\n+++ b/drivers/net/bnxt/tf_core/tf_device.h\n@@ -16,29 +16,6 @@\n struct tf;\n struct tf_session;\n \n-/**\n- * Device module types\n- */\n-enum tf_device_module_type {\n-\t/**\n-\t * Identifier module\n-\t */\n-\tTF_DEVICE_MODULE_TYPE_IDENTIFIER,\n-\t/**\n-\t * Table type module\n-\t */\n-\tTF_DEVICE_MODULE_TYPE_TABLE,\n-\t/**\n-\t * TCAM module\n-\t */\n-\tTF_DEVICE_MODULE_TYPE_TCAM,\n-\t/**\n-\t * EM module\n-\t */\n-\tTF_DEVICE_MODULE_TYPE_EM,\n-\tTF_DEVICE_MODULE_TYPE_MAX\n-};\n-\n /**\n * The Device module provides a general device template. A supported\n * device type should implement one or more of the listed function\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c\nindex fbe92b7733..d0bede89e3 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.c\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.c\n@@ -74,29 +74,10 @@ static int\n tf_dev_p4_get_max_types(struct tf *tfp,\n \t\t\tuint16_t *max_types)\n {\n-\tstruct tf_session *tfs;\n-\tstruct tf_dev_info *dev;\n-\tint rc;\n-\n \tif (max_types == NULL || tfp == NULL)\n \t\treturn -EINVAL;\n \n-\t/* Retrieve the session information */\n-\trc = tf_session_get_session(tfp, &tfs);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\t/* Retrieve the device information */\n-\trc = tf_session_get_device(tfs, &dev);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\tif (dev->type == TF_DEVICE_TYPE_WH)\n-\t\t*max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;\n-\telse if (dev->type == TF_DEVICE_TYPE_SR)\n-\t\t*max_types = CFA_RESOURCE_TYPE_P45_LAST + 1;\n-\telse\n-\t\treturn -ENODEV;\n+\t*max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;\n \n \treturn 0;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c\nindex 688d987cb7..50a8d82074 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p58.c\n+++ b/drivers/net/bnxt/tf_core/tf_device_p58.c\n@@ -58,25 +58,11 @@ const char *tf_resource_str_p58[CFA_RESOURCE_TYPE_P58_LAST + 1] = {\n */\n static int\n tf_dev_p58_get_max_types(struct tf *tfp,\n-\t\t\tuint16_t *max_types)\n+\t\t\t uint16_t *max_types)\n {\n-\tstruct tf_session *tfs;\n-\tstruct tf_dev_info *dev;\n-\tint rc;\n-\n \tif (max_types == NULL || tfp == NULL)\n \t\treturn -EINVAL;\n \n-\t/* Retrieve the session information */\n-\trc = tf_session_get_session(tfp, &tfs);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\t/* Retrieve the device information */\n-\trc = tf_session_get_device(tfs, &dev);\n-\tif (rc)\n-\t\treturn rc;\n-\n \t*max_types = CFA_RESOURCE_TYPE_P58_LAST + 1;\n \n \treturn 0;\n@@ -153,41 +139,6 @@ tf_dev_p58_get_tcam_slice_info(struct tf *tfp __rte_unused,\n \treturn 0;\n }\n \n-static int\n-tf_dev_p58_map_parif(struct tf *tfp __rte_unused,\n-\t\t uint16_t parif_bitmask,\n-\t\t uint16_t pf,\n-\t\t uint8_t *data,\n-\t\t uint8_t *mask,\n-\t\t uint16_t sz_in_bytes)\n-{\n-\tuint32_t parif_pf[2] = { 0 };\n-\tuint32_t parif_pf_mask[2] = { 0 };\n-\tuint32_t parif;\n-\tuint32_t shift;\n-\n-\tif (sz_in_bytes != sizeof(uint64_t))\n-\t\treturn -ENOTSUP;\n-\n-\tfor (parif = 0; parif < TF_DEV_P58_PARIF_MAX; parif++) {\n-\t\tif (parif_bitmask & (1UL << parif)) {\n-\t\t\tif (parif < 8) {\n-\t\t\t\tshift = 4 * parif;\n-\t\t\t\tparif_pf_mask[0] |= TF_DEV_P58_PF_MASK << shift;\n-\t\t\t\tparif_pf[0] |= pf << shift;\n-\t\t\t} else {\n-\t\t\t\tshift = 4 * (parif - 8);\n-\t\t\t\tparif_pf_mask[1] |= TF_DEV_P58_PF_MASK << shift;\n-\t\t\t\tparif_pf[1] |= pf << shift;\n-\t\t\t}\n-\t\t}\n-\t}\n-\ttfp_memcpy(data, parif_pf, sz_in_bytes);\n-\ttfp_memcpy(mask, parif_pf_mask, sz_in_bytes);\n-\n-\treturn 0;\n-}\n-\n static int tf_dev_p58_get_mailbox(void)\n {\n \treturn TF_CHIMP_MB;\n@@ -268,7 +219,7 @@ const struct tf_dev_ops tf_dev_ops_p58 = {\n \t.tf_dev_delete_ext_em_entry = NULL,\n \t.tf_dev_alloc_tbl_scope = NULL,\n \t.tf_dev_map_tbl_scope = NULL,\n-\t.tf_dev_map_parif = tf_dev_p58_map_parif,\n+\t.tf_dev_map_parif = NULL,\n \t.tf_dev_free_tbl_scope = NULL,\n \t.tf_dev_set_if_tbl = tf_if_tbl_set,\n \t.tf_dev_get_if_tbl = tf_if_tbl_get,\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p58.h b/drivers/net/bnxt/tf_core/tf_device_p58.h\nindex de7bb1cd76..abd916985e 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p58.h\n+++ b/drivers/net/bnxt/tf_core/tf_device_p58.h\n@@ -64,6 +64,105 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = {\n \t[TF_TBL_TYPE_MIRROR_CONFIG] = {\n \t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_MIRROR\n \t},\n+\t/* Policy - ARs in bank 1 */\n+\t[TF_TBL_TYPE_FULL_ACT_RECORD] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_1,\n+\t\t.slices = 4,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_COMPACT_ACT_RECORD] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_FULL_ACT_RECORD,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_1,\n+\t\t.slices = 8,\n+\t\t.divider = 8,\n+\t},\n+\t/* Policy - Encaps in bank 2 */\n+\t[TF_TBL_TYPE_ACT_ENCAP_8B] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,\n+\t\t.slices = 8,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_ACT_ENCAP_16B] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,\n+\t\t.slices = 4,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_ACT_ENCAP_32B] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,\n+\t\t.slices = 2,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_ACT_ENCAP_64B] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,\n+\t\t.slices = 1,\n+\t\t.divider = 8,\n+\t},\n+\t/* Policy - Modify in bank 2 with Encaps */\n+\t[TF_TBL_TYPE_ACT_MODIFY_8B] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,\n+\t\t.slices = 8,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_ACT_MODIFY_16B] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,\n+\t\t.slices = 4,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_ACT_MODIFY_32B] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,\n+\t\t.slices = 2,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_ACT_MODIFY_64B] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2,\n+\t\t.slices = 1,\n+\t\t.divider = 8,\n+\t},\n+\t/* Policy - SP in bank 0 */\n+\t[TF_TBL_TYPE_ACT_SP_SMAC] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0,\n+\t\t.slices = 8,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_SP_SMAC,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0,\n+\t\t.slices = 4,\n+\t\t.divider = 8,\n+\t},\n+\t[TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\t\t.parent_subtype = TF_TBL_TYPE_ACT_SP_SMAC,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0,\n+\t\t.slices = 2,\n+\t\t.divider = 8,\n+\t},\n+\t/* Policy - Stats in bank 3 */\n+\t[TF_TBL_TYPE_ACT_STATS_64] = {\n+\t\t.cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT,\n+\t\t.hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_3,\n+\t\t.slices = 8,\n+\t\t.divider = 8,\n+\t},\n };\n \n struct tf_rm_element_cfg tf_em_int_p58[TF_EM_TBL_TYPE_MAX] = {\n@@ -72,7 +171,16 @@ struct tf_rm_element_cfg tf_em_int_p58[TF_EM_TBL_TYPE_MAX] = {\n \t},\n };\n \n-struct tf_if_tbl_cfg tf_if_tbl_p58[TF_IF_TBL_TYPE_MAX];\n+struct tf_if_tbl_cfg tf_if_tbl_p58[TF_IF_TBL_TYPE_MAX] = {\n+\t[TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR] = {\n+\t\tTF_IF_TBL_CFG, CFA_P58_TBL_PROF_PARIF_DFLT_ACT_REC_PTR},\n+\t[TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR] = {\n+\t\tTF_IF_TBL_CFG, CFA_P58_TBL_PROF_PARIF_ERR_ACT_REC_PTR},\n+\t[TF_IF_TBL_TYPE_ILT] = {\n+\t\tTF_IF_TBL_CFG, CFA_P58_TBL_ILT},\n+\t[TF_IF_TBL_TYPE_VSPT] = {\n+\t\tTF_IF_TBL_CFG, CFA_P58_TBL_VSPT},\n+};\n \n struct tf_global_cfg_cfg tf_global_cfg_p58[TF_GLOBAL_CFG_TYPE_MAX] = {\n \t[TF_TUNNEL_ENCAP] = {\ndiff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c\nindex 6cd6086685..589df60041 100644\n--- a/drivers/net/bnxt/tf_core/tf_em_common.c\n+++ b/drivers/net/bnxt/tf_core/tf_em_common.c\n@@ -54,7 +54,7 @@ tbl_scope_cb_find(uint32_t tbl_scope_id)\n \n \t/* Check that id is valid */\n \tparms.rm_db = eem_db[TF_DIR_RX];\n-\tparms.db_index = TF_EM_TBL_TYPE_TBL_SCOPE;\n+\tparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE;\n \tparms.index = tbl_scope_id;\n \tparms.allocated = &allocated;\n \n@@ -895,7 +895,7 @@ tf_em_ext_common_bind(struct tf *tfp,\n \t\treturn -EINVAL;\n \t}\n \n-\tdb_cfg.type = TF_DEVICE_MODULE_TYPE_EM;\n+\tdb_cfg.module = TF_MODULE_TYPE_EM;\n \tdb_cfg.num_elements = parms->num_elements;\n \tdb_cfg.cfg = parms->cfg;\n \ndiff --git a/drivers/net/bnxt/tf_core/tf_em_host.c b/drivers/net/bnxt/tf_core/tf_em_host.c\nindex 69f7e5bddd..166f397935 100644\n--- a/drivers/net/bnxt/tf_core/tf_em_host.c\n+++ b/drivers/net/bnxt/tf_core/tf_em_host.c\n@@ -379,7 +379,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms)\n \n \t/* Get Table Scope control block from the session pool */\n \taparms.rm_db = eem_db[TF_DIR_RX];\n-\taparms.db_index = TF_EM_TBL_TYPE_TBL_SCOPE;\n+\taparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE;\n \taparms.index = (uint32_t *)&parms->tbl_scope_id;\n \trc = tf_rm_allocate(&aparms);\n \tif (rc) {\n@@ -488,7 +488,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms)\n cleanup:\n \t/* Free Table control block */\n \tfparms.rm_db = eem_db[TF_DIR_RX];\n-\tfparms.db_index = TF_EM_TBL_TYPE_TBL_SCOPE;\n+\tfparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE;\n \tfparms.index = parms->tbl_scope_id;\n \ttf_rm_free(&fparms);\n \treturn -EINVAL;\n@@ -512,7 +512,7 @@ tf_em_ext_free(struct tf *tfp,\n \n \t/* Free Table control block */\n \taparms.rm_db = eem_db[TF_DIR_RX];\n-\taparms.db_index = TF_EM_TBL_TYPE_TBL_SCOPE;\n+\taparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE;\n \taparms.index = parms->tbl_scope_id;\n \trc = tf_rm_free(&aparms);\n \tif (rc) {\ndiff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c\nindex 0864218469..043f9be4da 100644\n--- a/drivers/net/bnxt/tf_core/tf_em_internal.c\n+++ b/drivers/net/bnxt/tf_core/tf_em_internal.c\n@@ -251,7 +251,7 @@ tf_em_int_bind(struct tf *tfp,\n \t\treturn -EINVAL;\n \t}\n \n-\tdb_cfg.type = TF_DEVICE_MODULE_TYPE_EM;\n+\tdb_cfg.module = TF_MODULE_TYPE_EM;\n \tdb_cfg.num_elements = parms->num_elements;\n \tdb_cfg.cfg = parms->cfg;\n \n@@ -294,7 +294,7 @@ tf_em_int_bind(struct tf *tfp,\n \n \tfor (i = 0; i < TF_DIR_MAX; i++) {\n \t\tiparms.rm_db = em_db[i];\n-\t\tiparms.db_index = TF_EM_DB_EM_REC;\n+\t\tiparms.subtype = TF_EM_DB_EM_REC;\n \t\tiparms.info = &info;\n \n \t\trc = tf_rm_get_info(&iparms);\ndiff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c\nindex 41ab13c132..9d0a578085 100644\n--- a/drivers/net/bnxt/tf_core/tf_identifier.c\n+++ b/drivers/net/bnxt/tf_core/tf_identifier.c\n@@ -52,7 +52,7 @@ tf_ident_bind(struct tf *tfp,\n \t\treturn -EINVAL;\n \t}\n \n-\tdb_cfg.type = TF_DEVICE_MODULE_TYPE_IDENTIFIER;\n+\tdb_cfg.module = TF_MODULE_TYPE_IDENTIFIER;\n \tdb_cfg.num_elements = parms->num_elements;\n \tdb_cfg.cfg = parms->cfg;\n \n@@ -161,7 +161,7 @@ tf_ident_alloc(struct tf *tfp __rte_unused,\n \n \t/* Allocate requested element */\n \taparms.rm_db = ident_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = &id;\n \taparms.base_index = &base_id;\n \trc = tf_rm_allocate(&aparms);\n@@ -215,7 +215,7 @@ tf_ident_free(struct tf *tfp __rte_unused,\n \n \t/* Check if element is in use */\n \taparms.rm_db = ident_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = parms->id;\n \taparms.base_index = &base_id;\n \taparms.allocated = &allocated;\n@@ -255,7 +255,7 @@ tf_ident_free(struct tf *tfp __rte_unused,\n \n \t/* Free requested element */\n \tfparms.rm_db = ident_db[parms->dir];\n-\tfparms.db_index = parms->type;\n+\tfparms.subtype = parms->type;\n \tfparms.index = parms->id;\n \trc = tf_rm_free(&fparms);\n \tif (rc) {\n@@ -298,7 +298,7 @@ tf_ident_search(struct tf *tfp __rte_unused,\n \n \t/* Check if element is in use */\n \taparms.rm_db = ident_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = parms->search_id;\n \taparms.base_index = &base_id;\n \taparms.allocated = &allocated;\ndiff --git a/drivers/net/bnxt/tf_core/tf_if_tbl.c b/drivers/net/bnxt/tf_core/tf_if_tbl.c\nindex 16afa95e38..f58fa79b63 100644\n--- a/drivers/net/bnxt/tf_core/tf_if_tbl.c\n+++ b/drivers/net/bnxt/tf_core/tf_if_tbl.c\n@@ -144,7 +144,7 @@ int\n tf_if_tbl_get(struct tf *tfp,\n \t struct tf_if_tbl_get_parms *parms)\n {\n-\tint rc;\n+\tint rc = 0;\n \tstruct tf_if_tbl_get_hcapi_parms hparms;\n \n \tTF_CHECK_PARMS3(tfp, parms, parms->data);\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c\nindex 19de6e4c63..50f6b1eeab 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm.c\n+++ b/drivers/net/bnxt/tf_core/tf_rm.c\n@@ -42,10 +42,18 @@ struct tf_rm_element {\n \t */\n \tstruct tf_rm_alloc_info alloc;\n \n+\t/**\n+\t * If cfg_type == HCAPI_BA_CHILD, this field indicates\n+\t * the parent module subtype for look up into the parent pool.\n+\t * An example subtype is TF_TBL_TYPE_FULL_ACT_RECORD which is a\n+\t * module subtype of TF_MODULE_TYPE_TABLE.\n+\t */\n+\tuint16_t parent_subtype;\n+\n \t/**\n \t * Bit allocator pool for the element. Pool size is controlled\n \t * by the struct tf_session_resources at time of session creation.\n-\t * Null indicates that the element is not used for the device.\n+\t * Null indicates that the pool is not used for the element.\n \t */\n \tstruct bitalloc *pool;\n };\n@@ -67,7 +75,7 @@ struct tf_rm_new_db {\n \t/**\n \t * Module type, used for logging purposes.\n \t */\n-\tenum tf_device_module_type type;\n+\tenum tf_module_type module;\n \n \t/**\n \t * The DB consists of an array of elements\n@@ -100,7 +108,7 @@ struct tf_rm_new_db {\n */\n static void\n tf_rm_count_hcapi_reservations(enum tf_dir dir,\n-\t\t\t enum tf_device_module_type type,\n+\t\t\t enum tf_module_type module,\n \t\t\t struct tf_rm_element_cfg *cfg,\n \t\t\t uint16_t *reservations,\n \t\t\t uint16_t count,\n@@ -110,8 +118,7 @@ tf_rm_count_hcapi_reservations(enum tf_dir dir,\n \tuint16_t cnt = 0;\n \n \tfor (i = 0; i < count; i++) {\n-\t\tif ((cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI ||\n-\t\t cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) &&\n+\t\tif (cfg[i].cfg_type != TF_RM_ELEM_CFG_NULL &&\n \t\t reservations[i] > 0)\n \t\t\tcnt++;\n \n@@ -120,14 +127,14 @@ tf_rm_count_hcapi_reservations(enum tf_dir dir,\n \t\t * split configuration array thus it would fail for\n \t\t * this type of check.\n \t\t */\n-\t\tif (type != TF_DEVICE_MODULE_TYPE_EM &&\n+\t\tif (module != TF_MODULE_TYPE_EM &&\n \t\t cfg[i].cfg_type == TF_RM_ELEM_CFG_NULL &&\n \t\t reservations[i] > 0) {\n \t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t\"%s, %s, %s allocation of %d not supported\\n\",\n-\t\t\t\ttf_device_module_type_2_str(type),\n+\t\t\t\ttf_module_2_str(module),\n \t\t\t\ttf_dir_2_str(dir),\n-\t\t\t\ttf_device_module_type_subtype_2_str(type, i),\n+\t\t\t\ttf_module_subtype_2_str(module, i),\n \t\t\t\treservations[i]);\n \t\t}\n \t}\n@@ -156,8 +163,10 @@ enum tf_rm_adjust_type {\n * [in] action\n * Adjust action\n *\n- * [in] db_index\n- * DB index for the element type\n+ * [in] subtype\n+ * TF module subtype used as an index into the database.\n+ * An example subtype is TF_TBL_TYPE_FULL_ACT_RECORD which is a\n+ * module subtype of TF_MODULE_TYPE_TABLE.\n *\n * [in] index\n * Index to convert\n@@ -172,14 +181,14 @@ enum tf_rm_adjust_type {\n static int\n tf_rm_adjust_index(struct tf_rm_element *db,\n \t\t enum tf_rm_adjust_type action,\n-\t\t uint32_t db_index,\n+\t\t uint32_t subtype,\n \t\t uint32_t index,\n \t\t uint32_t *adj_index)\n {\n \tint rc = 0;\n \tuint32_t base_index;\n \n-\tbase_index = db[db_index].alloc.entry.start;\n+\tbase_index = db[subtype].alloc.entry.start;\n \n \tswitch (action) {\n \tcase TF_RM_ADJUST_RM_BASE:\n@@ -201,7 +210,7 @@ tf_rm_adjust_index(struct tf_rm_element *db,\n * [in] dir\n * Receive or transmit direction\n *\n- * [in] type\n+ * [in] module\n * Type of Device Module\n *\n * [in] count\n@@ -214,7 +223,7 @@ tf_rm_adjust_index(struct tf_rm_element *db,\n */\n static void\n tf_rm_log_residuals(enum tf_dir dir,\n-\t\t enum tf_device_module_type type,\n+\t\t enum tf_module_type module,\n \t\t uint16_t count,\n \t\t uint16_t *residuals)\n {\n@@ -228,7 +237,7 @@ tf_rm_log_residuals(enum tf_dir dir,\n \t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t\"%s, %s was not cleaned up, %d outstanding\\n\",\n \t\t\t\ttf_dir_2_str(dir),\n-\t\t\t\ttf_device_module_type_subtype_2_str(type, i),\n+\t\t\t\ttf_module_subtype_2_str(module, i),\n \t\t\t\tresiduals[i]);\n \t}\n }\n@@ -295,7 +304,7 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db,\n \tiparms.rm_db = rm_db;\n \tiparms.count = &count;\n \tfor (i = 0, found = 0; i < rm_db->num_entries; i++) {\n-\t\tiparms.db_index = i;\n+\t\tiparms.subtype = i;\n \t\trc = tf_rm_get_inuse_count(&iparms);\n \t\t/* Not a device supported entry, just skip */\n \t\tif (rc == -ENOTSUP)\n@@ -329,13 +338,13 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db,\n \t\tfor (i = 0, f = 0; i < rm_db->num_entries; i++) {\n \t\t\tif (residuals[i] == 0)\n \t\t\t\tcontinue;\n-\t\t\taparms.db_index = i;\n+\t\t\taparms.subtype = i;\n \t\t\taparms.info = &info;\n \t\t\trc = tf_rm_get_info(&aparms);\n \t\t\tif (rc)\n \t\t\t\tgoto cleanup_all;\n \n-\t\t\thparms.db_index = i;\n+\t\t\thparms.subtype = i;\n \t\t\trc = tf_rm_get_hcapi_type(&hparms);\n \t\t\tif (rc)\n \t\t\t\tgoto cleanup_all;\n@@ -349,7 +358,7 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db,\n \t}\n \n \ttf_rm_log_residuals(rm_db->dir,\n-\t\t\t rm_db->type,\n+\t\t\t rm_db->module,\n \t\t\t rm_db->num_entries,\n \t\t\t residuals);\n \n@@ -367,16 +376,93 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db,\n \treturn rc;\n }\n \n+/**\n+ * Some resources do not have a 1:1 mapping between the Truflow type and the cfa\n+ * resource type (HCAPI RM). These resources have multiple Truflow types which\n+ * map to a single HCAPI RM type. In order to support this, one Truflow type\n+ * sharing the HCAPI resources is designated the parent. All other Truflow\n+ * types associated with that HCAPI RM type are designated the children.\n+ *\n+ * This function updates the resource counts of any HCAPI_BA_PARENT with the\n+ * counts of the HCAPI_BA_CHILDREN. These are read from the alloc_cnt and\n+ * written back to the req_cnt.\n+ *\n+ * [in] cfg\n+ * Pointer to an array of module specific Truflow type indexed RM cfg items\n+ *\n+ * [in] alloc_cnt\n+ * Pointer to the tf_open_session() configured array of module specific\n+ * Truflow type indexed requested counts.\n+ *\n+ * [in/out] req_cnt\n+ * Pointer to the location to put the updated resource counts.\n+ *\n+ * Returns:\n+ * 0 - Success\n+ * - - Failure if negative\n+ */\n+static int\n+tf_rm_update_parent_reservations(struct tf_rm_element_cfg *cfg,\n+\t\t\t\t uint16_t *alloc_cnt,\n+\t\t\t\t uint16_t num_elements,\n+\t\t\t\t uint16_t *req_cnt)\n+{\n+\tint parent, child;\n+\n+\t/* Search through all the elements */\n+\tfor (parent = 0; parent < num_elements; parent++) {\n+\t\tuint16_t combined_cnt = 0;\n+\n+\t\t/* If I am a parent */\n+\t\tif (cfg[parent].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) {\n+\t\t\t/* start with my own count */\n+\t\t\tRTE_ASSERT(cfg[parent].slices);\n+\t\t\tcombined_cnt =\n+\t\t\t\talloc_cnt[parent] / cfg[parent].slices;\n+\n+\t\t\tif (alloc_cnt[parent] % cfg[parent].slices)\n+\t\t\t\tcombined_cnt++;\n+\n+\t\t\t/* Search again through all the elements */\n+\t\t\tfor (child = 0; child < num_elements; child++) {\n+\t\t\t\t/* If this is one of my children */\n+\t\t\t\tif (cfg[child].cfg_type ==\n+\t\t\t\t TF_RM_ELEM_CFG_HCAPI_BA_CHILD &&\n+\t\t\t\t cfg[child].parent_subtype == parent) {\n+\t\t\t\t\tuint16_t cnt = 0;\n+\t\t\t\t\tRTE_ASSERT(cfg[child].slices);\n+\n+\t\t\t\t\t/* Increment the parents combined count\n+\t\t\t\t\t * with each child's count adjusted for\n+\t\t\t\t\t * number of slices per RM allocated item.\n+\t\t\t\t\t */\n+\t\t\t\t\tcnt =\n+\t\t\t\t\t alloc_cnt[child] / cfg[child].slices;\n+\n+\t\t\t\t\tif (alloc_cnt[child] % cfg[child].slices)\n+\t\t\t\t\t\tcnt++;\n+\n+\t\t\t\t\tcombined_cnt += cnt;\n+\t\t\t\t\t/* Clear the requested child count */\n+\t\t\t\t\treq_cnt[child] = 0;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t\t/* Save the parent count to be requested */\n+\t\t\treq_cnt[parent] = combined_cnt;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n int\n tf_rm_create_db(struct tf *tfp,\n \t\tstruct tf_rm_create_db_parms *parms)\n {\n \tint rc;\n-\tint i;\n-\tint j;\n \tstruct tf_session *tfs;\n \tstruct tf_dev_info *dev;\n-\tuint16_t max_types;\n+\tint i, j;\n+\tuint16_t max_types, hcapi_items, *req_cnt;\n \tstruct tfp_calloc_parms cparms;\n \tstruct tf_rm_resc_req_entry *query;\n \tenum tf_rm_resc_resv_strategy resv_strategy;\n@@ -385,7 +471,6 @@ tf_rm_create_db(struct tf *tfp,\n \tstruct tf_rm_new_db *rm_db;\n \tstruct tf_rm_element *db;\n \tuint32_t pool_size;\n-\tuint16_t hcapi_items;\n \n \tTF_CHECK_PARMS2(tfp, parms);\n \n@@ -401,9 +486,9 @@ tf_rm_create_db(struct tf *tfp,\n \n \t/* Need device max number of elements for the RM QCAPS */\n \trc = dev->ops->tf_dev_get_max_types(tfp, &max_types);\n-\tif (rc)\n-\t\treturn rc;\n \n+\n+\t/* Allocate memory for RM QCAPS request */\n \tcparms.nitems = max_types;\n \tcparms.size = sizeof(struct tf_rm_resc_req_entry);\n \tcparms.alignment = 0;\n@@ -423,6 +508,28 @@ tf_rm_create_db(struct tf *tfp,\n \tif (rc)\n \t\treturn rc;\n \n+\t/* Copy requested counts (alloc_cnt) from tf_open_session() to local\n+\t * copy (req_cnt) so that it can be updated if required.\n+\t */\n+\n+\tcparms.nitems = parms->num_elements;\n+\tcparms.size = sizeof(uint16_t);\n+\trc = tfp_calloc(&cparms);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treq_cnt = (uint16_t *)cparms.mem_va;\n+\n+\ttfp_memcpy(req_cnt, parms->alloc_cnt,\n+\t\t parms->num_elements * sizeof(uint16_t));\n+\n+\t/* Update the req_cnt based upon the element configuration\n+\t */\n+\ttf_rm_update_parent_reservations(parms->cfg,\n+\t\t\t\t\t parms->alloc_cnt,\n+\t\t\t\t\t parms->num_elements,\n+\t\t\t\t\t req_cnt);\n+\n \t/* Process capabilities against DB requirements. However, as a\n \t * DB can hold elements that are not HCAPI we can reduce the\n \t * req msg content by removing those out of the request yet\n@@ -430,21 +537,17 @@ tf_rm_create_db(struct tf *tfp,\n \t * remove entries where there are no request for elements.\n \t */\n \ttf_rm_count_hcapi_reservations(parms->dir,\n-\t\t\t\t parms->type,\n+\t\t\t\t parms->module,\n \t\t\t\t parms->cfg,\n-\t\t\t\t parms->alloc_cnt,\n+\t\t\t\t req_cnt,\n \t\t\t\t parms->num_elements,\n \t\t\t\t &hcapi_items);\n \n-\t/* Handle the case where a DB create request really ends up\n-\t * being empty. Unsupported (if not rare) case but possible\n-\t * that no resources are necessary for a 'direction'.\n-\t */\n \tif (hcapi_items == 0) {\n \t\tTFP_DRV_LOG(ERR,\n-\t\t\t\"%s: DB create request for Zero elements, DB Type:%s\\n\",\n-\t\t\ttf_dir_2_str(parms->dir),\n-\t\t\ttf_device_module_type_2_str(parms->type));\n+\t\t\t \"%s: module:%s Empty RM DB create request\\n\",\n+\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t tf_module_2_str(parms->module));\n \n \t\tparms->rm_db = NULL;\n \t\treturn -ENOMEM;\n@@ -467,44 +570,45 @@ tf_rm_create_db(struct tf *tfp,\n \n \t/* Build the request */\n \tfor (i = 0, j = 0; i < parms->num_elements; i++) {\n-\t\t/* Skip any non HCAPI cfg elements */\n-\t\tif (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI ||\n-\t\t parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) {\n-\t\t\t/* Only perform reservation for entries that\n-\t\t\t * has been requested\n-\t\t\t */\n-\t\t\tif (parms->alloc_cnt[i] == 0)\n-\t\t\t\tcontinue;\n+\t\tstruct tf_rm_element_cfg *cfg = &parms->cfg[i];\n+\t\tuint16_t hcapi_type = cfg->hcapi_type;\n+\n+\t\t/* Only perform reservation for requested entries\n+\t\t */\n+\t\tif (req_cnt[i] == 0)\n+\t\t\tcontinue;\n+\n+\t\t/* Skip any children in the request */\n+\t\tif (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI ||\n+\t\t cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA ||\n+\t\t cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) {\n \n-\t\t\t/* Verify that we can get the full amount\n-\t\t\t * allocated per the qcaps availability.\n+\t\t\t/* Verify that we can get the full amount per qcaps.\n \t\t\t */\n-\t\t\tif (parms->alloc_cnt[i] <=\n-\t\t\t query[parms->cfg[i].hcapi_type].max) {\n-\t\t\t\treq[j].type = parms->cfg[i].hcapi_type;\n-\t\t\t\treq[j].min = parms->alloc_cnt[i];\n-\t\t\t\treq[j].max = parms->alloc_cnt[i];\n+\t\t\tif (req_cnt[i] <= query[hcapi_type].max) {\n+\t\t\t\treq[j].type = hcapi_type;\n+\t\t\t\treq[j].min = req_cnt[i];\n+\t\t\t\treq[j].max = req_cnt[i];\n \t\t\t\tj++;\n \t\t\t} else {\n \t\t\t\tconst char *type_str;\n-\t\t\t\tuint16_t hcapi_type = parms->cfg[i].hcapi_type;\n \n \t\t\t\tdev->ops->tf_dev_get_resource_str(tfp,\n-\t\t\t\t\t\t\t\t hcapi_type,\n-\t\t\t\t\t\t\t\t &type_str);\n+\t\t\t\t\t\t\t hcapi_type,\n+\t\t\t\t\t\t\t &type_str);\n \t\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t\t\"%s: Resource failure, type:%d:%s\\n\",\n-\t\t\t\t\ttf_dir_2_str(parms->dir),\n-\t\t\t\t\thcapi_type, type_str);\n-\t\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t\t\"req:%d, avail:%d\\n\",\n-\t\t\t\t\tparms->alloc_cnt[i],\n-\t\t\t\t\tquery[hcapi_type].max);\n+\t\t\t\t\t \"Failure, %s:%d:%s req:%d avail:%d\\n\",\n+\t\t\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t\t\t hcapi_type, type_str,\n+\t\t\t\t\t req_cnt[i],\n+\t\t\t\t\t query[hcapi_type].max);\n \t\t\t\treturn -EINVAL;\n \t\t\t}\n \t\t}\n \t}\n \n+\t/* Allocate all resources for the module type\n+\t */\n \trc = tf_msg_session_resc_alloc(tfp,\n \t\t\t\t dev,\n \t\t\t\t parms->dir,\n@@ -532,32 +636,56 @@ tf_rm_create_db(struct tf *tfp,\n \n \tdb = rm_db->db;\n \tfor (i = 0, j = 0; i < parms->num_elements; i++) {\n-\t\tdb[i].cfg_type = parms->cfg[i].cfg_type;\n-\t\tdb[i].hcapi_type = parms->cfg[i].hcapi_type;\n+\t\tstruct tf_rm_element_cfg *cfg = &parms->cfg[i];\n+\t\tconst char *type_str;\n+\n+\t\tdev->ops->tf_dev_get_resource_str(tfp,\n+\t\t\t\t\t\t cfg->hcapi_type,\n+\t\t\t\t\t\t &type_str);\n \n-\t\t/* Skip any non HCAPI types as we didn't include them\n-\t\t * in the reservation request.\n+\t\tdb[i].cfg_type = cfg->cfg_type;\n+\t\tdb[i].hcapi_type = cfg->hcapi_type;\n+\n+\t\t/* Save the parent subtype for later use to find the pool\n \t\t */\n-\t\tif (parms->cfg[i].cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t\t parms->cfg[i].cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n-\t\t\tcontinue;\n+\t\tif (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD)\n+\t\t\tdb[i].parent_subtype = cfg->parent_subtype;\n \n \t\t/* If the element didn't request an allocation no need\n \t\t * to create a pool nor verify if we got a reservation.\n \t\t */\n-\t\tif (parms->alloc_cnt[i] == 0)\n+\t\tif (req_cnt[i] == 0)\n+\t\t\tcontinue;\n+\n+\t\t/* Skip any children or invalid\n+\t\t */\n+\t\tif (cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n+\t\t cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI_BA &&\n+\t\t cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT)\n \t\t\tcontinue;\n \n \t\t/* If the element had requested an allocation and that\n \t\t * allocation was a success (full amount) then\n \t\t * allocate the pool.\n \t\t */\n-\t\tif (parms->alloc_cnt[i] == resv[j].stride) {\n+\t\tif (req_cnt[i] == resv[j].stride) {\n \t\t\tdb[i].alloc.entry.start = resv[j].start;\n \t\t\tdb[i].alloc.entry.stride = resv[j].stride;\n \n-\t\t\t/* Only allocate BA pool if so requested */\n-\t\t\tif (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) {\n+\t\t\t/* Only allocate BA pool if a BA type not a child */\n+\t\t\tif (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA ||\n+\t\t\t cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) {\n+\t\t\t\tif (cfg->divider) {\n+\t\t\t\t\tresv[j].stride =\n+\t\t\t\t\t\tresv[j].stride / cfg->divider;\n+\t\t\t\t\tif (resv[j].stride <= 0) {\n+\t\t\t\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t\t\t \"%s:Divide fails:%d:%s\\n\",\n+\t\t\t\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t\t\t\t cfg->hcapi_type, type_str);\n+\t\t\t\t\t\tgoto fail;\n+\t\t\t\t\t}\n+\t\t\t\t}\n \t\t\t\t/* Create pool */\n \t\t\t\tpool_size = (BITALLOC_SIZEOF(resv[j].stride) /\n \t\t\t\t\t sizeof(struct bitalloc));\n@@ -567,9 +695,9 @@ tf_rm_create_db(struct tf *tfp,\n \t\t\t\trc = tfp_calloc(&cparms);\n \t\t\t\tif (rc) {\n \t\t\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t\t \"%s: Pool alloc failed, type:%d\\n\",\n-\t\t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t\t db[i].cfg_type);\n+\t\t\t\t\t \"%s: Pool alloc failed, type:%d:%s\\n\",\n+\t\t\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t\t\t cfg->hcapi_type, type_str);\n \t\t\t\t\tgoto fail;\n \t\t\t\t}\n \t\t\t\tdb[i].pool = (struct bitalloc *)cparms.mem_va;\n@@ -577,9 +705,9 @@ tf_rm_create_db(struct tf *tfp,\n \t\t\t\trc = ba_init(db[i].pool, resv[j].stride);\n \t\t\t\tif (rc) {\n \t\t\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t\t \"%s: Pool init failed, type:%d\\n\",\n-\t\t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t\t db[i].cfg_type);\n+\t\t\t\t\t \"%s: Pool init failed, type:%d:%s\\n\",\n+\t\t\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t\t\t cfg->hcapi_type, type_str);\n \t\t\t\t\tgoto fail;\n \t\t\t\t}\n \t\t\t}\n@@ -589,25 +717,21 @@ tf_rm_create_db(struct tf *tfp,\n \t\t\t * all elements, not any less.\n \t\t\t */\n \t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t \"%s: Alloc failed, type:%d\\n\",\n-\t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t db[i].cfg_type);\n-\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t \"req:%d, alloc:%d\\n\",\n-\t\t\t\t parms->alloc_cnt[i],\n-\t\t\t\t resv[j].stride);\n+\t\t\t\t \"%s: Alloc failed %d:%s req:%d, alloc:%d\\n\",\n+\t\t\t\t tf_dir_2_str(parms->dir), cfg->hcapi_type,\n+\t\t\t\t type_str, req_cnt[i], resv[j].stride);\n \t\t\tgoto fail;\n \t\t}\n \t}\n \n \trm_db->num_entries = parms->num_elements;\n \trm_db->dir = parms->dir;\n-\trm_db->type = parms->type;\n+\trm_db->module = parms->module;\n \t*parms->rm_db = (void *)rm_db;\n \n \ttfp_free((void *)req);\n \ttfp_free((void *)resv);\n-\n+\ttfp_free((void *)req_cnt);\n \treturn 0;\n \n fail:\n@@ -616,6 +740,7 @@ tf_rm_create_db(struct tf *tfp,\n \ttfp_free((void *)db->pool);\n \ttfp_free((void *)db);\n \ttfp_free((void *)rm_db);\n+\ttfp_free((void *)req_cnt);\n \tparms->rm_db = NULL;\n \n \treturn -EINVAL;\n@@ -682,7 +807,7 @@ tf_rm_free_db(struct tf *tfp,\n \t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t \"%s: Internal Flush error, module:%s\\n\",\n \t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t tf_device_module_type_2_str(rm_db->type));\n+\t\t\t\t tf_module_2_str(rm_db->module));\n \t}\n \n \t/* No need to check for configuration type, even if we do not\n@@ -695,6 +820,54 @@ tf_rm_free_db(struct tf *tfp,\n \n \treturn rc;\n }\n+/**\n+ * Get the bit allocator pool associated with the subtype and the db\n+ *\n+ * [in] rm_db\n+ * Pointer to the DB\n+ *\n+ * [in] subtype\n+ * Module subtype used to index into the module specific database.\n+ * An example subtype is TF_TBL_TYPE_FULL_ACT_RECORD which is a\n+ * module subtype of TF_MODULE_TYPE_TABLE.\n+ *\n+ * [in/out] pool\n+ * Pointer to the bit allocator pool used\n+ *\n+ * [in/out] new_subtype\n+ * Pointer to the subtype of the actual pool used\n+ * Returns:\n+ * 0 - Success\n+ * - ENOTSUP - Operation not supported\n+ */\n+static int\n+tf_rm_get_pool(struct tf_rm_new_db *rm_db,\n+\t uint16_t subtype,\n+\t struct bitalloc **pool,\n+\t uint16_t *new_subtype)\n+{\n+\tint rc = 0;\n+\tuint16_t tmp_subtype = subtype;\n+\n+\t/* If we are a child, get the parent table index */\n+\tif (rm_db->db[subtype].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD)\n+\t\ttmp_subtype = rm_db->db[subtype].parent_subtype;\n+\n+\t*pool = rm_db->db[tmp_subtype].pool;\n+\n+\t/* Bail out if the pool is not valid, should never happen */\n+\tif (rm_db->db[tmp_subtype].pool == NULL) {\n+\t\trc = -ENOTSUP;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"%s: Invalid pool for this type:%d, rc:%s\\n\",\n+\t\t\t tf_dir_2_str(rm_db->dir),\n+\t\t\t tmp_subtype,\n+\t\t\t strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\t*new_subtype = tmp_subtype;\n+\treturn rc;\n+}\n \n int\n tf_rm_allocate(struct tf_rm_allocate_parms *parms)\n@@ -704,37 +877,33 @@ tf_rm_allocate(struct tf_rm_allocate_parms *parms)\n \tuint32_t index;\n \tstruct tf_rm_new_db *rm_db;\n \tenum tf_rm_elem_cfg_type cfg_type;\n+\tstruct bitalloc *pool;\n+\tuint16_t subtype;\n \n \tTF_CHECK_PARMS2(parms, parms->rm_db);\n \n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n-\tif (!rm_db->db)\n-\t\treturn -EINVAL;\n-\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\tTF_CHECK_PARMS1(rm_db->db);\n+\n+\tcfg_type = rm_db->db[parms->subtype].cfg_type;\n \n \t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD)\n \t\treturn -ENOTSUP;\n \n-\t/* Bail out if the pool is not valid, should never happen */\n-\tif (rm_db->db[parms->db_index].pool == NULL) {\n-\t\trc = -ENOTSUP;\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Invalid pool for this type:%d, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(rm_db->dir),\n-\t\t\t parms->db_index,\n-\t\t\t strerror(-rc));\n+\trc = tf_rm_get_pool(rm_db, parms->subtype, &pool, &subtype);\n+\tif (rc)\n \t\treturn rc;\n-\t}\n-\n \t/*\n \t * priority 0: allocate from top of the tcam i.e. high\n \t * priority !0: allocate index from bottom i.e lowest\n \t */\n \tif (parms->priority)\n-\t\tid = ba_alloc_reverse(rm_db->db[parms->db_index].pool);\n+\t\tid = ba_alloc_reverse(pool);\n \telse\n-\t\tid = ba_alloc(rm_db->db[parms->db_index].pool);\n+\t\tid = ba_alloc(pool);\n \tif (id == BA_FAIL) {\n \t\trc = -ENOMEM;\n \t\tTFP_DRV_LOG(ERR,\n@@ -747,7 +916,7 @@ tf_rm_allocate(struct tf_rm_allocate_parms *parms)\n \t/* Adjust for any non zero start value */\n \trc = tf_rm_adjust_index(rm_db->db,\n \t\t\t\tTF_RM_ADJUST_ADD_BASE,\n-\t\t\t\tparms->db_index,\n+\t\t\t\tsubtype,\n \t\t\t\tid,\n \t\t\t\t&index);\n \tif (rc) {\n@@ -772,39 +941,35 @@ tf_rm_free(struct tf_rm_free_parms *parms)\n \tuint32_t adj_index;\n \tstruct tf_rm_new_db *rm_db;\n \tenum tf_rm_elem_cfg_type cfg_type;\n+\tstruct bitalloc *pool;\n+\tuint16_t subtype;\n \n \tTF_CHECK_PARMS2(parms, parms->rm_db);\n-\n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n-\tif (!rm_db->db)\n-\t\treturn -EINVAL;\n-\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\tTF_CHECK_PARMS1(rm_db->db);\n+\n+\tcfg_type = rm_db->db[parms->subtype].cfg_type;\n \n \t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD)\n \t\treturn -ENOTSUP;\n \n-\t/* Bail out if the pool is not valid, should never happen */\n-\tif (rm_db->db[parms->db_index].pool == NULL) {\n-\t\trc = -ENOTSUP;\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Invalid pool for this type:%d, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(rm_db->dir),\n-\t\t\t parms->db_index,\n-\t\t\t strerror(-rc));\n+\trc = tf_rm_get_pool(rm_db, parms->subtype, &pool, &subtype);\n+\tif (rc)\n \t\treturn rc;\n-\t}\n \n \t/* Adjust for any non zero start value */\n \trc = tf_rm_adjust_index(rm_db->db,\n \t\t\t\tTF_RM_ADJUST_RM_BASE,\n-\t\t\t\tparms->db_index,\n+\t\t\t\tsubtype,\n \t\t\t\tparms->index,\n \t\t\t\t&adj_index);\n \tif (rc)\n \t\treturn rc;\n \n-\trc = ba_free(rm_db->db[parms->db_index].pool, adj_index);\n+\trc = ba_free(pool, adj_index);\n \t/* No logging direction matters and that is not available here */\n \tif (rc)\n \t\treturn rc;\n@@ -819,33 +984,30 @@ tf_rm_is_allocated(struct tf_rm_is_allocated_parms *parms)\n \tuint32_t adj_index;\n \tstruct tf_rm_new_db *rm_db;\n \tenum tf_rm_elem_cfg_type cfg_type;\n+\tstruct bitalloc *pool;\n+\tuint16_t subtype;\n \n \tTF_CHECK_PARMS2(parms, parms->rm_db);\n-\n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n-\tif (!rm_db->db)\n-\t\treturn -EINVAL;\n-\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\tTF_CHECK_PARMS1(rm_db->db);\n+\n+\tcfg_type = rm_db->db[parms->subtype].cfg_type;\n+\n \n \t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD)\n \t\treturn -ENOTSUP;\n \n-\t/* Bail out if the pool is not valid, should never happen */\n-\tif (rm_db->db[parms->db_index].pool == NULL) {\n-\t\trc = -ENOTSUP;\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Invalid pool for this type:%d, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(rm_db->dir),\n-\t\t\t parms->db_index,\n-\t\t\t strerror(-rc));\n+\trc = tf_rm_get_pool(rm_db, parms->subtype, &pool, &subtype);\n+\tif (rc)\n \t\treturn rc;\n-\t}\n \n \t/* Adjust for any non zero start value */\n \trc = tf_rm_adjust_index(rm_db->db,\n \t\t\t\tTF_RM_ADJUST_RM_BASE,\n-\t\t\t\tparms->db_index,\n+\t\t\t\tsubtype,\n \t\t\t\tparms->index,\n \t\t\t\t&adj_index);\n \tif (rc)\n@@ -853,8 +1015,7 @@ tf_rm_is_allocated(struct tf_rm_is_allocated_parms *parms)\n \n \tif (parms->base_index)\n \t\t*parms->base_index = adj_index;\n-\t*parms->allocated = ba_inuse(rm_db->db[parms->db_index].pool,\n-\t\t\t\t adj_index);\n+\t*parms->allocated = ba_inuse(pool, adj_index);\n \n \treturn rc;\n }\n@@ -866,19 +1027,17 @@ tf_rm_get_info(struct tf_rm_get_alloc_info_parms *parms)\n \tenum tf_rm_elem_cfg_type cfg_type;\n \n \tTF_CHECK_PARMS2(parms, parms->rm_db);\n-\n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n-\tif (!rm_db->db)\n-\t\treturn -EINVAL;\n-\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\tTF_CHECK_PARMS1(rm_db->db);\n+\n+\tcfg_type = rm_db->db[parms->subtype].cfg_type;\n \n \t/* Bail out if not controlled by HCAPI */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n+\tif (cfg_type == TF_RM_ELEM_CFG_NULL)\n \t\treturn -ENOTSUP;\n \n \tmemcpy(parms->info,\n-\t &rm_db->db[parms->db_index].alloc,\n+\t &rm_db->db[parms->subtype].alloc,\n \t sizeof(struct tf_rm_alloc_info));\n \n \treturn 0;\n@@ -891,18 +1050,16 @@ tf_rm_get_hcapi_type(struct tf_rm_get_hcapi_parms *parms)\n \tenum tf_rm_elem_cfg_type cfg_type;\n \n \tTF_CHECK_PARMS2(parms, parms->rm_db);\n-\n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n-\tif (!rm_db->db)\n-\t\treturn -EINVAL;\n-\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\tTF_CHECK_PARMS1(rm_db->db);\n+\n+\tcfg_type = rm_db->db[parms->subtype].cfg_type;\n \n \t/* Bail out if not controlled by HCAPI */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n+\tif (cfg_type == TF_RM_ELEM_CFG_NULL)\n \t\treturn -ENOTSUP;\n \n-\t*parms->hcapi_type = rm_db->db[parms->db_index].hcapi_type;\n+\t*parms->hcapi_type = rm_db->db[parms->subtype].hcapi_type;\n \n \treturn 0;\n }\n@@ -915,30 +1072,31 @@ tf_rm_get_inuse_count(struct tf_rm_get_inuse_count_parms *parms)\n \tenum tf_rm_elem_cfg_type cfg_type;\n \n \tTF_CHECK_PARMS2(parms, parms->rm_db);\n-\n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n-\tif (!rm_db->db)\n-\t\treturn -EINVAL;\n-\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\tTF_CHECK_PARMS1(rm_db->db);\n \n-\t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n+\tcfg_type = rm_db->db[parms->subtype].cfg_type;\n+\n+\t/* Bail out if not a BA pool */\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD)\n \t\treturn -ENOTSUP;\n \n \t/* Bail silently (no logging), if the pool is not valid there\n \t * was no elements allocated for it.\n \t */\n-\tif (rm_db->db[parms->db_index].pool == NULL) {\n+\tif (rm_db->db[parms->subtype].pool == NULL) {\n \t\t*parms->count = 0;\n \t\treturn 0;\n \t}\n \n-\t*parms->count = ba_inuse_count(rm_db->db[parms->db_index].pool);\n+\t*parms->count = ba_inuse_count(rm_db->db[parms->subtype].pool);\n \n \treturn rc;\n-\n }\n-\n+/* Only used for table bulk get at this time\n+ */\n int\n tf_rm_check_indexes_in_range(struct tf_rm_check_indexes_in_range_parms *parms)\n {\n@@ -947,31 +1105,27 @@ tf_rm_check_indexes_in_range(struct tf_rm_check_indexes_in_range_parms *parms)\n \tuint32_t base_index;\n \tuint32_t stride;\n \tint rc = 0;\n+\tstruct bitalloc *pool;\n+\tuint16_t subtype;\n \n \tTF_CHECK_PARMS2(parms, parms->rm_db);\n-\n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n-\tif (!rm_db->db)\n-\t\treturn -EINVAL;\n-\tcfg_type = rm_db->db[parms->db_index].cfg_type;\n+\tTF_CHECK_PARMS1(rm_db->db);\n \n-\t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n+\tcfg_type = rm_db->db[parms->subtype].cfg_type;\n+\n+\t/* Bail out if not a BA pool */\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT &&\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD)\n \t\treturn -ENOTSUP;\n \n-\t/* Bail out if the pool is not valid, should never happen */\n-\tif (rm_db->db[parms->db_index].pool == NULL) {\n-\t\trc = -ENOTSUP;\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Invalid pool for this type:%d, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(rm_db->dir),\n-\t\t\t parms->db_index,\n-\t\t\t strerror(-rc));\n+\trc = tf_rm_get_pool(rm_db, parms->subtype, &pool, &subtype);\n+\tif (rc)\n \t\treturn rc;\n-\t}\n \n-\tbase_index = rm_db->db[parms->db_index].alloc.entry.start;\n-\tstride = rm_db->db[parms->db_index].alloc.entry.stride;\n+\tbase_index = rm_db->db[subtype].alloc.entry.start;\n+\tstride = rm_db->db[subtype].alloc.entry.stride;\n \n \tif (parms->starting_index < base_index ||\n \t parms->starting_index + parms->num_entries > base_index + stride)\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm.h b/drivers/net/bnxt/tf_core/tf_rm.h\nindex 291086c7c7..407c7d5bf9 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm.h\n+++ b/drivers/net/bnxt/tf_core/tf_rm.h\n@@ -35,11 +35,11 @@ struct tf;\n * The RM DB will work on its initial allocated sizes so the\n * capability of dynamically growing a particular resource is not\n * possible. If this capability later becomes a requirement then the\n- * MAX pool size of the Chip œneeds to be added to the tf_rm_elem_info\n+ * MAX pool size of the chip needs to be added to the tf_rm_elem_info\n * structure and several new APIs would need to be added to allow for\n * growth of a single TF resource type.\n *\n- * The access functions does not check for NULL pointers as it's a\n+ * The access functions do not check for NULL pointers as they are a\n * support module, not called directly.\n */\n \n@@ -65,19 +65,28 @@ enum tf_rm_elem_cfg_type {\n \t * No configuration\n \t */\n \tTF_RM_ELEM_CFG_NULL,\n-\t/** HCAPI 'controlled', no RM storage thus the Device Module\n+\t/** HCAPI 'controlled', no RM storage so the module\n \t * using the RM can chose to handle storage locally.\n \t */\n \tTF_RM_ELEM_CFG_HCAPI,\n-\t/** HCAPI 'controlled', uses a Bit Allocator Pool for internal\n+\t/** HCAPI 'controlled', uses a bit allocator pool for internal\n \t * storage in the RM.\n \t */\n \tTF_RM_ELEM_CFG_HCAPI_BA,\n \t/**\n-\t * Shared element thus it belongs to a shared FW Session and\n-\t * is not controlled by the Host.\n+\t * HCAPI 'controlled', uses a bit allocator pool for internal\n+\t * storage in the RM but multiple TF types map to a single\n+\t * HCAPI type. Parent manages the table.\n \t */\n-\tTF_RM_ELEM_CFG_SHARED,\n+\tTF_RM_ELEM_CFG_HCAPI_BA_PARENT,\n+\t/**\n+\t * HCAPI 'controlled', uses a bit allocator pool for internal\n+\t * storage in the RM but multiple TF types map to a single\n+\t * HCAPI type. Child accesses the parent db.\n+\t */\n+\tTF_RM_ELEM_CFG_HCAPI_BA_CHILD,\n+\n+\n \tTF_RM_TYPE_MAX\n };\n \n@@ -114,6 +123,30 @@ struct tf_rm_element_cfg {\n \t * conversion.\n \t */\n \tuint16_t hcapi_type;\n+\n+\t/**\n+\t * if cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD\n+\t *\n+\t * Parent Truflow module subtype associated with this resource type.\n+\t */\n+\tuint16_t parent_subtype;\n+\n+\t/**\n+\t * if cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD\n+\t *\n+\t * Resource slices. How many slices will fit in the\n+\t * resource pool chunk size.\n+\t */\n+\tuint8_t slices;\n+\t/**\n+\t * Pool element divider count\n+\t * If 0 or 1, there is 1:1 correspondence between the RM\n+\t * BA pool resource element and the HCAPI RM firmware\n+\t * resource. If > 1, the RM BA pool element has a 1:n\n+\t * correspondence to the HCAPI RM firmware resource.\n+\t */\n+\tuint8_t divider;\n+\n };\n \n /**\n@@ -135,9 +168,9 @@ struct tf_rm_alloc_info {\n */\n struct tf_rm_create_db_parms {\n \t/**\n-\t * [in] Device module type. Used for logging purposes.\n+\t * [in] Module type. Used for logging purposes.\n \t */\n-\tenum tf_device_module_type type;\n+\tenum tf_module_type module;\n \t/**\n \t * [in] Receive or transmit direction.\n \t */\n@@ -153,8 +186,7 @@ struct tf_rm_create_db_parms {\n \t/**\n \t * Resource allocation count array. This array content\n \t * originates from the tf_session_resources that is passed in\n-\t * on session open.\n-\t * Array size is num_elements.\n+\t * on session open. Array size is num_elements.\n \t */\n \tuint16_t *alloc_cnt;\n \t/**\n@@ -186,10 +218,11 @@ struct tf_rm_allocate_parms {\n \t */\n \tvoid *rm_db;\n \t/**\n-\t * [in] DB Index, indicates which DB entry to perform the\n-\t * action on.\n+\t * [in] Module subtype indicates which DB entry to perform the\n+\t * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module\n+\t * TF_MODULE_TYPE_TCAM)\n \t */\n-\tuint16_t db_index;\n+\tuint16_t subtype;\n \t/**\n \t * [in] Pointer to the allocated index in normalized\n \t * form. Normalized means the index has been adjusted,\n@@ -219,10 +252,11 @@ struct tf_rm_free_parms {\n \t */\n \tvoid *rm_db;\n \t/**\n-\t * [in] DB Index, indicates which DB entry to perform the\n-\t * action on.\n+\t * [in] TF subtype indicates which DB entry to perform the\n+\t * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module\n+\t * TF_MODULE_TYPE_TCAM)\n \t */\n-\tuint16_t db_index;\n+\tuint16_t subtype;\n \t/**\n \t * [in] Index to free\n \t */\n@@ -238,10 +272,11 @@ struct tf_rm_is_allocated_parms {\n \t */\n \tvoid *rm_db;\n \t/**\n-\t * [in] DB Index, indicates which DB entry to perform the\n-\t * action on.\n+\t * [in] TF subtype indicates which DB entry to perform the\n+\t * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module\n+\t * TF_MODULE_TYPE_TCAM)\n \t */\n-\tuint16_t db_index;\n+\tuint16_t subtype;\n \t/**\n \t * [in] Index to free\n \t */\n@@ -265,13 +300,14 @@ struct tf_rm_get_alloc_info_parms {\n \t */\n \tvoid *rm_db;\n \t/**\n-\t * [in] DB Index, indicates which DB entry to perform the\n-\t * action on.\n+\t * [in] TF subtype indicates which DB entry to perform the\n+\t * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module\n+\t * TF_MODULE_TYPE_TCAM)\n \t */\n-\tuint16_t db_index;\n+\tuint16_t subtype;\n \t/**\n \t * [out] Pointer to the requested allocation information for\n-\t * the specified db_index\n+\t * the specified subtype\n \t */\n \tstruct tf_rm_alloc_info *info;\n };\n@@ -285,12 +321,13 @@ struct tf_rm_get_hcapi_parms {\n \t */\n \tvoid *rm_db;\n \t/**\n-\t * [in] DB Index, indicates which DB entry to perform the\n-\t * action on.\n+\t * [in] TF subtype indicates which DB entry to perform the\n+\t * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module\n+\t * TF_MODULE_TYPE_TCAM)\n \t */\n-\tuint16_t db_index;\n+\tuint16_t subtype;\n \t/**\n-\t * [out] Pointer to the hcapi type for the specified db_index\n+\t * [out] Pointer to the hcapi type for the specified subtype\n \t */\n \tuint16_t *hcapi_type;\n };\n@@ -304,12 +341,13 @@ struct tf_rm_get_inuse_count_parms {\n \t */\n \tvoid *rm_db;\n \t/**\n-\t * [in] DB Index, indicates which DB entry to perform the\n-\t * action on.\n+\t * [in] TF subtype indicates which DB entry to perform the\n+\t * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module\n+\t * TF_MODULE_TYPE_TCAM)\n \t */\n-\tuint16_t db_index;\n+\tuint16_t subtype;\n \t/**\n-\t * [out] Pointer to the inuse count for the specified db_index\n+\t * [out] Pointer to the inuse count for the specified subtype\n \t */\n \tuint16_t *count;\n };\n@@ -323,10 +361,11 @@ struct tf_rm_check_indexes_in_range_parms {\n \t */\n \tvoid *rm_db;\n \t/**\n-\t * [in] DB Index, indicates which DB entry to perform the\n-\t * action on.\n+\t * [in] TF subtype indicates which DB entry to perform the\n+\t * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module\n+\t * TF_MODULE_TYPE_TCAM)\n \t */\n-\tuint16_t db_index;\n+\tuint16_t subtype;\n \t/**\n \t * [in] Starting index\n \t */\ndiff --git a/drivers/net/bnxt/tf_core/tf_shadow_tbl.c b/drivers/net/bnxt/tf_core/tf_shadow_tbl.c\ndeleted file mode 100644\nindex 396ebdb0a9..0000000000\n--- a/drivers/net/bnxt/tf_core/tf_shadow_tbl.c\n+++ /dev/null\n@@ -1,783 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2019-2021 Broadcom\n- * All rights reserved.\n- */\n-\n-#include \"tf_common.h\"\n-#include \"tf_util.h\"\n-#include \"tfp.h\"\n-#include \"tf_core.h\"\n-#include \"tf_shadow_tbl.h\"\n-#include \"tf_hash.h\"\n-\n-/**\n- * The implementation includes 3 tables per table table type.\n- * - hash table\n- * - sized so that a minimum of 4 slots per shadow entry are available to\n- * minimize the likelihood of collisions.\n- * - shadow key table\n- * - sized to the number of entries requested and is directly indexed\n- * - the index is zero based and is the table index - the base address\n- * - the data associated with the entry is stored in the key table.\n- * - The stored key is actually the data associated with the entry.\n- * - shadow result table\n- * - the result table is stored separately since it only needs to be accessed\n- * when the key matches.\n- * - the result has a back pointer to the hash table via the hb handle. The\n- * hb handle is a 32 bit represention of the hash with a valid bit, bucket\n- * element index, and the hash index. It is necessary to store the hb handle\n- * with the result since subsequent removes only provide the table index.\n- *\n- * - Max entries is limited in the current implementation since bit 15 is the\n- * valid bit in the hash table.\n- * - A 16bit hash is calculated and masked based on the number of entries\n- * - 64b wide bucket is used and broken into 4x16bit elements.\n- * This decision is based on quicker bucket scanning to determine if any\n- * elements are in use.\n- * - bit 15 of each bucket element is the valid, this is done to prevent having\n- * to read the larger key/result data for determining VALID. It also aids\n- * in the more efficient scanning of the bucket for slot usage.\n- */\n-\n-/*\n- * The maximum number of shadow entries supported. The value also doubles as\n- * the maximum number of hash buckets. There are only 15 bits of data per\n- * bucket to point to the shadow tables.\n- */\n-#define TF_SHADOW_ENTRIES_MAX (1 << 15)\n-\n-/* The number of elements(BE) per hash bucket (HB) */\n-#define TF_SHADOW_HB_NUM_ELEM (4)\n-#define TF_SHADOW_BE_VALID (1 << 15)\n-#define TF_SHADOW_BE_IS_VALID(be) (((be) & TF_SHADOW_BE_VALID) != 0)\n-\n-/**\n- * The hash bucket handle is 32b\n- * - bit 31, the Valid bit\n- * - bit 29-30, the element\n- * - bits 0-15, the hash idx (is masked based on the allocated size)\n- */\n-#define TF_SHADOW_HB_HANDLE_IS_VALID(hndl) (((hndl) & (1 << 31)) != 0)\n-#define TF_SHADOW_HB_HANDLE_CREATE(idx, be) ((1 << 31) | \\\n-\t\t\t\t\t ((be) << 29) | (idx))\n-\n-#define TF_SHADOW_HB_HANDLE_BE_GET(hdl) (((hdl) >> 29) & \\\n-\t\t\t\t\t (TF_SHADOW_HB_NUM_ELEM - 1))\n-\n-#define TF_SHADOW_HB_HANDLE_HASH_GET(ctxt, hdl)((hdl) & \\\n-\t\t\t\t\t\t(ctxt)->hash_ctxt.hid_mask)\n-\n-/**\n- * The idx provided by the caller is within a region, so currently the base is\n- * either added or subtracted from the idx to ensure it can be used as a\n- * compressed index\n- */\n-\n-/* Convert the table index to a shadow index */\n-#define TF_SHADOW_IDX_TO_SHIDX(ctxt, idx) ((idx) - \\\n-\t\t\t\t\t (ctxt)->shadow_ctxt.base_addr)\n-\n-/* Convert the shadow index to a tbl index */\n-#define TF_SHADOW_SHIDX_TO_IDX(ctxt, idx) ((idx) + \\\n-\t\t\t\t\t (ctxt)->shadow_ctxt.base_addr)\n-\n-/* Simple helper masks for clearing en element from the bucket */\n-#define TF_SHADOW_BE0_MASK_CLEAR(hb) ((hb) & 0xffffffffffff0000ull)\n-#define TF_SHADOW_BE1_MASK_CLEAR(hb) ((hb) & 0xffffffff0000ffffull)\n-#define TF_SHADOW_BE2_MASK_CLEAR(hb) ((hb) & 0xffff0000ffffffffull)\n-#define TF_SHADOW_BE3_MASK_CLEAR(hb) ((hb) & 0x0000ffffffffffffull)\n-\n-/**\n- * This should be coming from external, but for now it is assumed that no key\n- * is greater than 512 bits (64B). This makes allocation of the key table\n- * easier without having to allocate on the fly.\n- */\n-#define TF_SHADOW_MAX_KEY_SZ 64\n-\n-/*\n- * Local only defines for the internal data.\n- */\n-\n-/**\n- * tf_shadow_tbl_shadow_key_entry is the key entry of the key table.\n- * The key stored in the table is the result data of the index table.\n- */\n-struct tf_shadow_tbl_shadow_key_entry {\n-\tuint8_t key[TF_SHADOW_MAX_KEY_SZ];\n-};\n-\n-/**\n- * tf_shadow_tbl_shadow_result_entry is the result table entry.\n- * The result table writes are broken into two phases:\n- * - The search phase, which stores the hb_handle and key size and\n- * - The set phase, which writes the refcnt\n- */\n-struct tf_shadow_tbl_shadow_result_entry {\n-\tuint16_t key_size;\n-\tuint32_t refcnt;\n-\tuint32_t hb_handle;\n-};\n-\n-/**\n- * tf_shadow_tbl_shadow_ctxt holds all information for accessing the key and\n- * result tables.\n- */\n-struct tf_shadow_tbl_shadow_ctxt {\n-\tstruct tf_shadow_tbl_shadow_key_entry *sh_key_tbl;\n-\tstruct tf_shadow_tbl_shadow_result_entry *sh_res_tbl;\n-\tuint32_t base_addr;\n-\tuint16_t num_entries;\n-\tuint16_t alloc_idx;\n-};\n-\n-/**\n- * tf_shadow_tbl_hash_ctxt holds all information related to accessing the hash\n- * table.\n- */\n-struct tf_shadow_tbl_hash_ctxt {\n-\tuint64_t *hashtbl;\n-\tuint16_t hid_mask;\n-\tuint16_t hash_entries;\n-};\n-\n-/**\n- * tf_shadow_tbl_ctxt holds the hash and shadow tables for the current shadow\n- * table db. This structure is per table table type as each table table has\n- * it's own shadow and hash table.\n- */\n-struct tf_shadow_tbl_ctxt {\n-\tstruct tf_shadow_tbl_shadow_ctxt shadow_ctxt;\n-\tstruct tf_shadow_tbl_hash_ctxt hash_ctxt;\n-};\n-\n-/**\n- * tf_shadow_tbl_db is the allocated db structure returned as an opaque\n- * void * pointer to the caller during create db. It holds the pointers for\n- * each table associated with the db.\n- */\n-struct tf_shadow_tbl_db {\n-\t/* Each context holds the shadow and hash table information */\n-\tstruct tf_shadow_tbl_ctxt *ctxt[TF_TBL_TYPE_MAX];\n-};\n-\n-/**\n- * Simple routine that decides what table types can be searchable.\n- *\n- */\n-static int tf_shadow_tbl_is_searchable(enum tf_tbl_type type)\n-{\n-\tint rc = 0;\n-\n-\tswitch (type) {\n-\tcase TF_TBL_TYPE_ACT_ENCAP_8B:\n-\tcase TF_TBL_TYPE_ACT_ENCAP_16B:\n-\tcase TF_TBL_TYPE_ACT_ENCAP_32B:\n-\tcase TF_TBL_TYPE_ACT_ENCAP_64B:\n-\tcase TF_TBL_TYPE_ACT_SP_SMAC:\n-\tcase TF_TBL_TYPE_ACT_SP_SMAC_IPV4:\n-\tcase TF_TBL_TYPE_ACT_SP_SMAC_IPV6:\n-\tcase TF_TBL_TYPE_ACT_MODIFY_IPV4:\n-\t\trc = 1;\n-\t\tbreak;\n-\tdefault:\n-\t\trc = 0;\n-\t\tbreak;\n-\t};\n-\n-\treturn rc;\n-}\n-\n-/**\n- * Returns the number of entries in the contexts shadow table.\n- */\n-static inline uint16_t\n-tf_shadow_tbl_sh_num_entries_get(struct tf_shadow_tbl_ctxt *ctxt)\n-{\n-\treturn ctxt->shadow_ctxt.num_entries;\n-}\n-\n-/**\n- * Compare the give key with the key in the shadow table.\n- *\n- * Returns 0 if the keys match\n- */\n-static int\n-tf_shadow_tbl_key_cmp(struct tf_shadow_tbl_ctxt *ctxt,\n-\t\t uint8_t *key,\n-\t\t uint16_t sh_idx,\n-\t\t uint16_t size)\n-{\n-\tif (size != ctxt->shadow_ctxt.sh_res_tbl[sh_idx].key_size ||\n-\t sh_idx >= tf_shadow_tbl_sh_num_entries_get(ctxt) || !key)\n-\t\treturn -1;\n-\n-\treturn memcmp(key, ctxt->shadow_ctxt.sh_key_tbl[sh_idx].key, size);\n-}\n-\n-/**\n- * Free the memory associated with the context.\n- */\n-static void\n-tf_shadow_tbl_ctxt_delete(struct tf_shadow_tbl_ctxt *ctxt)\n-{\n-\tif (!ctxt)\n-\t\treturn;\n-\n-\ttfp_free(ctxt->hash_ctxt.hashtbl);\n-\ttfp_free(ctxt->shadow_ctxt.sh_key_tbl);\n-\ttfp_free(ctxt->shadow_ctxt.sh_res_tbl);\n-}\n-\n-/**\n- * The TF Shadow TBL context is per TBL and holds all information relating to\n- * managing the shadow and search capability. This routine allocated data that\n- * needs to be deallocated by the tf_shadow_tbl_ctxt_delete prior when deleting\n- * the shadow db.\n- */\n-static int\n-tf_shadow_tbl_ctxt_create(struct tf_shadow_tbl_ctxt *ctxt,\n-\t\t\t uint16_t num_entries,\n-\t\t\t uint16_t base_addr)\n-{\n-\tstruct tfp_calloc_parms cparms;\n-\tuint16_t hash_size = 1;\n-\tuint16_t hash_mask;\n-\tint rc;\n-\n-\t/* Hash table is a power of two that holds the number of entries */\n-\tif (num_entries > TF_SHADOW_ENTRIES_MAX) {\n-\t\tTFP_DRV_LOG(ERR, \"Too many entries for shadow %d > %d\\n\",\n-\t\t\t num_entries,\n-\t\t\t TF_SHADOW_ENTRIES_MAX);\n-\t\treturn -ENOMEM;\n-\t}\n-\n-\twhile (hash_size < num_entries)\n-\t\thash_size = hash_size << 1;\n-\n-\thash_mask = hash_size - 1;\n-\n-\t/* Allocate the hash table */\n-\tcparms.nitems = hash_size;\n-\tcparms.size = sizeof(uint64_t);\n-\tcparms.alignment = 0;\n-\trc = tfp_calloc(&cparms);\n-\tif (rc)\n-\t\tgoto error;\n-\tctxt->hash_ctxt.hashtbl = cparms.mem_va;\n-\tctxt->hash_ctxt.hid_mask = hash_mask;\n-\tctxt->hash_ctxt.hash_entries = hash_size;\n-\n-\t/* allocate the shadow tables */\n-\t/* allocate the shadow key table */\n-\tcparms.nitems = num_entries;\n-\tcparms.size = sizeof(struct tf_shadow_tbl_shadow_key_entry);\n-\tcparms.alignment = 0;\n-\trc = tfp_calloc(&cparms);\n-\tif (rc)\n-\t\tgoto error;\n-\tctxt->shadow_ctxt.sh_key_tbl = cparms.mem_va;\n-\n-\t/* allocate the shadow result table */\n-\tcparms.nitems = num_entries;\n-\tcparms.size = sizeof(struct tf_shadow_tbl_shadow_result_entry);\n-\tcparms.alignment = 0;\n-\trc = tfp_calloc(&cparms);\n-\tif (rc)\n-\t\tgoto error;\n-\tctxt->shadow_ctxt.sh_res_tbl = cparms.mem_va;\n-\n-\tctxt->shadow_ctxt.num_entries = num_entries;\n-\tctxt->shadow_ctxt.base_addr = base_addr;\n-\n-\treturn 0;\n-error:\n-\ttf_shadow_tbl_ctxt_delete(ctxt);\n-\n-\treturn -ENOMEM;\n-}\n-\n-/**\n- * Get a shadow table context given the db and the table type\n- */\n-static struct tf_shadow_tbl_ctxt *\n-tf_shadow_tbl_ctxt_get(struct tf_shadow_tbl_db *shadow_db,\n-\t\t enum tf_tbl_type type)\n-{\n-\tif (type >= TF_TBL_TYPE_MAX ||\n-\t !shadow_db ||\n-\t !shadow_db->ctxt[type])\n-\t\treturn NULL;\n-\n-\treturn shadow_db->ctxt[type];\n-}\n-\n-/**\n- * Sets the hash entry into the table given the table context, hash bucket\n- * handle, and shadow index.\n- */\n-static inline int\n-tf_shadow_tbl_set_hash_entry(struct tf_shadow_tbl_ctxt *ctxt,\n-\t\t\t uint32_t hb_handle,\n-\t\t\t uint16_t sh_idx)\n-{\n-\tuint16_t hid = TF_SHADOW_HB_HANDLE_HASH_GET(ctxt, hb_handle);\n-\tuint16_t be = TF_SHADOW_HB_HANDLE_BE_GET(hb_handle);\n-\tuint64_t entry = sh_idx | TF_SHADOW_BE_VALID;\n-\n-\tif (hid >= ctxt->hash_ctxt.hash_entries)\n-\t\treturn -EINVAL;\n-\n-\tctxt->hash_ctxt.hashtbl[hid] |= entry << (be * 16);\n-\treturn 0;\n-}\n-\n-/**\n- * Clears the hash entry given the TBL context and hash bucket handle.\n- */\n-static inline void\n-tf_shadow_tbl_clear_hash_entry(struct tf_shadow_tbl_ctxt *ctxt,\n-\t\t\t uint32_t hb_handle)\n-{\n-\tuint16_t hid, be;\n-\tuint64_t *bucket;\n-\n-\tif (!TF_SHADOW_HB_HANDLE_IS_VALID(hb_handle))\n-\t\treturn;\n-\n-\thid = TF_SHADOW_HB_HANDLE_HASH_GET(ctxt, hb_handle);\n-\tbe = TF_SHADOW_HB_HANDLE_BE_GET(hb_handle);\n-\tbucket = &ctxt->hash_ctxt.hashtbl[hid];\n-\n-\tswitch (be) {\n-\tcase 0:\n-\t\t*bucket = TF_SHADOW_BE0_MASK_CLEAR(*bucket);\n-\t\tbreak;\n-\tcase 1:\n-\t\t*bucket = TF_SHADOW_BE1_MASK_CLEAR(*bucket);\n-\t\tbreak;\n-\tcase 2:\n-\t\t*bucket = TF_SHADOW_BE2_MASK_CLEAR(*bucket);\n-\t\tbreak;\n-\tcase 3:\n-\t\t*bucket = TF_SHADOW_BE2_MASK_CLEAR(*bucket);\n-\t\tbreak;\n-\tdefault:\n-\t\t/*\n-\t\t * Since the BE_GET masks non-inclusive bits, this will not\n-\t\t * happen.\n-\t\t */\n-\t\tbreak;\n-\t}\n-}\n-\n-/**\n- * Clears the shadow key and result entries given the table context and\n- * shadow index.\n- */\n-static void\n-tf_shadow_tbl_clear_sh_entry(struct tf_shadow_tbl_ctxt *ctxt,\n-\t\t\t uint16_t sh_idx)\n-{\n-\tstruct tf_shadow_tbl_shadow_key_entry *sk_entry;\n-\tstruct tf_shadow_tbl_shadow_result_entry *sr_entry;\n-\n-\tif (sh_idx >= tf_shadow_tbl_sh_num_entries_get(ctxt))\n-\t\treturn;\n-\n-\tsk_entry = &ctxt->shadow_ctxt.sh_key_tbl[sh_idx];\n-\tsr_entry = &ctxt->shadow_ctxt.sh_res_tbl[sh_idx];\n-\n-\t/*\n-\t * memset key/result to zero for now, possibly leave the data alone\n-\t * in the future and rely on the valid bit in the hash table.\n-\t */\n-\tmemset(sk_entry, 0, sizeof(struct tf_shadow_tbl_shadow_key_entry));\n-\tmemset(sr_entry, 0, sizeof(struct tf_shadow_tbl_shadow_result_entry));\n-}\n-\n-/**\n- * Binds the allocated tbl index with the hash and shadow tables.\n- * The entry will be incomplete until the set has happened with the result\n- * data.\n- */\n-int\n-tf_shadow_tbl_bind_index(struct tf_shadow_tbl_bind_index_parms *parms)\n-{\n-\tint rc;\n-\tuint16_t idx, len;\n-\tstruct tf_shadow_tbl_ctxt *ctxt;\n-\tstruct tf_shadow_tbl_db *shadow_db;\n-\tstruct tf_shadow_tbl_shadow_key_entry *sk_entry;\n-\tstruct tf_shadow_tbl_shadow_result_entry *sr_entry;\n-\n-\tif (!parms || !TF_SHADOW_HB_HANDLE_IS_VALID(parms->hb_handle) ||\n-\t !parms->data) {\n-\t\tTFP_DRV_LOG(ERR, \"Invalid parms\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tshadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db;\n-\tctxt = tf_shadow_tbl_ctxt_get(shadow_db, parms->type);\n-\tif (!ctxt) {\n-\t\tTFP_DRV_LOG(DEBUG, \"%s no ctxt for table\\n\",\n-\t\t\t tf_tbl_type_2_str(parms->type));\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tidx = TF_SHADOW_IDX_TO_SHIDX(ctxt, parms->idx);\n-\tlen = parms->data_sz_in_bytes;\n-\tif (idx >= tf_shadow_tbl_sh_num_entries_get(ctxt) ||\n-\t len > TF_SHADOW_MAX_KEY_SZ) {\n-\t\tTFP_DRV_LOG(ERR, \"%s:%s Invalid len (%d) > %d || oob idx %d\\n\",\n-\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t tf_tbl_type_2_str(parms->type),\n-\t\t\t len,\n-\t\t\t TF_SHADOW_MAX_KEY_SZ, idx);\n-\n-\t\treturn -EINVAL;\n-\t}\n-\n-\trc = tf_shadow_tbl_set_hash_entry(ctxt, parms->hb_handle, idx);\n-\tif (rc)\n-\t\treturn -EINVAL;\n-\n-\tsk_entry = &ctxt->shadow_ctxt.sh_key_tbl[idx];\n-\tsr_entry = &ctxt->shadow_ctxt.sh_res_tbl[idx];\n-\n-\t/* For tables, the data is the key */\n-\tmemcpy(sk_entry->key, parms->data, len);\n-\n-\t/* Write the result table */\n-\tsr_entry->key_size = len;\n-\tsr_entry->hb_handle = parms->hb_handle;\n-\tsr_entry->refcnt = 1;\n-\n-\treturn 0;\n-}\n-\n-/**\n- * Deletes hash/shadow information if no more references.\n- *\n- * Returns 0 - The caller should delete the table entry in hardware.\n- * Returns non-zero - The number of references to the entry\n- */\n-int\n-tf_shadow_tbl_remove(struct tf_shadow_tbl_remove_parms *parms)\n-{\n-\tuint16_t idx;\n-\tuint32_t hb_handle;\n-\tstruct tf_shadow_tbl_ctxt *ctxt;\n-\tstruct tf_shadow_tbl_db *shadow_db;\n-\tstruct tf_tbl_free_parms *fparms;\n-\tstruct tf_shadow_tbl_shadow_result_entry *sr_entry;\n-\n-\tif (!parms || !parms->fparms) {\n-\t\tTFP_DRV_LOG(ERR, \"Invalid parms\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tfparms = parms->fparms;\n-\tif (!tf_shadow_tbl_is_searchable(fparms->type))\n-\t\treturn 0;\n-\t/*\n-\t * Initialize the ref count to zero. The default would be to remove\n-\t * the entry.\n-\t */\n-\tfparms->ref_cnt = 0;\n-\n-\tshadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db;\n-\tctxt = tf_shadow_tbl_ctxt_get(shadow_db, fparms->type);\n-\tif (!ctxt) {\n-\t\tTFP_DRV_LOG(DEBUG, \"%s no ctxt for table\\n\",\n-\t\t\t tf_tbl_type_2_str(fparms->type));\n-\t\treturn 0;\n-\t}\n-\n-\tidx = TF_SHADOW_IDX_TO_SHIDX(ctxt, fparms->idx);\n-\tif (idx >= tf_shadow_tbl_sh_num_entries_get(ctxt)) {\n-\t\tTFP_DRV_LOG(DEBUG, \"%s %d >= %d\\n\",\n-\t\t\t tf_tbl_type_2_str(fparms->type),\n-\t\t\t fparms->idx,\n-\t\t\t tf_shadow_tbl_sh_num_entries_get(ctxt));\n-\t\treturn 0;\n-\t}\n-\n-\tsr_entry = &ctxt->shadow_ctxt.sh_res_tbl[idx];\n-\tif (sr_entry->refcnt <= 1) {\n-\t\thb_handle = sr_entry->hb_handle;\n-\t\ttf_shadow_tbl_clear_hash_entry(ctxt, hb_handle);\n-\t\ttf_shadow_tbl_clear_sh_entry(ctxt, idx);\n-\t} else {\n-\t\tsr_entry->refcnt--;\n-\t\tfparms->ref_cnt = sr_entry->refcnt;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-int\n-tf_shadow_tbl_search(struct tf_shadow_tbl_search_parms *parms)\n-{\n-\tuint16_t len;\n-\tuint64_t bucket;\n-\tuint32_t i, hid32;\n-\tstruct tf_shadow_tbl_ctxt *ctxt;\n-\tstruct tf_shadow_tbl_db *shadow_db;\n-\tuint16_t hid16, hb_idx, hid_mask, shtbl_idx, shtbl_key, be_valid;\n-\tstruct tf_tbl_alloc_search_parms *sparms;\n-\tuint32_t be_avail = TF_SHADOW_HB_NUM_ELEM;\n-\n-\tif (!parms || !parms->sparms) {\n-\t\tTFP_DRV_LOG(ERR, \"tbl search with invalid parms\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tsparms = parms->sparms;\n-\t/* Check that caller was supposed to call search */\n-\tif (!tf_shadow_tbl_is_searchable(sparms->type))\n-\t\treturn -EINVAL;\n-\n-\t/* Initialize return values to invalid */\n-\tsparms->hit = 0;\n-\tsparms->search_status = REJECT;\n-\tparms->hb_handle = 0;\n-\tsparms->ref_cnt = 0;\n-\n-\tshadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db;\n-\tctxt = tf_shadow_tbl_ctxt_get(shadow_db, sparms->type);\n-\tif (!ctxt) {\n-\t\tTFP_DRV_LOG(ERR, \"%s Unable to get tbl mgr context\\n\",\n-\t\t\t tf_tbl_type_2_str(sparms->type));\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tlen = sparms->result_sz_in_bytes;\n-\tif (len > TF_SHADOW_MAX_KEY_SZ || !sparms->result || !len) {\n-\t\tTFP_DRV_LOG(ERR, \"%s:%s Invalid parms %d : %p\\n\",\n-\t\t\t tf_dir_2_str(sparms->dir),\n-\t\t\t tf_tbl_type_2_str(sparms->type),\n-\t\t\t len,\n-\t\t\t sparms->result);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\t/*\n-\t * Calculate the crc32\n-\t * Fold it to create a 16b value\n-\t * Reduce it to fit the table\n-\t */\n-\thid32 = tf_hash_calc_crc32(sparms->result, len);\n-\thid16 = (uint16_t)(((hid32 >> 16) & 0xffff) ^ (hid32 & 0xffff));\n-\thid_mask = ctxt->hash_ctxt.hid_mask;\n-\thb_idx = hid16 & hid_mask;\n-\n-\tbucket = ctxt->hash_ctxt.hashtbl[hb_idx];\n-\tif (!bucket) {\n-\t\t/* empty bucket means a miss and available entry */\n-\t\tsparms->search_status = MISS;\n-\t\tparms->hb_handle = TF_SHADOW_HB_HANDLE_CREATE(hb_idx, 0);\n-\t\tsparms->idx = 0;\n-\t\treturn 0;\n-\t}\n-\n-\t/* Set the avail to max so we can detect when there is an avail entry */\n-\tbe_avail = TF_SHADOW_HB_NUM_ELEM;\n-\tfor (i = 0; i < TF_SHADOW_HB_NUM_ELEM; i++) {\n-\t\tshtbl_idx = (uint16_t)((bucket >> (i * 16)) & 0xffff);\n-\t\tbe_valid = TF_SHADOW_BE_IS_VALID(shtbl_idx);\n-\t\tif (!be_valid) {\n-\t\t\t/* The element is avail, keep going */\n-\t\t\tbe_avail = i;\n-\t\t\tcontinue;\n-\t\t}\n-\t\t/* There is a valid entry, compare it */\n-\t\tshtbl_key = shtbl_idx & ~TF_SHADOW_BE_VALID;\n-\t\tif (!tf_shadow_tbl_key_cmp(ctxt,\n-\t\t\t\t\t sparms->result,\n-\t\t\t\t\t shtbl_key,\n-\t\t\t\t\t len)) {\n-\t\t\t/*\n-\t\t\t * It matches, increment the ref count if the caller\n-\t\t\t * requested allocation and return the info\n-\t\t\t */\n-\t\t\tif (sparms->alloc)\n-\t\t\t\tctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt =\n-\t\t\tctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt + 1;\n-\n-\t\t\tsparms->hit = 1;\n-\t\t\tsparms->search_status = HIT;\n-\t\t\tparms->hb_handle =\n-\t\t\t\tTF_SHADOW_HB_HANDLE_CREATE(hb_idx, i);\n-\t\t\tsparms->idx = TF_SHADOW_SHIDX_TO_IDX(ctxt, shtbl_key);\n-\t\t\tsparms->ref_cnt =\n-\t\t\t\tctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt;\n-\n-\t\t\treturn 0;\n-\t\t}\n-\t}\n-\n-\t/* No hits, return avail entry if exists */\n-\tif (be_avail < TF_SHADOW_HB_NUM_ELEM) {\n-\t\t/*\n-\t\t * There is an available hash entry, so return MISS and the\n-\t\t * hash handle for the subsequent bind.\n-\t\t */\n-\t\tparms->hb_handle = TF_SHADOW_HB_HANDLE_CREATE(hb_idx, be_avail);\n-\t\tsparms->search_status = MISS;\n-\t\tsparms->hit = 0;\n-\t\tsparms->idx = 0;\n-\t} else {\n-\t\t/* No room for the entry in the hash table, must REJECT */\n-\t\tsparms->search_status = REJECT;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-int\n-tf_shadow_tbl_insert(struct tf_shadow_tbl_insert_parms *parms)\n-{\n-\tuint16_t idx;\n-\tstruct tf_shadow_tbl_ctxt *ctxt;\n-\tstruct tf_tbl_set_parms *sparms;\n-\tstruct tf_shadow_tbl_db *shadow_db;\n-\tstruct tf_shadow_tbl_shadow_result_entry *sr_entry;\n-\n-\tif (!parms || !parms->sparms) {\n-\t\tTFP_DRV_LOG(ERR, \"Null parms\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tsparms = parms->sparms;\n-\tif (!sparms->data || !sparms->data_sz_in_bytes) {\n-\t\tTFP_DRV_LOG(ERR, \"%s:%s No result to set.\\n\",\n-\t\t\t tf_dir_2_str(sparms->dir),\n-\t\t\t tf_tbl_type_2_str(sparms->type));\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tshadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db;\n-\tctxt = tf_shadow_tbl_ctxt_get(shadow_db, sparms->type);\n-\tif (!ctxt) {\n-\t\t/* We aren't tracking this table, so return success */\n-\t\tTFP_DRV_LOG(DEBUG, \"%s Unable to get tbl mgr context\\n\",\n-\t\t\t tf_tbl_type_2_str(sparms->type));\n-\t\treturn 0;\n-\t}\n-\n-\tidx = TF_SHADOW_IDX_TO_SHIDX(ctxt, sparms->idx);\n-\tif (idx >= tf_shadow_tbl_sh_num_entries_get(ctxt)) {\n-\t\tTFP_DRV_LOG(ERR, \"%s:%s Invalid idx(0x%x)\\n\",\n-\t\t\t tf_dir_2_str(sparms->dir),\n-\t\t\t tf_tbl_type_2_str(sparms->type),\n-\t\t\t sparms->idx);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\t/* Write the result table, the key/hash has been written already */\n-\tsr_entry = &ctxt->shadow_ctxt.sh_res_tbl[idx];\n-\n-\t/*\n-\t * If the handle is not valid, the bind was never called. We aren't\n-\t * tracking this entry.\n-\t */\n-\tif (!TF_SHADOW_HB_HANDLE_IS_VALID(sr_entry->hb_handle))\n-\t\treturn 0;\n-\n-\treturn 0;\n-}\n-\n-int\n-tf_shadow_tbl_free_db(struct tf_shadow_tbl_free_db_parms *parms)\n-{\n-\tstruct tf_shadow_tbl_db *shadow_db;\n-\tint i;\n-\n-\tTF_CHECK_PARMS1(parms);\n-\n-\tshadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db;\n-\tif (!shadow_db) {\n-\t\tTFP_DRV_LOG(DEBUG, \"Shadow db is NULL cannot be freed\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tfor (i = 0; i < TF_TBL_TYPE_MAX; i++) {\n-\t\tif (shadow_db->ctxt[i]) {\n-\t\t\ttf_shadow_tbl_ctxt_delete(shadow_db->ctxt[i]);\n-\t\t\ttfp_free(shadow_db->ctxt[i]);\n-\t\t}\n-\t}\n-\n-\ttfp_free(shadow_db);\n-\n-\treturn 0;\n-}\n-\n-/**\n- * Allocate the table resources for search and allocate\n- *\n- */\n-int tf_shadow_tbl_create_db(struct tf_shadow_tbl_create_db_parms *parms)\n-{\n-\tint rc;\n-\tint i;\n-\tuint16_t base;\n-\tstruct tfp_calloc_parms cparms;\n-\tstruct tf_shadow_tbl_db *shadow_db = NULL;\n-\n-\tTF_CHECK_PARMS1(parms);\n-\n-\t/* Build the shadow DB per the request */\n-\tcparms.nitems = 1;\n-\tcparms.size = sizeof(struct tf_shadow_tbl_db);\n-\tcparms.alignment = 0;\n-\trc = tfp_calloc(&cparms);\n-\tif (rc)\n-\t\treturn rc;\n-\tshadow_db = (void *)cparms.mem_va;\n-\n-\tfor (i = 0; i < TF_TBL_TYPE_MAX; i++) {\n-\t\t/* If the element didn't request an allocation no need\n-\t\t * to create a pool nor verify if we got a reservation.\n-\t\t */\n-\t\tif (!parms->cfg->alloc_cnt[i] ||\n-\t\t !tf_shadow_tbl_is_searchable(i)) {\n-\t\t\tshadow_db->ctxt[i] = NULL;\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tcparms.nitems = 1;\n-\t\tcparms.size = sizeof(struct tf_shadow_tbl_ctxt);\n-\t\tcparms.alignment = 0;\n-\t\trc = tfp_calloc(&cparms);\n-\t\tif (rc)\n-\t\t\tgoto error;\n-\n-\t\tshadow_db->ctxt[i] = cparms.mem_va;\n-\t\tbase = parms->cfg->base_addr[i];\n-\t\trc = tf_shadow_tbl_ctxt_create(shadow_db->ctxt[i],\n-\t\t\t\t\t\tparms->cfg->alloc_cnt[i],\n-\t\t\t\t\t\tbase);\n-\t\tif (rc)\n-\t\t\tgoto error;\n-\t}\n-\n-\t*parms->shadow_db = (void *)shadow_db;\n-\n-\tTFP_DRV_LOG(INFO,\n-\t\t \"TF SHADOW TABLE - initialized\\n\");\n-\n-\treturn 0;\n-error:\n-\tfor (i = 0; i < TF_TBL_TYPE_MAX; i++) {\n-\t\tif (shadow_db->ctxt[i]) {\n-\t\t\ttf_shadow_tbl_ctxt_delete(shadow_db->ctxt[i]);\n-\t\t\ttfp_free(shadow_db->ctxt[i]);\n-\t\t}\n-\t}\n-\n-\ttfp_free(shadow_db);\n-\n-\treturn -ENOMEM;\n-}\ndiff --git a/drivers/net/bnxt/tf_core/tf_shadow_tbl.h b/drivers/net/bnxt/tf_core/tf_shadow_tbl.h\ndeleted file mode 100644\nindex 354240efce..0000000000\n--- a/drivers/net/bnxt/tf_core/tf_shadow_tbl.h\n+++ /dev/null\n@@ -1,256 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2019-2021 Broadcom\n- * All rights reserved.\n- */\n-\n-#ifndef _TF_SHADOW_TBL_H_\n-#define _TF_SHADOW_TBL_H_\n-\n-#include \"tf_core.h\"\n-\n-/**\n- * The Shadow Table module provides shadow DB handling for table based\n- * TF types. A shadow DB provides the capability that allows for reuse\n- * of TF resources.\n- *\n- * A Shadow table DB is intended to be used by the Table Type module\n- * only.\n- */\n-\n-/**\n- * Shadow DB configuration information for a single table type.\n- *\n- * During Device initialization the HCAPI device specifics are learned\n- * and as well as the RM DB creation. From that those initial steps\n- * this structure can be populated.\n- *\n- * NOTE:\n- * If used in an array of table types then such array must be ordered\n- * by the TF type is represents.\n- */\n-struct tf_shadow_tbl_cfg_parms {\n-\t/**\n-\t * [in] The number of elements in the alloc_cnt and base_addr\n-\t * For now, it should always be equal to TF_TBL_TYPE_MAX\n-\t */\n-\tint num_entries;\n-\n-\t/**\n-\t * [in] Resource allocation count array\n-\t * This array content originates from the tf_session_resources\n-\t * that is passed in on session open\n-\t * Array size is TF_TBL_TYPE_MAX\n-\t */\n-\tuint16_t *alloc_cnt;\n-\t/**\n-\t * [in] The base index for each table\n-\t */\n-\tuint16_t base_addr[TF_TBL_TYPE_MAX];\n-};\n-\n-/**\n- * Shadow table DB creation parameters\n- */\n-struct tf_shadow_tbl_create_db_parms {\n-\t/**\n-\t * [in] Receive or transmit direction\n-\t */\n-\tenum tf_dir dir;\n-\t/**\n-\t * [in] Configuration information for the shadow db\n-\t */\n-\tstruct tf_shadow_tbl_cfg_parms *cfg;\n-\t/**\n-\t * [out] Shadow table DB handle\n-\t */\n-\tvoid **shadow_db;\n-};\n-\n-/**\n- * Shadow table DB free parameters\n- */\n-struct tf_shadow_tbl_free_db_parms {\n-\t/**\n-\t * [in] Shadow table DB handle\n-\t */\n-\tvoid *shadow_db;\n-};\n-\n-/**\n- * Shadow table search parameters\n- */\n-struct tf_shadow_tbl_search_parms {\n-\t/**\n-\t * [in] Shadow table DB handle\n-\t */\n-\tvoid *shadow_db;\n-\t/**\n-\t * [in,out] The search parms from tf core\n-\t */\n-\tstruct tf_tbl_alloc_search_parms *sparms;\n-\t/**\n-\t * [out] Reference count incremented if hit\n-\t */\n-\tuint32_t hb_handle;\n-};\n-\n-/**\n- * Shadow Table bind index parameters\n- */\n-struct tf_shadow_tbl_bind_index_parms {\n-\t/**\n-\t * [in] Shadow tcam DB handle\n-\t */\n-\tvoid *shadow_db;\n-\t/**\n-\t * [in] receive or transmit direction\n-\t */\n-\tenum tf_dir dir;\n-\t/**\n-\t * [in] TCAM table type\n-\t */\n-\tenum tf_tbl_type type;\n-\t/**\n-\t * [in] index of the entry to program\n-\t */\n-\tuint16_t idx;\n-\t/**\n-\t * [in] struct containing key\n-\t */\n-\tuint8_t *data;\n-\t/**\n-\t * [in] data size in bytes\n-\t */\n-\tuint16_t data_sz_in_bytes;\n-\t/**\n-\t * [in] The hash bucket handled returned from the search\n-\t */\n-\tuint32_t hb_handle;\n-};\n-\n-/**\n- * Shadow table insert parameters\n- */\n-struct tf_shadow_tbl_insert_parms {\n-\t/**\n-\t * [in] Shadow table DB handle\n-\t */\n-\tvoid *shadow_db;\n-\t/**\n-\t * [in] The insert parms from tf core\n-\t */\n-\tstruct tf_tbl_set_parms *sparms;\n-};\n-\n-/**\n- * Shadow table remove parameters\n- */\n-struct tf_shadow_tbl_remove_parms {\n-\t/**\n-\t * [in] Shadow table DB handle\n-\t */\n-\tvoid *shadow_db;\n-\t/**\n-\t * [in] The free parms from tf core\n-\t */\n-\tstruct tf_tbl_free_parms *fparms;\n-};\n-\n-/**\n- * @page shadow_tbl Shadow table DB\n- *\n- * @ref tf_shadow_tbl_create_db\n- *\n- * @ref tf_shadow_tbl_free_db\n- *\n- * @reg tf_shadow_tbl_search\n- *\n- * @reg tf_shadow_tbl_insert\n- *\n- * @reg tf_shadow_tbl_remove\n- */\n-\n-/**\n- * Creates and fills a Shadow table DB. The DB is indexed per the\n- * parms structure.\n- *\n- * [in] parms\n- * Pointer to create db parameters\n- *\n- * Returns\n- * - (0) if successful.\n- * - (-EINVAL) on failure.\n- */\n-int tf_shadow_tbl_create_db(struct tf_shadow_tbl_create_db_parms *parms);\n-\n-/**\n- * Closes the Shadow table DB and frees all allocated\n- * resources per the associated database.\n- *\n- * [in] parms\n- * Pointer to the free DB parameters\n- *\n- * Returns\n- * - (0) if successful.\n- * - (-EINVAL) on failure.\n- */\n-int tf_shadow_tbl_free_db(struct tf_shadow_tbl_free_db_parms *parms);\n-\n-/**\n- * Search Shadow table db for matching result\n- *\n- * [in] parms\n- * Pointer to the search parameters\n- *\n- * Returns\n- * - (0) if successful, element was found.\n- * - (-EINVAL) on failure.\n- *\n- * If there is a miss, but there is room for insertion, the hb_handle returned\n- * is used for insertion during the bind index API\n- */\n-int tf_shadow_tbl_search(struct tf_shadow_tbl_search_parms *parms);\n-\n-/**\n- * Bind Shadow table db hash and result tables with result from search/alloc\n- *\n- * [in] parms\n- * Pointer to the search parameters\n- *\n- * Returns\n- * - (0) if successful\n- * - (-EINVAL) on failure.\n- *\n- * This is only called after a MISS in the search returns a hb_handle\n- */\n-int tf_shadow_tbl_bind_index(struct tf_shadow_tbl_bind_index_parms *parms);\n-\n-/**\n- * Inserts an element into the Shadow table DB. Will fail if the\n- * elements ref_count is different from 0. Ref_count after insert will\n- * be incremented.\n- *\n- * [in] parms\n- * Pointer to insert parameters\n- *\n- * Returns\n- * - (0) if successful.\n- * - (-EINVAL) on failure.\n- */\n-int tf_shadow_tbl_insert(struct tf_shadow_tbl_insert_parms *parms);\n-\n-/**\n- * Removes an element from the Shadow table DB. Will fail if the\n- * elements ref_count is 0. Ref_count after removal will be\n- * decremented.\n- *\n- * [in] parms\n- * Pointer to remove parameter\n- *\n- * Returns\n- * - (0) if successful.\n- * - (-EINVAL) on failure.\n- */\n-int tf_shadow_tbl_remove(struct tf_shadow_tbl_remove_parms *parms);\n-\n-#endif /* _TF_SHADOW_TBL_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c\nindex 67a43311cc..7d15c3c5d4 100644\n--- a/drivers/net/bnxt/tf_core/tf_tbl.c\n+++ b/drivers/net/bnxt/tf_core/tf_tbl.c\n@@ -13,11 +13,9 @@\n #include \"tf_util.h\"\n #include \"tf_msg.h\"\n #include \"tfp.h\"\n-#include \"tf_shadow_tbl.h\"\n #include \"tf_session.h\"\n #include \"tf_device.h\"\n \n-\n struct tf;\n \n /**\n@@ -44,13 +42,7 @@ int\n tf_tbl_bind(struct tf *tfp,\n \t struct tf_tbl_cfg_parms *parms)\n {\n-\tint rc, d, i;\n-\tstruct tf_rm_alloc_info info;\n-\tstruct tf_rm_free_db_parms fparms;\n-\tstruct tf_shadow_tbl_free_db_parms fshadow;\n-\tstruct tf_rm_get_alloc_info_parms ainfo;\n-\tstruct tf_shadow_tbl_cfg_parms shadow_cfg;\n-\tstruct tf_shadow_tbl_create_db_parms shadow_cdb;\n+\tint rc, d;\n \tstruct tf_rm_create_db_parms db_cfg = { 0 };\n \n \tTF_CHECK_PARMS2(tfp, parms);\n@@ -62,7 +54,7 @@ tf_tbl_bind(struct tf *tfp,\n \t}\n \n \tdb_cfg.num_elements = parms->num_elements;\n-\tdb_cfg.type = TF_DEVICE_MODULE_TYPE_TABLE;\n+\tdb_cfg.module = TF_MODULE_TYPE_TABLE;\n \tdb_cfg.num_elements = parms->num_elements;\n \tdb_cfg.cfg = parms->cfg;\n \n@@ -80,72 +72,12 @@ tf_tbl_bind(struct tf *tfp,\n \t\t}\n \t}\n \n-\t/* Initialize the Shadow Table. */\n-\tif (parms->shadow_copy) {\n-\t\tfor (d = 0; d < TF_DIR_MAX; d++) {\n-\t\t\tmemset(&shadow_cfg, 0, sizeof(shadow_cfg));\n-\t\t\tmemset(&shadow_cdb, 0, sizeof(shadow_cdb));\n-\t\t\t/* Get the base addresses of the tables */\n-\t\t\tfor (i = 0; i < TF_TBL_TYPE_MAX; i++) {\n-\t\t\t\tmemset(&info, 0, sizeof(info));\n-\n-\t\t\t\tif (!parms->resources->tbl_cnt[d].cnt[i])\n-\t\t\t\t\tcontinue;\n-\t\t\t\tainfo.rm_db = tbl_db[d];\n-\t\t\t\tainfo.db_index = i;\n-\t\t\t\tainfo.info = &info;\n-\t\t\t\trc = tf_rm_get_info(&ainfo);\n-\t\t\t\tif (rc)\n-\t\t\t\t\tgoto error;\n-\n-\t\t\t\tshadow_cfg.base_addr[i] = info.entry.start;\n-\t\t\t}\n-\n-\t\t\t/* Create the shadow db */\n-\t\t\tshadow_cfg.alloc_cnt =\n-\t\t\t\tparms->resources->tbl_cnt[d].cnt;\n-\t\t\tshadow_cfg.num_entries = parms->num_elements;\n-\n-\t\t\tshadow_cdb.shadow_db = &shadow_tbl_db[d];\n-\t\t\tshadow_cdb.cfg = &shadow_cfg;\n-\t\t\trc = tf_shadow_tbl_create_db(&shadow_cdb);\n-\t\t\tif (rc) {\n-\t\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t\t \"Shadow TBL DB creation failed \"\n-\t\t\t\t\t \"rc=%d\\n\", rc);\n-\t\t\t\tgoto error;\n-\t\t\t}\n-\t\t}\n-\t\tshadow_init = 1;\n-\t}\n-\n \tinit = 1;\n \n \tTFP_DRV_LOG(INFO,\n \t\t \"Table Type - initialized\\n\");\n \n \treturn 0;\n-error:\n-\tfor (d = 0; d < TF_DIR_MAX; d++) {\n-\t\tmemset(&fparms, 0, sizeof(fparms));\n-\t\tfparms.dir = d;\n-\t\tfparms.rm_db = tbl_db[d];\n-\t\t/* Ignoring return here since we are in the error case */\n-\t\t(void)tf_rm_free_db(tfp, &fparms);\n-\n-\t\tif (parms->shadow_copy) {\n-\t\t\tfshadow.shadow_db = shadow_tbl_db[d];\n-\t\t\ttf_shadow_tbl_free_db(&fshadow);\n-\t\t\tshadow_tbl_db[d] = NULL;\n-\t\t}\n-\n-\t\ttbl_db[d] = NULL;\n-\t}\n-\n-\tshadow_init = 0;\n-\tinit = 0;\n-\n-\treturn rc;\n }\n \n int\n@@ -154,8 +86,6 @@ tf_tbl_unbind(struct tf *tfp)\n \tint rc;\n \tint i;\n \tstruct tf_rm_free_db_parms fparms = { 0 };\n-\tstruct tf_shadow_tbl_free_db_parms fshadow;\n-\n \tTF_CHECK_PARMS1(tfp);\n \n \t/* Bail if nothing has been initialized */\n@@ -173,13 +103,6 @@ tf_tbl_unbind(struct tf *tfp)\n \t\t\treturn rc;\n \n \t\ttbl_db[i] = NULL;\n-\n-\t\tif (shadow_init) {\n-\t\t\tmemset(&fshadow, 0, sizeof(fshadow));\n-\t\t\tfshadow.shadow_db = shadow_tbl_db[i];\n-\t\t\ttf_shadow_tbl_free_db(&fshadow);\n-\t\t\tshadow_tbl_db[i] = NULL;\n-\t\t}\n \t}\n \n \tinit = 0;\n@@ -207,7 +130,7 @@ tf_tbl_alloc(struct tf *tfp __rte_unused,\n \n \t/* Allocate requested element */\n \taparms.rm_db = tbl_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = &idx;\n \trc = tf_rm_allocate(&aparms);\n \tif (rc) {\n@@ -230,7 +153,6 @@ tf_tbl_free(struct tf *tfp __rte_unused,\n \tint rc;\n \tstruct tf_rm_is_allocated_parms aparms = { 0 };\n \tstruct tf_rm_free_parms fparms = { 0 };\n-\tstruct tf_shadow_tbl_remove_parms shparms;\n \tint allocated = 0;\n \n \tTF_CHECK_PARMS2(tfp, parms);\n@@ -244,7 +166,7 @@ tf_tbl_free(struct tf *tfp __rte_unused,\n \n \t/* Check if element is in use */\n \taparms.rm_db = tbl_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = parms->idx;\n \taparms.allocated = &allocated;\n \trc = tf_rm_is_allocated(&aparms);\n@@ -259,40 +181,9 @@ tf_tbl_free(struct tf *tfp __rte_unused,\n \t\t\t parms->idx);\n \t\treturn -EINVAL;\n \t}\n-\n-\t/*\n-\t * The Shadow mgmt, if enabled, determines if the entry needs\n-\t * to be deleted.\n-\t */\n-\tif (shadow_init) {\n-\t\tmemset(&shparms, 0, sizeof(shparms));\n-\t\tshparms.shadow_db = shadow_tbl_db[parms->dir];\n-\t\tshparms.fparms = parms;\n-\t\trc = tf_shadow_tbl_remove(&shparms);\n-\t\tif (rc) {\n-\t\t\t/*\n-\t\t\t * Should not get here, log it and let the entry be\n-\t\t\t * deleted.\n-\t\t\t */\n-\t\t\tTFP_DRV_LOG(ERR, \"%s: Shadow free fail, \"\n-\t\t\t\t \"type:%d index:%d deleting the entry.\\n\",\n-\t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t parms->type,\n-\t\t\t\t parms->idx);\n-\t\t} else {\n-\t\t\t/*\n-\t\t\t * If the entry still has references, just return the\n-\t\t\t * ref count to the caller. No need to remove entry\n-\t\t\t * from rm.\n-\t\t\t */\n-\t\t\tif (parms->ref_cnt >= 1)\n-\t\t\t\treturn rc;\n-\t\t}\n-\t}\n-\n \t/* Free requested element */\n \tfparms.rm_db = tbl_db[parms->dir];\n-\tfparms.db_index = parms->type;\n+\tfparms.subtype = parms->type;\n \tfparms.index = parms->idx;\n \trc = tf_rm_free(&fparms);\n \tif (rc) {\n@@ -311,15 +202,7 @@ int\n tf_tbl_alloc_search(struct tf *tfp,\n \t\t struct tf_tbl_alloc_search_parms *parms)\n {\n-\tint rc, frc;\n-\tuint32_t idx;\n-\tstruct tf_session *tfs;\n-\tstruct tf_dev_info *dev;\n-\tstruct tf_tbl_alloc_parms aparms;\n-\tstruct tf_shadow_tbl_search_parms sparms;\n-\tstruct tf_shadow_tbl_bind_index_parms bparms;\n-\tstruct tf_tbl_free_parms fparms;\n-\n+\tint rc = 0;\n \tTF_CHECK_PARMS2(tfp, parms);\n \n \tif (!shadow_init || !shadow_tbl_db[parms->dir]) {\n@@ -328,103 +211,6 @@ tf_tbl_alloc_search(struct tf *tfp,\n \t\treturn -EINVAL;\n \t}\n \n-\tmemset(&sparms, 0, sizeof(sparms));\n-\tsparms.sparms = parms;\n-\tsparms.shadow_db = shadow_tbl_db[parms->dir];\n-\trc = tf_shadow_tbl_search(&sparms);\n-\tif (rc)\n-\t\treturn rc;\n-\n-\t/*\n-\t * The app didn't request us to alloc the entry, so return now.\n-\t * The hit should have been updated in the original search parm.\n-\t */\n-\tif (!parms->alloc || parms->search_status != MISS)\n-\t\treturn rc;\n-\n-\t/* Retrieve the session information */\n-\trc = tf_session_get_session(tfp, &tfs);\n-\tif (rc) {\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Failed to lookup session, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t strerror(-rc));\n-\t\treturn rc;\n-\t}\n-\n-\t/* Retrieve the device information */\n-\trc = tf_session_get_device(tfs, &dev);\n-\tif (rc) {\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Failed to lookup device, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t strerror(-rc));\n-\t\treturn rc;\n-\t}\n-\n-\t/* Allocate the index */\n-\tif (dev->ops->tf_dev_alloc_tbl == NULL) {\n-\t\trc = -EOPNOTSUPP;\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Operation not supported, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t strerror(-rc));\n-\t\treturn -EOPNOTSUPP;\n-\t}\n-\n-\tmemset(&aparms, 0, sizeof(aparms));\n-\taparms.dir = parms->dir;\n-\taparms.type = parms->type;\n-\taparms.tbl_scope_id = parms->tbl_scope_id;\n-\taparms.idx = &idx;\n-\trc = dev->ops->tf_dev_alloc_tbl(tfp, &aparms);\n-\tif (rc) {\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Table allocation failed, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t strerror(-rc));\n-\t\treturn rc;\n-\t}\n-\n-\t/* Bind the allocated index to the data */\n-\tmemset(&bparms, 0, sizeof(bparms));\n-\tbparms.shadow_db = shadow_tbl_db[parms->dir];\n-\tbparms.dir = parms->dir;\n-\tbparms.type = parms->type;\n-\tbparms.idx = idx;\n-\tbparms.data = parms->result;\n-\tbparms.data_sz_in_bytes = parms->result_sz_in_bytes;\n-\tbparms.hb_handle = sparms.hb_handle;\n-\trc = tf_shadow_tbl_bind_index(&bparms);\n-\tif (rc) {\n-\t\t/* Error binding entry, need to free the allocated idx */\n-\t\tif (dev->ops->tf_dev_free_tbl == NULL) {\n-\t\t\trc = -EOPNOTSUPP;\n-\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t \"%s: Operation not supported, rc:%s\\n\",\n-\t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t strerror(-rc));\n-\t\t\treturn rc;\n-\t\t}\n-\n-\t\tmemset(&fparms, 0, sizeof(fparms));\n-\t\tfparms.dir = parms->dir;\n-\t\tfparms.type = parms->type;\n-\t\tfparms.idx = idx;\n-\t\tfrc = dev->ops->tf_dev_free_tbl(tfp, &fparms);\n-\t\tif (frc) {\n-\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t \"%s: Failed free index allocated during \"\n-\t\t\t\t \"search. rc=%s\\n\",\n-\t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t strerror(-frc));\n-\t\t\t/* return the original failure. */\n-\t\t\treturn rc;\n-\t\t}\n-\t}\n-\n-\tparms->idx = idx;\n-\n \treturn rc;\n }\n \n@@ -449,7 +235,7 @@ tf_tbl_set(struct tf *tfp,\n \n \t/* Verify that the entry has been previously allocated */\n \taparms.rm_db = tbl_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = parms->idx;\n \taparms.allocated = &allocated;\n \trc = tf_rm_is_allocated(&aparms);\n@@ -467,7 +253,7 @@ tf_tbl_set(struct tf *tfp,\n \n \t/* Set the entry */\n \thparms.rm_db = tbl_db[parms->dir];\n-\thparms.db_index = parms->type;\n+\thparms.subtype = parms->type;\n \thparms.hcapi_type = &hcapi_type;\n \trc = tf_rm_get_hcapi_type(&hparms);\n \tif (rc) {\n@@ -518,7 +304,7 @@ tf_tbl_get(struct tf *tfp,\n \n \t/* Verify that the entry has been previously allocated */\n \taparms.rm_db = tbl_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = parms->idx;\n \taparms.allocated = &allocated;\n \trc = tf_rm_is_allocated(&aparms);\n@@ -536,7 +322,7 @@ tf_tbl_get(struct tf *tfp,\n \n \t/* Set the entry */\n \thparms.rm_db = tbl_db[parms->dir];\n-\thparms.db_index = parms->type;\n+\thparms.subtype = parms->type;\n \thparms.hcapi_type = &hcapi_type;\n \trc = tf_rm_get_hcapi_type(&hparms);\n \tif (rc) {\n@@ -588,7 +374,7 @@ tf_tbl_bulk_get(struct tf *tfp,\n \n \t/* Verify that the entries are in the range of reserved resources. */\n \tcparms.rm_db = tbl_db[parms->dir];\n-\tcparms.db_index = parms->type;\n+\tcparms.subtype = parms->type;\n \tcparms.starting_index = parms->starting_idx;\n \tcparms.num_entries = parms->num_entries;\n \n@@ -605,7 +391,7 @@ tf_tbl_bulk_get(struct tf *tfp,\n \t}\n \n \thparms.rm_db = tbl_db[parms->dir];\n-\thparms.db_index = parms->type;\n+\thparms.subtype = parms->type;\n \thparms.hcapi_type = &hcapi_type;\n \trc = tf_rm_get_hcapi_type(&hparms);\n \tif (rc) {\ndiff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c\nindex a18d0e1e19..42d503f500 100644\n--- a/drivers/net/bnxt/tf_core/tf_tcam.c\n+++ b/drivers/net/bnxt/tf_core/tf_tcam.c\n@@ -71,7 +71,7 @@ tf_tcam_bind(struct tf *tfp,\n \n \tmemset(&db_cfg, 0, sizeof(db_cfg));\n \n-\tdb_cfg.type = TF_DEVICE_MODULE_TYPE_TCAM;\n+\tdb_cfg.module = TF_MODULE_TYPE_TCAM;\n \tdb_cfg.num_elements = parms->num_elements;\n \tdb_cfg.cfg = parms->cfg;\n \n@@ -100,7 +100,7 @@ tf_tcam_bind(struct tf *tfp,\n \t\t\t\tif (!parms->resources->tcam_cnt[d].cnt[i])\n \t\t\t\t\tcontinue;\n \t\t\t\tainfo.rm_db = tcam_db[d];\n-\t\t\t\tainfo.db_index = i;\n+\t\t\t\tainfo.subtype = i;\n \t\t\t\tainfo.info = &info;\n \t\t\t\trc = tf_rm_get_info(&ainfo);\n \t\t\t\tif (rc)\n@@ -248,7 +248,7 @@ tf_tcam_alloc(struct tf *tfp,\n \tmemset(&aparms, 0, sizeof(aparms));\n \n \taparms.rm_db = tcam_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.priority = parms->priority;\n \taparms.index = (uint32_t *)&parms->idx;\n \trc = tf_rm_allocate(&aparms);\n@@ -331,7 +331,7 @@ tf_tcam_free(struct tf *tfp,\n \tmemset(&aparms, 0, sizeof(aparms));\n \n \taparms.rm_db = tcam_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = parms->idx / num_slice_per_row;\n \taparms.allocated = &allocated;\n \trc = tf_rm_is_allocated(&aparms);\n@@ -379,7 +379,7 @@ tf_tcam_free(struct tf *tfp,\n \t/* Free requested element */\n \tmemset(&fparms, 0, sizeof(fparms));\n \tfparms.rm_db = tcam_db[parms->dir];\n-\tfparms.db_index = parms->type;\n+\tfparms.subtype = parms->type;\n \tfparms.index = parms->idx / num_slice_per_row;\n \trc = tf_rm_free(&fparms);\n \tif (rc) {\n@@ -421,7 +421,7 @@ tf_tcam_free(struct tf *tfp,\n \tmemset(&hparms, 0, sizeof(hparms));\n \n \thparms.rm_db = tcam_db[parms->dir];\n-\thparms.db_index = parms->type;\n+\thparms.subtype = parms->type;\n \thparms.hcapi_type = &parms->hcapi_type;\n \n \trc = tf_rm_get_hcapi_type(&hparms);\n@@ -625,7 +625,7 @@ tf_tcam_set(struct tf *tfp __rte_unused,\n \tmemset(&aparms, 0, sizeof(aparms));\n \n \taparms.rm_db = tcam_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = parms->idx / num_slice_per_row;\n \taparms.allocated = &allocated;\n \trc = tf_rm_is_allocated(&aparms);\n@@ -645,7 +645,7 @@ tf_tcam_set(struct tf *tfp __rte_unused,\n \tmemset(&hparms, 0, sizeof(hparms));\n \n \thparms.rm_db = tcam_db[parms->dir];\n-\thparms.db_index = parms->type;\n+\thparms.subtype = parms->type;\n \thparms.hcapi_type = &parms->hcapi_type;\n \n \trc = tf_rm_get_hcapi_type(&hparms);\n@@ -736,7 +736,7 @@ tf_tcam_get(struct tf *tfp __rte_unused,\n \tmemset(&aparms, 0, sizeof(aparms));\n \n \taparms.rm_db = tcam_db[parms->dir];\n-\taparms.db_index = parms->type;\n+\taparms.subtype = parms->type;\n \taparms.index = parms->idx / num_slice_per_row;\n \taparms.allocated = &allocated;\n \trc = tf_rm_is_allocated(&aparms);\n@@ -756,7 +756,7 @@ tf_tcam_get(struct tf *tfp __rte_unused,\n \tmemset(&hparms, 0, sizeof(hparms));\n \n \thparms.rm_db = tcam_db[parms->dir];\n-\thparms.db_index = parms->type;\n+\thparms.subtype = parms->type;\n \thparms.hcapi_type = &parms->hcapi_type;\n \n \trc = tf_rm_get_hcapi_type(&hparms);\ndiff --git a/drivers/net/bnxt/tf_core/tf_util.c b/drivers/net/bnxt/tf_core/tf_util.c\nindex 74c8f26204..b4d47d5a8c 100644\n--- a/drivers/net/bnxt/tf_core/tf_util.c\n+++ b/drivers/net/bnxt/tf_core/tf_util.c\n@@ -137,34 +137,34 @@ tf_em_tbl_type_2_str(enum tf_em_tbl_type em_type)\n }\n \n const char *\n-tf_device_module_type_subtype_2_str(enum tf_device_module_type dm_type,\n-\t\t\t\t uint16_t mod_type)\n+tf_module_subtype_2_str(enum tf_module_type module,\n+\t\t\tuint16_t subtype)\n {\n-\tswitch (dm_type) {\n-\tcase TF_DEVICE_MODULE_TYPE_IDENTIFIER:\n-\t\treturn tf_ident_2_str(mod_type);\n-\tcase TF_DEVICE_MODULE_TYPE_TABLE:\n-\t\treturn tf_tbl_type_2_str(mod_type);\n-\tcase TF_DEVICE_MODULE_TYPE_TCAM:\n-\t\treturn tf_tcam_tbl_2_str(mod_type);\n-\tcase TF_DEVICE_MODULE_TYPE_EM:\n-\t\treturn tf_em_tbl_type_2_str(mod_type);\n+\tswitch (module) {\n+\tcase TF_MODULE_TYPE_IDENTIFIER:\n+\t\treturn tf_ident_2_str(subtype);\n+\tcase TF_MODULE_TYPE_TABLE:\n+\t\treturn tf_tbl_type_2_str(subtype);\n+\tcase TF_MODULE_TYPE_TCAM:\n+\t\treturn tf_tcam_tbl_2_str(subtype);\n+\tcase TF_MODULE_TYPE_EM:\n+\t\treturn tf_em_tbl_type_2_str(subtype);\n \tdefault:\n-\t\treturn \"Invalid Device Module type\";\n+\t\treturn \"Invalid Module type\";\n \t}\n }\n \n const char *\n-tf_device_module_type_2_str(enum tf_device_module_type dm_type)\n+tf_module_2_str(enum tf_module_type module)\n {\n-\tswitch (dm_type) {\n-\tcase TF_DEVICE_MODULE_TYPE_IDENTIFIER:\n+\tswitch (module) {\n+\tcase TF_MODULE_TYPE_IDENTIFIER:\n \t\treturn \"Identifier\";\n-\tcase TF_DEVICE_MODULE_TYPE_TABLE:\n+\tcase TF_MODULE_TYPE_TABLE:\n \t\treturn \"Table\";\n-\tcase TF_DEVICE_MODULE_TYPE_TCAM:\n+\tcase TF_MODULE_TYPE_TCAM:\n \t\treturn \"TCAM\";\n-\tcase TF_DEVICE_MODULE_TYPE_EM:\n+\tcase TF_MODULE_TYPE_EM:\n \t\treturn \"EM\";\n \tdefault:\n \t\treturn \"Invalid Device Module type\";\ndiff --git a/drivers/net/bnxt/tf_core/tf_util.h b/drivers/net/bnxt/tf_core/tf_util.h\nindex 4225c756f6..1aa35b6b82 100644\n--- a/drivers/net/bnxt/tf_core/tf_util.h\n+++ b/drivers/net/bnxt/tf_core/tf_util.h\n@@ -65,34 +65,30 @@ const char *tf_tbl_type_2_str(enum tf_tbl_type tbl_type);\n const char *tf_em_tbl_type_2_str(enum tf_em_tbl_type em_type);\n \n /**\n- * Helper function converting device module type and module type to\n+ * Helper function converting module and submodule type to\n * text string.\n *\n- * [in] dm_type\n- * Device Module type\n+ * [in] module\n+ * Module type\n *\n- * [in] mod_type\n- * Module specific type\n+ * [in] submodule\n+ * Module specific subtype\n *\n * Returns:\n * Pointer to a char string holding the string for the EM type\n */\n-const char *tf_device_module_type_subtype_2_str\n-\t\t\t\t\t(enum tf_device_module_type dm_type,\n-\t\t\t\t\t uint16_t mod_type);\n+const char *tf_module_subtype_2_str(enum tf_module_type module,\n+\t\t\t\t uint16_t subtype);\n \n /**\n- * Helper function converting device module type to text string\n+ * Helper function converting module type to text string\n *\n- * [in] dm_type\n- * Device Module type\n- *\n- * [in] mod_type\n- * Module specific type\n+ * [in] module\n+ * Module type\n *\n * Returns:\n * Pointer to a char string holding the string for the EM type\n */\n-const char *tf_device_module_type_2_str(enum tf_device_module_type dm_type);\n+const char *tf_module_2_str(enum tf_module_type module);\n \n #endif /* _TF_UTIL_H_ */\n", "prefixes": [ "v2", "08/58" ] }