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Sat, 12 Jun 2021 17:06:57 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.06.56 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:06:56 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jeffrey Huang , Randy Schacher , Venkat Duvvuru , Farah Smith Date: Sat, 12 Jun 2021 17:05:55 -0700 Message-Id: <20210613000652.28191-2-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 01/58] net/bnxt: add CFA folder to HCAPI directory X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jeffrey Huang Before introducing more HCAPI components to DPDK, the CFA code needs to be organized into a dedicated folder so it is separated from other new HCAPI components Signed-off-by: Jeffrey Huang Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Farah Smith Acked-by: Ajit Khaparde --- drivers/net/bnxt/hcapi/{ => cfa}/hcapi_cfa.h | 14 - .../net/bnxt/hcapi/{ => cfa}/hcapi_cfa_defs.h | 8 +- .../net/bnxt/hcapi/{ => cfa}/hcapi_cfa_p4.c | 0 .../net/bnxt/hcapi/{ => cfa}/hcapi_cfa_p4.h | 2 - drivers/net/bnxt/hcapi/cfa/meson.build | 10 + drivers/net/bnxt/hcapi/cfa_p40_hw.h | 781 ------------------ drivers/net/bnxt/hcapi/cfa_p40_tbl.h | 303 ------- drivers/net/bnxt/meson.build | 65 +- drivers/net/bnxt/tf_core/meson.build | 33 + drivers/net/bnxt/tf_core/tf_core.h | 2 +- drivers/net/bnxt/tf_core/tf_em.h | 2 +- drivers/net/bnxt/tf_ulp/meson.build | 28 + 12 files changed, 89 insertions(+), 1159 deletions(-) rename drivers/net/bnxt/hcapi/{ => cfa}/hcapi_cfa.h (96%) rename drivers/net/bnxt/hcapi/{ => cfa}/hcapi_cfa_defs.h (98%) rename drivers/net/bnxt/hcapi/{ => cfa}/hcapi_cfa_p4.c (100%) rename drivers/net/bnxt/hcapi/{ => cfa}/hcapi_cfa_p4.h (99%) create mode 100644 drivers/net/bnxt/hcapi/cfa/meson.build delete mode 100644 drivers/net/bnxt/hcapi/cfa_p40_hw.h delete mode 100644 drivers/net/bnxt/hcapi/cfa_p40_tbl.h create mode 100644 drivers/net/bnxt/tf_core/meson.build create mode 100644 drivers/net/bnxt/tf_ulp/meson.build diff --git a/drivers/net/bnxt/hcapi/hcapi_cfa.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h similarity index 96% rename from drivers/net/bnxt/hcapi/hcapi_cfa.h rename to drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h index c58092e72d..b8c85a0fca 100644 --- a/drivers/net/bnxt/hcapi/hcapi_cfa.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h @@ -14,20 +14,6 @@ #include "hcapi_cfa_defs.h" -#if CHIP_CFG == SR_A -#define SUPPORT_CFA_HW_P45 1 -#undef SUPPORT_CFA_HW_P4 -#define SUPPORT_CFA_HW_P4 0 -#elif CHIP_CFG == CMB_A -#define SUPPORT_CFA_HW_P4 1 -#else -#error "Chip not supported" -#endif - -#if SUPPORT_CFA_HW_P4 && SUPPORT_CFA_HW_P58 && SUPPORT_CFA_HW_P59 -#define SUPPORT_CFA_HW_ALL 1 -#endif - /** * Index used for the sram_entries field */ diff --git a/drivers/net/bnxt/hcapi/hcapi_cfa_defs.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h similarity index 98% rename from drivers/net/bnxt/hcapi/hcapi_cfa_defs.h rename to drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h index b3d6892b0b..08f098ec86 100644 --- a/drivers/net/bnxt/hcapi/hcapi_cfa_defs.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h @@ -17,11 +17,6 @@ #include #include -#define SUPPORT_CFA_HW_ALL 0 -#define SUPPORT_CFA_HW_P4 1 -#define SUPPORT_CFA_HW_P58 0 -#define SUPPORT_CFA_HW_P59 0 - #define CFA_BITS_PER_BYTE (8) #define __CFA_ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask)) #define CFA_ALIGN(x, a) __CFA_ALIGN_MASK(x, (a) - 1) @@ -49,8 +44,7 @@ enum hcapi_cfa_ver { HCAPI_CFA_P40 = 0, /**< CFA phase 4.0 */ HCAPI_CFA_P45 = 1, /**< CFA phase 4.5 */ HCAPI_CFA_P58 = 2, /**< CFA phase 5.8 */ - HCAPI_CFA_P59 = 3, /**< CFA phase 5.9 */ - HCAPI_CFA_PMAX = 4 + HCAPI_CFA_PMAX = 3 }; /** diff --git a/drivers/net/bnxt/hcapi/hcapi_cfa_p4.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c similarity index 100% rename from drivers/net/bnxt/hcapi/hcapi_cfa_p4.c rename to drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c diff --git a/drivers/net/bnxt/hcapi/hcapi_cfa_p4.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h similarity index 99% rename from drivers/net/bnxt/hcapi/hcapi_cfa_p4.h rename to drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h index 305c83bc9f..74a5483c0b 100644 --- a/drivers/net/bnxt/hcapi/hcapi_cfa_p4.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h @@ -6,8 +6,6 @@ #ifndef _HCAPI_CFA_P4_H_ #define _HCAPI_CFA_P4_H_ -#include "cfa_p40_hw.h" - /** CFA phase 4 fix formatted table(layout) ID definition * */ diff --git a/drivers/net/bnxt/hcapi/cfa/meson.build b/drivers/net/bnxt/hcapi/cfa/meson.build new file mode 100644 index 0000000000..8b70d273f4 --- /dev/null +++ b/drivers/net/bnxt/hcapi/cfa/meson.build @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Intel Corporation +# Copyright(c) 2021 Broadcom + +#Include the folder for headers +includes += include_directories('.') + +#Add the source files +sources += files( + 'hcapi_cfa_p4.c') diff --git a/drivers/net/bnxt/hcapi/cfa_p40_hw.h b/drivers/net/bnxt/hcapi/cfa_p40_hw.h deleted file mode 100644 index 5e32529886..0000000000 --- a/drivers/net/bnxt/hcapi/cfa_p40_hw.h +++ /dev/null @@ -1,781 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom - * All rights reserved. - */ -/* - * Name: cfa_p40_hw.h - * - * Description: header for SWE based on Truflow - * - * Date: taken from 12/16/19 17:18:12 - * - * Note: This file was first generated using tflib_decode.py. - * - * Changes have been made due to lack of availability of xml for - * additional tables at this time (EEM Record and union table fields) - * Changes not autogenerated are noted in comments. - */ - -#ifndef _CFA_P40_HW_H_ -#define _CFA_P40_HW_H_ - -/** - * Valid TCAM entry. (for idx 5 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_VALID_BITPOS 166 -#define CFA_P40_PROF_L2_CTXT_TCAM_VALID_NUM_BITS 1 -/** - * Key type (pass). (for idx 5 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_BITPOS 164 -#define CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_NUM_BITS 2 -/** - * Tunnel HDR type. (for idx 5 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_BITPOS 160 -#define CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_NUM_BITS 4 -/** - * Number of VLAN tags in tunnel l2 header. (for idx 4 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_BITPOS 158 -#define CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_NUM_BITS 2 -/** - * Number of VLAN tags in l2 header. (for idx 4 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_BITPOS 156 -#define CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_NUM_BITS 2 -/** - * Tunnel/Inner Source/Dest. MAC Address. - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_MAC1_BITPOS 108 -#define CFA_P40_PROF_L2_CTXT_TCAM_MAC1_NUM_BITS 48 -/** - * Tunnel Outer VLAN Tag ID. (for idx 3 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_BITPOS 96 -#define CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_NUM_BITS 12 -/** - * Tunnel Inner VLAN Tag ID. (for idx 2 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_BITPOS 84 -#define CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_NUM_BITS 12 -/** - * Source Partition. (for idx 2 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_BITPOS 80 -#define CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS 4 -/** - * Source Virtual I/F. (for idx 2 ...) - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_SVIF_BITPOS 72 -#define CFA_P40_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS 8 -/** - * Tunnel/Inner Source/Dest. MAC Address. - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_MAC0_BITPOS 24 -#define CFA_P40_PROF_L2_CTXT_TCAM_MAC0_NUM_BITS 48 -/** - * Outer VLAN Tag ID. - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_OVID_BITPOS 12 -#define CFA_P40_PROF_L2_CTXT_TCAM_OVID_NUM_BITS 12 -/** - * Inner VLAN Tag ID. - */ -#define CFA_P40_PROF_L2_CTXT_TCAM_IVID_BITPOS 0 -#define CFA_P40_PROF_L2_CTXT_TCAM_IVID_NUM_BITS 12 - -enum cfa_p40_prof_l2_ctxt_tcam_flds { - CFA_P40_PROF_L2_CTXT_TCAM_VALID_FLD = 0, - CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_FLD = 1, - CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_FLD = 2, - CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_FLD = 3, - CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_FLD = 4, - CFA_P40_PROF_L2_CTXT_TCAM_MAC1_FLD = 5, - CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_FLD = 6, - CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_FLD = 7, - CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_FLD = 8, - CFA_P40_PROF_L2_CTXT_TCAM_SVIF_FLD = 9, - CFA_P40_PROF_L2_CTXT_TCAM_MAC0_FLD = 10, - CFA_P40_PROF_L2_CTXT_TCAM_OVID_FLD = 11, - CFA_P40_PROF_L2_CTXT_TCAM_IVID_FLD = 12, - CFA_P40_PROF_L2_CTXT_TCAM_MAX_FLD -}; - -#define CFA_P40_PROF_L2_CTXT_TCAM_TOTAL_NUM_BITS 167 - -/** - * Valid entry. (for idx 2 ...) - */ -#define CFA_P40_ACT_VEB_TCAM_VALID_BITPOS 79 -#define CFA_P40_ACT_VEB_TCAM_VALID_NUM_BITS 1 -/** - * reserved program to 0. (for idx 2 ...) - */ -#define CFA_P40_ACT_VEB_TCAM_RESERVED_BITPOS 78 -#define CFA_P40_ACT_VEB_TCAM_RESERVED_NUM_BITS 1 -/** - * PF Parif Number. (for idx 2 ...) - */ -#define CFA_P40_ACT_VEB_TCAM_PARIF_IN_BITPOS 74 -#define CFA_P40_ACT_VEB_TCAM_PARIF_IN_NUM_BITS 4 -/** - * Number of VLAN Tags. (for idx 2 ...) - */ -#define CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_BITPOS 72 -#define CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_NUM_BITS 2 -/** - * Dest. MAC Address. - */ -#define CFA_P40_ACT_VEB_TCAM_MAC_BITPOS 24 -#define CFA_P40_ACT_VEB_TCAM_MAC_NUM_BITS 48 -/** - * Outer VLAN Tag ID. - */ -#define CFA_P40_ACT_VEB_TCAM_OVID_BITPOS 12 -#define CFA_P40_ACT_VEB_TCAM_OVID_NUM_BITS 12 -/** - * Inner VLAN Tag ID. - */ -#define CFA_P40_ACT_VEB_TCAM_IVID_BITPOS 0 -#define CFA_P40_ACT_VEB_TCAM_IVID_NUM_BITS 12 - -enum cfa_p40_act_veb_tcam_flds { - CFA_P40_ACT_VEB_TCAM_VALID_FLD = 0, - CFA_P40_ACT_VEB_TCAM_RESERVED_FLD = 1, - CFA_P40_ACT_VEB_TCAM_PARIF_IN_FLD = 2, - CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_FLD = 3, - CFA_P40_ACT_VEB_TCAM_MAC_FLD = 4, - CFA_P40_ACT_VEB_TCAM_OVID_FLD = 5, - CFA_P40_ACT_VEB_TCAM_IVID_FLD = 6, - CFA_P40_ACT_VEB_TCAM_MAX_FLD -}; - -#define CFA_P40_ACT_VEB_TCAM_TOTAL_NUM_BITS 80 - -/** - * Entry is valid. - */ -#define CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_BITPOS 18 -#define CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_NUM_BITS 1 -/** - * Action Record Pointer - */ -#define CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_BITPOS 2 -#define CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_NUM_BITS 16 -/** - * for resolving TCAM/EM conflicts - */ -#define CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_BITPOS 0 -#define CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_NUM_BITS 2 - -enum cfa_p40_lkup_tcam_record_mem_flds { - CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_FLD = 0, - CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_FLD = 1, - CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_FLD = 2, - CFA_P40_LKUP_TCAM_RECORD_MEM_MAX_FLD -}; - -#define CFA_P40_LKUP_TCAM_RECORD_MEM_TOTAL_NUM_BITS 19 - -/** - * (for idx 1 ...) - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_BITPOS 62 -#define CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_NUM_BITS 2 -enum cfa_p40_prof_ctxt_remap_mem_tpid_anti_spoof_ctl { - CFA_P40_PROF_CTXT_REMAP_MEM_TPID_IGNORE = 0x0UL, - - CFA_P40_PROF_CTXT_REMAP_MEM_TPID_DROP = 0x1UL, - - CFA_P40_PROF_CTXT_REMAP_MEM_TPID_DEFAULT = 0x2UL, - - CFA_P40_PROF_CTXT_REMAP_MEM_TPID_SPIF = 0x3UL, - CFA_P40_PROF_CTXT_REMAP_MEM_TPID_MAX = 0x3UL -}; -/** - * (for idx 1 ...) - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_BITPOS 60 -#define CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_NUM_BITS 2 -enum cfa_p40_prof_ctxt_remap_mem_pri_anti_spoof_ctl { - CFA_P40_PROF_CTXT_REMAP_MEM_PRI_IGNORE = 0x0UL, - - CFA_P40_PROF_CTXT_REMAP_MEM_PRI_DROP = 0x1UL, - - CFA_P40_PROF_CTXT_REMAP_MEM_PRI_DEFAULT = 0x2UL, - - CFA_P40_PROF_CTXT_REMAP_MEM_PRI_SPIF = 0x3UL, - CFA_P40_PROF_CTXT_REMAP_MEM_PRI_MAX = 0x3UL -}; -/** - * Bypass Source Properties Lookup. (for idx 1 ...) - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_BITPOS 59 -#define CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_NUM_BITS 1 -/** - * SP Record Pointer. (for idx 1 ...) - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_BITPOS 43 -#define CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_NUM_BITS 16 -/** - * BD Action pointer passing enable. (for idx 1 ...) - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_BITPOS 42 -#define CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_NUM_BITS 1 -/** - * Default VLAN TPID. (for idx 1 ...) - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_BITPOS 39 -#define CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_NUM_BITS 3 -/** - * Allowed VLAN TPIDs. (for idx 1 ...) - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_BITPOS 33 -#define CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_NUM_BITS 6 -/** - * Default VLAN PRI. - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_BITPOS 30 -#define CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_NUM_BITS 3 -/** - * Allowed VLAN PRIs. - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_BITPOS 22 -#define CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_NUM_BITS 8 -/** - * Partition. - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_BITPOS 18 -#define CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_NUM_BITS 4 -/** - * Bypass Lookup. - */ -#define CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_BITPOS 17 -#define CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_NUM_BITS 1 - -/** - * L2 Context Remap Data. Action bypass mode (1) {7'd0,prof_vnic[9:0]} Note: - * should also set byp_lkup_en. Action bypass mode (0) byp_lkup_en(0) - - * {prof_func[6:0],l2_context[9:0]} byp_lkup_en(1) - {1'b0,act_rec_ptr[15:0]} - */ - -#define CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_BITPOS 0 -#define CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_NUM_BITS 12 - -#define CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_BITPOS 10 -#define CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_NUM_BITS 7 - -#define CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_BITPOS 0 -#define CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_NUM_BITS 10 - -#define CFA_P40_PROF_CTXT_REMAP_MEM_ARP_BITPOS 0 -#define CFA_P40_PROF_CTXT_REMAP_MEM_ARP_NUM_BITS 16 - -enum cfa_p40_prof_ctxt_remap_mem_flds { - CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_FLD = 0, - CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_FLD = 1, - CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_FLD = 2, - CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_FLD = 3, - CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_FLD = 4, - CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_FLD = 5, - CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_FLD = 6, - CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_FLD = 7, - CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_FLD = 8, - CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_FLD = 9, - CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_FLD = 10, - CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_FLD = 11, - CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_FLD = 12, - CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_FLD = 13, - CFA_P40_PROF_CTXT_REMAP_MEM_ARP_FLD = 14, - CFA_P40_PROF_CTXT_REMAP_MEM_MAX_FLD -}; - -#define CFA_P40_PROF_CTXT_REMAP_MEM_TOTAL_NUM_BITS 64 - -/** - * Bypass action pointer look up (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_BITPOS 37 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_NUM_BITS 1 -/** - * Exact match search enable (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_BITPOS 36 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_NUM_BITS 1 -/** - * Exact match profile - */ -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_BITPOS 28 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_NUM_BITS 8 -/** - * Exact match key format - */ -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_BITPOS 23 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_NUM_BITS 5 -/** - * Exact match key mask - */ -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_BITPOS 13 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_NUM_BITS 10 -/** - * TCAM search enable - */ -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_BITPOS 12 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_NUM_BITS 1 -/** - * TCAM profile - */ -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_BITPOS 4 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_NUM_BITS 8 -/** - * TCAM key format - */ -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_BITPOS 0 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_NUM_BITS 4 - -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_BITPOS 16 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_NUM_BITS 2 - -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_BITPOS 0 -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_NUM_BITS 16 - -enum cfa_p40_prof_profile_tcam_remap_mem_flds { - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_FLD = 0, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_FLD = 1, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_FLD = 2, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_FLD = 3, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_FLD = 4, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_FLD = 5, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_FLD = 6, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_FLD = 7, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_FLD = 8, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_FLD = 9, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_MAX_FLD -}; - -#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TOTAL_NUM_BITS 38 - -/** - * Valid TCAM entry (for idx 2 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_VALID_BITPOS 80 -#define CFA_P40_PROF_PROFILE_TCAM_VALID_NUM_BITS 1 -/** - * Packet type (for idx 2 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_BITPOS 76 -#define CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_NUM_BITS 4 -/** - * Pass through CFA (for idx 2 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_BITPOS 74 -#define CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_NUM_BITS 2 -/** - * Aggregate error (for idx 2 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_BITPOS 73 -#define CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_NUM_BITS 1 -/** - * Profile function (for idx 2 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_BITPOS 66 -#define CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_NUM_BITS 7 -/** - * Reserved for future use. Set to 0. - */ -#define CFA_P40_PROF_PROFILE_TCAM_RESERVED_BITPOS 57 -#define CFA_P40_PROF_PROFILE_TCAM_RESERVED_NUM_BITS 9 -/** - * non-tunnel(0)/tunneled(1) packet (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_BITPOS 56 -#define CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_NUM_BITS 1 -/** - * Tunnel L2 tunnel valid (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_BITPOS 55 -#define CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_NUM_BITS 1 -/** - * Tunnel L2 header type (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_BITPOS 53 -#define CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_NUM_BITS 2 -/** - * Remapped tunnel L2 dest_type UC(0)/MC(2)/BC(3) (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_BITPOS 51 -#define CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_NUM_BITS 2 -/** - * Tunnel L2 1+ VLAN tags present (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_BITPOS 50 -#define CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_NUM_BITS 1 -/** - * Tunnel L2 2 VLAN tags present (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_BITPOS 49 -#define CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_NUM_BITS 1 -/** - * Tunnel L3 valid (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_BITPOS 48 -#define CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_NUM_BITS 1 -/** - * Tunnel L3 error (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_BITPOS 47 -#define CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_NUM_BITS 1 -/** - * Tunnel L3 header type (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_BITPOS 43 -#define CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_NUM_BITS 4 -/** - * Tunnel L3 header is IPV4 or IPV6. (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_BITPOS 42 -#define CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_NUM_BITS 1 -/** - * Tunnel L3 IPV6 src address is compressed (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_BITPOS 41 -#define CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_NUM_BITS 1 -/** - * Tunnel L3 IPV6 dest address is compressed (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_BITPOS 40 -#define CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_NUM_BITS 1 -/** - * Tunnel L4 valid (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_BITPOS 39 -#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_NUM_BITS 1 -/** - * Tunnel L4 error (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_BITPOS 38 -#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_NUM_BITS 1 -/** - * Tunnel L4 header type (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_BITPOS 34 -#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_NUM_BITS 4 -/** - * Tunnel L4 header is UDP or TCP (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_BITPOS 33 -#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_NUM_BITS 1 -/** - * Tunnel valid (for idx 1 ...) - */ -#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_BITPOS 32 -#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_NUM_BITS 1 -/** - * Tunnel error - */ -#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_BITPOS 31 -#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_NUM_BITS 1 -/** - * Tunnel header type - */ -#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_BITPOS 27 -#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_NUM_BITS 4 -/** - * Tunnel header flags - */ -#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_BITPOS 24 -#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_NUM_BITS 3 -/** - * L2 header valid - */ -#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_BITPOS 23 -#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_NUM_BITS 1 -/** - * L2 header error - */ -#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_BITPOS 22 -#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_NUM_BITS 1 -/** - * L2 header type - */ -#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_BITPOS 20 -#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_NUM_BITS 2 -/** - * Remapped L2 dest_type UC(0)/MC(2)/BC(3) - */ -#define CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_BITPOS 18 -#define CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_NUM_BITS 2 -/** - * L2 header 1+ VLAN tags present - */ -#define CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_BITPOS 17 -#define CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_NUM_BITS 1 -/** - * L2 header 2 VLAN tags present - */ -#define CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_BITPOS 16 -#define CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_NUM_BITS 1 -/** - * L3 header valid - */ -#define CFA_P40_PROF_PROFILE_TCAM_L3_VALID_BITPOS 15 -#define CFA_P40_PROF_PROFILE_TCAM_L3_VALID_NUM_BITS 1 -/** - * L3 header error - */ -#define CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_BITPOS 14 -#define CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_NUM_BITS 1 -/** - * L3 header type - */ -#define CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_BITPOS 10 -#define CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_NUM_BITS 4 -/** - * L3 header is IPV4 or IPV6. - */ -#define CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_BITPOS 9 -#define CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_NUM_BITS 1 -/** - * L3 header IPV6 src address is compressed - */ -#define CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_BITPOS 8 -#define CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_NUM_BITS 1 -/** - * L3 header IPV6 dest address is compressed - */ -#define CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_BITPOS 7 -#define CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_NUM_BITS 1 -/** - * L4 header valid - */ -#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_BITPOS 6 -#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_NUM_BITS 1 -/** - * L4 header error - */ -#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_BITPOS 5 -#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_NUM_BITS 1 -/** - * L4 header type - */ -#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_BITPOS 1 -#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_NUM_BITS 4 -/** - * L4 header is UDP or TCP - */ -#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_BITPOS 0 -#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_NUM_BITS 1 - -enum cfa_p40_prof_profile_tcam_flds { - CFA_P40_PROF_PROFILE_TCAM_VALID_FLD = 0, - CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_FLD = 1, - CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_FLD = 2, - CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_FLD = 3, - CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_FLD = 4, - CFA_P40_PROF_PROFILE_TCAM_RESERVED_FLD = 5, - CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_FLD = 6, - CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_FLD = 7, - CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_FLD = 8, - CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_FLD = 9, - CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_FLD = 10, - CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_FLD = 11, - CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_FLD = 12, - CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_FLD = 13, - CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_FLD = 14, - CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_FLD = 15, - CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_FLD = 16, - CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_FLD = 17, - CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_FLD = 18, - CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_FLD = 19, - CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_FLD = 20, - CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_FLD = 21, - CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_FLD = 22, - CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_FLD = 23, - CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_FLD = 24, - CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_FLD = 25, - CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_FLD = 26, - CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_FLD = 27, - CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_FLD = 28, - CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_FLD = 29, - CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_FLD = 30, - CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_FLD = 31, - CFA_P40_PROF_PROFILE_TCAM_L3_VALID_FLD = 32, - CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_FLD = 33, - CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_FLD = 34, - CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_FLD = 35, - CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_FLD = 36, - CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_FLD = 37, - CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_FLD = 38, - CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_FLD = 39, - CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_FLD = 40, - CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_FLD = 41, - CFA_P40_PROF_PROFILE_TCAM_MAX_FLD -}; - -#define CFA_P40_PROF_PROFILE_TCAM_TOTAL_NUM_BITS 81 - -/** - * CFA flexible key layout definition - */ -enum cfa_p40_key_fld_id { - CFA_P40_KEY_FLD_ID_MAX -}; - -/**************************************************************************/ -/** - * Non-autogenerated fields - */ - -/** - * Valid - */ -#define CFA_P40_EEM_KEY_TBL_VALID_BITPOS 0 -#define CFA_P40_EEM_KEY_TBL_VALID_NUM_BITS 1 - -/** - * L1 Cacheable - */ -#define CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_BITPOS 1 -#define CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_NUM_BITS 1 - -/** - * Strength - */ -#define CFA_P40_EEM_KEY_TBL_STRENGTH_BITPOS 2 -#define CFA_P40_EEM_KEY_TBL_STRENGTH_NUM_BITS 2 - -/** - * Key Size - */ -#define CFA_P40_EEM_KEY_TBL_KEY_SZ_BITPOS 15 -#define CFA_P40_EEM_KEY_TBL_KEY_SZ_NUM_BITS 9 - -/** - * Record Size - */ -#define CFA_P40_EEM_KEY_TBL_REC_SZ_BITPOS 24 -#define CFA_P40_EEM_KEY_TBL_REC_SZ_NUM_BITS 5 - -/** - * Action Record Internal - */ -#define CFA_P40_EEM_KEY_TBL_ACT_REC_INT_BITPOS 29 -#define CFA_P40_EEM_KEY_TBL_ACT_REC_INT_NUM_BITS 1 - -/** - * External Flow Counter - */ -#define CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_BITPOS 30 -#define CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_NUM_BITS 1 - -/** - * Action Record Pointer - */ -#define CFA_P40_EEM_KEY_TBL_AR_PTR_BITPOS 31 -#define CFA_P40_EEM_KEY_TBL_AR_PTR_NUM_BITS 33 - -/** - * EEM Key omitted - create using keybuilder - * Fields here cannot be larger than a uint64_t - */ - -#define CFA_P40_EEM_KEY_TBL_TOTAL_NUM_BITS 64 - -enum cfa_p40_eem_key_tbl_flds { - CFA_P40_EEM_KEY_TBL_VALID_FLD = 0, - CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_FLD = 1, - CFA_P40_EEM_KEY_TBL_STRENGTH_FLD = 2, - CFA_P40_EEM_KEY_TBL_KEY_SZ_FLD = 3, - CFA_P40_EEM_KEY_TBL_REC_SZ_FLD = 4, - CFA_P40_EEM_KEY_TBL_ACT_REC_INT_FLD = 5, - CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_FLD = 6, - CFA_P40_EEM_KEY_TBL_AR_PTR_FLD = 7, - CFA_P40_EEM_KEY_TBL_MAX_FLD -}; - -/** - * Mirror Destination 0 Source Property Record Pointer - */ -#define CFA_P40_MIRROR_TBL_SP_PTR_BITPOS 0 -#define CFA_P40_MIRROR_TBL_SP_PTR_NUM_BITS 11 - -/** - * ignore or honor drop - */ -#define CFA_P40_MIRROR_TBL_IGN_DROP_BITPOS 13 -#define CFA_P40_MIRROR_TBL_IGN_DROP_NUM_BITS 1 - -/** - * ingress or egress copy - */ -#define CFA_P40_MIRROR_TBL_COPY_BITPOS 14 -#define CFA_P40_MIRROR_TBL_COPY_NUM_BITS 1 - -/** - * Mirror Destination enable. - */ -#define CFA_P40_MIRROR_TBL_EN_BITPOS 15 -#define CFA_P40_MIRROR_TBL_EN_NUM_BITS 1 - -/** - * Action Record Pointer - */ -#define CFA_P40_MIRROR_TBL_AR_PTR_BITPOS 16 -#define CFA_P40_MIRROR_TBL_AR_PTR_NUM_BITS 16 - -#define CFA_P40_MIRROR_TBL_TOTAL_NUM_BITS 32 - -enum cfa_p40_mirror_tbl_flds { - CFA_P40_MIRROR_TBL_SP_PTR_FLD = 0, - CFA_P40_MIRROR_TBL_IGN_DROP_FLD = 1, - CFA_P40_MIRROR_TBL_COPY_FLD = 2, - CFA_P40_MIRROR_TBL_EN_FLD = 3, - CFA_P40_MIRROR_TBL_AR_PTR_FLD = 4, - CFA_P40_MIRROR_TBL_MAX_FLD -}; - -/** - * P45 Specific Updates (SR) - Non-autogenerated - */ -/** - * Valid TCAM entry. - */ -#define CFA_P45_PROF_L2_CTXT_TCAM_VALID_BITPOS 166 -#define CFA_P45_PROF_L2_CTXT_TCAM_VALID_NUM_BITS 1 -/** - * Source Partition. - */ -#define CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_BITPOS 166 -#define CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS 4 - -/** - * Source Virtual I/F. - */ -#define CFA_P45_PROF_L2_CTXT_TCAM_SVIF_BITPOS 72 -#define CFA_P45_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS 12 - - -/* The SR layout of the l2 ctxt key is different from the Wh+. Switch to - * cfa_p45_hw.h definition when available. - */ -enum cfa_p45_prof_l2_ctxt_tcam_flds { - CFA_P45_PROF_L2_CTXT_TCAM_VALID_FLD = 0, - CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_FLD = 1, - CFA_P45_PROF_L2_CTXT_TCAM_KEY_TYPE_FLD = 2, - CFA_P45_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_FLD = 3, - CFA_P45_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_FLD = 4, - CFA_P45_PROF_L2_CTXT_TCAM_L2_NUMTAGS_FLD = 5, - CFA_P45_PROF_L2_CTXT_TCAM_MAC1_FLD = 6, - CFA_P45_PROF_L2_CTXT_TCAM_T_OVID_FLD = 7, - CFA_P45_PROF_L2_CTXT_TCAM_T_IVID_FLD = 8, - CFA_P45_PROF_L2_CTXT_TCAM_SVIF_FLD = 9, - CFA_P45_PROF_L2_CTXT_TCAM_MAC0_FLD = 10, - CFA_P45_PROF_L2_CTXT_TCAM_OVID_FLD = 11, - CFA_P45_PROF_L2_CTXT_TCAM_IVID_FLD = 12, - CFA_P45_PROF_L2_CTXT_TCAM_MAX_FLD -}; - -#define CFA_P45_PROF_L2_CTXT_TCAM_TOTAL_NUM_BITS 171 - -#endif /* _CFA_P40_HW_H_ */ diff --git a/drivers/net/bnxt/hcapi/cfa_p40_tbl.h b/drivers/net/bnxt/hcapi/cfa_p40_tbl.h deleted file mode 100644 index 539241ad0e..0000000000 --- a/drivers/net/bnxt/hcapi/cfa_p40_tbl.h +++ /dev/null @@ -1,303 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom - * All rights reserved. - */ -/* - * Name: cfa_p40_tbl.h - * - * Description: header for SWE based on Truflow - * - * Date: 12/16/19 17:18:12 - * - * Note: This file was originally generated by tflib_decode.py. - * Remainder is hand coded due to lack of availability of xml for - * additional tables at this time (EEM Record and union fields) - * - **/ -#ifndef _CFA_P40_TBL_H_ -#define _CFA_P40_TBL_H_ - -#include "cfa_p40_hw.h" - -#include "hcapi_cfa_defs.h" - -const struct hcapi_cfa_field cfa_p40_prof_l2_ctxt_tcam_layout[] = { - {CFA_P40_PROF_L2_CTXT_TCAM_VALID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_VALID_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_MAC1_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_MAC1_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_SVIF_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_MAC0_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_MAC0_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_OVID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_OVID_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_IVID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_IVID_NUM_BITS}, -}; - -const struct hcapi_cfa_field cfa_p40_act_veb_tcam_layout[] = { - {CFA_P40_ACT_VEB_TCAM_VALID_BITPOS, - CFA_P40_ACT_VEB_TCAM_VALID_NUM_BITS}, - {CFA_P40_ACT_VEB_TCAM_RESERVED_BITPOS, - CFA_P40_ACT_VEB_TCAM_RESERVED_NUM_BITS}, - {CFA_P40_ACT_VEB_TCAM_PARIF_IN_BITPOS, - CFA_P40_ACT_VEB_TCAM_PARIF_IN_NUM_BITS}, - {CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_BITPOS, - CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_NUM_BITS}, - {CFA_P40_ACT_VEB_TCAM_MAC_BITPOS, - CFA_P40_ACT_VEB_TCAM_MAC_NUM_BITS}, - {CFA_P40_ACT_VEB_TCAM_OVID_BITPOS, - CFA_P40_ACT_VEB_TCAM_OVID_NUM_BITS}, - {CFA_P40_ACT_VEB_TCAM_IVID_BITPOS, - CFA_P40_ACT_VEB_TCAM_IVID_NUM_BITS}, -}; - -const struct hcapi_cfa_field cfa_p40_lkup_tcam_record_mem_layout[] = { - {CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_BITPOS, - CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_NUM_BITS}, - {CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_BITPOS, - CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_NUM_BITS}, - {CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_BITPOS, - CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_NUM_BITS}, -}; - -const struct hcapi_cfa_field cfa_p40_prof_ctxt_remap_mem_layout[] = { - {CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_NUM_BITS}, - /* Fields below not generated through automation */ - {CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_NUM_BITS}, - {CFA_P40_PROF_CTXT_REMAP_MEM_ARP_BITPOS, - CFA_P40_PROF_CTXT_REMAP_MEM_ARP_NUM_BITS}, -}; - -const struct hcapi_cfa_field cfa_p40_prof_profile_tcam_remap_mem_layout[] = { - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_NUM_BITS}, - /* Fields below not generated through automation */ - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_NUM_BITS}, -}; - -const struct hcapi_cfa_field cfa_p40_prof_profile_tcam_layout[] = { - {CFA_P40_PROF_PROFILE_TCAM_VALID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_VALID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_RESERVED_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_RESERVED_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L3_VALID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L3_VALID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_BITPOS, - CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_NUM_BITS}, -}; - -/**************************************************************************/ -/** - * Non-autogenerated fields - */ - -const struct hcapi_cfa_field cfa_p40_eem_key_tbl_layout[] = { - {CFA_P40_EEM_KEY_TBL_VALID_BITPOS, - CFA_P40_EEM_KEY_TBL_VALID_NUM_BITS}, - - {CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_BITPOS, - CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_NUM_BITS}, - - {CFA_P40_EEM_KEY_TBL_STRENGTH_BITPOS, - CFA_P40_EEM_KEY_TBL_STRENGTH_NUM_BITS}, - - {CFA_P40_EEM_KEY_TBL_KEY_SZ_BITPOS, - CFA_P40_EEM_KEY_TBL_KEY_SZ_NUM_BITS}, - - {CFA_P40_EEM_KEY_TBL_REC_SZ_BITPOS, - CFA_P40_EEM_KEY_TBL_REC_SZ_NUM_BITS}, - - {CFA_P40_EEM_KEY_TBL_ACT_REC_INT_BITPOS, - CFA_P40_EEM_KEY_TBL_ACT_REC_INT_NUM_BITS}, - - {CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_BITPOS, - CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_NUM_BITS}, - - {CFA_P40_EEM_KEY_TBL_AR_PTR_BITPOS, - CFA_P40_EEM_KEY_TBL_AR_PTR_NUM_BITS}, - -}; - -const struct hcapi_cfa_field cfa_p40_mirror_tbl_layout[] = { - {CFA_P40_MIRROR_TBL_SP_PTR_BITPOS, - CFA_P40_MIRROR_TBL_SP_PTR_NUM_BITS}, - - {CFA_P40_MIRROR_TBL_IGN_DROP_BITPOS, - CFA_P40_MIRROR_TBL_IGN_DROP_NUM_BITS}, - - {CFA_P40_MIRROR_TBL_COPY_BITPOS, - CFA_P40_MIRROR_TBL_COPY_NUM_BITS}, - - {CFA_P40_MIRROR_TBL_EN_BITPOS, - CFA_P40_MIRROR_TBL_EN_NUM_BITS}, - - {CFA_P40_MIRROR_TBL_AR_PTR_BITPOS, - CFA_P40_MIRROR_TBL_AR_PTR_NUM_BITS}, -}; - -/* P45 Defines */ - -const struct hcapi_cfa_field cfa_p45_prof_l2_ctxt_tcam_layout[] = { - {CFA_P45_PROF_L2_CTXT_TCAM_VALID_BITPOS, - CFA_P45_PROF_L2_CTXT_TCAM_VALID_NUM_BITS}, - {CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_BITPOS, - CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_MAC1_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_MAC1_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_NUM_BITS}, - {CFA_P45_PROF_L2_CTXT_TCAM_SVIF_BITPOS, - CFA_P45_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_MAC0_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_MAC0_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_OVID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_OVID_NUM_BITS}, - {CFA_P40_PROF_L2_CTXT_TCAM_IVID_BITPOS, - CFA_P40_PROF_L2_CTXT_TCAM_IVID_NUM_BITS}, -}; -#endif /* _CFA_P40_TBL_H_ */ diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build index 41c4796366..e8a25beba0 100644 --- a/drivers/net/bnxt/meson.build +++ b/drivers/net/bnxt/meson.build @@ -8,10 +8,17 @@ if is_windows subdir_done() endif -headers = files('rte_pmd_bnxt.h') +cflags_options = [ + '-DSUPPORT_CFA_HW_ALL=1', +] + +foreach option:cflags_options + if cc.has_argument(option) + cflags += option + endif +endforeach -includes += include_directories('tf_ulp') -includes += include_directories('tf_core') +headers = files('rte_pmd_bnxt.h') sources = files( 'bnxt_cpr.c', @@ -30,56 +37,14 @@ sources = files( 'bnxt_vnic.c', 'bnxt_reps.c', - 'tf_core/tf_core.c', - 'tf_core/bitalloc.c', - 'tf_core/tf_msg.c', - 'tf_core/rand.c', - 'tf_core/stack.c', - 'tf_core/tf_em_common.c', - 'tf_core/tf_em_internal.c', - 'tf_core/tf_rm.c', - 'tf_core/tf_tbl.c', - 'tf_core/tfp.c', - 'tf_core/tf_session.c', - 'tf_core/tf_device.c', - 'tf_core/tf_device_p4.c', - 'tf_core/tf_identifier.c', - 'tf_core/tf_shadow_tbl.c', - 'tf_core/tf_shadow_tcam.c', - 'tf_core/tf_tcam.c', - 'tf_core/tf_util.c', - 'tf_core/tf_if_tbl.c', - 'tf_core/ll.c', - 'tf_core/tf_global_cfg.c', - 'tf_core/tf_em_host.c', - 'tf_core/tf_shadow_identifier.c', - 'tf_core/tf_hash.c', - - 'hcapi/hcapi_cfa_p4.c', - - 'tf_ulp/bnxt_ulp.c', - 'tf_ulp/ulp_mark_mgr.c', - 'tf_ulp/ulp_flow_db.c', - 'tf_ulp/ulp_template_db_tbl.c', - 'tf_ulp/ulp_template_db_class.c', - 'tf_ulp/ulp_template_db_act.c', - 'tf_ulp/ulp_utils.c', - 'tf_ulp/ulp_mapper.c', - 'tf_ulp/ulp_matcher.c', - 'tf_ulp/ulp_rte_parser.c', - 'tf_ulp/bnxt_ulp_flow.c', - 'tf_ulp/ulp_port_db.c', - 'tf_ulp/ulp_def_rules.c', - 'tf_ulp/ulp_fc_mgr.c', - 'tf_ulp/ulp_tun.c', - 'tf_ulp/ulp_template_db_wh_plus_act.c', - 'tf_ulp/ulp_template_db_wh_plus_class.c', - 'tf_ulp/ulp_template_db_stingray_act.c', - 'tf_ulp/ulp_template_db_stingray_class.c', - 'rte_pmd_bnxt.c', ) +#Add the subdirectories that need to be compiled +subdir('tf_ulp') +subdir('tf_core') +subdir('hcapi/cfa') + if arch_subdir == 'x86' sources += files('bnxt_rxtx_vec_sse.c') # compile AVX2 version if either: diff --git a/drivers/net/bnxt/tf_core/meson.build b/drivers/net/bnxt/tf_core/meson.build new file mode 100644 index 0000000000..b23e0fbe70 --- /dev/null +++ b/drivers/net/bnxt/tf_core/meson.build @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Intel Corporation +# Copyright(c) 2021 Broadcom + +#Include the folder for headers +includes += include_directories('.') + +#Add the source files +sources += files( + 'tf_core.c', + 'bitalloc.c', + 'tf_msg.c', + 'rand.c', + 'stack.c', + 'tf_em_common.c', + 'tf_em_internal.c', + 'tf_rm.c', + 'tf_tbl.c', + 'tfp.c', + 'tf_session.c', + 'tf_device.c', + 'tf_device_p4.c', + 'tf_identifier.c', + 'tf_shadow_tbl.c', + 'tf_shadow_tcam.c', + 'tf_tcam.c', + 'tf_util.c', + 'tf_if_tbl.c', + 'll.c', + 'tf_global_cfg.c', + 'tf_em_host.c', + 'tf_shadow_identifier.c', + 'tf_hash.c') diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index a47edff1e3..5e458c58fb 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -10,7 +10,7 @@ #include #include #include -#include "hcapi/hcapi_cfa_defs.h" +#include "hcapi/cfa/hcapi_cfa_defs.h" #include "tf_project.h" /** diff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h index 23591272bd..b5c3acb09a 100644 --- a/drivers/net/bnxt/tf_core/tf_em.h +++ b/drivers/net/bnxt/tf_core/tf_em.h @@ -9,7 +9,7 @@ #include "tf_core.h" #include "tf_session.h" -#include "hcapi/hcapi_cfa_defs.h" +#include "hcapi/cfa/hcapi_cfa_defs.h" #define TF_EM_MIN_ENTRIES (1 << 15) /* 32K */ #define TF_EM_MAX_ENTRIES (1 << 27) /* 128M */ diff --git a/drivers/net/bnxt/tf_ulp/meson.build b/drivers/net/bnxt/tf_ulp/meson.build new file mode 100644 index 0000000000..98cbdf3177 --- /dev/null +++ b/drivers/net/bnxt/tf_ulp/meson.build @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Intel Corporation +# Copyright(c) 2021 Broadcom + +#Include the folder for headers +includes += include_directories('.') + +#Add the source files +sources += files( + 'bnxt_ulp.c', + 'ulp_mark_mgr.c', + 'ulp_flow_db.c', + 'ulp_template_db_tbl.c', + 'ulp_template_db_class.c', + 'ulp_template_db_act.c', + 'ulp_utils.c', + 'ulp_mapper.c', + 'ulp_matcher.c', + 'ulp_rte_parser.c', + 'bnxt_ulp_flow.c', + 'ulp_port_db.c', + 'ulp_def_rules.c', + 'ulp_fc_mgr.c', + 'ulp_tun.c', + 'ulp_template_db_wh_plus_act.c', + 'ulp_template_db_wh_plus_class.c', + 'ulp_template_db_stingray_act.c', + 'ulp_template_db_stingray_class.c') From patchwork Sun Jun 13 00:05:56 2021 Content-Type: text/plain; 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Sat, 12 Jun 2021 17:06:59 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.06.58 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:06:58 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Peter Spreadborough , Randy Schacher , Venkat Duvvuru Date: Sat, 12 Jun 2021 17:05:56 -0700 Message-Id: <20210613000652.28191-3-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 02/58] net/bnxt: add base TRUFLOW support for Thor X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith Add infrastructure code to support TRUFLOW on Thor NICs. Also update meson.build Signed-off-by: Farah Smith Signed-off-by: Peter Spreadborough Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Acked-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/cfa_resource_types.h | 1 - drivers/net/bnxt/tf_core/meson.build | 1 + drivers/net/bnxt/tf_core/tf_core.c | 1 + drivers/net/bnxt/tf_core/tf_device.c | 207 +++++++++++++ drivers/net/bnxt/tf_core/tf_device.h | 24 ++ drivers/net/bnxt/tf_core/tf_device_p4.c | 111 ++++++- drivers/net/bnxt/tf_core/tf_device_p4.h | 3 +- drivers/net/bnxt/tf_core/tf_device_p58.c | 284 ++++++++++++++++++ drivers/net/bnxt/tf_core/tf_device_p58.h | 79 +++++ drivers/net/bnxt/tf_core/tf_em_common.c | 4 +- drivers/net/bnxt/tf_core/tf_msg.c | 33 -- drivers/net/bnxt/tf_core/tf_rm.c | 8 +- drivers/net/bnxt/tf_core/tf_shadow_tcam.c | 4 +- 13 files changed, 711 insertions(+), 49 deletions(-) create mode 100644 drivers/net/bnxt/tf_core/tf_device_p58.c create mode 100644 drivers/net/bnxt/tf_core/tf_device_p58.h diff --git a/drivers/net/bnxt/tf_core/cfa_resource_types.h b/drivers/net/bnxt/tf_core/cfa_resource_types.h index f55a98a388..b63b87bcf3 100644 --- a/drivers/net/bnxt/tf_core/cfa_resource_types.h +++ b/drivers/net/bnxt/tf_core/cfa_resource_types.h @@ -254,5 +254,4 @@ #define CFA_RESOURCE_TYPE_P4_TBL_SCOPE 0x22UL #define CFA_RESOURCE_TYPE_P4_LAST CFA_RESOURCE_TYPE_P4_TBL_SCOPE - #endif /* _CFA_RESOURCE_TYPES_H_ */ diff --git a/drivers/net/bnxt/tf_core/meson.build b/drivers/net/bnxt/tf_core/meson.build index b23e0fbe70..d7e8f664fd 100644 --- a/drivers/net/bnxt/tf_core/meson.build +++ b/drivers/net/bnxt/tf_core/meson.build @@ -20,6 +20,7 @@ sources += files( 'tf_session.c', 'tf_device.c', 'tf_device_p4.c', + 'tf_device_p58.c', 'tf_identifier.c', 'tf_shadow_tbl.c', 'tf_shadow_tcam.c', diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index feec3cf459..b1ce4e721c 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -35,6 +35,7 @@ tf_open_session(struct tf *tfp, * firmware open session succeeds. */ if (parms->device_type != TF_DEVICE_TYPE_WH && + parms->device_type != TF_DEVICE_TYPE_THOR && parms->device_type != TF_DEVICE_TYPE_SR) { TFP_DRV_LOG(ERR, "Unsupported device type %d\n", diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index f68eb723fe..9c63f6d5d4 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -5,6 +5,7 @@ #include "tf_device.h" #include "tf_device_p4.h" +#include "tf_device_p58.h" #include "tfp.h" #include "tf_em.h" @@ -12,6 +13,7 @@ struct tf; /* Forward declarations */ static int tf_dev_unbind_p4(struct tf *tfp); +static int tf_dev_unbind_p58(struct tf *tfp); /** * Device specific bind function, WH+ @@ -234,6 +236,203 @@ tf_dev_unbind_p4(struct tf *tfp) return rc; } +/** + * Device specific bind function, THOR + * + * [in] tfp + * Pointer to TF handle + * + * [in] shadow_copy + * Flag controlling shadow copy DB creation + * + * [in] resources + * Pointer to resource allocation information + * + * [out] dev_handle + * Device handle + * + * Returns + * - (0) if successful. + * - (-EINVAL) on parameter or internal failure. + */ +static int +tf_dev_bind_p58(struct tf *tfp, + bool shadow_copy, + struct tf_session_resources *resources, + struct tf_dev_info *dev_handle) +{ + int rc; + int frc; + struct tf_ident_cfg_parms ident_cfg; + struct tf_tbl_cfg_parms tbl_cfg; + struct tf_tcam_cfg_parms tcam_cfg; + struct tf_em_cfg_parms em_cfg; + struct tf_if_tbl_cfg_parms if_tbl_cfg; + struct tf_global_cfg_cfg_parms global_cfg; + + /* Initial function initialization */ + dev_handle->ops = &tf_dev_ops_p58_init; + + /* Initialize the modules */ + + ident_cfg.num_elements = TF_IDENT_TYPE_MAX; + ident_cfg.cfg = tf_ident_p58; + ident_cfg.shadow_copy = shadow_copy; + ident_cfg.resources = resources; + rc = tf_ident_bind(tfp, &ident_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Identifier initialization failure\n"); + goto fail; + } + + tbl_cfg.num_elements = TF_TBL_TYPE_MAX; + tbl_cfg.cfg = tf_tbl_p58; + tbl_cfg.shadow_copy = shadow_copy; + tbl_cfg.resources = resources; + rc = tf_tbl_bind(tfp, &tbl_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Table initialization failure\n"); + goto fail; + } + + tcam_cfg.num_elements = TF_TCAM_TBL_TYPE_MAX; + tcam_cfg.cfg = tf_tcam_p58; + tcam_cfg.shadow_copy = shadow_copy; + tcam_cfg.resources = resources; + rc = tf_tcam_bind(tfp, &tcam_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "TCAM initialization failure\n"); + goto fail; + } + + /* + * EM + */ + em_cfg.num_elements = TF_EM_TBL_TYPE_MAX; + em_cfg.cfg = tf_em_int_p58; + em_cfg.resources = resources; + em_cfg.mem_type = 0; /* Not used by EM */ + + rc = tf_em_int_bind(tfp, &em_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "EM initialization failure\n"); + goto fail; + } + + /* + * IF_TBL + */ + if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; + if_tbl_cfg.cfg = tf_if_tbl_p58; + if_tbl_cfg.shadow_copy = shadow_copy; + rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "IF Table initialization failure\n"); + goto fail; + } + + /* + * GLOBAL_CFG + */ + global_cfg.num_elements = TF_GLOBAL_CFG_TYPE_MAX; + global_cfg.cfg = tf_global_cfg_p58; + rc = tf_global_cfg_bind(tfp, &global_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Global Cfg initialization failure\n"); + goto fail; + } + + /* Final function initialization */ + dev_handle->ops = &tf_dev_ops_p58; + + return 0; + + fail: + /* Cleanup of already created modules */ + frc = tf_dev_unbind_p58(tfp); + if (frc) + return frc; + + return rc; +} + +/** + * Device specific unbind function, THOR + * + * [in] tfp + * Pointer to TF handle + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +static int + tf_dev_unbind_p58(struct tf *tfp) +{ + int rc = 0; + bool fail = false; + + /* Unbind all the support modules. As this is only done on + * close we only report errors as everything has to be cleaned + * up regardless. + * + * In case of residuals TCAMs are cleaned up first as to + * invalidate the pipeline in a clean manner. + */ + rc = tf_tcam_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, TCAM\n"); + fail = true; + } + + rc = tf_ident_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, Identifier\n"); + fail = true; + } + + rc = tf_tbl_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, Table Type\n"); + fail = true; + } + + rc = tf_em_int_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, EM\n"); + fail = true; + } + + rc = tf_if_tbl_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, IF Table Type\n"); + fail = true; + } + + rc = tf_global_cfg_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, Global Cfg Type\n"); + fail = true; + } + + if (fail) + return -1; + + return rc; +} + int tf_dev_bind(struct tf *tfp __rte_unused, enum tf_device_type type, @@ -249,6 +448,12 @@ tf_dev_bind(struct tf *tfp __rte_unused, shadow_copy, resources, dev_handle); + case TF_DEVICE_TYPE_THOR: + dev_handle->type = type; + return tf_dev_bind_p58(tfp, + shadow_copy, + resources, + dev_handle); default: TFP_DRV_LOG(ERR, "No such device\n"); @@ -264,6 +469,8 @@ tf_dev_unbind(struct tf *tfp, case TF_DEVICE_TYPE_WH: case TF_DEVICE_TYPE_SR: return tf_dev_unbind_p4(tfp); + case TF_DEVICE_TYPE_THOR: + return tf_dev_unbind_p58(tfp); default: TFP_DRV_LOG(ERR, "No such device\n"); diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index d0c4ec80d0..d5ef72309f 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -134,6 +134,28 @@ struct tf_dev_ops { int (*tf_dev_get_max_types)(struct tf *tfp, uint16_t *max_types); + /** + * Retrieves the string description for the CFA resource + * type + * + * [in] tfp + * Pointer to TF handle + * + * [in] resource_id + * HCAPI cfa resource type id + * + * [out] resource_str + * Pointer to a string + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ + int (*tf_dev_get_resource_str)(struct tf *tfp, + uint16_t resource_id, + const char **resource_str); + + /** * Retrieves the WC TCAM slice information that the device * supports. @@ -709,5 +731,7 @@ struct tf_dev_ops { */ extern const struct tf_dev_ops tf_dev_ops_p4_init; extern const struct tf_dev_ops tf_dev_ops_p4; +extern const struct tf_dev_ops tf_dev_ops_p58_init; +extern const struct tf_dev_ops tf_dev_ops_p58; #endif /* _TF_DEVICE_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index 17d2f05bcc..257a0fb2d0 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -4,8 +4,8 @@ */ #include -#include +#include "cfa_resource_types.h" #include "tf_device.h" #include "tf_identifier.h" #include "tf_tbl.h" @@ -17,6 +17,79 @@ #define TF_DEV_P4_PARIF_MAX 16 #define TF_DEV_P4_PF_MASK 0xfUL +const char *tf_resource_str_p4[CFA_RESOURCE_TYPE_P4_LAST + 1] = { + /* CFA_RESOURCE_TYPE_P4_MCG */ + "mc_group", + /* CFA_RESOURCE_TYPE_P4_ENCAP_8B */ + "encap_8 ", + /* CFA_RESOURCE_TYPE_P4_ENCAP_16B */ + "encap_16", + /* CFA_RESOURCE_TYPE_P4_ENCAP_64B */ + "encap_64", + /* CFA_RESOURCE_TYPE_P4_SP_MAC */ + "sp_mac ", + /* CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 */ + "sp_macv4", + /* CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 */ + "sp_macv6", + /* CFA_RESOURCE_TYPE_P4_COUNTER_64B */ + "ctr_64b ", + /* CFA_RESOURCE_TYPE_P4_NAT_PORT */ + "nat_port", + /* CFA_RESOURCE_TYPE_P4_NAT_IPV4 */ + "nat_ipv4", + /* CFA_RESOURCE_TYPE_P4_METER */ + "meter ", + /* CFA_RESOURCE_TYPE_P4_FLOW_STATE */ + "flow_st ", + /* CFA_RESOURCE_TYPE_P4_FULL_ACTION */ + "full_act", + /* CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION */ + "fmt0_act", + /* CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION */ + "ext0_act", + /* CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION */ + "fmt1_act", + /* CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION */ + "fmt2_act", + /* CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION */ + "fmt3_act", + /* CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION */ + "fmt4_act", + /* CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION */ + "fmt5_act", + /* CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION */ + "fmt6_act", + /* CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH */ + "l2ctx_hi", + /* CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW */ + "l2ctx_lo", + /* CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH */ + "l2ctr_hi", + /* CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW */ + "l2ctr_lo", + /* CFA_RESOURCE_TYPE_P4_PROF_FUNC */ + "prf_func", + /* CFA_RESOURCE_TYPE_P4_PROF_TCAM */ + "prf_tcam", + /* CFA_RESOURCE_TYPE_P4_EM_PROF_ID */ + "em_prof ", + /* CFA_RESOURCE_TYPE_P4_EM_REC */ + "em_rec ", + /* CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID */ + "wc_prof ", + /* CFA_RESOURCE_TYPE_P4_WC_TCAM */ + "wc_tcam ", + /* CFA_RESOURCE_TYPE_P4_METER_PROF */ + "mtr_prof", + /* CFA_RESOURCE_TYPE_P4_MIRROR */ + "mirror ", + /* CFA_RESOURCE_TYPE_P4_SP_TCAM */ + "sp_tcam ", + /* CFA_RESOURCE_TYPE_P4_TBL_SCOPE */ + "tb_scope", +}; + /** * Device specific function that retrieves the MAX number of HCAPI * types the device supports. @@ -25,7 +98,7 @@ * Pointer to TF handle * * [out] max_types - * Pointer to the MAX number of HCAPI types supported + * Pointer to the MAX number of CFA resource types supported * * Returns * - (0) if successful. @@ -61,6 +134,38 @@ tf_dev_p4_get_max_types(struct tf *tfp, return 0; } +/** + * Device specific function that retrieves a human readable + * string to identify a CFA resource type. + * + * [in] tfp + * Pointer to TF handle + * + * [in] resource_id + * HCAPI CFA resource id + * + * [out] resource_str + * Resource string + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +static int +tf_dev_p4_get_resource_str(struct tf *tfp __rte_unused, + uint16_t resource_id, + const char **resource_str) +{ + if (resource_str == NULL) + return -EINVAL; + + if (resource_id > CFA_RESOURCE_TYPE_P4_LAST) + return -EINVAL; + + *resource_str = tf_resource_str_p4[resource_id]; + + return 0; +} /** * Device specific function that retrieves the WC TCAM slices the @@ -142,6 +247,7 @@ tf_dev_p4_map_parif(struct tf *tfp __rte_unused, */ const struct tf_dev_ops tf_dev_ops_p4_init = { .tf_dev_get_max_types = tf_dev_p4_get_max_types, + .tf_dev_get_resource_str = tf_dev_p4_get_resource_str, .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info, .tf_dev_alloc_ident = NULL, .tf_dev_free_ident = NULL, @@ -179,6 +285,7 @@ const struct tf_dev_ops tf_dev_ops_p4_init = { */ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_get_max_types = tf_dev_p4_get_max_types, + .tf_dev_get_resource_str = tf_dev_p4_get_resource_str, .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info, .tf_dev_alloc_ident = tf_ident_alloc, .tf_dev_free_ident = tf_ident_free, diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h index 81ed2322d1..bfad02a0b8 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.h +++ b/drivers/net/bnxt/tf_core/tf_device_p4.h @@ -6,8 +6,7 @@ #ifndef _TF_DEVICE_P4_H_ #define _TF_DEVICE_P4_H_ -#include - +#include "cfa_resource_types.h" #include "tf_core.h" #include "tf_rm.h" #include "tf_if_tbl.h" diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c new file mode 100644 index 0000000000..fb5ad29a5c --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -0,0 +1,284 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2021 Broadcom + * All rights reserved. + */ + +#include + +#include "cfa_resource_types.h" +#include "tf_device.h" +#include "tf_identifier.h" +#include "tf_tbl.h" +#include "tf_tcam.h" +#include "tf_em.h" +#include "tf_if_tbl.h" +#include "tfp.h" + +#define TF_DEV_P58_PARIF_MAX 16 +#define TF_DEV_P58_PF_MASK 0xfUL + +const char *tf_resource_str_p58[CFA_RESOURCE_TYPE_P58_LAST + 1] = { + /* CFA_RESOURCE_TYPE_P58_METER */ + "meter ", + /* CFA_RESOURCE_TYPE_P58_SRAM_BANK_0 */ + "sram_bk0", + /* CFA_RESOURCE_TYPE_P58_SRAM_BANK_1 */ + "sram_bk1", + /* CFA_RESOURCE_TYPE_P58_SRAM_BANK_2 */ + "sram_bk2", + /* CFA_RESOURCE_TYPE_P58_SRAM_BANK_3 */ + "sram_bk3", + /* CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH */ + "l2ctx_hi", + /* CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW */ + "l2ctx_lo", + /* CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH */ + "l2ctr_hi", + /* CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW */ + "l2ctr_lo", + /* CFA_RESOURCE_TYPE_P58_PROF_FUNC */ + "prf_func", + /* CFA_RESOURCE_TYPE_P58_PROF_TCAM */ + "prf_tcam", + /* CFA_RESOURCE_TYPE_P58_EM_PROF_ID */ + "em_prof ", + /* CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID */ + "wc_prof ", + /* CFA_RESOURCE_TYPE_P58_EM_REC */ + "em_rec ", + /* CFA_RESOURCE_TYPE_P58_WC_TCAM */ + "wc_tcam ", + /* CFA_RESOURCE_TYPE_P58_METER_PROF */ + "mtr_prof", + /* CFA_RESOURCE_TYPE_P58_MIRROR */ + "mirror ", + /* CFA_RESOURCE_TYPE_P58_EM_FKB */ + "em_fkb ", + /* CFA_RESOURCE_TYPE_P58_WC_FKB */ + "wc_fkb ", + /* CFA_RESOURCE_TYPE_P58_VEB_TCAM */ + "veb ", +}; + +/** + * Device specific function that retrieves the MAX number of HCAPI + * types the device supports. + * + * [in] tfp + * Pointer to TF handle + * + * [out] max_types + * Pointer to the MAX number of HCAPI types supported + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +static int +tf_dev_p58_get_max_types(struct tf *tfp, + uint16_t *max_types) +{ + struct tf_session *tfs; + struct tf_dev_info *dev; + int rc; + + if (max_types == NULL || tfp == NULL) + return -EINVAL; + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + *max_types = CFA_RESOURCE_TYPE_P58_LAST + 1; + + return 0; +} +/** + * Device specific function that retrieves a human readable + * string to identify a CFA resource type. + * + * [in] tfp + * Pointer to TF handle + * + * [in] resource_id + * HCAPI CFA resource id + * + * [out] resource_str + * Resource string + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +static int +tf_dev_p58_get_resource_str(struct tf *tfp __rte_unused, + uint16_t resource_id, + const char **resource_str) +{ + if (resource_str == NULL) + return -EINVAL; + + if (resource_id > CFA_RESOURCE_TYPE_P58_LAST) + return -EINVAL; + + *resource_str = tf_resource_str_p58[resource_id]; + + return 0; +} + +/** + * Device specific function that retrieves the WC TCAM slices the + * device supports. + * + * [in] tfp + * Pointer to TF handle + * + * [out] slice_size + * Pointer to the WC TCAM slice size + * + * [out] num_slices_per_row + * Pointer to the WC TCAM row slice configuration + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +static int +tf_dev_p58_get_tcam_slice_info(struct tf *tfp __rte_unused, + enum tf_tcam_tbl_type type, + uint16_t key_sz, + uint16_t *num_slices_per_row) +{ +#define CFA_P58_WC_TCAM_SLICES_PER_ROW 2 +#define CFA_P58_WC_TCAM_SLICE_SIZE 12 + + if (type == TF_TCAM_TBL_TYPE_WC_TCAM) { + *num_slices_per_row = CFA_P58_WC_TCAM_SLICES_PER_ROW; + if (key_sz > *num_slices_per_row * CFA_P58_WC_TCAM_SLICE_SIZE) + return -ENOTSUP; + + *num_slices_per_row = 1; + } else { /* for other type of tcam */ + *num_slices_per_row = 1; + } + + return 0; +} + +static int +tf_dev_p58_map_parif(struct tf *tfp __rte_unused, + uint16_t parif_bitmask, + uint16_t pf, + uint8_t *data, + uint8_t *mask, + uint16_t sz_in_bytes) +{ + uint32_t parif_pf[2] = { 0 }; + uint32_t parif_pf_mask[2] = { 0 }; + uint32_t parif; + uint32_t shift; + + if (sz_in_bytes != sizeof(uint64_t)) + return -ENOTSUP; + + for (parif = 0; parif < TF_DEV_P58_PARIF_MAX; parif++) { + if (parif_bitmask & (1UL << parif)) { + if (parif < 8) { + shift = 4 * parif; + parif_pf_mask[0] |= TF_DEV_P58_PF_MASK << shift; + parif_pf[0] |= pf << shift; + } else { + shift = 4 * (parif - 8); + parif_pf_mask[1] |= TF_DEV_P58_PF_MASK << shift; + parif_pf[1] |= pf << shift; + } + } + } + tfp_memcpy(data, parif_pf, sz_in_bytes); + tfp_memcpy(mask, parif_pf_mask, sz_in_bytes); + + return 0; +} + + +/** + * Truflow P58 device specific functions + */ +const struct tf_dev_ops tf_dev_ops_p58_init = { + .tf_dev_get_max_types = tf_dev_p58_get_max_types, + .tf_dev_get_resource_str = tf_dev_p58_get_resource_str, + .tf_dev_get_tcam_slice_info = tf_dev_p58_get_tcam_slice_info, + .tf_dev_alloc_ident = NULL, + .tf_dev_free_ident = NULL, + .tf_dev_search_ident = NULL, + .tf_dev_alloc_ext_tbl = NULL, + .tf_dev_alloc_tbl = NULL, + .tf_dev_free_ext_tbl = NULL, + .tf_dev_free_tbl = NULL, + .tf_dev_alloc_search_tbl = NULL, + .tf_dev_set_tbl = NULL, + .tf_dev_set_ext_tbl = NULL, + .tf_dev_get_tbl = NULL, + .tf_dev_get_bulk_tbl = NULL, + .tf_dev_alloc_tcam = NULL, + .tf_dev_free_tcam = NULL, + .tf_dev_alloc_search_tcam = NULL, + .tf_dev_set_tcam = NULL, + .tf_dev_get_tcam = NULL, + .tf_dev_insert_int_em_entry = NULL, + .tf_dev_delete_int_em_entry = NULL, + .tf_dev_insert_ext_em_entry = NULL, + .tf_dev_delete_ext_em_entry = NULL, + .tf_dev_alloc_tbl_scope = NULL, + .tf_dev_map_tbl_scope = NULL, + .tf_dev_map_parif = NULL, + .tf_dev_free_tbl_scope = NULL, + .tf_dev_set_if_tbl = NULL, + .tf_dev_get_if_tbl = NULL, + .tf_dev_set_global_cfg = NULL, + .tf_dev_get_global_cfg = NULL, +}; + +/** + * Truflow P58 device specific functions + */ +const struct tf_dev_ops tf_dev_ops_p58 = { + .tf_dev_get_max_types = tf_dev_p58_get_max_types, + .tf_dev_get_resource_str = tf_dev_p58_get_resource_str, + .tf_dev_get_tcam_slice_info = tf_dev_p58_get_tcam_slice_info, + .tf_dev_alloc_ident = tf_ident_alloc, + .tf_dev_free_ident = tf_ident_free, + .tf_dev_search_ident = tf_ident_search, + .tf_dev_alloc_tbl = tf_tbl_alloc, + .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc, + .tf_dev_free_tbl = tf_tbl_free, + .tf_dev_free_ext_tbl = tf_tbl_ext_free, + .tf_dev_alloc_search_tbl = tf_tbl_alloc_search, + .tf_dev_set_tbl = tf_tbl_set, + .tf_dev_set_ext_tbl = tf_tbl_ext_common_set, + .tf_dev_get_tbl = tf_tbl_get, + .tf_dev_get_bulk_tbl = tf_tbl_bulk_get, + .tf_dev_alloc_tcam = tf_tcam_alloc, + .tf_dev_free_tcam = tf_tcam_free, + .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, + .tf_dev_set_tcam = tf_tcam_set, + .tf_dev_get_tcam = NULL, + .tf_dev_insert_int_em_entry = tf_em_insert_int_entry, + .tf_dev_delete_int_em_entry = tf_em_delete_int_entry, + .tf_dev_insert_ext_em_entry = tf_em_insert_ext_entry, + .tf_dev_delete_ext_em_entry = tf_em_delete_ext_entry, + .tf_dev_alloc_tbl_scope = tf_em_ext_common_alloc, + .tf_dev_map_tbl_scope = tf_em_ext_map_tbl_scope, + .tf_dev_map_parif = tf_dev_p58_map_parif, + .tf_dev_free_tbl_scope = tf_em_ext_common_free, + .tf_dev_set_if_tbl = tf_if_tbl_set, + .tf_dev_get_if_tbl = tf_if_tbl_get, + .tf_dev_set_global_cfg = tf_global_cfg_set, + .tf_dev_get_global_cfg = tf_global_cfg_get, +}; diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.h b/drivers/net/bnxt/tf_core/tf_device_p58.h new file mode 100644 index 0000000000..3d6e3240bf --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_device_p58.h @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2021 Broadcom + * All rights reserved. + */ + +#ifndef _TF_DEVICE_P58_H_ +#define _TF_DEVICE_P58_H_ + +#include "cfa_resource_types.h" +#include "tf_core.h" +#include "tf_rm.h" +#include "tf_if_tbl.h" +#include "tf_global_cfg.h" + +struct tf_rm_element_cfg tf_ident_p58[TF_IDENT_TYPE_MAX] = { + [TF_IDENT_TYPE_L2_CTXT_HIGH] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH + }, + [TF_IDENT_TYPE_L2_CTXT_LOW] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW + }, + [TF_IDENT_TYPE_PROF_FUNC] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_FUNC + }, + [TF_IDENT_TYPE_WC_PROF] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID + }, + [TF_IDENT_TYPE_EM_PROF] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_PROF_ID + }, +}; + +struct tf_rm_element_cfg tf_tcam_p58[TF_TCAM_TBL_TYPE_MAX] = { + [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH + }, + [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW + }, + [TF_TCAM_TBL_TYPE_PROF_TCAM] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_TCAM + }, + [TF_TCAM_TBL_TYPE_WC_TCAM] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM + }, + [TF_TCAM_TBL_TYPE_VEB_TCAM] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_VEB_TCAM + }, +}; + +struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = { + [TF_TBL_TYPE_METER_PROF] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER_PROF + }, + [TF_TBL_TYPE_METER_INST] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER + }, + [TF_TBL_TYPE_MIRROR_CONFIG] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_MIRROR + }, +}; + +struct tf_rm_element_cfg tf_em_int_p58[TF_EM_TBL_TYPE_MAX] = { + [TF_EM_TBL_TYPE_EM_RECORD] = { + TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P58_EM_REC + }, +}; + +struct tf_if_tbl_cfg tf_if_tbl_p58[TF_IF_TBL_TYPE_MAX]; + +struct tf_global_cfg_cfg tf_global_cfg_p58[TF_GLOBAL_CFG_TYPE_MAX] = { + [TF_TUNNEL_ENCAP] = { + TF_GLOBAL_CFG_CFG_HCAPI, TF_TUNNEL_ENCAP + }, + [TF_ACTION_BLOCK] = { + TF_GLOBAL_CFG_CFG_HCAPI, TF_ACTION_BLOCK + }, +}; +#endif /* _TF_DEVICE_P58_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c index c4137af2bd..ddc6b3c4dd 100644 --- a/drivers/net/bnxt/tf_core/tf_em_common.c +++ b/drivers/net/bnxt/tf_core/tf_em_common.c @@ -1115,8 +1115,8 @@ int tf_em_ext_map_tbl_scope(struct tf *tfp, goto cleaner; } - gcfg_parms.type = - (enum tf_global_config_type)TF_GLOBAL_CFG_INTERNAL_PARIF_2_PF; + /* Note that TF_GLOBAL_CFG_INTERNAL_PARIF_2_PF is same as below enum */ + gcfg_parms.type = TF_GLOBAL_CFG_TYPE_MAX; gcfg_parms.offset = 0; gcfg_parms.config = (uint8_t *)data; gcfg_parms.config_mask = (uint8_t *)mask; diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index 46fc6288b2..f20a5113bf 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -19,9 +19,6 @@ #include "hwrm_tf.h" #include "tf_em.h" -/* Logging defines */ -#define TF_RM_MSG_DEBUG 0 - /* Specific msg size defines as we cannot use defines in tf.yaml. This * means we have to manually sync hwrm with these defines if the * tf.yaml changes. @@ -361,29 +358,13 @@ tf_msg_session_resc_qcaps(struct tf *tfp, goto cleanup; } -#if (TF_RM_MSG_DEBUG == 1) - printf("size: %d\n", tfp_le_to_cpu_32(resp.size)); -#endif /* (TF_RM_MSG_DEBUG == 1) */ - /* Post process the response */ data = (struct tf_rm_resc_req_entry *)qcaps_buf.va_addr; -#if (TF_RM_MSG_DEBUG == 1) - printf("\nQCAPS\n"); -#endif /* (TF_RM_MSG_DEBUG == 1) */ for (i = 0; i < size; i++) { query[i].type = tfp_le_to_cpu_32(data[i].type); query[i].min = tfp_le_to_cpu_16(data[i].min); query[i].max = tfp_le_to_cpu_16(data[i].max); - -#if (TF_RM_MSG_DEBUG == 1) - printf("type: %d(0x%x) %d %d\n", - query[i].type, - query[i].type, - query[i].min, - query[i].max); -#endif /* (TF_RM_MSG_DEBUG == 1) */ - } *resv_strategy = resp.flags & @@ -476,26 +457,12 @@ tf_msg_session_resc_alloc(struct tf *tfp, goto cleanup; } -#if (TF_RM_MSG_DEBUG == 1) - printf("\nRESV\n"); - printf("size: %d\n", tfp_le_to_cpu_32(resp.size)); -#endif /* (TF_RM_MSG_DEBUG == 1) */ - /* Post process the response */ resv_data = (struct tf_rm_resc_entry *)resv_buf.va_addr; for (i = 0; i < size; i++) { resv[i].type = tfp_le_to_cpu_32(resv_data[i].type); resv[i].start = tfp_le_to_cpu_16(resv_data[i].start); resv[i].stride = tfp_le_to_cpu_16(resv_data[i].stride); - -#if (TF_RM_MSG_DEBUG == 1) - printf("%d type: %d(0x%x) %d %d\n", - i, - resv[i].type, - resv[i].type, - resv[i].start, - resv[i].stride); -#endif /* (TF_RM_MSG_DEBUG == 1) */ } cleanup: diff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c index 887a3dccf8..f93a6d9018 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.c +++ b/drivers/net/bnxt/tf_core/tf_rm.c @@ -6,6 +6,7 @@ #include #include +#include #include @@ -596,13 +597,6 @@ tf_rm_create_db(struct tf *tfp, rm_db->type = parms->type; *parms->rm_db = (void *)rm_db; -#if (TF_RM_DEBUG == 1) - printf("%s: type:%d num_entries:%d\n", - tf_dir_2_str(parms->dir), - parms->type, - i); -#endif /* (TF_RM_DEBUG == 1) */ - tfp_free((void *)req); tfp_free((void *)resv); diff --git a/drivers/net/bnxt/tf_core/tf_shadow_tcam.c b/drivers/net/bnxt/tf_core/tf_shadow_tcam.c index 38b1e7687b..523261f189 100644 --- a/drivers/net/bnxt/tf_core/tf_shadow_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_shadow_tcam.c @@ -6,6 +6,7 @@ #include "tf_common.h" #include "tf_util.h" #include "tfp.h" +#include "tf_tcam.h" #include "tf_shadow_tcam.h" #include "tf_hash.h" @@ -634,8 +635,7 @@ tf_shadow_tcam_search(struct tf_shadow_tcam_search_parms *parms) * requested allocation and return the info */ if (sparms->alloc) - ctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt = - ctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt + 1; + ctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt++; sparms->hit = 1; sparms->search_status = HIT; From patchwork Sun Jun 13 00:05:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94098 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 379D5A0C41; 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Sat, 12 Jun 2021 17:06:59 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Peter Spreadborough , Randy Schacher , Venkat Duvvuru , Farah Smith Date: Sat, 12 Jun 2021 17:05:57 -0700 Message-Id: <20210613000652.28191-4-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 03/58] net/bnxt: add mailbox selection via dev op X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Peter Spreadborough Add get mailbox dev op so that mailbox offset is based on device instead of a hard coded value. Signed-off-by: Peter Spreadborough Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Farah Smith Acked-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_device.c | 21 ++ drivers/net/bnxt/tf_core/tf_device.h | 12 + drivers/net/bnxt/tf_core/tf_device_p4.c | 8 + drivers/net/bnxt/tf_core/tf_device_p58.c | 7 + drivers/net/bnxt/tf_core/tf_msg.c | 410 +++++++++++++++++++++-- drivers/net/bnxt/tf_core/tf_msg.h | 12 +- drivers/net/bnxt/tf_core/tf_rm.c | 2 + drivers/net/bnxt/tf_core/tf_session.c | 22 +- drivers/net/bnxt/tf_core/tf_tcam.c | 4 +- 9 files changed, 463 insertions(+), 35 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index 9c63f6d5d4..5116601a69 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -461,6 +461,27 @@ tf_dev_bind(struct tf *tfp __rte_unused, } } +int +tf_dev_bind_ops(enum tf_device_type type, + struct tf_dev_info *dev_handle) +{ + switch (type) { + case TF_DEVICE_TYPE_WH: + case TF_DEVICE_TYPE_SR: + dev_handle->ops = &tf_dev_ops_p4; + break; + case TF_DEVICE_TYPE_THOR: + dev_handle->ops = &tf_dev_ops_p58; + break; + default: + TFP_DRV_LOG(ERR, + "No such device\n"); + return -ENODEV; + } + + return 0; +} + int tf_dev_unbind(struct tf *tfp, struct tf_dev_info *dev_handle) diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index d5ef72309f..cbacc09ea5 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -108,6 +108,10 @@ int tf_dev_bind(struct tf *tfp, int tf_dev_unbind(struct tf *tfp, struct tf_dev_info *dev_handle); +int +tf_dev_bind_ops(enum tf_device_type type, + struct tf_dev_info *dev_handle); + /** * Truflow device specific function hooks structure * @@ -724,6 +728,14 @@ struct tf_dev_ops { */ int (*tf_dev_get_global_cfg)(struct tf *tfp, struct tf_global_cfg_parms *parms); + + /** + * Get mailbox + * + * returns: + * mailbox + */ + int (*tf_dev_get_mailbox)(void); }; /** diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index 257a0fb2d0..6b28f6ce59 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -13,6 +13,7 @@ #include "tf_em.h" #include "tf_if_tbl.h" #include "tfp.h" +#include "tf_msg_common.h" #define TF_DEV_P4_PARIF_MAX 16 #define TF_DEV_P4_PF_MASK 0xfUL @@ -241,6 +242,11 @@ tf_dev_p4_map_parif(struct tf *tfp __rte_unused, return 0; } +static int tf_dev_p4_get_mailbox(void) +{ + return TF_KONG_MB; +} + /** * Truflow P4 device specific functions @@ -278,6 +284,7 @@ const struct tf_dev_ops tf_dev_ops_p4_init = { .tf_dev_get_if_tbl = NULL, .tf_dev_set_global_cfg = NULL, .tf_dev_get_global_cfg = NULL, + .tf_dev_get_mailbox = tf_dev_p4_get_mailbox, }; /** @@ -316,4 +323,5 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_get_if_tbl = tf_if_tbl_get, .tf_dev_set_global_cfg = tf_global_cfg_set, .tf_dev_get_global_cfg = tf_global_cfg_get, + .tf_dev_get_mailbox = tf_dev_p4_get_mailbox, }; diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index fb5ad29a5c..b4530f8762 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -13,6 +13,7 @@ #include "tf_em.h" #include "tf_if_tbl.h" #include "tfp.h" +#include "tf_msg_common.h" #define TF_DEV_P58_PARIF_MAX 16 #define TF_DEV_P58_PF_MASK 0xfUL @@ -206,6 +207,10 @@ tf_dev_p58_map_parif(struct tf *tfp __rte_unused, return 0; } +static int tf_dev_p58_get_mailbox(void) +{ + return TF_CHIMP_MB; +} /** * Truflow P58 device specific functions @@ -243,6 +248,7 @@ const struct tf_dev_ops tf_dev_ops_p58_init = { .tf_dev_get_if_tbl = NULL, .tf_dev_set_global_cfg = NULL, .tf_dev_get_global_cfg = NULL, + .tf_dev_get_mailbox = tf_dev_p58_get_mailbox, }; /** @@ -281,4 +287,5 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_get_if_tbl = tf_if_tbl_get, .tf_dev_set_global_cfg = tf_global_cfg_set, .tf_dev_get_global_cfg = tf_global_cfg_get, + .tf_dev_get_mailbox = tf_dev_p58_get_mailbox, }; diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index f20a5113bf..1007211363 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -116,7 +116,8 @@ int tf_msg_session_open(struct tf *tfp, char *ctrl_chan_name, uint8_t *fw_session_id, - uint8_t *fw_session_client_id) + uint8_t *fw_session_client_id, + struct tf_dev_info *dev) { int rc; struct hwrm_tf_session_open_input req = { 0 }; @@ -131,7 +132,7 @@ tf_msg_session_open(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -155,6 +156,7 @@ tf_msg_session_attach(struct tf *tfp __rte_unused, int tf_msg_session_client_register(struct tf *tfp, + struct tf_session *tfs, char *ctrl_channel_name, uint8_t *fw_session_client_id) { @@ -163,6 +165,16 @@ tf_msg_session_client_register(struct tf *tfp, struct hwrm_tf_session_register_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; uint8_t fw_session_id; + struct tf_dev_info *dev; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -183,7 +195,7 @@ tf_msg_session_client_register(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -198,6 +210,7 @@ tf_msg_session_client_register(struct tf *tfp, int tf_msg_session_client_unregister(struct tf *tfp, + struct tf_session *tfs, uint8_t fw_session_client_id) { int rc; @@ -205,6 +218,16 @@ tf_msg_session_client_unregister(struct tf *tfp, struct hwrm_tf_session_unregister_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; uint8_t fw_session_id; + struct tf_dev_info *dev; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -223,7 +246,7 @@ tf_msg_session_client_unregister(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -232,13 +255,24 @@ tf_msg_session_client_unregister(struct tf *tfp, } int -tf_msg_session_close(struct tf *tfp) +tf_msg_session_close(struct tf *tfp, + struct tf_session *tfs) { int rc; struct hwrm_tf_session_close_input req = { 0 }; struct hwrm_tf_session_close_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; uint8_t fw_session_id; + struct tf_dev_info *dev; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -256,7 +290,7 @@ tf_msg_session_close(struct tf *tfp) parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -271,6 +305,26 @@ tf_msg_session_qcfg(struct tf *tfp) struct hwrm_tf_session_qcfg_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; uint8_t fw_session_id; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -288,7 +342,7 @@ tf_msg_session_qcfg(struct tf *tfp) parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -297,6 +351,7 @@ tf_msg_session_qcfg(struct tf *tfp) int tf_msg_session_resc_qcaps(struct tf *tfp, + struct tf_dev_info *dev, enum tf_dir dir, uint16_t size, struct tf_rm_resc_req_entry *query, @@ -340,7 +395,7 @@ tf_msg_session_resc_qcaps(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); if (rc) @@ -378,6 +433,7 @@ tf_msg_session_resc_qcaps(struct tf *tfp, int tf_msg_session_resc_alloc(struct tf *tfp, + struct tf_dev_info *dev, enum tf_dir dir, uint16_t size, struct tf_rm_resc_req_entry *request, @@ -439,7 +495,7 @@ tf_msg_session_resc_alloc(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); if (rc) @@ -487,9 +543,31 @@ tf_msg_session_resc_flush(struct tf *tfp, struct tf_msg_dma_buf resv_buf = { 0 }; struct tf_rm_resc_entry *resv_data; int dma_size; + struct tf_dev_info *dev; + struct tf_session *tfs; TF_CHECK_PARMS2(tfp, resv); + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { TFP_DRV_LOG(ERR, @@ -524,7 +602,7 @@ tf_msg_session_resc_flush(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -549,6 +627,28 @@ tf_msg_insert_em_internal_entry(struct tf *tfp, uint16_t flags; uint8_t fw_session_id; uint8_t msg_key_size; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -593,7 +693,7 @@ tf_msg_insert_em_internal_entry(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -617,6 +717,28 @@ tf_msg_delete_em_entry(struct tf *tfp, struct hwrm_tf_em_delete_output resp = { 0 }; uint16_t flags; uint8_t fw_session_id; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -641,7 +763,7 @@ tf_msg_delete_em_entry(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -664,6 +786,26 @@ tf_msg_em_mem_rgtr(struct tf *tfp, struct hwrm_tf_ctxt_mem_rgtr_input req = { 0 }; struct hwrm_tf_ctxt_mem_rgtr_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } req.page_level = page_lvl; req.page_size = page_size; @@ -674,7 +816,7 @@ tf_msg_em_mem_rgtr(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -694,6 +836,26 @@ tf_msg_em_mem_unrgtr(struct tf *tfp, struct hwrm_tf_ctxt_mem_unrgtr_input req = {0}; struct hwrm_tf_ctxt_mem_unrgtr_output resp = {0}; struct tfp_send_msg_parms parms = { 0 }; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } req.ctx_id = tfp_cpu_to_le_32(*ctx_id); @@ -702,7 +864,7 @@ tf_msg_em_mem_unrgtr(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -719,6 +881,28 @@ tf_msg_em_qcaps(struct tf *tfp, struct hwrm_tf_ext_em_qcaps_output resp = { 0 }; uint32_t flags; struct tfp_send_msg_parms parms = { 0 }; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } flags = (dir == TF_DIR_TX ? HWRM_TF_EXT_EM_QCAPS_INPUT_FLAGS_DIR_TX : HWRM_TF_EXT_EM_QCAPS_INPUT_FLAGS_DIR_RX); @@ -729,7 +913,7 @@ tf_msg_em_qcaps(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -762,6 +946,28 @@ tf_msg_em_cfg(struct tf *tfp, struct hwrm_tf_ext_em_cfg_output resp = {0}; uint32_t flags; struct tfp_send_msg_parms parms = { 0 }; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } flags = (dir == TF_DIR_TX ? HWRM_TF_EXT_EM_CFG_INPUT_FLAGS_DIR_TX : HWRM_TF_EXT_EM_CFG_INPUT_FLAGS_DIR_RX); @@ -782,7 +988,7 @@ tf_msg_em_cfg(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -799,6 +1005,28 @@ tf_msg_em_op(struct tf *tfp, struct hwrm_tf_ext_em_op_output resp = {0}; uint32_t flags; struct tfp_send_msg_parms parms = { 0 }; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } flags = (dir == TF_DIR_TX ? HWRM_TF_EXT_EM_CFG_INPUT_FLAGS_DIR_TX : HWRM_TF_EXT_EM_CFG_INPUT_FLAGS_DIR_RX); @@ -810,7 +1038,7 @@ tf_msg_em_op(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -819,6 +1047,7 @@ tf_msg_em_op(struct tf *tfp, int tf_msg_tcam_entry_set(struct tf *tfp, + struct tf_dev_info *dev, struct tf_tcam_set_parms *parms) { int rc; @@ -877,7 +1106,7 @@ tf_msg_tcam_entry_set(struct tf *tfp, mparms.req_size = sizeof(req); mparms.resp_data = (uint32_t *)&resp; mparms.resp_size = sizeof(resp); - mparms.mailbox = TF_KONG_MB; + mparms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &mparms); @@ -890,6 +1119,7 @@ tf_msg_tcam_entry_set(struct tf *tfp, int tf_msg_tcam_entry_free(struct tf *tfp, + struct tf_dev_info *dev, struct tf_tcam_free_parms *in_parms) { int rc; @@ -920,7 +1150,7 @@ tf_msg_tcam_entry_free(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -940,6 +1170,28 @@ tf_msg_set_tbl_entry(struct tf *tfp, struct hwrm_tf_tbl_type_set_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; uint8_t fw_session_id; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -976,7 +1228,7 @@ tf_msg_set_tbl_entry(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -999,6 +1251,28 @@ tf_msg_get_tbl_entry(struct tf *tfp, struct hwrm_tf_tbl_type_get_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; uint8_t fw_session_id; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -1020,7 +1294,7 @@ tf_msg_get_tbl_entry(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -1051,6 +1325,28 @@ tf_msg_get_global_cfg(struct tf *tfp, uint32_t flags = 0; uint8_t fw_session_id; uint16_t resp_size = 0; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(params->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(params->dir), + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -1077,7 +1373,7 @@ tf_msg_get_global_cfg(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); if (rc != 0) @@ -1108,6 +1404,28 @@ tf_msg_set_global_cfg(struct tf *tfp, struct hwrm_tf_global_cfg_set_output resp = { 0 }; uint32_t flags = 0; uint8_t fw_session_id; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(params->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(params->dir), + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -1156,7 +1474,7 @@ tf_msg_set_global_cfg(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -1181,6 +1499,28 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp, struct tf_tbl_type_bulk_get_output resp = { 0 }; int data_size = 0; uint8_t fw_session_id; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -1203,7 +1543,7 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp, req.host_addr = tfp_cpu_to_le_64(physical_mem_addr); MSG_PREP(parms, - TF_KONG_MB, + dev->ops->tf_dev_get_mailbox(), HWRM_TF, HWRM_TFT_TBL_TYPE_BULK_GET, req, @@ -1229,6 +1569,7 @@ tf_msg_get_if_tbl_entry(struct tf *tfp, struct hwrm_tf_if_tbl_get_input req = { 0 }; struct hwrm_tf_if_tbl_get_output resp = { 0 }; uint32_t flags = 0; + struct tf_dev_info *dev; struct tf_session *tfs; /* Retrieve the session information */ @@ -1241,6 +1582,16 @@ tf_msg_get_if_tbl_entry(struct tf *tfp, return rc; } + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(params->dir), + strerror(-rc)); + return rc; + } + flags = (params->dir == TF_DIR_TX ? HWRM_TF_IF_TBL_GET_INPUT_FLAGS_DIR_TX : HWRM_TF_IF_TBL_GET_INPUT_FLAGS_DIR_RX); @@ -1258,7 +1609,7 @@ tf_msg_get_if_tbl_entry(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); @@ -1268,7 +1619,7 @@ tf_msg_get_if_tbl_entry(struct tf *tfp, if (parms.tf_resp_code != 0) return tfp_le_to_cpu_32(parms.tf_resp_code); - tfp_memcpy(¶ms->data[0], resp.data, req.size); + tfp_memcpy(params->data, resp.data, req.size); return tfp_le_to_cpu_32(parms.tf_resp_code); } @@ -1282,6 +1633,7 @@ tf_msg_set_if_tbl_entry(struct tf *tfp, struct hwrm_tf_if_tbl_set_input req = { 0 }; struct hwrm_tf_if_tbl_get_output resp = { 0 }; uint32_t flags = 0; + struct tf_dev_info *dev; struct tf_session *tfs; /* Retrieve the session information */ @@ -1294,6 +1646,10 @@ tf_msg_set_if_tbl_entry(struct tf *tfp, return rc; } + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; flags = (params->dir == TF_DIR_TX ? HWRM_TF_IF_TBL_SET_INPUT_FLAGS_DIR_TX : @@ -1313,7 +1669,7 @@ tf_msg_set_if_tbl_entry(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = TF_KONG_MB; + parms.mailbox = dev->ops->tf_dev_get_mailbox(); rc = tfp_send_msg_direct(tfp, &parms); diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h index 0a2566010c..25e29a554f 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.h +++ b/drivers/net/bnxt/tf_core/tf_msg.h @@ -36,7 +36,8 @@ struct tf; int tf_msg_session_open(struct tf *tfp, char *ctrl_chan_name, uint8_t *fw_session_id, - uint8_t *fw_session_client_id); + uint8_t *fw_session_client_id, + struct tf_dev_info *dev); /** * Sends session close request to Firmware @@ -75,6 +76,7 @@ int tf_msg_session_attach(struct tf *tfp, * 0 on Success else internal Truflow error */ int tf_msg_session_client_register(struct tf *tfp, + struct tf_session *tfs, char *ctrl_channel_name, uint8_t *fw_session_client_id); @@ -92,6 +94,7 @@ int tf_msg_session_client_register(struct tf *tfp, * 0 on Success else internal Truflow error */ int tf_msg_session_client_unregister(struct tf *tfp, + struct tf_session *tfs, uint8_t fw_session_client_id); /** @@ -103,7 +106,8 @@ int tf_msg_session_client_unregister(struct tf *tfp, * Returns: * 0 on Success else internal Truflow error */ -int tf_msg_session_close(struct tf *tfp); +int tf_msg_session_close(struct tf *tfp, + struct tf_session *tfs); /** * Sends session query config request to TF Firmware @@ -139,6 +143,7 @@ int tf_msg_session_qcfg(struct tf *tfp); * 0 on Success else internal Truflow error */ int tf_msg_session_resc_qcaps(struct tf *tfp, + struct tf_dev_info *dev, enum tf_dir dir, uint16_t size, struct tf_rm_resc_req_entry *query, @@ -166,6 +171,7 @@ int tf_msg_session_resc_qcaps(struct tf *tfp, * 0 on Success else internal Truflow error */ int tf_msg_session_resc_alloc(struct tf *tfp, + struct tf_dev_info *dev, enum tf_dir dir, uint16_t size, struct tf_rm_resc_req_entry *request, @@ -368,6 +374,7 @@ int tf_msg_em_op(struct tf *tfp, * 0 on Success else internal Truflow error */ int tf_msg_tcam_entry_set(struct tf *tfp, + struct tf_dev_info *dev, struct tf_tcam_set_parms *parms); /** @@ -383,6 +390,7 @@ int tf_msg_tcam_entry_set(struct tf *tfp, * 0 on Success else internal Truflow error */ int tf_msg_tcam_entry_free(struct tf *tfp, + struct tf_dev_info *dev, struct tf_tcam_free_parms *parms); /** diff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c index f93a6d9018..2c08fb80fe 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.c +++ b/drivers/net/bnxt/tf_core/tf_rm.c @@ -415,6 +415,7 @@ tf_rm_create_db(struct tf *tfp, /* Get Firmware Capabilities */ rc = tf_msg_session_resc_qcaps(tfp, + dev, parms->dir, max_types, query, @@ -499,6 +500,7 @@ tf_rm_create_db(struct tf *tfp, } rc = tf_msg_session_resc_alloc(tfp, + dev, parms->dir, hcapi_items, req, diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index 6335ad358c..b3fa7e13ff 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -56,14 +56,19 @@ tf_session_create(struct tf *tfp, uint8_t fw_session_id; uint8_t fw_session_client_id; union tf_session_id *session_id; + struct tf_dev_info dev; TF_CHECK_PARMS2(tfp, parms); + tf_dev_bind_ops(parms->open_cfg->device_type, + &dev); + /* Open FW session and get a new session_id */ rc = tf_msg_session_open(tfp, parms->open_cfg->ctrl_chan_name, &fw_session_id, - &fw_session_client_id); + &fw_session_client_id, + &dev); if (rc) { /* Log error */ if (rc == -EEXIST) @@ -177,6 +182,13 @@ tf_session_create(struct tf *tfp, if (rc) return rc; + if (session->dev.ops->tf_dev_get_mailbox == NULL) { + /* Log error */ + TFP_DRV_LOG(ERR, + "No tf_dev_get_mailbox() defined for device\n"); + goto cleanup; + } + session->dev_init = true; return 0; @@ -234,8 +246,9 @@ tf_session_client_create(struct tf *tfp, rc = tf_msg_session_client_register (tfp, - parms->ctrl_chan_name, - &session_client_id.internal.fw_session_client_id); + session, + parms->ctrl_chan_name, + &session_client_id.internal.fw_session_client_id); if (rc) { TFP_DRV_LOG(ERR, "Failed to create client on session, rc:%s\n", @@ -346,6 +359,7 @@ tf_session_client_destroy(struct tf *tfp, rc = tf_msg_session_client_unregister (tfp, + tfs, parms->session_client_id.internal.fw_session_client_id); /* Log error, but continue. If FW fails we do not really have @@ -534,7 +548,7 @@ tf_session_close_session(struct tf *tfp, strerror(-rc)); } - rc = tf_msg_session_close(tfp); + rc = tf_msg_session_close(tfp, tfs); if (rc) { /* Log error */ TFP_DRV_LOG(ERR, diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index 22bc01c95d..038aa40e92 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -428,7 +428,7 @@ tf_tcam_free(struct tf *tfp, if (rc) return rc; - rc = tf_msg_tcam_entry_free(tfp, parms); + rc = tf_msg_tcam_entry_free(tfp, dev, parms); if (rc) { /* Log error */ TFP_DRV_LOG(ERR, @@ -652,7 +652,7 @@ tf_tcam_set(struct tf *tfp __rte_unused, if (rc) return rc; - rc = tf_msg_tcam_entry_set(tfp, parms); + rc = tf_msg_tcam_entry_set(tfp, dev, parms); if (rc) { /* Log error */ TFP_DRV_LOG(ERR, From patchwork Sun Jun 13 00:05:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94099 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 74A73A0C41; Sun, 13 Jun 2021 02:07:34 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 67DE241125; Sun, 13 Jun 2021 02:07:06 +0200 (CEST) Received: from mail-pj1-f43.google.com (mail-pj1-f43.google.com [209.85.216.43]) by mails.dpdk.org (Postfix) with ESMTP id 84E5341103 for ; Sun, 13 Jun 2021 02:07:03 +0200 (CEST) Received: by mail-pj1-f43.google.com with SMTP id mp5-20020a17090b1905b029016dd057935fso7923564pjb.5 for ; Sat, 12 Jun 2021 17:07:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=LdfXEouBjJ5vZbH1wE02ORHyDAvqVRvBPRlfUiYeel8=; b=JscdKz7E1QQ2IZjZQKMadGHPz2L4r5VlqkGtNmGK7Lh+qZ70Ki8RPSjTtF5l4qyn/m oHJaaAlNyJI97oi8wrG6DnYk3f8zYxfMpwF0o0uoZuyszLU4m3jwew6d6Uktp4ZJ9isI dh/lOtzewwOax+GHagtpVpSR0bMpm+WqELP6I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=LdfXEouBjJ5vZbH1wE02ORHyDAvqVRvBPRlfUiYeel8=; b=YrxvPIIyZD2JB0hFUpscDUyc6EZNKZEo83aR/+mlYLQvgZ3RpKSjEiECGr7SvGMKCb u2TNWq1CpaBR2BkAfrrG1eGKcOGb3y+maTDWevATdPYWk8qT1QbuNMDSMWf41NmeZkj+ AXfXc52WVIs1XxSoat+XAQzvSvC9SFe6O1E7LLRZI5djpJ3D9ib0CjzucOUuZo2pwP3y 6pTMXDmzI1t9keQNj4tLp9C9fDeawSLqxlnK8i7Pp6FhqIpmCbm1OWfFIqZkib6wwrsz 4VC0/MskQVzY99rcBxwEwNoq0WOOVsiMseGLCgWfSC0JkD3A7nhMopcJ9cdWAYpr1fb3 JMTA== X-Gm-Message-State: AOAM53141DbwM338ao3kEmp2VXCD2De9Zs75j8uG03JYPNEQu8cV6Mpn DTlJNABqbjrwzmYzXnMwcS/XhigICe5Be/eGBGqb1b9KoFDgKBD84CqwtHN9yHjGVb3wDtIEObd lkaqFNRV7R6bX+/7rDSpWxaU7+UDX+Bx8+NajASpnI0k3JRsL9ZaBPBFMiTjMkyA= X-Google-Smtp-Source: ABdhPJxlee8vQBDD7cRPQ3A5Srdfpx3IjhRCzUEVflMfze1YxVvu/PQ5n0kACQ9HxPrIZ32v0XC+6g== X-Received: by 2002:a17:902:265:b029:fa:9420:d2fd with SMTP id 92-20020a1709020265b02900fa9420d2fdmr10260024plc.39.1623542822222; Sat, 12 Jun 2021 17:07:02 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.00 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:01 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Randy Schacher , Venkat Duvvuru , Peter Spreadborough Date: Sat, 12 Jun 2021 17:05:58 -0700 Message-Id: <20210613000652.28191-5-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 04/58] net/bnxt: check resource reservation in TRUFLOW X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding - Allow tf_open to continue if no resource is allocated for some table type. - Close the session if binding fails for any table. - Close the session if no resource is allocated for all tables. Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Peter Spreadborough Acked-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_device.c | 284 +++++++++++++++++++------- drivers/net/bnxt/tf_core/tf_session.c | 2 +- 2 files changed, 207 insertions(+), 79 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index 5116601a69..d4c93439ec 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -15,6 +15,44 @@ struct tf; static int tf_dev_unbind_p4(struct tf *tfp); static int tf_dev_unbind_p58(struct tf *tfp); +/** + * Resource Reservation Check function + * + * [in] tfp + * Pointer to TF handle + * + * [in] cfg + * Pointer to rm element config + * + * [in] reservations + * Pointer to resource reservation array + * + * Returns + * - (n) number of tables that have non-zero reservation count. + */ +static int +tf_dev_reservation_check(struct tf *tfp __rte_unused, + uint16_t count, + struct tf_rm_element_cfg *cfg, + uint16_t *reservations) +{ + uint16_t cnt = 0; + uint16_t *rm_num; + int i, j; + + for (i = 0; i < TF_DIR_MAX; i++) { + rm_num = (uint16_t *)reservations + i * count; + for (j = 0; j < count; j++) { + if ((cfg[j].cfg_type == TF_RM_ELEM_CFG_HCAPI || + cfg[j].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) && + rm_num[j] > 0) + cnt++; + } + } + + return cnt; +} + /** * Device specific bind function, WH+ * @@ -42,6 +80,8 @@ tf_dev_bind_p4(struct tf *tfp, { int rc; int frc; + int rsv_cnt; + bool no_rsv_flag = true; struct tf_ident_cfg_parms ident_cfg; struct tf_tbl_cfg_parms tbl_cfg; struct tf_tcam_cfg_parms tcam_cfg; @@ -54,69 +94,117 @@ tf_dev_bind_p4(struct tf *tfp, /* Initialize the modules */ - ident_cfg.num_elements = TF_IDENT_TYPE_MAX; - ident_cfg.cfg = tf_ident_p4; - ident_cfg.shadow_copy = shadow_copy; - ident_cfg.resources = resources; - rc = tf_ident_bind(tfp, &ident_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "Identifier initialization failure\n"); - goto fail; + rsv_cnt = tf_dev_reservation_check(tfp, + TF_IDENT_TYPE_MAX, + tf_ident_p4, + (uint16_t *)resources->ident_cnt); + if (rsv_cnt) { + ident_cfg.num_elements = TF_IDENT_TYPE_MAX; + ident_cfg.cfg = tf_ident_p4; + ident_cfg.shadow_copy = shadow_copy; + ident_cfg.resources = resources; + rc = tf_ident_bind(tfp, &ident_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Identifier initialization failure\n"); + goto fail; + } + + no_rsv_flag = false; } - tbl_cfg.num_elements = TF_TBL_TYPE_MAX; - tbl_cfg.cfg = tf_tbl_p4; - tbl_cfg.shadow_copy = shadow_copy; - tbl_cfg.resources = resources; - rc = tf_tbl_bind(tfp, &tbl_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "Table initialization failure\n"); - goto fail; + rsv_cnt = tf_dev_reservation_check(tfp, + TF_TBL_TYPE_MAX, + tf_tbl_p4, + (uint16_t *)resources->tbl_cnt); + if (rsv_cnt) { + tbl_cfg.num_elements = TF_TBL_TYPE_MAX; + tbl_cfg.cfg = tf_tbl_p4; + tbl_cfg.shadow_copy = shadow_copy; + tbl_cfg.resources = resources; + rc = tf_tbl_bind(tfp, &tbl_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Table initialization failure\n"); + goto fail; + } + + no_rsv_flag = false; } - tcam_cfg.num_elements = TF_TCAM_TBL_TYPE_MAX; - tcam_cfg.cfg = tf_tcam_p4; - tcam_cfg.shadow_copy = shadow_copy; - tcam_cfg.resources = resources; - rc = tf_tcam_bind(tfp, &tcam_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "TCAM initialization failure\n"); - goto fail; + rsv_cnt = tf_dev_reservation_check(tfp, + TF_TCAM_TBL_TYPE_MAX, + tf_tcam_p4, + (uint16_t *)resources->tcam_cnt); + if (rsv_cnt) { + tcam_cfg.num_elements = TF_TCAM_TBL_TYPE_MAX; + tcam_cfg.cfg = tf_tcam_p4; + tcam_cfg.shadow_copy = shadow_copy; + tcam_cfg.resources = resources; + rc = tf_tcam_bind(tfp, &tcam_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "TCAM initialization failure\n"); + goto fail; + } + no_rsv_flag = false; } /* * EEM */ - em_cfg.num_elements = TF_EM_TBL_TYPE_MAX; if (dev_handle->type == TF_DEVICE_TYPE_WH) em_cfg.cfg = tf_em_ext_p4; else em_cfg.cfg = tf_em_ext_p45; - em_cfg.resources = resources; - em_cfg.mem_type = TF_EEM_MEM_TYPE_HOST; - rc = tf_em_ext_common_bind(tfp, &em_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "EEM initialization failure\n"); - goto fail; + + rsv_cnt = tf_dev_reservation_check(tfp, + TF_EM_TBL_TYPE_MAX, + em_cfg.cfg, + (uint16_t *)resources->em_cnt); + if (rsv_cnt) { + em_cfg.num_elements = TF_EM_TBL_TYPE_MAX; + em_cfg.resources = resources; + em_cfg.mem_type = TF_EEM_MEM_TYPE_HOST; + rc = tf_em_ext_common_bind(tfp, &em_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "EEM initialization failure\n"); + goto fail; + } + no_rsv_flag = false; } /* * EM */ - em_cfg.num_elements = TF_EM_TBL_TYPE_MAX; - em_cfg.cfg = tf_em_int_p4; - em_cfg.resources = resources; - em_cfg.mem_type = 0; /* Not used by EM */ + rsv_cnt = tf_dev_reservation_check(tfp, + TF_EM_TBL_TYPE_MAX, + tf_em_int_p4, + (uint16_t *)resources->em_cnt); + if (rsv_cnt) { + em_cfg.num_elements = TF_EM_TBL_TYPE_MAX; + em_cfg.cfg = tf_em_int_p4; + em_cfg.resources = resources; + em_cfg.mem_type = 0; /* Not used by EM */ + + rc = tf_em_int_bind(tfp, &em_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "EM initialization failure\n"); + goto fail; + } + no_rsv_flag = false; + } - rc = tf_em_int_bind(tfp, &em_cfg); - if (rc) { + /* + * There is no rm reserved for any tables + * + */ + if (no_rsv_flag) { TFP_DRV_LOG(ERR, - "EM initialization failure\n"); - goto fail; + "No rm reserved for any tables\n"); + return -ENOMEM; } /* @@ -263,6 +351,8 @@ tf_dev_bind_p58(struct tf *tfp, { int rc; int frc; + int rsv_cnt; + bool no_rsv_flag = true; struct tf_ident_cfg_parms ident_cfg; struct tf_tbl_cfg_parms tbl_cfg; struct tf_tcam_cfg_parms tcam_cfg; @@ -275,52 +365,90 @@ tf_dev_bind_p58(struct tf *tfp, /* Initialize the modules */ - ident_cfg.num_elements = TF_IDENT_TYPE_MAX; - ident_cfg.cfg = tf_ident_p58; - ident_cfg.shadow_copy = shadow_copy; - ident_cfg.resources = resources; - rc = tf_ident_bind(tfp, &ident_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "Identifier initialization failure\n"); - goto fail; + rsv_cnt = tf_dev_reservation_check(tfp, + TF_IDENT_TYPE_MAX, + tf_ident_p58, + (uint16_t *)resources->ident_cnt); + if (rsv_cnt) { + ident_cfg.num_elements = TF_IDENT_TYPE_MAX; + ident_cfg.cfg = tf_ident_p58; + ident_cfg.shadow_copy = shadow_copy; + ident_cfg.resources = resources; + rc = tf_ident_bind(tfp, &ident_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Identifier initialization failure\n"); + goto fail; + } + no_rsv_flag = false; } - tbl_cfg.num_elements = TF_TBL_TYPE_MAX; - tbl_cfg.cfg = tf_tbl_p58; - tbl_cfg.shadow_copy = shadow_copy; - tbl_cfg.resources = resources; - rc = tf_tbl_bind(tfp, &tbl_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "Table initialization failure\n"); - goto fail; + rsv_cnt = tf_dev_reservation_check(tfp, + TF_TBL_TYPE_MAX, + tf_tbl_p58, + (uint16_t *)resources->tbl_cnt); + if (rsv_cnt) { + tbl_cfg.num_elements = TF_TBL_TYPE_MAX; + tbl_cfg.cfg = tf_tbl_p58; + tbl_cfg.shadow_copy = shadow_copy; + tbl_cfg.resources = resources; + rc = tf_tbl_bind(tfp, &tbl_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Table initialization failure\n"); + goto fail; + } + no_rsv_flag = false; } - tcam_cfg.num_elements = TF_TCAM_TBL_TYPE_MAX; - tcam_cfg.cfg = tf_tcam_p58; - tcam_cfg.shadow_copy = shadow_copy; - tcam_cfg.resources = resources; - rc = tf_tcam_bind(tfp, &tcam_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "TCAM initialization failure\n"); - goto fail; + rsv_cnt = tf_dev_reservation_check(tfp, + TF_TCAM_TBL_TYPE_MAX, + tf_tcam_p58, + (uint16_t *)resources->tcam_cnt); + if (rsv_cnt) { + tcam_cfg.num_elements = TF_TCAM_TBL_TYPE_MAX; + tcam_cfg.cfg = tf_tcam_p58; + tcam_cfg.shadow_copy = shadow_copy; + tcam_cfg.resources = resources; + rc = tf_tcam_bind(tfp, &tcam_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "TCAM initialization failure\n"); + goto fail; + } + no_rsv_flag = false; } /* * EM */ - em_cfg.num_elements = TF_EM_TBL_TYPE_MAX; - em_cfg.cfg = tf_em_int_p58; - em_cfg.resources = resources; - em_cfg.mem_type = 0; /* Not used by EM */ + rsv_cnt = tf_dev_reservation_check(tfp, + TF_EM_TBL_TYPE_MAX, + tf_em_int_p58, + (uint16_t *)resources->em_cnt); + if (rsv_cnt) { + em_cfg.num_elements = TF_EM_TBL_TYPE_MAX; + em_cfg.cfg = tf_em_int_p58; + em_cfg.resources = resources; + em_cfg.mem_type = 0; /* Not used by EM */ + + rc = tf_em_int_bind(tfp, &em_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "EM initialization failure\n"); + goto fail; + } + no_rsv_flag = false; + } - rc = tf_em_int_bind(tfp, &em_cfg); - if (rc) { + /* + * There is no rm reserved for any tables + * + */ + if (no_rsv_flag) { TFP_DRV_LOG(ERR, - "EM initialization failure\n"); - goto fail; + "No rm reserved for any tables\n"); + return -ENOMEM; } /* diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index b3fa7e13ff..d2b24f5e20 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -180,7 +180,7 @@ tf_session_create(struct tf *tfp, &session->dev); /* Logging handled by dev_bind */ if (rc) - return rc; + goto cleanup; if (session->dev.ops->tf_dev_get_mailbox == NULL) { /* Log error */ From patchwork Sun Jun 13 00:05:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94100 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CA7F5A0C41; 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Sat, 12 Jun 2021 17:07:03 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Randy Schacher , Venkat Duvvuru , Jay Ding , Peter Spreadborough Date: Sat, 12 Jun 2021 17:05:59 -0700 Message-Id: <20210613000652.28191-6-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 05/58] net/bnxt: update TRUFLOW resources X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith - Remove unused tables from tf_tbl_type - Encode flow type into flow handle (internal or external) - Clean up Whitney resource tables - Clean up Truflow CLI open tables and update Thor resources - Add Thor SRAM and external pool types to core API - Remove unneeded Stingray table reference Signed-off-by: Farah Smith Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Jay Ding Reviewed-by: Peter Spreadborough Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_core.c | 9 +- drivers/net/bnxt/tf_core/tf_core.h | 83 +++++---- drivers/net/bnxt/tf_core/tf_device.c | 5 +- drivers/net/bnxt/tf_core/tf_device_p4.c | 105 ++++------- drivers/net/bnxt/tf_core/tf_device_p4.h | 175 ++++++++++-------- drivers/net/bnxt/tf_core/tf_device_p45.h | 105 ----------- drivers/net/bnxt/tf_core/tf_device_p58.c | 61 +++--- drivers/net/bnxt/tf_core/tf_device_p58.h | 6 + drivers/net/bnxt/tf_core/tf_em_common.c | 2 +- drivers/net/bnxt/tf_core/tf_em_internal.c | 2 +- drivers/net/bnxt/tf_core/tf_ext_flow_handle.h | 15 +- drivers/net/bnxt/tf_core/tf_msg.c | 3 +- drivers/net/bnxt/tf_core/tf_rm.c | 14 +- drivers/net/bnxt/tf_core/tf_shadow_tbl.c | 2 - drivers/net/bnxt/tf_core/tf_util.c | 8 +- 15 files changed, 246 insertions(+), 349 deletions(-) delete mode 100644 drivers/net/bnxt/tf_core/tf_device_p45.h diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index b1ce4e721c..ebe0fc34aa 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -19,6 +19,7 @@ #include "rand.h" #include "tf_common.h" #include "hwrm_tf.h" +#include "tf_ext_flow_handle.h" int tf_open_session(struct tf *tfp, @@ -251,6 +252,7 @@ int tf_delete_em_entry(struct tf *tfp, struct tf_session *tfs; struct tf_dev_info *dev; int rc; + unsigned int flag = 0; TF_CHECK_PARMS2(tfp, parms); @@ -274,12 +276,11 @@ int tf_delete_em_entry(struct tf *tfp, return rc; } - if (parms->mem == TF_MEM_EXTERNAL) - rc = dev->ops->tf_dev_delete_ext_em_entry(tfp, parms); - else if (parms->mem == TF_MEM_INTERNAL) + TF_GET_FLAG_FROM_FLOW_HANDLE(parms->flow_handle, flag); + if ((flag & TF_FLAGS_FLOW_HANDLE_INTERNAL)) rc = dev->ops->tf_dev_delete_int_em_entry(tfp, parms); else - return -EINVAL; + rc = dev->ops->tf_dev_delete_ext_em_entry(tfp, parms); if (rc) { TFP_DRV_LOG(ERR, diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 5e458c58fb..4fe0590569 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -158,34 +158,40 @@ enum tf_device_type { */ enum tf_identifier_type { /** + * WH/SR/TH/SR2 * The L2 Context is returned from the L2 Ctxt TCAM lookup * and can be used in WC TCAM or EM keys to virtualize further * lookups. */ TF_IDENT_TYPE_L2_CTXT_HIGH, /** + * WH/SR/TH/SR2 * The L2 Context is returned from the L2 Ctxt TCAM lookup * and can be used in WC TCAM or EM keys to virtualize further * lookups. */ TF_IDENT_TYPE_L2_CTXT_LOW, /** + * WH/SR/TH/SR2 * The WC profile func is returned from the L2 Ctxt TCAM lookup * to enable virtualization of the profile TCAM. */ TF_IDENT_TYPE_PROF_FUNC, /** + * WH/SR/TH/SR2 * The WC profile ID is included in the WC lookup key * to enable virtualization of the WC TCAM hardware. */ TF_IDENT_TYPE_WC_PROF, /** + * WH/SR/TH/SR2 * The EM profile ID is included in the EM lookup key * to enable virtualization of the EM hardware. (not required for SR2 * as it has table scope) */ TF_IDENT_TYPE_EM_PROF, /** + * TH/SR2 * The L2 func is included in the ILT result and from recycling to * enable virtualization of further lookups. */ @@ -203,59 +209,63 @@ enum tf_identifier_type { enum tf_tbl_type { /* Internal */ - /** Wh+/SR Action Record */ + /** Wh+/SR/TH Action Record */ TF_TBL_TYPE_FULL_ACT_RECORD, - /** Wh+/SR/Th Multicast Groups */ + /** TH Compact Action Record */ + TF_TBL_TYPE_COMPACT_ACT_RECORD, + /** (Future) Multicast Groups */ TF_TBL_TYPE_MCAST_GROUPS, - /** Wh+/SR Action Encap 8 Bytes */ + /** Wh+/SR/TH Action Encap 8 Bytes */ TF_TBL_TYPE_ACT_ENCAP_8B, - /** Wh+/SR Action Encap 16 Bytes */ + /** Wh+/SR/TH Action Encap 16 Bytes */ TF_TBL_TYPE_ACT_ENCAP_16B, - /** Action Encap 32 Bytes */ + /** WH+/SR/TH Action Encap 32 Bytes */ TF_TBL_TYPE_ACT_ENCAP_32B, - /** Wh+/SR Action Encap 64 Bytes */ + /** Wh+/SR/TH Action Encap 64 Bytes */ TF_TBL_TYPE_ACT_ENCAP_64B, - /** Action Source Properties SMAC */ + /** WH+/SR/TH Action Source Properties SMAC */ TF_TBL_TYPE_ACT_SP_SMAC, - /** Wh+/SR Action Source Properties SMAC IPv4 */ + /** Wh+/SR/TH Action Source Properties SMAC IPv4 */ TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - /** Action Source Properties SMAC IPv6 */ + /** WH+/SR/TH Action Source Properties SMAC IPv6 */ TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - /** Wh+/SR Action Statistics 64 Bits */ + /** Wh+/SR/TH Action Statistics 64 Bits */ TF_TBL_TYPE_ACT_STATS_64, - /** Wh+/SR Action Modify L4 Src Port */ - TF_TBL_TYPE_ACT_MODIFY_SPORT, - /** Wh+/SR Action Modify L4 Dest Port */ - TF_TBL_TYPE_ACT_MODIFY_DPORT, /** Wh+/SR Action Modify IPv4 Source */ TF_TBL_TYPE_ACT_MODIFY_IPV4, - /** Meter Profiles */ + /** TH 8B Modify Record */ + TF_TBL_TYPE_ACT_MODIFY_8B, + /** TH 16B Modify Record */ + TF_TBL_TYPE_ACT_MODIFY_16B, + /** TH 32B Modify Record */ + TF_TBL_TYPE_ACT_MODIFY_32B, + /** TH 64B Modify Record */ + TF_TBL_TYPE_ACT_MODIFY_64B, + /** (Future) Meter Profiles */ TF_TBL_TYPE_METER_PROF, - /** Meter Instance */ + /** (Future) Meter Instance */ TF_TBL_TYPE_METER_INST, - /** Mirror Config */ + /** Wh+/SR/Th Mirror Config */ TF_TBL_TYPE_MIRROR_CONFIG, - /** UPAR */ + /** (Future) UPAR */ TF_TBL_TYPE_UPAR, - /** SR2 Epoch 0 table */ + /** (Future) SR2 Epoch 0 table */ TF_TBL_TYPE_EPOCH0, - /** SR2 Epoch 1 table */ + /** (Future) SR2 Epoch 1 table */ TF_TBL_TYPE_EPOCH1, - /** SR2 Metadata */ + /** (Future) TH/SR2 Metadata */ TF_TBL_TYPE_METADATA, - /** SR2 CT State */ + /** (Future) TH/SR2 CT State */ TF_TBL_TYPE_CT_STATE, - /** SR2 Range Profile */ + /** (Future) TH/SR2 Range Profile */ TF_TBL_TYPE_RANGE_PROF, - /** SR2 Range Entry */ + /** (Future) SR2 Range Entry */ TF_TBL_TYPE_RANGE_ENTRY, - /** SR2 LAG Entry */ + /** (Future) SR2 LAG Entry */ TF_TBL_TYPE_LAG, - /** SR2 VNIC/SVIF Table */ - TF_TBL_TYPE_VNIC_SVIF, - /** Th/SR2 EM Flexible Key builder */ + /** TH/SR2 EM Flexible Key builder */ TF_TBL_TYPE_EM_FKB, - /** Th/SR2 WC Flexible Key builder */ + /** TH/SR2 WC Flexible Key builder */ TF_TBL_TYPE_WC_FKB, /* External */ @@ -263,9 +273,18 @@ enum tf_tbl_type { /** * External table type - initially 1 poolsize entries. * All External table types are associated with a table - * scope. Internal types are not. + * scope. Internal types are not. Currently this is + * a pool of 64B entries. */ TF_TBL_TYPE_EXT, + /* (Future) SR2 32B External EM Action 32B Pool */ + TF_TBL_TYPE_EXT_32B, + /* (Future) SR2 64B External EM Action 64B Pool */ + TF_TBL_TYPE_EXT_64B, + /* (Future) SR2 96B External EM Action 96B Pool */ + TF_TBL_TYPE_EXT_96B, + /* (Future) SR2 128B External EM Action 128B Pool */ + TF_TBL_TYPE_EXT_128B, TF_TBL_TYPE_MAX }; @@ -1998,8 +2017,8 @@ enum tf_if_tbl_type { TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, /** SR2 Ingress lookup table */ TF_IF_TBL_TYPE_ILT, - /** SR2 VNIC/SVIF Table */ - TF_IF_TBL_TYPE_VNIC_SVIF, + /** SR2 VNIC/SVIF Properties Table */ + TF_IF_TBL_TYPE_VSPT, TF_IF_TBL_TYPE_MAX }; diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index d4c93439ec..d072b9877c 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -153,11 +153,8 @@ tf_dev_bind_p4(struct tf *tfp, /* * EEM */ - if (dev_handle->type == TF_DEVICE_TYPE_WH) - em_cfg.cfg = tf_em_ext_p4; - else - em_cfg.cfg = tf_em_ext_p45; + em_cfg.cfg = tf_em_ext_p4; rsv_cnt = tf_dev_reservation_check(tfp, TF_EM_TBL_TYPE_MAX, em_cfg.cfg, diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index 6b28f6ce59..f6c8f5efd0 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -19,76 +19,41 @@ #define TF_DEV_P4_PF_MASK 0xfUL const char *tf_resource_str_p4[CFA_RESOURCE_TYPE_P4_LAST + 1] = { - /* CFA_RESOURCE_TYPE_P4_MCG */ - "mc_group", - /* CFA_RESOURCE_TYPE_P4_ENCAP_8B */ - "encap_8 ", - /* CFA_RESOURCE_TYPE_P4_ENCAP_16B */ - "encap_16", - /* CFA_RESOURCE_TYPE_P4_ENCAP_64B */ - "encap_64", - /* CFA_RESOURCE_TYPE_P4_SP_MAC */ - "sp_mac ", - /* CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 */ - "sp_macv4", - /* CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 */ - "sp_macv6", - /* CFA_RESOURCE_TYPE_P4_COUNTER_64B */ - "ctr_64b ", - /* CFA_RESOURCE_TYPE_P4_NAT_PORT */ - "nat_port", - /* CFA_RESOURCE_TYPE_P4_NAT_IPV4 */ - "nat_ipv4", - /* CFA_RESOURCE_TYPE_P4_METER */ - "meter ", - /* CFA_RESOURCE_TYPE_P4_FLOW_STATE */ - "flow_st ", - /* CFA_RESOURCE_TYPE_P4_FULL_ACTION */ - "full_act", - /* CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION */ - "fmt0_act", - /* CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION */ - "ext0_act", - /* CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION */ - "fmt1_act", - /* CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION */ - "fmt2_act", - /* CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION */ - "fmt3_act", - /* CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION */ - "fmt4_act", - /* CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION */ - "fmt5_act", - /* CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION */ - "fmt6_act", - /* CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH */ - "l2ctx_hi", - /* CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW */ - "l2ctx_lo", - /* CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH */ - "l2ctr_hi", - /* CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW */ - "l2ctr_lo", - /* CFA_RESOURCE_TYPE_P4_PROF_FUNC */ - "prf_func", - /* CFA_RESOURCE_TYPE_P4_PROF_TCAM */ - "prf_tcam", - /* CFA_RESOURCE_TYPE_P4_EM_PROF_ID */ - "em_prof ", - /* CFA_RESOURCE_TYPE_P4_EM_REC */ - "em_rec ", - /* CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID */ - "wc_prof ", - /* CFA_RESOURCE_TYPE_P4_WC_TCAM */ - "wc_tcam ", - /* CFA_RESOURCE_TYPE_P4_METER_PROF */ - "mtr_prof", - /* CFA_RESOURCE_TYPE_P4_MIRROR */ - "mirror ", - /* CFA_RESOURCE_TYPE_P4_SP_TCAM */ - "sp_tcam ", - /* CFA_RESOURCE_TYPE_P4_TBL_SCOPE */ - "tb_scope", + [CFA_RESOURCE_TYPE_P4_MCG] = "mc_group", + [CFA_RESOURCE_TYPE_P4_ENCAP_8B] = "encap_8 ", + [CFA_RESOURCE_TYPE_P4_ENCAP_16B] = "encap_16", + [CFA_RESOURCE_TYPE_P4_ENCAP_64B] = "encap_64", + [CFA_RESOURCE_TYPE_P4_SP_MAC] = "sp_mac ", + [CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4] = "sp_macv4", + [CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6] = "sp_macv6", + [CFA_RESOURCE_TYPE_P4_COUNTER_64B] = "ctr_64b ", + [CFA_RESOURCE_TYPE_P4_NAT_PORT] = "nat_port", + [CFA_RESOURCE_TYPE_P4_NAT_IPV4] = "nat_ipv4", + [CFA_RESOURCE_TYPE_P4_METER] = "meter ", + [CFA_RESOURCE_TYPE_P4_FLOW_STATE] = "flow_st ", + [CFA_RESOURCE_TYPE_P4_FULL_ACTION] = "full_act", + [CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION] = "fmt0_act", + [CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION] = "ext0_act", + [CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION] = "fmt1_act", + [CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION] = "fmt2_act", + [CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION] = "fmt3_act", + [CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION] = "fmt4_act", + [CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION] = "fmt5_act", + [CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION] = "fmt6_act", + [CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH] = "l2ctx_hi", + [CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW] = "l2ctx_lo", + [CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH] = "l2ctr_hi", + [CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW] = "l2ctr_lo", + [CFA_RESOURCE_TYPE_P4_PROF_FUNC] = "prf_func", + [CFA_RESOURCE_TYPE_P4_PROF_TCAM] = "prf_tcam", + [CFA_RESOURCE_TYPE_P4_EM_PROF_ID] = "em_prof ", + [CFA_RESOURCE_TYPE_P4_EM_REC] = "em_rec ", + [CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID] = "wc_prof ", + [CFA_RESOURCE_TYPE_P4_WC_TCAM] = "wc_tcam ", + [CFA_RESOURCE_TYPE_P4_METER_PROF] = "mtr_prof", + [CFA_RESOURCE_TYPE_P4_MIRROR] = "mirror ", + [CFA_RESOURCE_TYPE_P4_SP_TCAM] = "sp_tcam ", + [CFA_RESOURCE_TYPE_P4_TBL_SCOPE] = "tb_scope", }; /** diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h index bfad02a0b8..ee283ce29d 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.h +++ b/drivers/net/bnxt/tf_core/tf_device_p4.h @@ -13,98 +13,123 @@ #include "tf_global_cfg.h" struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = { - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID }, - /* CFA_RESOURCE_TYPE_P4_L2_FUNC */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID } + [TF_IDENT_TYPE_L2_CTXT_HIGH] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH + }, + [TF_IDENT_TYPE_L2_CTXT_LOW] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW + }, + [TF_IDENT_TYPE_PROF_FUNC] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC + }, + [TF_IDENT_TYPE_WC_PROF] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID + }, + [TF_IDENT_TYPE_EM_PROF] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID + }, }; struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = { - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM }, - /* CFA_RESOURCE_TYPE_P4_CT_RULE_TCAM */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_VEB_TCAM */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID } + [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH + }, + [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW + }, + [TF_TCAM_TBL_TYPE_PROF_TCAM] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM + }, + [TF_TCAM_TBL_TYPE_WC_TCAM] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM + }, + [TF_TCAM_TBL_TYPE_SP_TCAM] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM + }, }; struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = { - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B }, - /* CFA_RESOURCE_TYPE_P4_ENCAP_32B */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_PORT }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_PORT }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4 }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR }, - /* CFA_RESOURCE_TYPE_P4_UPAR */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_EPOC */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_METADATA */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_CT_STATE */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_RANGE_PROF */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_RANGE_ENTRY */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_LAG */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_VNIC_SVIF */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_EM_FBK */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_WC_FKB */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P4_EXT */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID } -}; + [TF_TBL_TYPE_FULL_ACT_RECORD] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION + }, + [TF_TBL_TYPE_MCAST_GROUPS] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG + }, + [TF_TBL_TYPE_ACT_ENCAP_8B] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B + }, + [TF_TBL_TYPE_ACT_ENCAP_16B] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B + }, + [TF_TBL_TYPE_ACT_ENCAP_64B] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B + }, + [TF_TBL_TYPE_ACT_SP_SMAC] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC + }, + [TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 + }, + [TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 + }, + [TF_TBL_TYPE_ACT_STATS_64] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B + }, + [TF_TBL_TYPE_ACT_MODIFY_IPV4] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4 + }, + [TF_TBL_TYPE_METER_PROF] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF + }, + [TF_TBL_TYPE_METER_INST] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER + }, + [TF_TBL_TYPE_MIRROR_CONFIG] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR + }, -struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = { - /* CFA_RESOURCE_TYPE_P4_EM_REC */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE }, }; -struct tf_rm_element_cfg tf_em_ext_p45[TF_EM_TBL_TYPE_MAX] = { - /* CFA_RESOURCE_TYPE_P4_EM_REC */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_TBL_SCOPE }, +struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = { + [TF_EM_TBL_TYPE_TBL_SCOPE] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE + }, }; struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = { - { TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC }, - /* CFA_RESOURCE_TYPE_P4_TBL_SCOPE */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, + [TF_EM_TBL_TYPE_EM_RECORD] = { + TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC + }, }; +/* Note that hcapi_types from this table are from hcapi_cfa_p4.h + * These are not CFA resource types because they are not allocated + * CFA resources - they are identifiers for the interface tables + * shared between the firmware and the host. It may make sense to + * move these types to cfa_resource_types.h. + */ struct tf_if_tbl_cfg tf_if_tbl_p4[TF_IF_TBL_TYPE_MAX] = { - { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_SPIF_DFLT_L2CTXT }, - { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_DFLT_ACT_REC_PTR }, - { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_ERR_ACT_REC_PTR }, - { TF_IF_TBL_CFG, CFA_P4_TBL_LKUP_PARIF_DFLT_ACT_REC_PTR }, - { TF_IF_TBL_CFG_NULL, CFA_IF_TBL_TYPE_INVALID }, - { TF_IF_TBL_CFG_NULL, CFA_IF_TBL_TYPE_INVALID } + [TF_IF_TBL_TYPE_PROF_SPIF_DFLT_L2_CTXT] = { + TF_IF_TBL_CFG, CFA_P4_TBL_PROF_SPIF_DFLT_L2CTXT + }, + [TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR] = { + TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_DFLT_ACT_REC_PTR + }, + [TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR] = { + TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_ERR_ACT_REC_PTR + }, + [TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR] = { + TF_IF_TBL_CFG, CFA_P4_TBL_LKUP_PARIF_DFLT_ACT_REC_PTR + }, }; struct tf_global_cfg_cfg tf_global_cfg_p4[TF_GLOBAL_CFG_TYPE_MAX] = { - { TF_GLOBAL_CFG_CFG_HCAPI, TF_TUNNEL_ENCAP }, - { TF_GLOBAL_CFG_CFG_HCAPI, TF_ACTION_BLOCK }, + [TF_TUNNEL_ENCAP] = { + TF_GLOBAL_CFG_CFG_HCAPI, TF_TUNNEL_ENCAP + }, + [TF_ACTION_BLOCK] = { + TF_GLOBAL_CFG_CFG_HCAPI, TF_ACTION_BLOCK + }, }; #endif /* _TF_DEVICE_P4_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_device_p45.h b/drivers/net/bnxt/tf_core/tf_device_p45.h deleted file mode 100644 index 13e04c63fc..0000000000 --- a/drivers/net/bnxt/tf_core/tf_device_p45.h +++ /dev/null @@ -1,105 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom - * All rights reserved. - */ - -#ifndef _TF_DEVICE_P45_H_ -#define _TF_DEVICE_P45_H_ - -#include - -#include "tf_core.h" -#include "tf_rm.h" -#include "tf_if_tbl.h" -#include "tf_global_cfg.h" - -struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = { - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP_HIGH }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP_LOW }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_PROF_FUNC }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_WC_TCAM_PROF_ID }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_EM_PROF_ID }, - /* CFA_RESOURCE_TYPE_P45_L2_FUNC */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID } -}; - -struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = { - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM_HIGH }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM_LOW }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_PROF_TCAM }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_WC_TCAM }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_SP_TCAM }, - /* CFA_RESOURCE_TYPE_P45_CT_RULE_TCAM */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_VEB_TCAM */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID } -}; - -struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = { - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_FULL_ACTION }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_MCG }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_ENCAP_8B }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_ENCAP_16B }, - /* CFA_RESOURCE_TYPE_P45_ENCAP_32B */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_ENCAP_64B }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_SP_MAC }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_SP_MAC_IPV4 }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_SP_MAC_IPV6 }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_COUNTER_64B }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_NAT_PORT }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_NAT_PORT }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_NAT_IPV4 }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_METER_PROF }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_METER }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_MIRROR }, - /* CFA_RESOURCE_TYPE_P45_UPAR */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_EPOC */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_METADATA */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_CT_STATE */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_RANGE_PROF */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_RANGE_ENTRY */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_LAG */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_VNIC_SVIF */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_EM_FBK */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_WC_FKB */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - /* CFA_RESOURCE_TYPE_P45_EXT */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID } -}; - -struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = { - /* CFA_RESOURCE_TYPE_P45_EM_REC */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, - { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_TBL_SCOPE }, -}; - -struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = { - { TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P45_EM_REC }, - /* CFA_RESOURCE_TYPE_P45_TBL_SCOPE */ - { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }, -}; - -struct tf_if_tbl_cfg tf_if_tbl_p4[TF_IF_TBL_TYPE_MAX] = { - { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_SPIF_DFLT_L2CTXT }, - { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_DFLT_ACT_REC_PTR }, - { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_ERR_ACT_REC_PTR }, - { TF_IF_TBL_CFG, CFA_P4_TBL_LKUP_PARIF_DFLT_ACT_REC_PTR }, - { TF_IF_TBL_CFG_NULL, CFA_IF_TBL_TYPE_INVALID }, - { TF_IF_TBL_CFG_NULL, CFA_IF_TBL_TYPE_INVALID } -}; - -struct tf_global_cfg_cfg tf_global_cfg_p4[TF_GLOBAL_CFG_TYPE_MAX] = { - { TF_GLOBAL_CFG_CFG_HCAPI, TF_TUNNEL_ENCAP }, - { TF_GLOBAL_CFG_CFG_HCAPI, TF_ACTION_BLOCK }, -}; -#endif /* _TF_DEVICE_P45_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index b4530f8762..7dd806000c 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -18,47 +18,28 @@ #define TF_DEV_P58_PARIF_MAX 16 #define TF_DEV_P58_PF_MASK 0xfUL +/* For print alignment, make all entries 8 chars in this table */ const char *tf_resource_str_p58[CFA_RESOURCE_TYPE_P58_LAST + 1] = { - /* CFA_RESOURCE_TYPE_P58_METER */ - "meter ", - /* CFA_RESOURCE_TYPE_P58_SRAM_BANK_0 */ - "sram_bk0", - /* CFA_RESOURCE_TYPE_P58_SRAM_BANK_1 */ - "sram_bk1", - /* CFA_RESOURCE_TYPE_P58_SRAM_BANK_2 */ - "sram_bk2", - /* CFA_RESOURCE_TYPE_P58_SRAM_BANK_3 */ - "sram_bk3", - /* CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH */ - "l2ctx_hi", - /* CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW */ - "l2ctx_lo", - /* CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH */ - "l2ctr_hi", - /* CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW */ - "l2ctr_lo", - /* CFA_RESOURCE_TYPE_P58_PROF_FUNC */ - "prf_func", - /* CFA_RESOURCE_TYPE_P58_PROF_TCAM */ - "prf_tcam", - /* CFA_RESOURCE_TYPE_P58_EM_PROF_ID */ - "em_prof ", - /* CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID */ - "wc_prof ", - /* CFA_RESOURCE_TYPE_P58_EM_REC */ - "em_rec ", - /* CFA_RESOURCE_TYPE_P58_WC_TCAM */ - "wc_tcam ", - /* CFA_RESOURCE_TYPE_P58_METER_PROF */ - "mtr_prof", - /* CFA_RESOURCE_TYPE_P58_MIRROR */ - "mirror ", - /* CFA_RESOURCE_TYPE_P58_EM_FKB */ - "em_fkb ", - /* CFA_RESOURCE_TYPE_P58_WC_FKB */ - "wc_fkb ", - /* CFA_RESOURCE_TYPE_P58_VEB_TCAM */ - "veb ", + [CFA_RESOURCE_TYPE_P58_METER] = "meter ", + [CFA_RESOURCE_TYPE_P58_SRAM_BANK_0] = "sram_bk0", + [CFA_RESOURCE_TYPE_P58_SRAM_BANK_1] = "sram_bk1", + [CFA_RESOURCE_TYPE_P58_SRAM_BANK_2] = "sram_bk2", + [CFA_RESOURCE_TYPE_P58_SRAM_BANK_3] = "sram_bk3", + [CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH] = "l2ctx_hi", + [CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW] = "l2ctx_lo", + [CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH] = "l2ctr_hi", + [CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW] = "l2ctr_lo", + [CFA_RESOURCE_TYPE_P58_PROF_FUNC] = "prf_func", + [CFA_RESOURCE_TYPE_P58_PROF_TCAM] = "prf_tcam", + [CFA_RESOURCE_TYPE_P58_EM_PROF_ID] = "em_prof ", + [CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID] = "wc_prof ", + [CFA_RESOURCE_TYPE_P58_EM_REC] = "em_rec ", + [CFA_RESOURCE_TYPE_P58_WC_TCAM] = "wc_tcam ", + [CFA_RESOURCE_TYPE_P58_METER_PROF] = "mtr_prof", + [CFA_RESOURCE_TYPE_P58_MIRROR] = "mirror ", + [CFA_RESOURCE_TYPE_P58_EM_FKB] = "em_fkb ", + [CFA_RESOURCE_TYPE_P58_WC_FKB] = "wc_fkb ", + [CFA_RESOURCE_TYPE_P58_VEB_TCAM] = "veb ", }; /** diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.h b/drivers/net/bnxt/tf_core/tf_device_p58.h index 3d6e3240bf..de7bb1cd76 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.h +++ b/drivers/net/bnxt/tf_core/tf_device_p58.h @@ -49,6 +49,12 @@ struct tf_rm_element_cfg tf_tcam_p58[TF_TCAM_TBL_TYPE_MAX] = { }; struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = { + [TF_TBL_TYPE_EM_FKB] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_FKB + }, + [TF_TBL_TYPE_WC_FKB] = { + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_FKB + }, [TF_TBL_TYPE_METER_PROF] = { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER_PROF }, diff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c index ddc6b3c4dd..6cd6086685 100644 --- a/drivers/net/bnxt/tf_core/tf_em_common.c +++ b/drivers/net/bnxt/tf_core/tf_em_common.c @@ -777,7 +777,7 @@ tf_insert_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb, TF_SET_FIELDS_IN_FLOW_HANDLE(parms->flow_handle, 0, 0, - 0, + TF_FLAGS_FLOW_HANDLE_EXTERNAL, index, 0, table_type); diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index 62ccd7b78f..bdffd801b3 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -203,7 +203,7 @@ tf_em_insert_int_entry(struct tf *tfp, TF_SET_FIELDS_IN_FLOW_HANDLE(parms->flow_handle, (uint32_t)num_of_entries, 0, - 0, + TF_FLAGS_FLOW_HANDLE_INTERNAL, rptr_index, rptr_entry, 0); diff --git a/drivers/net/bnxt/tf_core/tf_ext_flow_handle.h b/drivers/net/bnxt/tf_core/tf_ext_flow_handle.h index 9eb5aeb771..bf6dbcd238 100644 --- a/drivers/net/bnxt/tf_core/tf_ext_flow_handle.h +++ b/drivers/net/bnxt/tf_core/tf_ext_flow_handle.h @@ -19,6 +19,9 @@ #define TF_HASH_TYPE_FLOW_HANDLE_MASK 0x0000000100000000ULL #define TF_HASH_TYPE_FLOW_HANDLE_SFT 32 +#define TF_FLAGS_FLOW_HANDLE_INTERNAL 0x2 +#define TF_FLAGS_FLOW_HANDLE_EXTERNAL 0x0 + #define TF_FLOW_HANDLE_MASK (TF_NUM_KEY_ENTRIES_FLOW_HANDLE_MASK | \ TF_FLOW_TYPE_FLOW_HANDLE_MASK | \ TF_FLAGS_FLOW_HANDLE_MASK | \ @@ -92,15 +95,23 @@ do { \ #define TF_GET_NUM_KEY_ENTRIES_FROM_FLOW_HANDLE(flow_handle, \ num_key_entries) \ +do { \ (num_key_entries = \ (((flow_handle) & TF_NUM_KEY_ENTRIES_FLOW_HANDLE_MASK) >> \ - TF_NUM_KEY_ENTRIES_FLOW_HANDLE_SFT)) \ + TF_NUM_KEY_ENTRIES_FLOW_HANDLE_SFT)); \ +} while (0) #define TF_GET_ENTRY_NUM_FROM_FLOW_HANDLE(flow_handle, \ entry_num) \ +do { \ (entry_num = \ (((flow_handle) & TF_ENTRY_NUM_FLOW_HANDLE_MASK) >> \ - TF_ENTRY_NUM_FLOW_HANDLE_SFT)) \ + TF_ENTRY_NUM_FLOW_HANDLE_SFT)); \ +} while (0) + +#define TF_GET_FLAG_FROM_FLOW_HANDLE(flow_handle, flag) \ + (flag = (((flow_handle) & TF_FLAGS_FLOW_HANDLE_MASK) >>\ + TF_FLAGS_FLOW_HANDLE_SFT)) /* * 32 bit Flow ID handlers diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index 1007211363..be30d4a09f 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -415,7 +415,6 @@ tf_msg_session_resc_qcaps(struct tf *tfp, /* Post process the response */ data = (struct tf_rm_resc_req_entry *)qcaps_buf.va_addr; - for (i = 0; i < size; i++) { query[i].type = tfp_le_to_cpu_32(data[i].type); query[i].min = tfp_le_to_cpu_16(data[i].min); @@ -1462,7 +1461,7 @@ tf_msg_set_global_cfg(struct tf *tfp, /* Only set mask if pointer is provided */ if (params->config_mask) { - tfp_memcpy(req.data + params->config_sz_in_bytes, + tfp_memcpy(req.mask, params->config_mask, params->config_sz_in_bytes); } diff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c index 2c08fb80fe..19de6e4c63 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.c +++ b/drivers/net/bnxt/tf_core/tf_rm.c @@ -486,14 +486,20 @@ tf_rm_create_db(struct tf *tfp, req[j].max = parms->alloc_cnt[i]; j++; } else { + const char *type_str; + uint16_t hcapi_type = parms->cfg[i].hcapi_type; + + dev->ops->tf_dev_get_resource_str(tfp, + hcapi_type, + &type_str); TFP_DRV_LOG(ERR, - "%s: Resource failure, type:%d\n", - tf_dir_2_str(parms->dir), - parms->cfg[i].hcapi_type); + "%s: Resource failure, type:%d:%s\n", + tf_dir_2_str(parms->dir), + hcapi_type, type_str); TFP_DRV_LOG(ERR, "req:%d, avail:%d\n", parms->alloc_cnt[i], - query[parms->cfg[i].hcapi_type].max); + query[hcapi_type].max); return -EINVAL; } } diff --git a/drivers/net/bnxt/tf_core/tf_shadow_tbl.c b/drivers/net/bnxt/tf_core/tf_shadow_tbl.c index 014e4f3c83..396ebdb0a9 100644 --- a/drivers/net/bnxt/tf_core/tf_shadow_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_shadow_tbl.c @@ -177,8 +177,6 @@ static int tf_shadow_tbl_is_searchable(enum tf_tbl_type type) case TF_TBL_TYPE_ACT_SP_SMAC_IPV4: case TF_TBL_TYPE_ACT_SP_SMAC_IPV6: case TF_TBL_TYPE_ACT_MODIFY_IPV4: - case TF_TBL_TYPE_ACT_MODIFY_SPORT: - case TF_TBL_TYPE_ACT_MODIFY_DPORT: rc = 1; break; default: diff --git a/drivers/net/bnxt/tf_core/tf_util.c b/drivers/net/bnxt/tf_core/tf_util.c index ca37df5102..74c8f26204 100644 --- a/drivers/net/bnxt/tf_core/tf_util.c +++ b/drivers/net/bnxt/tf_core/tf_util.c @@ -88,12 +88,8 @@ tf_tbl_type_2_str(enum tf_tbl_type tbl_type) return "Source Properties SMAC IPv6"; case TF_TBL_TYPE_ACT_STATS_64: return "Stats 64B"; - case TF_TBL_TYPE_ACT_MODIFY_SPORT: - return "NAT Source Port"; - case TF_TBL_TYPE_ACT_MODIFY_DPORT: - return "NAT Destination Port"; case TF_TBL_TYPE_ACT_MODIFY_IPV4: - return "NAT IPv4"; + return "Modify IPv4"; case TF_TBL_TYPE_METER_PROF: return "Meter Profile"; case TF_TBL_TYPE_METER_INST: @@ -116,8 +112,6 @@ tf_tbl_type_2_str(enum tf_tbl_type tbl_type) return "Range"; case TF_TBL_TYPE_LAG: return "Link Aggregation"; - case TF_TBL_TYPE_VNIC_SVIF: - return "VNIC SVIF"; case TF_TBL_TYPE_EM_FKB: return "EM Flexible Key Builder"; case TF_TBL_TYPE_WC_FKB: From patchwork Sun Jun 13 00:06:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94101 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C0C9CA0C41; Sun, 13 Jun 2021 02:07:53 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 24E2341145; Sun, 13 Jun 2021 02:07:10 +0200 (CEST) Received: from mail-pj1-f47.google.com (mail-pj1-f47.google.com [209.85.216.47]) by mails.dpdk.org (Postfix) with ESMTP id A79164003E for ; Sun, 13 Jun 2021 02:07:06 +0200 (CEST) Received: by mail-pj1-f47.google.com with SMTP id go18-20020a17090b03d2b029016e4ae973f7so6957470pjb.0 for ; Sat, 12 Jun 2021 17:07:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; 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Sat, 12 Jun 2021 17:07:05 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.04 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:04 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Peter Spreadborough , Randy Schacher , Venkat Duvvuru , Farah Smith Date: Sat, 12 Jun 2021 17:06:00 -0700 Message-Id: <20210613000652.28191-7-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 06/58] net/bnxt: add support for EM with FKB X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Peter Spreadborough Main TF changes to support EM insert with FKB. Flexible Key builder is required to create Wild Card and Exact Match keys for TCAM lookups. Signed-off-by: Peter Spreadborough Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/meson.build | 1 + drivers/net/bnxt/tf_core/tf_device_p58.c | 14 +- drivers/net/bnxt/tf_core/tf_em.h | 32 +++++ .../net/bnxt/tf_core/tf_em_hash_internal.c | 123 ++++++++++++++++++ drivers/net/bnxt/tf_core/tf_em_internal.c | 3 +- drivers/net/bnxt/tf_core/tf_msg.c | 96 ++++++++++++++ drivers/net/bnxt/tf_core/tf_msg.h | 35 +++++ 7 files changed, 295 insertions(+), 9 deletions(-) create mode 100644 drivers/net/bnxt/tf_core/tf_em_hash_internal.c diff --git a/drivers/net/bnxt/tf_core/meson.build b/drivers/net/bnxt/tf_core/meson.build index d7e8f664fd..373ee0413b 100644 --- a/drivers/net/bnxt/tf_core/meson.build +++ b/drivers/net/bnxt/tf_core/meson.build @@ -30,5 +30,6 @@ sources += files( 'll.c', 'tf_global_cfg.c', 'tf_em_host.c', + 'tf_em_hash_internal.c', 'tf_shadow_identifier.c', 'tf_hash.c') diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 7dd806000c..6cef1d5ba5 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -256,14 +256,14 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, .tf_dev_set_tcam = tf_tcam_set, .tf_dev_get_tcam = NULL, - .tf_dev_insert_int_em_entry = tf_em_insert_int_entry, - .tf_dev_delete_int_em_entry = tf_em_delete_int_entry, - .tf_dev_insert_ext_em_entry = tf_em_insert_ext_entry, - .tf_dev_delete_ext_em_entry = tf_em_delete_ext_entry, - .tf_dev_alloc_tbl_scope = tf_em_ext_common_alloc, - .tf_dev_map_tbl_scope = tf_em_ext_map_tbl_scope, + .tf_dev_insert_int_em_entry = tf_em_hash_insert_int_entry, + .tf_dev_delete_int_em_entry = tf_em_hash_delete_int_entry, + .tf_dev_insert_ext_em_entry = NULL, + .tf_dev_delete_ext_em_entry = NULL, + .tf_dev_alloc_tbl_scope = NULL, + .tf_dev_map_tbl_scope = NULL, .tf_dev_map_parif = tf_dev_p58_map_parif, - .tf_dev_free_tbl_scope = tf_em_ext_common_free, + .tf_dev_free_tbl_scope = NULL, .tf_dev_set_if_tbl = tf_if_tbl_set, .tf_dev_get_if_tbl = tf_if_tbl_get, .tf_dev_set_global_cfg = tf_global_cfg_set, diff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h index b5c3acb09a..5a67ca3509 100644 --- a/drivers/net/bnxt/tf_core/tf_em.h +++ b/drivers/net/bnxt/tf_core/tf_em.h @@ -197,6 +197,38 @@ int tf_em_insert_int_entry(struct tf *tfp, int tf_em_delete_int_entry(struct tf *tfp, struct tf_delete_em_entry_parms *parms); +/** + * Insert record in to internal EM table + * + * [in] tfp + * Pointer to TruFlow handle + * + * [in] parms + * Pointer to input parameters + * + * Returns: + * 0 - Success + * -EINVAL - Parameter error + */ +int tf_em_hash_insert_int_entry(struct tf *tfp, + struct tf_insert_em_entry_parms *parms); + +/** + * Delete record from internal EM table + * + * [in] tfp + * Pointer to TruFlow handle + * + * [in] parms + * Pointer to input parameters + * + * Returns: + * 0 - Success + * -EINVAL - Parameter error + */ +int tf_em_hash_delete_int_entry(struct tf *tfp, + struct tf_delete_em_entry_parms *parms); + /** * Insert record in to external EEM table * diff --git a/drivers/net/bnxt/tf_core/tf_em_hash_internal.c b/drivers/net/bnxt/tf_core/tf_em_hash_internal.c new file mode 100644 index 0000000000..09183b42f0 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_em_hash_internal.c @@ -0,0 +1,123 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2021 Broadcom + * All rights reserved. + */ + +#include +#include +#include +#include + +#include "tf_core.h" +#include "tf_util.h" +#include "tf_common.h" +#include "tf_em.h" +#include "tf_msg.h" +#include "tfp.h" +#include "tf_ext_flow_handle.h" + +#include "bnxt.h" + +/** + * EM Pool + */ +extern struct stack em_pool[TF_DIR_MAX]; + +/** + * Insert EM internal entry API + * + * returns: + * 0 - Success + */ +int +tf_em_hash_insert_int_entry(struct tf *tfp, + struct tf_insert_em_entry_parms *parms) +{ + int rc; + uint32_t gfid; + uint16_t rptr_index = 0; + uint8_t rptr_entry = 0; + uint8_t num_of_entries = 0; + struct stack *pool = &em_pool[parms->dir]; + uint32_t index; + uint32_t key0_hash; + uint32_t key1_hash; + uint64_t big_hash; + + rc = stack_pop(pool, &index); + if (rc) { + PMD_DRV_LOG(ERR, + "%s, EM entry index allocation failed\n", + tf_dir_2_str(parms->dir)); + return rc; + } + + big_hash = hcapi_cfa_key_hash((uint64_t *)parms->key, + (TF_HW_EM_KEY_MAX_SIZE + 4) * 8); + key0_hash = (uint32_t)(big_hash >> 32); + key1_hash = (uint32_t)(big_hash & 0xFFFFFFFF); + + rptr_index = index; + rc = tf_msg_hash_insert_em_internal_entry(tfp, + parms, + key0_hash, + key1_hash, + &rptr_index, + &rptr_entry, + &num_of_entries); + if (rc) { + /* Free the allocated index before returning */ + stack_push(pool, index); + return -1; + } + + PMD_DRV_LOG + (DEBUG, + "%s, Internal entry @ Index:%d rptr_index:0x%x rptr_entry:0x%x num_of_entries:%d\n", + tf_dir_2_str(parms->dir), + index, + rptr_index, + rptr_entry, + num_of_entries); + + TF_SET_GFID(gfid, + ((rptr_index << TF_EM_INTERNAL_INDEX_SHIFT) | + rptr_entry), + 0); /* N/A for internal table */ + + TF_SET_FLOW_ID(parms->flow_id, + gfid, + TF_GFID_TABLE_INTERNAL, + parms->dir); + + TF_SET_FIELDS_IN_FLOW_HANDLE(parms->flow_handle, + (uint32_t)num_of_entries, + 0, + 0, + rptr_index, + rptr_entry, + 0); + return 0; +} + +/** Delete EM internal entry API + * + * returns: + * 0 + * -EINVAL + */ +int +tf_em_hash_delete_int_entry(struct tf *tfp, + struct tf_delete_em_entry_parms *parms) +{ + int rc = 0; + struct stack *pool = &em_pool[parms->dir]; + + rc = tf_msg_delete_em_entry(tfp, parms); + + /* Return resource to pool */ + if (rc == 0) + stack_push(pool, parms->index); + + return rc; +} diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index bdffd801b3..0864218469 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -30,11 +30,10 @@ static void *em_db[TF_DIR_MAX]; */ static uint8_t init; - /** * EM Pool */ -static struct stack em_pool[TF_DIR_MAX]; +struct stack em_pool[TF_DIR_MAX]; /** * Create EM Tbl pool of memory indexes. diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index be30d4a09f..39d7e3eace 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -25,6 +25,7 @@ */ #define TF_MSG_SET_GLOBAL_CFG_DATA_SIZE 16 #define TF_MSG_EM_INSERT_KEY_SIZE 64 +#define TF_MSG_EM_INSERT_RECORD_SIZE 80 #define TF_MSG_TBL_TYPE_SET_DATA_SIZE 88 /* Compile check - Catch any msg changes that we depend on, like the @@ -706,6 +707,101 @@ tf_msg_insert_em_internal_entry(struct tf *tfp, return 0; } +int +tf_msg_hash_insert_em_internal_entry(struct tf *tfp, + struct tf_insert_em_entry_parms *em_parms, + uint32_t key0_hash, + uint32_t key1_hash, + uint16_t *rptr_index, + uint8_t *rptr_entry, + uint8_t *num_of_entries) +{ + int rc; + struct tfp_send_msg_parms parms = { 0 }; + struct hwrm_tf_em_hash_insert_input req = { 0 }; + struct hwrm_tf_em_hash_insert_output resp = { 0 }; + uint16_t flags; + uint8_t fw_session_id; + uint8_t msg_record_size; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + rc = tf_session_get_fw_session_id(tfp, &fw_session_id); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Unable to lookup FW id, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + /* Populate the request */ + req.fw_session_id = tfp_cpu_to_le_32(fw_session_id); + + /* Check for key size conformity */ + msg_record_size = (em_parms->em_record_sz_in_bits + 7) / 8; + + if (msg_record_size > TF_MSG_EM_INSERT_RECORD_SIZE) { + rc = -EINVAL; + TFP_DRV_LOG(ERR, + "%s: Record size to large, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + tfp_memcpy((char *)req.em_record, + em_parms->em_record, + msg_record_size); + + flags = (em_parms->dir == TF_DIR_TX ? + HWRM_TF_EM_INSERT_INPUT_FLAGS_DIR_TX : + HWRM_TF_EM_INSERT_INPUT_FLAGS_DIR_RX); + req.flags = tfp_cpu_to_le_16(flags); + req.em_record_size_bits = em_parms->em_record_sz_in_bits; + req.em_record_idx = *rptr_index; + req.key0_hash = key0_hash; + req.key1_hash = key1_hash; + + parms.tf_type = HWRM_TF_EM_HASH_INSERT; + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = dev->ops->tf_dev_get_mailbox(); + + rc = tfp_send_msg_direct(tfp, + &parms); + if (rc) + return rc; + + *rptr_entry = resp.rptr_entry; + *rptr_index = resp.rptr_index; + *num_of_entries = resp.num_of_entries; + + return 0; +} + int tf_msg_delete_em_entry(struct tf *tfp, struct tf_delete_em_entry_parms *em_parms) diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h index 25e29a554f..1d82ce5049 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.h +++ b/drivers/net/bnxt/tf_core/tf_msg.h @@ -225,6 +225,41 @@ int tf_msg_insert_em_internal_entry(struct tf *tfp, uint16_t *rptr_index, uint8_t *rptr_entry, uint8_t *num_of_entries); +/** + * Sends EM hash internal insert request to Firmware + * + * [in] tfp + * Pointer to TF handle + * + * [in] params + * Pointer to em insert parameter list + * + * [in] key0_hash + * CRC32 hash of key + * + * [in] key1_hash + * Lookup3 hash of key + * + * [in] rptr_index + * Record ptr index + * + * [in] rptr_entry + * Record ptr entry + * + * [in] num_of_entries + * Number of entries to insert + * + * Returns: + * 0 on Success else internal Truflow error + */ +int +tf_msg_hash_insert_em_internal_entry(struct tf *tfp, + struct tf_insert_em_entry_parms *em_parms, + uint32_t key0_hash, + uint32_t key1_hash, + uint16_t *rptr_index, + uint8_t *rptr_entry, + uint8_t *num_of_entries); /** * Sends EM internal delete request to Firmware * From patchwork Sun Jun 13 00:06:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94102 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B7173A0C41; Sun, 13 Jun 2021 02:08:01 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6F2E74114C; Sun, 13 Jun 2021 02:07:11 +0200 (CEST) Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) by mails.dpdk.org (Postfix) with ESMTP id 0A25B41139 for ; Sun, 13 Jun 2021 02:07:08 +0200 (CEST) Received: by mail-pl1-f175.google.com with SMTP id h1so4698972plt.1 for ; Sat, 12 Jun 2021 17:07:07 -0700 (PDT) DKIM-Signature: v=1; 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Sat, 12 Jun 2021 17:07:06 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.05 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:06 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Randy Schacher , Venkat Duvvuru , Peter Spreadborough , Farah Smith Date: Sat, 12 Jun 2021 17:06:01 -0700 Message-Id: <20210613000652.28191-8-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 07/58] net/bnxt: support L2 Context TCAM ops X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding - Implement TCAM get in host - Add Thor support for TCAM set/free Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Peter Spreadborough Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/hwrm_tf.h | 1 + drivers/net/bnxt/tf_core/tf_core.c | 65 +++++++++++++++-- drivers/net/bnxt/tf_core/tf_device.h | 12 ++++ drivers/net/bnxt/tf_core/tf_device_p4.c | 6 ++ drivers/net/bnxt/tf_core/tf_device_p58.c | 9 ++- drivers/net/bnxt/tf_core/tf_msg.c | 52 ++++++++++++++ drivers/net/bnxt/tf_core/tf_msg.h | 16 +++++ drivers/net/bnxt/tf_core/tf_tcam.c | 89 +++++++++++++++++++++++- drivers/net/bnxt/tf_core/tf_tcam.h | 4 ++ 9 files changed, 248 insertions(+), 6 deletions(-) diff --git a/drivers/net/bnxt/tf_core/hwrm_tf.h b/drivers/net/bnxt/tf_core/hwrm_tf.h index a707cd2758..9cc9a1435c 100644 --- a/drivers/net/bnxt/tf_core/hwrm_tf.h +++ b/drivers/net/bnxt/tf_core/hwrm_tf.h @@ -65,6 +65,7 @@ typedef enum tf_subtype { #define TF_BITS2BYTES(x) (((x) + 7) >> 3) #define TF_BITS2BYTES_WORD_ALIGN(x) ((((x) + 31) >> 5) * 4) +#define TF_BITS2BYTES_64B_WORD_ALIGN(x) ((((x) + 63) >> 6) * 8) struct tf_set_global_cfg_input; struct tf_get_global_cfg_input; diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index ebe0fc34aa..a3b6afbc88 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -764,7 +764,8 @@ tf_set_tcam_entry(struct tf *tfp, return rc; } - if (dev->ops->tf_dev_set_tcam == NULL) { + if (dev->ops->tf_dev_set_tcam == NULL || + dev->ops->tf_dev_word_align == NULL) { rc = -EOPNOTSUPP; TFP_DRV_LOG(ERR, "%s: Operation not supported, rc:%s\n", @@ -778,7 +779,7 @@ tf_set_tcam_entry(struct tf *tfp, sparms.idx = parms->idx; sparms.key = parms->key; sparms.mask = parms->mask; - sparms.key_size = TF_BITS2BYTES_WORD_ALIGN(parms->key_sz_in_bits); + sparms.key_size = dev->ops->tf_dev_word_align(parms->key_sz_in_bits); sparms.result = parms->result; sparms.result_size = TF_BITS2BYTES_WORD_ALIGN(parms->result_sz_in_bits); @@ -796,10 +797,66 @@ tf_set_tcam_entry(struct tf *tfp, int tf_get_tcam_entry(struct tf *tfp __rte_unused, - struct tf_get_tcam_entry_parms *parms __rte_unused) + struct tf_get_tcam_entry_parms *parms) { + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + struct tf_tcam_get_parms gparms; + TF_CHECK_PARMS2(tfp, parms); - return -EOPNOTSUPP; + + memset(&gparms, 0, sizeof(struct tf_tcam_get_parms)); + + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + if (dev->ops->tf_dev_get_tcam == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "%s: Operation not supported, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + gparms.dir = parms->dir; + gparms.type = parms->tcam_tbl_type; + gparms.idx = parms->idx; + gparms.key = parms->key; + gparms.mask = parms->mask; + gparms.result = parms->result; + + rc = dev->ops->tf_dev_get_tcam(tfp, &gparms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM get failed, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + parms->key_sz_in_bits = gparms.key_size * 8; + parms->result_sz_in_bits = gparms.result_size * 8; + + return 0; } int diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index cbacc09ea5..4f4120c603 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -736,6 +736,18 @@ struct tf_dev_ops { * mailbox */ int (*tf_dev_get_mailbox)(void); + + /** + * Convert length in bit to length in byte and align to word. + * The word length depends on device type. + * + * [in] size + * Size in bit + * + * Returns + * Size in byte + */ + int (*tf_dev_word_align)(uint16_t size); }; /** diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index f6c8f5efd0..fbe92b7733 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -212,6 +212,10 @@ static int tf_dev_p4_get_mailbox(void) return TF_KONG_MB; } +static int tf_dev_p4_word_align(uint16_t size) +{ + return ((((size) + 31) >> 5) * 4); +} /** * Truflow P4 device specific functions @@ -250,6 +254,7 @@ const struct tf_dev_ops tf_dev_ops_p4_init = { .tf_dev_set_global_cfg = NULL, .tf_dev_get_global_cfg = NULL, .tf_dev_get_mailbox = tf_dev_p4_get_mailbox, + .tf_dev_word_align = NULL, }; /** @@ -289,4 +294,5 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_set_global_cfg = tf_global_cfg_set, .tf_dev_get_global_cfg = tf_global_cfg_get, .tf_dev_get_mailbox = tf_dev_p4_get_mailbox, + .tf_dev_word_align = tf_dev_p4_word_align, }; diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 6cef1d5ba5..688d987cb7 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -193,6 +193,11 @@ static int tf_dev_p58_get_mailbox(void) return TF_CHIMP_MB; } +static int tf_dev_p58_word_align(uint16_t size) +{ + return ((((size) + 63) >> 6) * 8); +} + /** * Truflow P58 device specific functions */ @@ -230,6 +235,7 @@ const struct tf_dev_ops tf_dev_ops_p58_init = { .tf_dev_set_global_cfg = NULL, .tf_dev_get_global_cfg = NULL, .tf_dev_get_mailbox = tf_dev_p58_get_mailbox, + .tf_dev_word_align = NULL, }; /** @@ -255,7 +261,7 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_free_tcam = tf_tcam_free, .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, .tf_dev_set_tcam = tf_tcam_set, - .tf_dev_get_tcam = NULL, + .tf_dev_get_tcam = tf_tcam_get, .tf_dev_insert_int_em_entry = tf_em_hash_insert_int_entry, .tf_dev_delete_int_em_entry = tf_em_hash_delete_int_entry, .tf_dev_insert_ext_em_entry = NULL, @@ -269,4 +275,5 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_set_global_cfg = tf_global_cfg_set, .tf_dev_get_global_cfg = tf_global_cfg_get, .tf_dev_get_mailbox = tf_dev_p58_get_mailbox, + .tf_dev_word_align = tf_dev_p58_word_align, }; diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index 39d7e3eace..1af5c6d11c 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -1212,6 +1212,58 @@ tf_msg_tcam_entry_set(struct tf *tfp, return rc; } +int +tf_msg_tcam_entry_get(struct tf *tfp, + struct tf_dev_info *dev, + struct tf_tcam_get_parms *parms) +{ + int rc; + struct tfp_send_msg_parms mparms = { 0 }; + struct hwrm_tf_tcam_get_input req = { 0 }; + struct hwrm_tf_tcam_get_output resp = { 0 }; + uint8_t fw_session_id; + + rc = tf_session_get_fw_session_id(tfp, &fw_session_id); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Unable to lookup FW id, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + /* Populate the request */ + req.fw_session_id = tfp_cpu_to_le_32(fw_session_id); + req.type = parms->hcapi_type; + req.idx = tfp_cpu_to_le_16(parms->idx); + if (parms->dir == TF_DIR_TX) + req.flags |= HWRM_TF_TCAM_GET_INPUT_FLAGS_DIR_TX; + + mparms.tf_type = HWRM_TF_TCAM_GET; + mparms.req_data = (uint32_t *)&req; + mparms.req_size = sizeof(req); + mparms.resp_data = (uint32_t *)&resp; + mparms.resp_size = sizeof(resp); + mparms.mailbox = dev->ops->tf_dev_get_mailbox(); + + rc = tfp_send_msg_direct(tfp, + &mparms); + + if (rc != 0) + return rc; + + if (mparms.tf_resp_code != 0) + return tfp_le_to_cpu_32(mparms.tf_resp_code); + + parms->key_size = resp.key_size; + parms->result_size = resp.result_size; + tfp_memcpy(parms->key, resp.dev_data, resp.key_size); + tfp_memcpy(parms->mask, &resp.dev_data[resp.key_size], resp.key_size); + tfp_memcpy(parms->result, &resp.dev_data[resp.result_offset], resp.result_size); + + return tfp_le_to_cpu_32(mparms.tf_resp_code); +} + int tf_msg_tcam_entry_free(struct tf *tfp, struct tf_dev_info *dev, diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h index 1d82ce5049..a14bcd3927 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.h +++ b/drivers/net/bnxt/tf_core/tf_msg.h @@ -412,6 +412,22 @@ int tf_msg_tcam_entry_set(struct tf *tfp, struct tf_dev_info *dev, struct tf_tcam_set_parms *parms); +/** + * Sends tcam entry 'get' to the Firmware. + * + * [in] tfp + * Pointer to session handle + * + * [in] parms + * Pointer to get parameters + * + * Returns: + * 0 on Success else internal Truflow error + */ +int tf_msg_tcam_entry_get(struct tf *tfp, + struct tf_dev_info *dev, + struct tf_tcam_get_parms *parms); + /** * Sends tcam entry 'free' to the Firmware. * diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index 038aa40e92..a18d0e1e19 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -686,7 +686,94 @@ tf_tcam_set(struct tf *tfp __rte_unused, int tf_tcam_get(struct tf *tfp __rte_unused, - struct tf_tcam_get_parms *parms __rte_unused) + struct tf_tcam_get_parms *parms) { + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + struct tf_rm_is_allocated_parms aparms; + struct tf_rm_get_hcapi_parms hparms; + uint16_t num_slice_per_row = 1; + int allocated = 0; + + TF_CHECK_PARMS2(tfp, parms); + + if (!init) { + TFP_DRV_LOG(ERR, + "%s: No TCAM DBs created\n", + tf_dir_2_str(parms->dir)); + return -EINVAL; + } + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + if (dev->ops->tf_dev_get_tcam_slice_info == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "%s: Operation not supported, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + /* Need to retrieve row size etc */ + rc = dev->ops->tf_dev_get_tcam_slice_info(tfp, + parms->type, + parms->key_size, + &num_slice_per_row); + if (rc) + return rc; + + /* Check if element is in use */ + memset(&aparms, 0, sizeof(aparms)); + + aparms.rm_db = tcam_db[parms->dir]; + aparms.db_index = parms->type; + aparms.index = parms->idx / num_slice_per_row; + aparms.allocated = &allocated; + rc = tf_rm_is_allocated(&aparms); + if (rc) + return rc; + + if (allocated != TF_RM_ALLOCATED_ENTRY_IN_USE) { + TFP_DRV_LOG(ERR, + "%s: Entry is not allocated, type:%d, index:%d\n", + tf_dir_2_str(parms->dir), + parms->type, + parms->idx); + return -EINVAL; + } + + /* Convert TF type to HCAPI RM type */ + memset(&hparms, 0, sizeof(hparms)); + + hparms.rm_db = tcam_db[parms->dir]; + hparms.db_index = parms->type; + hparms.hcapi_type = &parms->hcapi_type; + + rc = tf_rm_get_hcapi_type(&hparms); + if (rc) + return rc; + + rc = tf_msg_tcam_entry_get(tfp, dev, parms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: %s: Entry %d set failed, rc:%s", + tf_dir_2_str(parms->dir), + tf_tcam_tbl_2_str(parms->type), + parms->idx, + strerror(-rc)); + return rc; + } + return 0; } diff --git a/drivers/net/bnxt/tf_core/tf_tcam.h b/drivers/net/bnxt/tf_core/tf_tcam.h index 40d010b09a..b550fa43ca 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.h +++ b/drivers/net/bnxt/tf_core/tf_tcam.h @@ -207,6 +207,10 @@ struct tf_tcam_get_parms { * [in] Type of object to get */ enum tf_tcam_tbl_type type; + /** + * [in] Type of HCAPI + */ + uint16_t hcapi_type; /** * [in] Entry index to read */ From patchwork Sun Jun 13 00:06:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94104 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C0686A0C41; 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Sat, 12 Jun 2021 17:07:07 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Randy Schacher , Venkat Duvvuru , Peter Spreadborough Date: Sat, 12 Jun 2021 17:06:02 -0700 Message-Id: <20210613000652.28191-9-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 08/58] net/bnxt: add action SRAM translation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith - Translate Truflow action types for Thor to HCAPI RM resource defined SRAM banks. - move module type enum definitions to tf_core API - Switch to subtype concept for RM. - alloc/free working for Thor SRAM table type for full AR. Signed-off-by: Farah Smith Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Peter Spreadborough Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt_util.h | 3 + drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h | 339 +++------ drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h | 387 +--------- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h | 411 ++++++++++ drivers/net/bnxt/tf_core/meson.build | 1 - drivers/net/bnxt/tf_core/tf_core.h | 24 + drivers/net/bnxt/tf_core/tf_device.c | 43 +- drivers/net/bnxt/tf_core/tf_device.h | 23 - drivers/net/bnxt/tf_core/tf_device_p4.c | 21 +- drivers/net/bnxt/tf_core/tf_device_p58.c | 53 +- drivers/net/bnxt/tf_core/tf_device_p58.h | 110 ++- drivers/net/bnxt/tf_core/tf_em_common.c | 4 +- drivers/net/bnxt/tf_core/tf_em_host.c | 6 +- drivers/net/bnxt/tf_core/tf_em_internal.c | 4 +- drivers/net/bnxt/tf_core/tf_identifier.c | 10 +- drivers/net/bnxt/tf_core/tf_if_tbl.c | 2 +- drivers/net/bnxt/tf_core/tf_rm.c | 508 ++++++++----- drivers/net/bnxt/tf_core/tf_rm.h | 109 ++- drivers/net/bnxt/tf_core/tf_shadow_tbl.c | 783 -------------------- drivers/net/bnxt/tf_core/tf_shadow_tbl.h | 256 ------- drivers/net/bnxt/tf_core/tf_tbl.c | 238 +----- drivers/net/bnxt/tf_core/tf_tcam.c | 20 +- drivers/net/bnxt/tf_core/tf_util.c | 36 +- drivers/net/bnxt/tf_core/tf_util.h | 26 +- 24 files changed, 1130 insertions(+), 2287 deletions(-) create mode 100644 drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h delete mode 100644 drivers/net/bnxt/tf_core/tf_shadow_tbl.c delete mode 100644 drivers/net/bnxt/tf_core/tf_shadow_tbl.h diff --git a/drivers/net/bnxt/bnxt_util.h b/drivers/net/bnxt/bnxt_util.h index 64e97eed15..b243c21ec2 100644 --- a/drivers/net/bnxt/bnxt_util.h +++ b/drivers/net/bnxt/bnxt_util.h @@ -9,6 +9,9 @@ #ifndef BIT #define BIT(n) (1UL << (n)) #endif /* BIT */ +#ifndef BIT_MASK +#define BIT_MASK(len) (BIT(len) - 1) +#endif /* BIT_MASK */ #define PCI_SUBSYSTEM_ID_OFFSET 0x2e diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h index b8c85a0fca..c67aa29ad0 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h @@ -1,281 +1,126 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom - * All rights reserved. +/* + * Copyright(c) Broadcom Limited. + * All rights reserved. */ +/*! + * \file + * \brief Exported functions for CFA HW programming + */ #ifndef _HCAPI_CFA_H_ #define _HCAPI_CFA_H_ #include +#include #include #include #include #include +#include #include "hcapi_cfa_defs.h" -/** - * Index used for the sram_entries field - */ -enum hcapi_cfa_resc_type_sram { - HCAPI_CFA_RESC_TYPE_SRAM_FULL_ACTION, - HCAPI_CFA_RESC_TYPE_SRAM_MCG, - HCAPI_CFA_RESC_TYPE_SRAM_ENCAP_8B, - HCAPI_CFA_RESC_TYPE_SRAM_ENCAP_16B, - HCAPI_CFA_RESC_TYPE_SRAM_ENCAP_64B, - HCAPI_CFA_RESC_TYPE_SRAM_SP_SMAC, - HCAPI_CFA_RESC_TYPE_SRAM_SP_SMAC_IPV4, - HCAPI_CFA_RESC_TYPE_SRAM_SP_SMAC_IPV6, - HCAPI_CFA_RESC_TYPE_SRAM_COUNTER_64B, - HCAPI_CFA_RESC_TYPE_SRAM_NAT_SPORT, - HCAPI_CFA_RESC_TYPE_SRAM_NAT_DPORT, - HCAPI_CFA_RESC_TYPE_SRAM_NAT_S_IPV4, - HCAPI_CFA_RESC_TYPE_SRAM_NAT_D_IPV4, - HCAPI_CFA_RESC_TYPE_SRAM_MAX -}; - -/** - * Index used for the hw_entries field in struct cfa_rm_db - */ -enum hcapi_cfa_resc_type_hw { - /* common HW resources for all chip variants */ - HCAPI_CFA_RESC_TYPE_HW_L2_CTXT_TCAM, - HCAPI_CFA_RESC_TYPE_HW_PROF_FUNC, - HCAPI_CFA_RESC_TYPE_HW_PROF_TCAM, - HCAPI_CFA_RESC_TYPE_HW_EM_PROF_ID, - HCAPI_CFA_RESC_TYPE_HW_EM_REC, - HCAPI_CFA_RESC_TYPE_HW_WC_TCAM_PROF_ID, - HCAPI_CFA_RESC_TYPE_HW_WC_TCAM, - HCAPI_CFA_RESC_TYPE_HW_METER_PROF, - HCAPI_CFA_RESC_TYPE_HW_METER_INST, - HCAPI_CFA_RESC_TYPE_HW_MIRROR, - HCAPI_CFA_RESC_TYPE_HW_UPAR, - /* Wh+/SR specific HW resources */ - HCAPI_CFA_RESC_TYPE_HW_SP_TCAM, - /* Thor, SR2 common HW resources */ - HCAPI_CFA_RESC_TYPE_HW_FKB, - /* SR specific HW resources */ - HCAPI_CFA_RESC_TYPE_HW_TBL_SCOPE, - HCAPI_CFA_RESC_TYPE_HW_L2_FUNC, - HCAPI_CFA_RESC_TYPE_HW_EPOCH0, - HCAPI_CFA_RESC_TYPE_HW_EPOCH1, - HCAPI_CFA_RESC_TYPE_HW_METADATA, - HCAPI_CFA_RESC_TYPE_HW_CT_STATE, - HCAPI_CFA_RESC_TYPE_HW_RANGE_PROF, - HCAPI_CFA_RESC_TYPE_HW_RANGE_ENTRY, - HCAPI_CFA_RESC_TYPE_HW_LAG_ENTRY, - HCAPI_CFA_RESC_TYPE_HW_MAX -}; - -struct hcapi_cfa_key_result { - uint64_t bucket_mem_ptr; - uint8_t bucket_idx; -}; - -/* common CFA register access macros */ -#define CFA_REG(x) OFFSETOF(cfa_reg_t, cfa_##x) - -#ifndef TF_REG_WR -#define TF_REG_WR(_p, x, y) (*((uint32_t volatile *)(x)) = (y)) -#endif -#ifndef TF_REG_RD -#define TF_REG_RD(_p, x) (*((uint32_t volatile *)(x))) -#endif -#ifndef TF_CFA_REG_RD -#define TF_CFA_REG_RD(_p, x) \ - TF_REG_RD(0, (uint32_t)(_p)->base_addr + CFA_REG(x)) -#endif -#ifndef TF_CFA_REG_WR -#define TF_CFA_REG_WR(_p, x, y) \ - TF_REG_WR(0, (uint32_t)(_p)->base_addr + CFA_REG(x), y) -#endif +#define INVALID_U64 (0xFFFFFFFFFFFFFFFFULL) +#define INVALID_U32 (0xFFFFFFFFUL) +#define INVALID_U16 (0xFFFFUL) +#define INVALID_U8 (0xFFUL) -/* Constants used by Resource Manager Registration*/ -#define RM_CLIENT_NAME_MAX_LEN 32 +struct hcapi_cfa_devops; /** - * Resource Manager Data Structures used for resource requests + * CFA device information */ -struct hcapi_cfa_resc_req_entry { - uint16_t min; - uint16_t max; -}; - -struct hcapi_cfa_resc_req { - /* Wh+/SR specific onchip Action SRAM resources */ - /* Validity of each sram type is indicated by the - * corresponding sram type bit in the sram_resc_flags. When - * set to 1, the CFA sram resource type is valid and amount of - * resources for this type is reserved. Each sram resource - * pool is identified by the starting index and number of - * resources in the pool. - */ - uint32_t sram_resc_flags; - struct hcapi_cfa_resc_req_entry sram_resc[HCAPI_CFA_RESC_TYPE_SRAM_MAX]; - - /* Validity of each resource type is indicated by the - * corresponding resource type bit in the hw_resc_flags. When - * set to 1, the CFA resource type is valid and amount of - * resource of this type is reserved. Each resource pool is - * identified by the starting index and the number of - * resources in the pool. - */ - uint32_t hw_resc_flags; - struct hcapi_cfa_resc_req_entry hw_resc[HCAPI_CFA_RESC_TYPE_HW_MAX]; -}; - -struct hcapi_cfa_resc_req_db { - struct hcapi_cfa_resc_req rx; - struct hcapi_cfa_resc_req tx; -}; - -struct hcapi_cfa_resc_entry { - uint16_t start; - uint16_t stride; - uint16_t tag; -}; - -struct hcapi_cfa_resc { - /* Wh+/SR specific onchip Action SRAM resources */ - /* Validity of each sram type is indicated by the - * corresponding sram type bit in the sram_resc_flags. When - * set to 1, the CFA sram resource type is valid and amount of - * resources for this type is reserved. Each sram resource - * pool is identified by the starting index and number of - * resources in the pool. - */ - uint32_t sram_resc_flags; - struct hcapi_cfa_resc_entry sram_resc[HCAPI_CFA_RESC_TYPE_SRAM_MAX]; - - /* Validity of each resource type is indicated by the - * corresponding resource type bit in the hw_resc_flags. When - * set to 1, the CFA resource type is valid and amount of - * resource of this type is reserved. Each resource pool is - * identified by the starting index and the number of resources - * in the pool. - */ - uint32_t hw_resc_flags; - struct hcapi_cfa_resc_entry hw_resc[HCAPI_CFA_RESC_TYPE_HW_MAX]; -}; - -struct hcapi_cfa_resc_db { - struct hcapi_cfa_resc rx; - struct hcapi_cfa_resc tx; +struct hcapi_cfa_devinfo { + /** [out] CFA device ops function pointer table */ + const struct hcapi_cfa_devops *devops; }; /** - * This is the main data structure used by the CFA Resource - * Manager. This data structure holds all the state and table - * management information. + * \defgroup CFA_HCAPI_DEVICE_API + * HCAPI used for writing to the hardware + * @{ */ -typedef struct hcapi_cfa_rm_data { - uint32_t dummy_data; -} hcapi_cfa_rm_data_t; - -/* End RM support */ - -struct hcapi_cfa_devops; - -struct hcapi_cfa_devinfo { - uint8_t global_cfg_data[CFA_GLOBAL_CFG_DATA_SZ]; - struct hcapi_cfa_layout_tbl layouts; - struct hcapi_cfa_devops *devops; -}; - -int hcapi_cfa_dev_bind(enum hcapi_cfa_ver hw_ver, - struct hcapi_cfa_devinfo *dev_info); - -int hcapi_cfa_key_compile_layout(struct hcapi_cfa_key_template *key_template, - struct hcapi_cfa_key_layout *key_layout); -uint64_t hcapi_cfa_key_hash(uint64_t *key_data, uint16_t bitlen); -int -hcapi_cfa_action_compile_layout(struct hcapi_cfa_action_template *act_template, - struct hcapi_cfa_action_layout *act_layout); -int hcapi_cfa_action_init_obj(uint64_t *act_obj, - struct hcapi_cfa_action_layout *act_layout); -int hcapi_cfa_action_compute_ptr(uint64_t *act_obj, - struct hcapi_cfa_action_layout *act_layout, - uint32_t base_ptr); - -int hcapi_cfa_action_hw_op(struct hcapi_cfa_hwop *op, - uint8_t *act_tbl, - struct hcapi_cfa_data *act_obj); -int hcapi_cfa_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_rm_register_client(hcapi_cfa_rm_data_t *data, - const char *client_name, - int *client_id); -int hcapi_cfa_rm_unregister_client(hcapi_cfa_rm_data_t *data, - int client_id); -int hcapi_cfa_rm_query_resources(hcapi_cfa_rm_data_t *data, - int client_id, - uint16_t chnl_id, - struct hcapi_cfa_resc_req_db *req_db); -int hcapi_cfa_rm_query_resources_one(hcapi_cfa_rm_data_t *data, - int clien_id, - struct hcapi_cfa_resc_db *resc_db); -int hcapi_cfa_rm_reserve_resources(hcapi_cfa_rm_data_t *data, - int client_id, - struct hcapi_cfa_resc_req_db *resc_req, - struct hcapi_cfa_resc_db *resc_db); -int hcapi_cfa_rm_release_resources(hcapi_cfa_rm_data_t *data, - int client_id, - struct hcapi_cfa_resc_req_db *resc_req, - struct hcapi_cfa_resc_db *resc_db); -int hcapi_cfa_rm_initialize(hcapi_cfa_rm_data_t *data); -#if SUPPORT_CFA_HW_P4 - -int hcapi_cfa_p4_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_prof_l2ctxt_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_prof_l2ctxtrmp_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_prof_tcam_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_prof_tcamrmp_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_wc_tcam_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_wc_tcam_rec_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_mirror_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *mirror); -int hcapi_cfa_p4_global_cfg_hwop(struct hcapi_cfa_hwop *op, - uint32_t type, - struct hcapi_cfa_data *config); -/* SUPPORT_CFA_HW_P4 */ -#elif SUPPORT_CFA_HW_P45 -int hcapi_cfa_p45_mirror_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *mirror); -int hcapi_cfa_p45_global_cfg_hwop(struct hcapi_cfa_hwop *op, - uint32_t type, - struct hcapi_cfa_data *config); -/* SUPPORT_CFA_HW_P45 */ -#endif -/** - * HCAPI CFA device HW operation function callback definition - * This is standardized function callback hook to install different - * CFA HW table programming function callback. +/** CFA device specific function hooks structure + * + * The following device hooks can be defined; unless noted otherwise, they are + * optional and can be filled with a null pointer. The pupose of these hooks + * to support CFA device operations for different device variants. */ +struct hcapi_cfa_devops { + /** calculate a key hash for the provided key_data + * + * This API computes hash for a key. + * + * @param[in] key_data + * A pointer of the key data buffer + * + * @param[in] bitlen + * Number of bits of the key data + * + * @return + * 0 for SUCCESS, negative value for FAILURE + */ + uint64_t (*hcapi_cfa_key_hash)(uint64_t *key_data, uint16_t bitlen); -struct hcapi_cfa_tbl_cb { - /** - * This function callback provides the functionality to read/write - * HW table entry from a HW table. + /** hardware operation on the CFA EM key + * + * This API provides the functionality to program the exact match and + * key data to exact match record memory. * * @param[in] op * A pointer to the Hardware operation parameter * - * @param[in] obj_data - * A pointer to the HW data object for the hardware operation + * @param[in] key_tbl + * A pointer to the off-chip EM key table (applicable to EEM and + * SR2 EM only), set to NULL for on-chip EM key table or WC + * TCAM table. * + * @param[in/out] key_obj + * A pointer to the key data object for the hardware operation which + * has the following contents: + * 1. key record memory offset (index to WC TCAM or EM key hash + * value) + * 2. key data + * When using the HWOP PUT, the key_obj holds the LREC and key to + * be written. + * When using the HWOP GET, the key_obj be populated with the LREC + * and key which was specified by the key location object. + * + * @param[in/out] key_loc + * When using the HWOP PUT, this is a pointer to the key location + * data structure which holds the information of where the EM key + * is stored. It holds the bucket index and the data pointer of + * a dynamic bucket that is chained to static bucket + * When using the HWOP GET, this is a pointer to the key location + * which should be retreved. + * + * (valid for SR2 only). * @return * 0 for SUCCESS, negative value for FAILURE */ - int (*hwop_cb)(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); + int (*hcapi_cfa_key_hw_op)(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_key_tbl *key_tbl, + struct hcapi_cfa_key_data *key_data, + struct hcapi_cfa_key_loc *key_loc); }; -#endif /* HCAPI_CFA_H_ */ +/*@}*/ + +extern const size_t CFA_RM_HANDLE_DATA_SIZE; + +#if SUPPORT_CFA_HW_ALL +extern const struct hcapi_cfa_devops cfa_p4_devops; +extern const struct hcapi_cfa_devops cfa_p58_devops; + +#elif defined(SUPPORT_CFA_HW_P4) && SUPPORT_CFA_HW_P4 +extern const struct hcapi_cfa_devops cfa_p4_devops; +uint64_t hcapi_cfa_p4_key_hash(uint64_t *key_data, uint16_t bitlen); +/* SUPPORT_CFA_HW_P4 */ +#elif defined(SUPPORT_CFA_HW_P58) && SUPPORT_CFA_HW_P58 +extern const struct hcapi_cfa_devops cfa_p58_devops; +uint64_t hcapi_cfa_p58_key_hash(uint64_t *key_data, uint16_t bitlen); +/* SUPPORT_CFA_HW_P58 */ +#endif + +#endif /* HCAPI_CFA_H_ */ diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h index 08f098ec86..8e5095a6ef 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h @@ -30,12 +30,10 @@ #define CFA_GLOBAL_CFG_DATA_SZ (100) +#if SUPPORT_CFA_HW_ALL #include "hcapi_cfa_p4.h" -#define CFA_PROF_L2CTXT_TCAM_MAX_FIELD_CNT CFA_P40_PROF_L2_CTXT_TCAM_MAX_FLD -#define CFA_PROF_L2CTXT_REMAP_MAX_FIELD_CNT CFA_P40_PROF_L2_CTXT_RMP_DR_MAX_FLD -#define CFA_PROF_MAX_KEY_CFG_SZ sizeof(struct cfa_p4_prof_key_cfg) -#define CFA_KEY_MAX_FIELD_CNT 41 -#define CFA_ACT_MAX_TEMPLATE_SZ sizeof(struct cfa_p4_action_template) +#include "hcapi_cfa_p58.h" +#endif /* SUPPORT_CFA_HW_ALL */ /** * CFA HW version definition @@ -87,43 +85,6 @@ enum hcapi_cfa_key_ctrlops { HCAPI_CFA_KEY_CTRLOPS_MAX }; -/** - * CFA HW field structure definition - */ -struct hcapi_cfa_field { - /** [in] Starting bit position pf the HW field within a HW table - * entry. - */ - uint16_t bitpos; - /** [in] Number of bits for the HW field. */ - uint8_t bitlen; -}; - -/** - * CFA HW table entry layout structure definition - */ -struct hcapi_cfa_layout { - /** [out] Bit order of layout */ - bool is_msb_order; - /** [out] Size in bits of entry */ - uint32_t total_sz_in_bits; - /** [out] data pointer of the HW layout fields array */ - const struct hcapi_cfa_field *field_array; - /** [out] number of HW field entries in the HW layout field array */ - uint32_t array_sz; - /** [out] layout_id - layout id associated with the layout */ - uint16_t layout_id; -}; - -/** - * CFA HW data object definition - */ -struct hcapi_cfa_data_obj { - /** [in] HW field identifier. Used as an index to a HW table layout */ - uint16_t field_id; - /** [in] Value of the HW field */ - uint64_t val; -}; /** * CFA HW definition @@ -280,348 +241,6 @@ struct hcapi_cfa_key_loc { uint8_t bucket_idx; }; -/** - * CFA HW layout table definition - */ -struct hcapi_cfa_layout_tbl { - /** [out] data pointer to an array of fix formatted layouts supported. - * The index to the array is the CFA HW table ID - */ - const struct hcapi_cfa_layout *tbl; - /** [out] number of fix formatted layouts in the layout array */ - uint16_t num_layouts; -}; - -/** - * Key template consists of key fields that can be enabled/disabled - * individually. - */ -struct hcapi_cfa_key_template { - /** [in] key field enable field array, set 1 to the correspeonding - * field enable to make a field valid - */ - uint8_t field_en[CFA_KEY_MAX_FIELD_CNT]; - /** [in] Identified if the key template is for TCAM. If false, the - * the key template is for EM. This field is mandantory for device that - * only support fix key formats. - */ - bool is_wc_tcam_key; -}; - -/** - * key layout consist of field array, key bitlen, key ID, and other meta data - * pertain to a key - */ -struct hcapi_cfa_key_layout { - /** [out] key layout data */ - struct hcapi_cfa_layout *layout; - /** [out] actual key size in number of bits */ - uint16_t bitlen; - /** [out] key identifier and this field is only valid for device - * that supports fix key formats - */ - uint16_t id; - /** [out] Identified the key layout is WC TCAM key */ - bool is_wc_tcam_key; - /** [out] total slices size, valid for WC TCAM key only. It can be - * used by the user to determine the total size of WC TCAM key slices - * in bytes. - */ - uint16_t slices_size; -}; - -/** - * key layout memory contents - */ -struct hcapi_cfa_key_layout_contents { - /** key layouts */ - struct hcapi_cfa_key_layout key_layout; - - /** layout */ - struct hcapi_cfa_layout layout; - - /** fields */ - struct hcapi_cfa_field field_array[CFA_KEY_MAX_FIELD_CNT]; -}; - -/** - * Action template consists of action fields that can be enabled/disabled - * individually. - */ -struct hcapi_cfa_action_template { - /** [in] CFA version for the action template */ - enum hcapi_cfa_ver hw_ver; - /** [in] action field enable field array, set 1 to the correspeonding - * field enable to make a field valid - */ - uint8_t data[CFA_ACT_MAX_TEMPLATE_SZ]; -}; - -/** - * action layout consist of field array, action wordlen and action format ID - */ -struct hcapi_cfa_action_layout { - /** [in] action identifier */ - uint16_t id; - /** [out] action layout data */ - struct hcapi_cfa_layout *layout; - /** [out] actual action record size in number of bits */ - uint16_t wordlen; -}; - -/** - * \defgroup CFA_HCAPI_PUT_API - * HCAPI used for writing to the hardware - * @{ - */ - -/** - * This API provides the functionality to program a specified value to a - * HW field based on the provided programming layout. - * - * @param[in,out] obj_data - * A data pointer to a CFA HW key/mask data - * - * @param[in] layout - * A pointer to CFA HW programming layout - * - * @param[in] field_id - * ID of the HW field to be programmed - * - * @param[in] val - * Value of the HW field to be programmed - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int hcapi_cfa_put_field(uint64_t *data_buf, - const struct hcapi_cfa_layout *layout, - uint16_t field_id, uint64_t val); - -/** - * This API provides the functionality to program an array of field values - * with corresponding field IDs to a number of profiler sub-block fields - * based on the fixed profiler sub-block hardware programming layout. - * - * @param[in, out] obj_data - * A pointer to a CFA profiler key/mask object data - * - * @param[in] layout - * A pointer to CFA HW programming layout - * - * @param[in] field_tbl - * A pointer to an array that consists of the object field - * ID/value pairs - * - * @param[in] field_tbl_sz - * Number of entries in the table - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int hcapi_cfa_put_fields(uint64_t *obj_data, - const struct hcapi_cfa_layout *layout, - struct hcapi_cfa_data_obj *field_tbl, - uint16_t field_tbl_sz); - -/** - * This API provides the functionality to write a value to a - * field within the bit position and bit length of a HW data - * object based on a provided programming layout. - * - * @param[in, out] act_obj - * A pointer of the action object to be initialized - * - * @param[in] layout - * A pointer of the programming layout - * - * @param field_id - * [in] Identifier of the HW field - * - * @param[in] bitpos_adj - * Bit position adjustment value - * - * @param[in] bitlen_adj - * Bit length adjustment value - * - * @param[in] val - * HW field value to be programmed - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int hcapi_cfa_put_field_rel(uint64_t *obj_data, - const struct hcapi_cfa_layout *layout, - uint16_t field_id, int16_t bitpos_adj, - int16_t bitlen_adj, uint64_t val); - -/*@}*/ - -/** - * \defgroup CFA_HCAPI_GET_API - * HCAPI used for writing to the hardware - * @{ - */ - -/** - * This API provides the functionality to get the word length of - * a layout object. - * - * @param[in] layout - * A pointer of the HW layout - * - * @return - * Word length of the layout object - */ -uint16_t hcapi_cfa_get_wordlen(const struct hcapi_cfa_layout *layout); - -/** - * The API provides the functionality to get bit offset and bit - * length information of a field from a programming layout. - * - * @param[in] layout - * A pointer of the action layout - * - * @param[out] slice - * A pointer to the action offset info data structure - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int hcapi_cfa_get_slice(const struct hcapi_cfa_layout *layout, - uint16_t field_id, struct hcapi_cfa_field *slice); - -/** - * This API provides the functionality to read the value of a - * CFA HW field from CFA HW data object based on the hardware - * programming layout. - * - * @param[in] obj_data - * A pointer to a CFA HW key/mask object data - * - * @param[in] layout - * A pointer to CFA HW programming layout - * - * @param[in] field_id - * ID of the HW field to be programmed - * - * @param[out] val - * Value of the HW field - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int hcapi_cfa_get_field(uint64_t *obj_data, - const struct hcapi_cfa_layout *layout, - uint16_t field_id, uint64_t *val); - -/** - * This API provides the functionality to read a number of - * HW fields from a CFA HW data object based on the hardware - * programming layout. - * - * @param[in] obj_data - * A pointer to a CFA profiler key/mask object data - * - * @param[in] layout - * A pointer to CFA HW programming layout - * - * @param[in, out] field_tbl - * A pointer to an array that consists of the object field - * ID/value pairs - * - * @param[in] field_tbl_sz - * Number of entries in the table - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int hcapi_cfa_get_fields(uint64_t *obj_data, - const struct hcapi_cfa_layout *layout, - struct hcapi_cfa_data_obj *field_tbl, - uint16_t field_tbl_sz); - -/** - * Get a value to a specific location relative to a HW field - * - * This API provides the functionality to read HW field from - * a section of a HW data object identified by the bit position - * and bit length from a given programming layout in order to avoid - * reading the entire HW data object. - * - * @param[in] obj_data - * A pointer of the data object to read from - * - * @param[in] layout - * A pointer of the programming layout - * - * @param[in] field_id - * Identifier of the HW field - * - * @param[in] bitpos_adj - * Bit position adjustment value - * - * @param[in] bitlen_adj - * Bit length adjustment value - * - * @param[out] val - * Value of the HW field - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int hcapi_cfa_get_field_rel(uint64_t *obj_data, - const struct hcapi_cfa_layout *layout, - uint16_t field_id, int16_t bitpos_adj, - int16_t bitlen_adj, uint64_t *val); - -/** - * This function is used to initialize a layout_contents structure - * - * The struct hcapi_cfa_key_layout is complex as there are three - * layers of abstraction. Each of those layer need to be properly - * initialized. - * - * @param[in] layout_contents - * A pointer of the layout contents to initialize - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int -hcapi_cfa_init_key_layout_contents(struct hcapi_cfa_key_layout_contents *cont); - -/** - * This function is used to validate a key template - * - * The struct hcapi_cfa_key_template is complex as there are three - * layers of abstraction. Each of those layer need to be properly - * validated. - * - * @param[in] key_template - * A pointer of the key template contents to validate - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int -hcapi_cfa_is_valid_key_template(struct hcapi_cfa_key_template *key_template); - -/** - * This function is used to validate a key layout - * - * The struct hcapi_cfa_key_layout is complex as there are three - * layers of abstraction. Each of those layer need to be properly - * validated. - * - * @param[in] key_layout - * A pointer of the key layout contents to validate - * - * @return - * 0 for SUCCESS, negative value for FAILURE - */ -int hcapi_cfa_is_valid_key_layout(struct hcapi_cfa_key_layout *key_layout); - /** * This function is used to hash E/EM keys * diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h new file mode 100644 index 0000000000..b2535098d2 --- /dev/null +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h @@ -0,0 +1,411 @@ +/* + * Copyright(c) Broadcom Limited. + * All rights reserved. + */ + +#ifndef _HCAPI_CFA_P58_H_ +#define _HCAPI_CFA_P58_H_ + +/** CFA phase 5.8 fix formatted table(layout) ID definition + * + */ +enum cfa_p58_tbl_id { + CFA_P58_TBL_ILT = 0, + CFA_P58_TBL_L2CTXT_TCAM, + CFA_P58_TBL_L2CTXT_REMAP, + CFA_P58_TBL_PROF_TCAM, + CFA_P58_TBL_PROF_TCAM_REMAP, + CFA_P58_TBL_WC_TCAM, + CFA_P58_TBL_WC_TCAM_REC, + CFA_P58_TBL_VEB_TCAM, + CFA_P58_TBL_SP_TCAM, + /** Default Profile TCAM/Lookup Action Record Pointer Table */ + CFA_P58_TBL_PROF_PARIF_DFLT_ACT_REC_PTR, + /** Error Profile TCAM Miss Action Record Pointer Table */ + CFA_P58_TBL_PROF_PARIF_ERR_ACT_REC_PTR, + /** SR2 VNIC/SVIF Properties Table */ + CFA_P58_TBL_VSPT, + CFA_P58_TBL_MAX +}; + +#define CFA_P58_PROF_MAX_KEYS 4 +enum cfa_p58_mac_sel_mode { + CFA_P58_MAC_SEL_MODE_FIRST = 0, + CFA_P58_MAC_SEL_MODE_LOWEST = 1, +}; + +struct cfa_p58_prof_key_cfg { + uint8_t mac_sel[CFA_P58_PROF_MAX_KEYS]; +#define CFA_P58_PROF_MAC_SEL_DMAC0 (1 << 0) +#define CFA_P58_PROF_MAC_SEL_T_MAC0 (1 << 1) +#define CFA_P58_PROF_MAC_SEL_OUTERMOST_MAC0 (1 << 2) +#define CFA_P58_PROF_MAC_SEL_DMAC1 (1 << 3) +#define CFA_P58_PROF_MAC_SEL_T_MAC1 (1 << 4) +#define CFA_P58_PROF_MAC_OUTERMOST_MAC1 (1 << 5) + uint8_t vlan_sel[CFA_P58_PROF_MAX_KEYS]; +#define CFA_P58_PROFILER_VLAN_SEL_INNER_HDR 0 +#define CFA_P58_PROFILER_VLAN_SEL_TUNNEL_HDR 1 +#define CFA_P58_PROFILER_VLAN_SEL_OUTERMOST_HDR 2 + uint8_t pass_cnt; + enum cfa_p58_mac_sel_mode mode; +}; + +/** + * CFA action layout definition + */ + +#define CFA_P58_ACTION_MAX_LAYOUT_SIZE 184 + +/** + * Action object template structure + * + * Template structure presents data fields that are necessary to know + * at the beginning of Action Builder (AB) processing. Like before the + * AB compilation. One such example could be a template that is + * flexible in size (Encap Record) and the presence of these fields + * allows for determining the template size as well as where the + * fields are located in the record. + * + * The template may also present fields that are not made visible to + * the caller by way of the action fields. + * + * Template fields also allow for additional checking on user visible + * fields. One such example could be the encap pointer behavior on a + * CFA_P58_ACT_OBJ_TYPE_ACT or CFA_P58_ACT_OBJ_TYPE_ACT_SRAM. + */ +struct cfa_p58_action_template { + /** Action Object type + * + * Controls the type of the Action Template + */ + enum { + /** Select this type to build an Action Record Object + */ + CFA_P58_ACT_OBJ_TYPE_ACT, + /** Select this type to build an Action Statistics + * Object + */ + CFA_P58_ACT_OBJ_TYPE_STAT, + /** Select this type to build a SRAM Action Record + * Object. + */ + CFA_P58_ACT_OBJ_TYPE_ACT_SRAM, + /** Select this type to build a SRAM Action + * Encapsulation Object. + */ + CFA_P58_ACT_OBJ_TYPE_ENCAP_SRAM, + /** Select this type to build a SRAM Action Modify + * Object, with IPv4 capability. + */ + /* In case of Stingray the term Modify is used for the 'NAT + * action'. Action builder is leveraged to fill in the NAT + * object which then can be referenced by the action + * record. + */ + CFA_P58_ACT_OBJ_TYPE_MODIFY_IPV4_SRAM, + /** Select this type to build a SRAM Action Source + * Property Object. + */ + /* In case of Stingray this is not a 'pure' action record. + * Action builder is leveraged to full in the Source Property + * object which can then be referenced by the action + * record. + */ + CFA_P58_ACT_OBJ_TYPE_SRC_PROP_SRAM, + /** Select this type to build a SRAM Action Statistics + * Object + */ + CFA_P58_ACT_OBJ_TYPE_STAT_SRAM, + } obj_type; + + /** Action Control + * + * Controls the internals of the Action Template + * + * act is valid when: + * (obj_type == CFA_P58_ACT_OBJ_TYPE_ACT) + */ + /* + * Stat and encap are always inline for EEM as table scope + * allocation does not allow for separate Stats allocation, + * but has the xx_inline flags as to be forward compatible + * with Stingray 2, always treated as TRUE. + */ + struct { + /** Set to CFA_HCAPI_TRUE to enable statistics + */ + uint8_t stat_enable; + /** Set to CFA_HCAPI_TRUE to enable statistics to be inlined + */ + uint8_t stat_inline; + + /** Set to CFA_HCAPI_TRUE to enable encapsulation + */ + uint8_t encap_enable; + /** Set to CFA_HCAPI_TRUE to enable encapsulation to be inlined + */ + uint8_t encap_inline; + } act; + + /** Modify Setting + * + * Controls the type of the Modify Action the template is + * describing + * + * modify is valid when: + * (obj_type == CFA_P58_ACT_OBJ_TYPE_MODIFY_SRAM) + */ + enum { + /** Set to enable Modify of Source IPv4 Address + */ + CFA_P58_MR_REPLACE_SOURCE_IPV4 = 0, + /** Set to enable Modify of Destination IPv4 Address + */ + CFA_P58_MR_REPLACE_DEST_IPV4 + } modify; + + /** Encap Control + * Controls the type of encapsulation the template is + * describing + * + * encap is valid when: + * ((obj_type == CFA_P58_ACT_OBJ_TYPE_ACT) && + * act.encap_enable) || + * ((obj_type == CFA_P58_ACT_OBJ_TYPE_SRC_PROP_SRAM) + */ + struct { + /* Direction is required as Stingray Encap on RX is + * limited to l2 and VTAG only. + */ + /** Receive or Transmit direction + */ + uint8_t direction; + /** Set to CFA_HCAPI_TRUE to enable L2 capability in the + * template + */ + uint8_t l2_enable; + /** vtag controls the Encap Vector - VTAG Encoding, 4 bits + * + *
    + *
  • CFA_P58_ACT_ENCAP_VTAGS_PUSH_0, default, no VLAN + * Tags applied + *
  • CFA_P58_ACT_ENCAP_VTAGS_PUSH_1, adds capability to + * set 1 VLAN Tag. Action Template compile adds + * the following field to the action object + * ::TF_ER_VLAN1 + *
  • CFA_P58_ACT_ENCAP_VTAGS_PUSH_2, adds capability to + * set 2 VLAN Tags. Action Template compile adds + * the following fields to the action object + * ::TF_ER_VLAN1 and ::TF_ER_VLAN2 + *
+ */ + enum { CFA_P58_ACT_ENCAP_VTAGS_PUSH_0 = 0, + CFA_P58_ACT_ENCAP_VTAGS_PUSH_1, + CFA_P58_ACT_ENCAP_VTAGS_PUSH_2 } vtag; + + /* + * The remaining fields are NOT supported when + * direction is RX and ((obj_type == + * CFA_P58_ACT_OBJ_TYPE_ACT) && act.encap_enable). + * ab_compile_layout will perform the checking and + * skip remaining fields. + */ + /** L3 Encap controls the Encap Vector - L3 Encoding, + * 3 bits. Defines the type of L3 Encapsulation the + * template is describing. + *
    + *
  • CFA_P58_ACT_ENCAP_L3_NONE, default, no L3 + * Encapsulation processing. + *
  • CFA_P58_ACT_ENCAP_L3_IPV4, enables L3 IPv4 + * Encapsulation. + *
  • CFA_P58_ACT_ENCAP_L3_IPV6, enables L3 IPv6 + * Encapsulation. + *
  • CFA_P58_ACT_ENCAP_L3_MPLS_8847, enables L3 MPLS + * 8847 Encapsulation. + *
  • CFA_P58_ACT_ENCAP_L3_MPLS_8848, enables L3 MPLS + * 8848 Encapsulation. + *
+ */ + enum { + /** Set to disable any L3 encapsulation + * processing, default + */ + CFA_P58_ACT_ENCAP_L3_NONE = 0, + /** Set to enable L3 IPv4 encapsulation + */ + CFA_P58_ACT_ENCAP_L3_IPV4 = 4, + /** Set to enable L3 IPv6 encapsulation + */ + CFA_P58_ACT_ENCAP_L3_IPV6 = 5, + /** Set to enable L3 MPLS 8847 encapsulation + */ + CFA_P58_ACT_ENCAP_L3_MPLS_8847 = 6, + /** Set to enable L3 MPLS 8848 encapsulation + */ + CFA_P58_ACT_ENCAP_L3_MPLS_8848 = 7 + } l3; + +#define CFA_P58_ACT_ENCAP_MAX_MPLS_LABELS 8 + /** 1-8 labels, valid when + * (l3 == CFA_P58_ACT_ENCAP_L3_MPLS_8847) || + * (l3 == CFA_P58_ACT_ENCAP_L3_MPLS_8848) + * + * MAX number of MPLS Labels 8. + */ + uint8_t l3_num_mpls_labels; + + /** Set to CFA_HCAPI_TRUE to enable L4 capability in the + * template. + * + * CFA_HCAPI_TRUE adds ::TF_EN_UDP_SRC_PORT and + * ::TF_EN_UDP_DST_PORT to the template. + */ + uint8_t l4_enable; + + /** Tunnel Encap controls the Encap Vector - Tunnel + * Encap, 3 bits. Defines the type of Tunnel + * encapsulation the template is describing + *
    + *
  • CFA_P58_ACT_ENCAP_TNL_NONE, default, no Tunnel + * Encapsulation processing. + *
  • CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL + *
  • CFA_P58_ACT_ENCAP_TNL_VXLAN. NOTE: Expects + * l4_enable set to CFA_P58_TRUE; + *
  • CFA_P58_ACT_ENCAP_TNL_NGE. NOTE: Expects l4_enable + * set to CFA_P58_TRUE; + *
  • CFA_P58_ACT_ENCAP_TNL_NVGRE. NOTE: only valid if + * l4_enable set to CFA_HCAPI_FALSE. + *
  • CFA_P58_ACT_ENCAP_TNL_GRE.NOTE: only valid if + * l4_enable set to CFA_HCAPI_FALSE. + *
  • CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4 + *
  • CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL + *
+ */ + enum { + /** Set to disable Tunnel header encapsulation + * processing, default + */ + CFA_P58_ACT_ENCAP_TNL_NONE = 0, + /** Set to enable Tunnel Generic Full header + * encapsulation + */ + CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL, + /** Set to enable VXLAN header encapsulation + */ + CFA_P58_ACT_ENCAP_TNL_VXLAN, + /** Set to enable NGE (VXLAN2) header encapsulation + */ + CFA_P58_ACT_ENCAP_TNL_NGE, + /** Set to enable NVGRE header encapsulation + */ + CFA_P58_ACT_ENCAP_TNL_NVGRE, + /** Set to enable GRE header encapsulation + */ + CFA_P58_ACT_ENCAP_TNL_GRE, + /** Set to enable Generic header after Tunnel + * L4 encapsulation + */ + CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4, + /** Set to enable Generic header after Tunnel + * encapsulation + */ + CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL + } tnl; + + /** Number of bytes of generic tunnel header, + * valid when + * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL) || + * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4) || + * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL) + */ + uint8_t tnl_generic_size; + /** Number of 32b words of nge options, + * valid when + * (tnl == CFA_P58_ACT_ENCAP_TNL_NGE) + */ + uint8_t tnl_nge_op_len; + /* Currently not planned */ + /* Custom Header */ + /* uint8_t custom_enable; */ + } encap; +}; + +/** + * Enumeration of SRAM entry types, used for allocation of + * fixed SRAM entities. The memory model for CFA HCAPI + * determines if an SRAM entry type is supported. + */ +enum cfa_p58_action_sram_entry_type { + /* NOTE: Any additions to this enum must be reflected on FW + * side as well. + */ + + /** SRAM Action Record */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_ACT, + /** SRAM Action Encap 8 Bytes */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_ENCAP_8B, + /** SRAM Action Encap 16 Bytes */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_ENCAP_16B, + /** SRAM Action Encap 64 Bytes */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_ENCAP_64B, + /** SRAM Action Modify IPv4 Source */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_MODIFY_IPV4_SRC, + /** SRAM Action Modify IPv4 Destination */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_MODIFY_IPV4_DEST, + /** SRAM Action Source Properties SMAC */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_SP_SMAC, + /** SRAM Action Source Properties SMAC IPv4 */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_SP_SMAC_IPV4, + /** SRAM Action Source Properties SMAC IPv6 */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_SP_SMAC_IPV6, + /** SRAM Action Statistics 64 Bits */ + CFA_P58_ACTION_SRAM_ENTRY_TYPE_STATS_64, + CFA_P58_ACTION_SRAM_ENTRY_TYPE_MAX +}; + +/** + * SRAM Action Record structure holding either an action index or an + * action ptr. + */ +union cfa_p58_action_sram_act_record { + /** SRAM Action idx specifies the offset of the SRAM + * element within its SRAM Entry Type block. This + * index can be written into i.e. an L2 Context. Use + * this type for all SRAM Action Record types except + * SRAM Full Action records. Use act_ptr instead. + */ + uint16_t act_idx; + /** SRAM Full Action is special in that it needs an + * action record pointer. This pointer can be written + * into i.e. a Wildcard TCAM entry. + */ + uint32_t act_ptr; +}; + +/** + * cfa_p58_action_param parameter definition + */ +struct cfa_p58_action_param { + /** + * [in] receive or transmit direction + */ + uint8_t dir; + /** + * [in] type of the sram allocation type + */ + enum cfa_p58_action_sram_entry_type type; + /** + * [in] action record to set. The 'type' specified lists the + * record definition to use in the passed in record. + */ + union cfa_p58_action_sram_act_record record; + /** + * [in] number of elements in act_data + */ + uint32_t act_size; + /** + * [in] ptr to array of action data + */ + uint64_t *act_data; +}; +#endif /* _CFA_HW_P58_H_ */ diff --git a/drivers/net/bnxt/tf_core/meson.build b/drivers/net/bnxt/tf_core/meson.build index 373ee0413b..2c02214d83 100644 --- a/drivers/net/bnxt/tf_core/meson.build +++ b/drivers/net/bnxt/tf_core/meson.build @@ -22,7 +22,6 @@ sources += files( 'tf_device_p4.c', 'tf_device_p58.c', 'tf_identifier.c', - 'tf_shadow_tbl.c', 'tf_shadow_tcam.c', 'tf_tcam.c', 'tf_util.c', diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 4fe0590569..0cc3719a1b 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -153,6 +153,30 @@ enum tf_device_type { TF_DEVICE_TYPE_MAX /**< Maximum */ }; +/** + * Module types + */ +enum tf_module_type { + /** + * Identifier module + */ + TF_MODULE_TYPE_IDENTIFIER, + /** + * Table type module + */ + TF_MODULE_TYPE_TABLE, + /** + * TCAM module + */ + TF_MODULE_TYPE_TCAM, + /** + * EM module + */ + TF_MODULE_TYPE_EM, + TF_MODULE_TYPE_MAX +}; + + /** * Identifier resource types */ diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index d072b9877c..61b3746d8b 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -8,6 +8,7 @@ #include "tf_device_p58.h" #include "tfp.h" #include "tf_em.h" +#include "tf_rm.h" struct tf; @@ -18,8 +19,8 @@ static int tf_dev_unbind_p58(struct tf *tfp); /** * Resource Reservation Check function * - * [in] tfp - * Pointer to TF handle + * [in] count + * Number of module subtypes * * [in] cfg * Pointer to rm element config @@ -28,11 +29,10 @@ static int tf_dev_unbind_p58(struct tf *tfp); * Pointer to resource reservation array * * Returns - * - (n) number of tables that have non-zero reservation count. + * - (n) number of tables in module that have non-zero reservation count. */ static int -tf_dev_reservation_check(struct tf *tfp __rte_unused, - uint16_t count, +tf_dev_reservation_check(uint16_t count, struct tf_rm_element_cfg *cfg, uint16_t *reservations) { @@ -94,8 +94,7 @@ tf_dev_bind_p4(struct tf *tfp, /* Initialize the modules */ - rsv_cnt = tf_dev_reservation_check(tfp, - TF_IDENT_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_IDENT_TYPE_MAX, tf_ident_p4, (uint16_t *)resources->ident_cnt); if (rsv_cnt) { @@ -113,8 +112,7 @@ tf_dev_bind_p4(struct tf *tfp, no_rsv_flag = false; } - rsv_cnt = tf_dev_reservation_check(tfp, - TF_TBL_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_TBL_TYPE_MAX, tf_tbl_p4, (uint16_t *)resources->tbl_cnt); if (rsv_cnt) { @@ -132,8 +130,7 @@ tf_dev_bind_p4(struct tf *tfp, no_rsv_flag = false; } - rsv_cnt = tf_dev_reservation_check(tfp, - TF_TCAM_TBL_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_TCAM_TBL_TYPE_MAX, tf_tcam_p4, (uint16_t *)resources->tcam_cnt); if (rsv_cnt) { @@ -155,8 +152,7 @@ tf_dev_bind_p4(struct tf *tfp, */ em_cfg.cfg = tf_em_ext_p4; - rsv_cnt = tf_dev_reservation_check(tfp, - TF_EM_TBL_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_EM_TBL_TYPE_MAX, em_cfg.cfg, (uint16_t *)resources->em_cnt); if (rsv_cnt) { @@ -175,8 +171,7 @@ tf_dev_bind_p4(struct tf *tfp, /* * EM */ - rsv_cnt = tf_dev_reservation_check(tfp, - TF_EM_TBL_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_EM_TBL_TYPE_MAX, tf_em_int_p4, (uint16_t *)resources->em_cnt); if (rsv_cnt) { @@ -360,10 +355,7 @@ tf_dev_bind_p58(struct tf *tfp, /* Initial function initialization */ dev_handle->ops = &tf_dev_ops_p58_init; - /* Initialize the modules */ - - rsv_cnt = tf_dev_reservation_check(tfp, - TF_IDENT_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_IDENT_TYPE_MAX, tf_ident_p58, (uint16_t *)resources->ident_cnt); if (rsv_cnt) { @@ -380,8 +372,7 @@ tf_dev_bind_p58(struct tf *tfp, no_rsv_flag = false; } - rsv_cnt = tf_dev_reservation_check(tfp, - TF_TBL_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_TBL_TYPE_MAX, tf_tbl_p58, (uint16_t *)resources->tbl_cnt); if (rsv_cnt) { @@ -398,8 +389,7 @@ tf_dev_bind_p58(struct tf *tfp, no_rsv_flag = false; } - rsv_cnt = tf_dev_reservation_check(tfp, - TF_TCAM_TBL_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_TCAM_TBL_TYPE_MAX, tf_tcam_p58, (uint16_t *)resources->tcam_cnt); if (rsv_cnt) { @@ -419,8 +409,7 @@ tf_dev_bind_p58(struct tf *tfp, /* * EM */ - rsv_cnt = tf_dev_reservation_check(tfp, - TF_EM_TBL_TYPE_MAX, + rsv_cnt = tf_dev_reservation_check(TF_EM_TBL_TYPE_MAX, tf_em_int_p58, (uint16_t *)resources->em_cnt); if (rsv_cnt) { @@ -593,10 +582,10 @@ tf_dev_bind_ops(enum tf_device_type type, switch (type) { case TF_DEVICE_TYPE_WH: case TF_DEVICE_TYPE_SR: - dev_handle->ops = &tf_dev_ops_p4; + dev_handle->ops = &tf_dev_ops_p4_init; break; case TF_DEVICE_TYPE_THOR: - dev_handle->ops = &tf_dev_ops_p58; + dev_handle->ops = &tf_dev_ops_p58_init; break; default: TFP_DRV_LOG(ERR, diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index 4f4120c603..2cbb42fe2a 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -16,29 +16,6 @@ struct tf; struct tf_session; -/** - * Device module types - */ -enum tf_device_module_type { - /** - * Identifier module - */ - TF_DEVICE_MODULE_TYPE_IDENTIFIER, - /** - * Table type module - */ - TF_DEVICE_MODULE_TYPE_TABLE, - /** - * TCAM module - */ - TF_DEVICE_MODULE_TYPE_TCAM, - /** - * EM module - */ - TF_DEVICE_MODULE_TYPE_EM, - TF_DEVICE_MODULE_TYPE_MAX -}; - /** * The Device module provides a general device template. A supported * device type should implement one or more of the listed function diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index fbe92b7733..d0bede89e3 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -74,29 +74,10 @@ static int tf_dev_p4_get_max_types(struct tf *tfp, uint16_t *max_types) { - struct tf_session *tfs; - struct tf_dev_info *dev; - int rc; - if (max_types == NULL || tfp == NULL) return -EINVAL; - /* Retrieve the session information */ - rc = tf_session_get_session(tfp, &tfs); - if (rc) - return rc; - - /* Retrieve the device information */ - rc = tf_session_get_device(tfs, &dev); - if (rc) - return rc; - - if (dev->type == TF_DEVICE_TYPE_WH) - *max_types = CFA_RESOURCE_TYPE_P4_LAST + 1; - else if (dev->type == TF_DEVICE_TYPE_SR) - *max_types = CFA_RESOURCE_TYPE_P45_LAST + 1; - else - return -ENODEV; + *max_types = CFA_RESOURCE_TYPE_P4_LAST + 1; return 0; } diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 688d987cb7..50a8d82074 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -58,25 +58,11 @@ const char *tf_resource_str_p58[CFA_RESOURCE_TYPE_P58_LAST + 1] = { */ static int tf_dev_p58_get_max_types(struct tf *tfp, - uint16_t *max_types) + uint16_t *max_types) { - struct tf_session *tfs; - struct tf_dev_info *dev; - int rc; - if (max_types == NULL || tfp == NULL) return -EINVAL; - /* Retrieve the session information */ - rc = tf_session_get_session(tfp, &tfs); - if (rc) - return rc; - - /* Retrieve the device information */ - rc = tf_session_get_device(tfs, &dev); - if (rc) - return rc; - *max_types = CFA_RESOURCE_TYPE_P58_LAST + 1; return 0; @@ -153,41 +139,6 @@ tf_dev_p58_get_tcam_slice_info(struct tf *tfp __rte_unused, return 0; } -static int -tf_dev_p58_map_parif(struct tf *tfp __rte_unused, - uint16_t parif_bitmask, - uint16_t pf, - uint8_t *data, - uint8_t *mask, - uint16_t sz_in_bytes) -{ - uint32_t parif_pf[2] = { 0 }; - uint32_t parif_pf_mask[2] = { 0 }; - uint32_t parif; - uint32_t shift; - - if (sz_in_bytes != sizeof(uint64_t)) - return -ENOTSUP; - - for (parif = 0; parif < TF_DEV_P58_PARIF_MAX; parif++) { - if (parif_bitmask & (1UL << parif)) { - if (parif < 8) { - shift = 4 * parif; - parif_pf_mask[0] |= TF_DEV_P58_PF_MASK << shift; - parif_pf[0] |= pf << shift; - } else { - shift = 4 * (parif - 8); - parif_pf_mask[1] |= TF_DEV_P58_PF_MASK << shift; - parif_pf[1] |= pf << shift; - } - } - } - tfp_memcpy(data, parif_pf, sz_in_bytes); - tfp_memcpy(mask, parif_pf_mask, sz_in_bytes); - - return 0; -} - static int tf_dev_p58_get_mailbox(void) { return TF_CHIMP_MB; @@ -268,7 +219,7 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_delete_ext_em_entry = NULL, .tf_dev_alloc_tbl_scope = NULL, .tf_dev_map_tbl_scope = NULL, - .tf_dev_map_parif = tf_dev_p58_map_parif, + .tf_dev_map_parif = NULL, .tf_dev_free_tbl_scope = NULL, .tf_dev_set_if_tbl = tf_if_tbl_set, .tf_dev_get_if_tbl = tf_if_tbl_get, diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.h b/drivers/net/bnxt/tf_core/tf_device_p58.h index de7bb1cd76..abd916985e 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.h +++ b/drivers/net/bnxt/tf_core/tf_device_p58.h @@ -64,6 +64,105 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = { [TF_TBL_TYPE_MIRROR_CONFIG] = { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_MIRROR }, + /* Policy - ARs in bank 1 */ + [TF_TBL_TYPE_FULL_ACT_RECORD] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_1, + .slices = 4, + .divider = 8, + }, + [TF_TBL_TYPE_COMPACT_ACT_RECORD] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_FULL_ACT_RECORD, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_1, + .slices = 8, + .divider = 8, + }, + /* Policy - Encaps in bank 2 */ + [TF_TBL_TYPE_ACT_ENCAP_8B] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, + .slices = 8, + .divider = 8, + }, + [TF_TBL_TYPE_ACT_ENCAP_16B] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, + .slices = 4, + .divider = 8, + }, + [TF_TBL_TYPE_ACT_ENCAP_32B] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, + .slices = 2, + .divider = 8, + }, + [TF_TBL_TYPE_ACT_ENCAP_64B] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, + .slices = 1, + .divider = 8, + }, + /* Policy - Modify in bank 2 with Encaps */ + [TF_TBL_TYPE_ACT_MODIFY_8B] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, + .slices = 8, + .divider = 8, + }, + [TF_TBL_TYPE_ACT_MODIFY_16B] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, + .slices = 4, + .divider = 8, + }, + [TF_TBL_TYPE_ACT_MODIFY_32B] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, + .slices = 2, + .divider = 8, + }, + [TF_TBL_TYPE_ACT_MODIFY_64B] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, + .slices = 1, + .divider = 8, + }, + /* Policy - SP in bank 0 */ + [TF_TBL_TYPE_ACT_SP_SMAC] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0, + .slices = 8, + .divider = 8, + }, + [TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_SP_SMAC, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0, + .slices = 4, + .divider = 8, + }, + [TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + .parent_subtype = TF_TBL_TYPE_ACT_SP_SMAC, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0, + .slices = 2, + .divider = 8, + }, + /* Policy - Stats in bank 3 */ + [TF_TBL_TYPE_ACT_STATS_64] = { + .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT, + .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_3, + .slices = 8, + .divider = 8, + }, }; struct tf_rm_element_cfg tf_em_int_p58[TF_EM_TBL_TYPE_MAX] = { @@ -72,7 +171,16 @@ struct tf_rm_element_cfg tf_em_int_p58[TF_EM_TBL_TYPE_MAX] = { }, }; -struct tf_if_tbl_cfg tf_if_tbl_p58[TF_IF_TBL_TYPE_MAX]; +struct tf_if_tbl_cfg tf_if_tbl_p58[TF_IF_TBL_TYPE_MAX] = { + [TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR] = { + TF_IF_TBL_CFG, CFA_P58_TBL_PROF_PARIF_DFLT_ACT_REC_PTR}, + [TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR] = { + TF_IF_TBL_CFG, CFA_P58_TBL_PROF_PARIF_ERR_ACT_REC_PTR}, + [TF_IF_TBL_TYPE_ILT] = { + TF_IF_TBL_CFG, CFA_P58_TBL_ILT}, + [TF_IF_TBL_TYPE_VSPT] = { + TF_IF_TBL_CFG, CFA_P58_TBL_VSPT}, +}; struct tf_global_cfg_cfg tf_global_cfg_p58[TF_GLOBAL_CFG_TYPE_MAX] = { [TF_TUNNEL_ENCAP] = { diff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c index 6cd6086685..589df60041 100644 --- a/drivers/net/bnxt/tf_core/tf_em_common.c +++ b/drivers/net/bnxt/tf_core/tf_em_common.c @@ -54,7 +54,7 @@ tbl_scope_cb_find(uint32_t tbl_scope_id) /* Check that id is valid */ parms.rm_db = eem_db[TF_DIR_RX]; - parms.db_index = TF_EM_TBL_TYPE_TBL_SCOPE; + parms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE; parms.index = tbl_scope_id; parms.allocated = &allocated; @@ -895,7 +895,7 @@ tf_em_ext_common_bind(struct tf *tfp, return -EINVAL; } - db_cfg.type = TF_DEVICE_MODULE_TYPE_EM; + db_cfg.module = TF_MODULE_TYPE_EM; db_cfg.num_elements = parms->num_elements; db_cfg.cfg = parms->cfg; diff --git a/drivers/net/bnxt/tf_core/tf_em_host.c b/drivers/net/bnxt/tf_core/tf_em_host.c index 69f7e5bddd..166f397935 100644 --- a/drivers/net/bnxt/tf_core/tf_em_host.c +++ b/drivers/net/bnxt/tf_core/tf_em_host.c @@ -379,7 +379,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) /* Get Table Scope control block from the session pool */ aparms.rm_db = eem_db[TF_DIR_RX]; - aparms.db_index = TF_EM_TBL_TYPE_TBL_SCOPE; + aparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE; aparms.index = (uint32_t *)&parms->tbl_scope_id; rc = tf_rm_allocate(&aparms); if (rc) { @@ -488,7 +488,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) cleanup: /* Free Table control block */ fparms.rm_db = eem_db[TF_DIR_RX]; - fparms.db_index = TF_EM_TBL_TYPE_TBL_SCOPE; + fparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE; fparms.index = parms->tbl_scope_id; tf_rm_free(&fparms); return -EINVAL; @@ -512,7 +512,7 @@ tf_em_ext_free(struct tf *tfp, /* Free Table control block */ aparms.rm_db = eem_db[TF_DIR_RX]; - aparms.db_index = TF_EM_TBL_TYPE_TBL_SCOPE; + aparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE; aparms.index = parms->tbl_scope_id; rc = tf_rm_free(&aparms); if (rc) { diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index 0864218469..043f9be4da 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -251,7 +251,7 @@ tf_em_int_bind(struct tf *tfp, return -EINVAL; } - db_cfg.type = TF_DEVICE_MODULE_TYPE_EM; + db_cfg.module = TF_MODULE_TYPE_EM; db_cfg.num_elements = parms->num_elements; db_cfg.cfg = parms->cfg; @@ -294,7 +294,7 @@ tf_em_int_bind(struct tf *tfp, for (i = 0; i < TF_DIR_MAX; i++) { iparms.rm_db = em_db[i]; - iparms.db_index = TF_EM_DB_EM_REC; + iparms.subtype = TF_EM_DB_EM_REC; iparms.info = &info; rc = tf_rm_get_info(&iparms); diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c index 41ab13c132..9d0a578085 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.c +++ b/drivers/net/bnxt/tf_core/tf_identifier.c @@ -52,7 +52,7 @@ tf_ident_bind(struct tf *tfp, return -EINVAL; } - db_cfg.type = TF_DEVICE_MODULE_TYPE_IDENTIFIER; + db_cfg.module = TF_MODULE_TYPE_IDENTIFIER; db_cfg.num_elements = parms->num_elements; db_cfg.cfg = parms->cfg; @@ -161,7 +161,7 @@ tf_ident_alloc(struct tf *tfp __rte_unused, /* Allocate requested element */ aparms.rm_db = ident_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = &id; aparms.base_index = &base_id; rc = tf_rm_allocate(&aparms); @@ -215,7 +215,7 @@ tf_ident_free(struct tf *tfp __rte_unused, /* Check if element is in use */ aparms.rm_db = ident_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = parms->id; aparms.base_index = &base_id; aparms.allocated = &allocated; @@ -255,7 +255,7 @@ tf_ident_free(struct tf *tfp __rte_unused, /* Free requested element */ fparms.rm_db = ident_db[parms->dir]; - fparms.db_index = parms->type; + fparms.subtype = parms->type; fparms.index = parms->id; rc = tf_rm_free(&fparms); if (rc) { @@ -298,7 +298,7 @@ tf_ident_search(struct tf *tfp __rte_unused, /* Check if element is in use */ aparms.rm_db = ident_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = parms->search_id; aparms.base_index = &base_id; aparms.allocated = &allocated; diff --git a/drivers/net/bnxt/tf_core/tf_if_tbl.c b/drivers/net/bnxt/tf_core/tf_if_tbl.c index 16afa95e38..f58fa79b63 100644 --- a/drivers/net/bnxt/tf_core/tf_if_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_if_tbl.c @@ -144,7 +144,7 @@ int tf_if_tbl_get(struct tf *tfp, struct tf_if_tbl_get_parms *parms) { - int rc; + int rc = 0; struct tf_if_tbl_get_hcapi_parms hparms; TF_CHECK_PARMS3(tfp, parms, parms->data); diff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c index 19de6e4c63..50f6b1eeab 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.c +++ b/drivers/net/bnxt/tf_core/tf_rm.c @@ -42,10 +42,18 @@ struct tf_rm_element { */ struct tf_rm_alloc_info alloc; + /** + * If cfg_type == HCAPI_BA_CHILD, this field indicates + * the parent module subtype for look up into the parent pool. + * An example subtype is TF_TBL_TYPE_FULL_ACT_RECORD which is a + * module subtype of TF_MODULE_TYPE_TABLE. + */ + uint16_t parent_subtype; + /** * Bit allocator pool for the element. Pool size is controlled * by the struct tf_session_resources at time of session creation. - * Null indicates that the element is not used for the device. + * Null indicates that the pool is not used for the element. */ struct bitalloc *pool; }; @@ -67,7 +75,7 @@ struct tf_rm_new_db { /** * Module type, used for logging purposes. */ - enum tf_device_module_type type; + enum tf_module_type module; /** * The DB consists of an array of elements @@ -100,7 +108,7 @@ struct tf_rm_new_db { */ static void tf_rm_count_hcapi_reservations(enum tf_dir dir, - enum tf_device_module_type type, + enum tf_module_type module, struct tf_rm_element_cfg *cfg, uint16_t *reservations, uint16_t count, @@ -110,8 +118,7 @@ tf_rm_count_hcapi_reservations(enum tf_dir dir, uint16_t cnt = 0; for (i = 0; i < count; i++) { - if ((cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI || - cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) && + if (cfg[i].cfg_type != TF_RM_ELEM_CFG_NULL && reservations[i] > 0) cnt++; @@ -120,14 +127,14 @@ tf_rm_count_hcapi_reservations(enum tf_dir dir, * split configuration array thus it would fail for * this type of check. */ - if (type != TF_DEVICE_MODULE_TYPE_EM && + if (module != TF_MODULE_TYPE_EM && cfg[i].cfg_type == TF_RM_ELEM_CFG_NULL && reservations[i] > 0) { TFP_DRV_LOG(ERR, "%s, %s, %s allocation of %d not supported\n", - tf_device_module_type_2_str(type), + tf_module_2_str(module), tf_dir_2_str(dir), - tf_device_module_type_subtype_2_str(type, i), + tf_module_subtype_2_str(module, i), reservations[i]); } } @@ -156,8 +163,10 @@ enum tf_rm_adjust_type { * [in] action * Adjust action * - * [in] db_index - * DB index for the element type + * [in] subtype + * TF module subtype used as an index into the database. + * An example subtype is TF_TBL_TYPE_FULL_ACT_RECORD which is a + * module subtype of TF_MODULE_TYPE_TABLE. * * [in] index * Index to convert @@ -172,14 +181,14 @@ enum tf_rm_adjust_type { static int tf_rm_adjust_index(struct tf_rm_element *db, enum tf_rm_adjust_type action, - uint32_t db_index, + uint32_t subtype, uint32_t index, uint32_t *adj_index) { int rc = 0; uint32_t base_index; - base_index = db[db_index].alloc.entry.start; + base_index = db[subtype].alloc.entry.start; switch (action) { case TF_RM_ADJUST_RM_BASE: @@ -201,7 +210,7 @@ tf_rm_adjust_index(struct tf_rm_element *db, * [in] dir * Receive or transmit direction * - * [in] type + * [in] module * Type of Device Module * * [in] count @@ -214,7 +223,7 @@ tf_rm_adjust_index(struct tf_rm_element *db, */ static void tf_rm_log_residuals(enum tf_dir dir, - enum tf_device_module_type type, + enum tf_module_type module, uint16_t count, uint16_t *residuals) { @@ -228,7 +237,7 @@ tf_rm_log_residuals(enum tf_dir dir, TFP_DRV_LOG(ERR, "%s, %s was not cleaned up, %d outstanding\n", tf_dir_2_str(dir), - tf_device_module_type_subtype_2_str(type, i), + tf_module_subtype_2_str(module, i), residuals[i]); } } @@ -295,7 +304,7 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db, iparms.rm_db = rm_db; iparms.count = &count; for (i = 0, found = 0; i < rm_db->num_entries; i++) { - iparms.db_index = i; + iparms.subtype = i; rc = tf_rm_get_inuse_count(&iparms); /* Not a device supported entry, just skip */ if (rc == -ENOTSUP) @@ -329,13 +338,13 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db, for (i = 0, f = 0; i < rm_db->num_entries; i++) { if (residuals[i] == 0) continue; - aparms.db_index = i; + aparms.subtype = i; aparms.info = &info; rc = tf_rm_get_info(&aparms); if (rc) goto cleanup_all; - hparms.db_index = i; + hparms.subtype = i; rc = tf_rm_get_hcapi_type(&hparms); if (rc) goto cleanup_all; @@ -349,7 +358,7 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db, } tf_rm_log_residuals(rm_db->dir, - rm_db->type, + rm_db->module, rm_db->num_entries, residuals); @@ -367,16 +376,93 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db, return rc; } +/** + * Some resources do not have a 1:1 mapping between the Truflow type and the cfa + * resource type (HCAPI RM). These resources have multiple Truflow types which + * map to a single HCAPI RM type. In order to support this, one Truflow type + * sharing the HCAPI resources is designated the parent. All other Truflow + * types associated with that HCAPI RM type are designated the children. + * + * This function updates the resource counts of any HCAPI_BA_PARENT with the + * counts of the HCAPI_BA_CHILDREN. These are read from the alloc_cnt and + * written back to the req_cnt. + * + * [in] cfg + * Pointer to an array of module specific Truflow type indexed RM cfg items + * + * [in] alloc_cnt + * Pointer to the tf_open_session() configured array of module specific + * Truflow type indexed requested counts. + * + * [in/out] req_cnt + * Pointer to the location to put the updated resource counts. + * + * Returns: + * 0 - Success + * - - Failure if negative + */ +static int +tf_rm_update_parent_reservations(struct tf_rm_element_cfg *cfg, + uint16_t *alloc_cnt, + uint16_t num_elements, + uint16_t *req_cnt) +{ + int parent, child; + + /* Search through all the elements */ + for (parent = 0; parent < num_elements; parent++) { + uint16_t combined_cnt = 0; + + /* If I am a parent */ + if (cfg[parent].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) { + /* start with my own count */ + RTE_ASSERT(cfg[parent].slices); + combined_cnt = + alloc_cnt[parent] / cfg[parent].slices; + + if (alloc_cnt[parent] % cfg[parent].slices) + combined_cnt++; + + /* Search again through all the elements */ + for (child = 0; child < num_elements; child++) { + /* If this is one of my children */ + if (cfg[child].cfg_type == + TF_RM_ELEM_CFG_HCAPI_BA_CHILD && + cfg[child].parent_subtype == parent) { + uint16_t cnt = 0; + RTE_ASSERT(cfg[child].slices); + + /* Increment the parents combined count + * with each child's count adjusted for + * number of slices per RM allocated item. + */ + cnt = + alloc_cnt[child] / cfg[child].slices; + + if (alloc_cnt[child] % cfg[child].slices) + cnt++; + + combined_cnt += cnt; + /* Clear the requested child count */ + req_cnt[child] = 0; + } + } + /* Save the parent count to be requested */ + req_cnt[parent] = combined_cnt; + } + } + return 0; +} + int tf_rm_create_db(struct tf *tfp, struct tf_rm_create_db_parms *parms) { int rc; - int i; - int j; struct tf_session *tfs; struct tf_dev_info *dev; - uint16_t max_types; + int i, j; + uint16_t max_types, hcapi_items, *req_cnt; struct tfp_calloc_parms cparms; struct tf_rm_resc_req_entry *query; enum tf_rm_resc_resv_strategy resv_strategy; @@ -385,7 +471,6 @@ tf_rm_create_db(struct tf *tfp, struct tf_rm_new_db *rm_db; struct tf_rm_element *db; uint32_t pool_size; - uint16_t hcapi_items; TF_CHECK_PARMS2(tfp, parms); @@ -401,9 +486,9 @@ tf_rm_create_db(struct tf *tfp, /* Need device max number of elements for the RM QCAPS */ rc = dev->ops->tf_dev_get_max_types(tfp, &max_types); - if (rc) - return rc; + + /* Allocate memory for RM QCAPS request */ cparms.nitems = max_types; cparms.size = sizeof(struct tf_rm_resc_req_entry); cparms.alignment = 0; @@ -423,6 +508,28 @@ tf_rm_create_db(struct tf *tfp, if (rc) return rc; + /* Copy requested counts (alloc_cnt) from tf_open_session() to local + * copy (req_cnt) so that it can be updated if required. + */ + + cparms.nitems = parms->num_elements; + cparms.size = sizeof(uint16_t); + rc = tfp_calloc(&cparms); + if (rc) + return rc; + + req_cnt = (uint16_t *)cparms.mem_va; + + tfp_memcpy(req_cnt, parms->alloc_cnt, + parms->num_elements * sizeof(uint16_t)); + + /* Update the req_cnt based upon the element configuration + */ + tf_rm_update_parent_reservations(parms->cfg, + parms->alloc_cnt, + parms->num_elements, + req_cnt); + /* Process capabilities against DB requirements. However, as a * DB can hold elements that are not HCAPI we can reduce the * req msg content by removing those out of the request yet @@ -430,21 +537,17 @@ tf_rm_create_db(struct tf *tfp, * remove entries where there are no request for elements. */ tf_rm_count_hcapi_reservations(parms->dir, - parms->type, + parms->module, parms->cfg, - parms->alloc_cnt, + req_cnt, parms->num_elements, &hcapi_items); - /* Handle the case where a DB create request really ends up - * being empty. Unsupported (if not rare) case but possible - * that no resources are necessary for a 'direction'. - */ if (hcapi_items == 0) { TFP_DRV_LOG(ERR, - "%s: DB create request for Zero elements, DB Type:%s\n", - tf_dir_2_str(parms->dir), - tf_device_module_type_2_str(parms->type)); + "%s: module:%s Empty RM DB create request\n", + tf_dir_2_str(parms->dir), + tf_module_2_str(parms->module)); parms->rm_db = NULL; return -ENOMEM; @@ -467,44 +570,45 @@ tf_rm_create_db(struct tf *tfp, /* Build the request */ for (i = 0, j = 0; i < parms->num_elements; i++) { - /* Skip any non HCAPI cfg elements */ - if (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI || - parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) { - /* Only perform reservation for entries that - * has been requested - */ - if (parms->alloc_cnt[i] == 0) - continue; + struct tf_rm_element_cfg *cfg = &parms->cfg[i]; + uint16_t hcapi_type = cfg->hcapi_type; + + /* Only perform reservation for requested entries + */ + if (req_cnt[i] == 0) + continue; + + /* Skip any children in the request */ + if (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI || + cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA || + cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) { - /* Verify that we can get the full amount - * allocated per the qcaps availability. + /* Verify that we can get the full amount per qcaps. */ - if (parms->alloc_cnt[i] <= - query[parms->cfg[i].hcapi_type].max) { - req[j].type = parms->cfg[i].hcapi_type; - req[j].min = parms->alloc_cnt[i]; - req[j].max = parms->alloc_cnt[i]; + if (req_cnt[i] <= query[hcapi_type].max) { + req[j].type = hcapi_type; + req[j].min = req_cnt[i]; + req[j].max = req_cnt[i]; j++; } else { const char *type_str; - uint16_t hcapi_type = parms->cfg[i].hcapi_type; dev->ops->tf_dev_get_resource_str(tfp, - hcapi_type, - &type_str); + hcapi_type, + &type_str); TFP_DRV_LOG(ERR, - "%s: Resource failure, type:%d:%s\n", - tf_dir_2_str(parms->dir), - hcapi_type, type_str); - TFP_DRV_LOG(ERR, - "req:%d, avail:%d\n", - parms->alloc_cnt[i], - query[hcapi_type].max); + "Failure, %s:%d:%s req:%d avail:%d\n", + tf_dir_2_str(parms->dir), + hcapi_type, type_str, + req_cnt[i], + query[hcapi_type].max); return -EINVAL; } } } + /* Allocate all resources for the module type + */ rc = tf_msg_session_resc_alloc(tfp, dev, parms->dir, @@ -532,32 +636,56 @@ tf_rm_create_db(struct tf *tfp, db = rm_db->db; for (i = 0, j = 0; i < parms->num_elements; i++) { - db[i].cfg_type = parms->cfg[i].cfg_type; - db[i].hcapi_type = parms->cfg[i].hcapi_type; + struct tf_rm_element_cfg *cfg = &parms->cfg[i]; + const char *type_str; + + dev->ops->tf_dev_get_resource_str(tfp, + cfg->hcapi_type, + &type_str); - /* Skip any non HCAPI types as we didn't include them - * in the reservation request. + db[i].cfg_type = cfg->cfg_type; + db[i].hcapi_type = cfg->hcapi_type; + + /* Save the parent subtype for later use to find the pool */ - if (parms->cfg[i].cfg_type != TF_RM_ELEM_CFG_HCAPI && - parms->cfg[i].cfg_type != TF_RM_ELEM_CFG_HCAPI_BA) - continue; + if (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD) + db[i].parent_subtype = cfg->parent_subtype; /* If the element didn't request an allocation no need * to create a pool nor verify if we got a reservation. */ - if (parms->alloc_cnt[i] == 0) + if (req_cnt[i] == 0) + continue; + + /* Skip any children or invalid + */ + if (cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI && + cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI_BA && + cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT) continue; /* If the element had requested an allocation and that * allocation was a success (full amount) then * allocate the pool. */ - if (parms->alloc_cnt[i] == resv[j].stride) { + if (req_cnt[i] == resv[j].stride) { db[i].alloc.entry.start = resv[j].start; db[i].alloc.entry.stride = resv[j].stride; - /* Only allocate BA pool if so requested */ - if (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) { + /* Only allocate BA pool if a BA type not a child */ + if (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA || + cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) { + if (cfg->divider) { + resv[j].stride = + resv[j].stride / cfg->divider; + if (resv[j].stride <= 0) { + TFP_DRV_LOG(ERR, + "%s:Divide fails:%d:%s\n", + tf_dir_2_str(parms->dir), + cfg->hcapi_type, type_str); + goto fail; + } + } /* Create pool */ pool_size = (BITALLOC_SIZEOF(resv[j].stride) / sizeof(struct bitalloc)); @@ -567,9 +695,9 @@ tf_rm_create_db(struct tf *tfp, rc = tfp_calloc(&cparms); if (rc) { TFP_DRV_LOG(ERR, - "%s: Pool alloc failed, type:%d\n", - tf_dir_2_str(parms->dir), - db[i].cfg_type); + "%s: Pool alloc failed, type:%d:%s\n", + tf_dir_2_str(parms->dir), + cfg->hcapi_type, type_str); goto fail; } db[i].pool = (struct bitalloc *)cparms.mem_va; @@ -577,9 +705,9 @@ tf_rm_create_db(struct tf *tfp, rc = ba_init(db[i].pool, resv[j].stride); if (rc) { TFP_DRV_LOG(ERR, - "%s: Pool init failed, type:%d\n", - tf_dir_2_str(parms->dir), - db[i].cfg_type); + "%s: Pool init failed, type:%d:%s\n", + tf_dir_2_str(parms->dir), + cfg->hcapi_type, type_str); goto fail; } } @@ -589,25 +717,21 @@ tf_rm_create_db(struct tf *tfp, * all elements, not any less. */ TFP_DRV_LOG(ERR, - "%s: Alloc failed, type:%d\n", - tf_dir_2_str(parms->dir), - db[i].cfg_type); - TFP_DRV_LOG(ERR, - "req:%d, alloc:%d\n", - parms->alloc_cnt[i], - resv[j].stride); + "%s: Alloc failed %d:%s req:%d, alloc:%d\n", + tf_dir_2_str(parms->dir), cfg->hcapi_type, + type_str, req_cnt[i], resv[j].stride); goto fail; } } rm_db->num_entries = parms->num_elements; rm_db->dir = parms->dir; - rm_db->type = parms->type; + rm_db->module = parms->module; *parms->rm_db = (void *)rm_db; tfp_free((void *)req); tfp_free((void *)resv); - + tfp_free((void *)req_cnt); return 0; fail: @@ -616,6 +740,7 @@ tf_rm_create_db(struct tf *tfp, tfp_free((void *)db->pool); tfp_free((void *)db); tfp_free((void *)rm_db); + tfp_free((void *)req_cnt); parms->rm_db = NULL; return -EINVAL; @@ -682,7 +807,7 @@ tf_rm_free_db(struct tf *tfp, TFP_DRV_LOG(ERR, "%s: Internal Flush error, module:%s\n", tf_dir_2_str(parms->dir), - tf_device_module_type_2_str(rm_db->type)); + tf_module_2_str(rm_db->module)); } /* No need to check for configuration type, even if we do not @@ -695,6 +820,54 @@ tf_rm_free_db(struct tf *tfp, return rc; } +/** + * Get the bit allocator pool associated with the subtype and the db + * + * [in] rm_db + * Pointer to the DB + * + * [in] subtype + * Module subtype used to index into the module specific database. + * An example subtype is TF_TBL_TYPE_FULL_ACT_RECORD which is a + * module subtype of TF_MODULE_TYPE_TABLE. + * + * [in/out] pool + * Pointer to the bit allocator pool used + * + * [in/out] new_subtype + * Pointer to the subtype of the actual pool used + * Returns: + * 0 - Success + * - ENOTSUP - Operation not supported + */ +static int +tf_rm_get_pool(struct tf_rm_new_db *rm_db, + uint16_t subtype, + struct bitalloc **pool, + uint16_t *new_subtype) +{ + int rc = 0; + uint16_t tmp_subtype = subtype; + + /* If we are a child, get the parent table index */ + if (rm_db->db[subtype].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD) + tmp_subtype = rm_db->db[subtype].parent_subtype; + + *pool = rm_db->db[tmp_subtype].pool; + + /* Bail out if the pool is not valid, should never happen */ + if (rm_db->db[tmp_subtype].pool == NULL) { + rc = -ENOTSUP; + TFP_DRV_LOG(ERR, + "%s: Invalid pool for this type:%d, rc:%s\n", + tf_dir_2_str(rm_db->dir), + tmp_subtype, + strerror(-rc)); + return rc; + } + *new_subtype = tmp_subtype; + return rc; +} int tf_rm_allocate(struct tf_rm_allocate_parms *parms) @@ -704,37 +877,33 @@ tf_rm_allocate(struct tf_rm_allocate_parms *parms) uint32_t index; struct tf_rm_new_db *rm_db; enum tf_rm_elem_cfg_type cfg_type; + struct bitalloc *pool; + uint16_t subtype; TF_CHECK_PARMS2(parms, parms->rm_db); rm_db = (struct tf_rm_new_db *)parms->rm_db; - if (!rm_db->db) - return -EINVAL; - cfg_type = rm_db->db[parms->db_index].cfg_type; + TF_CHECK_PARMS1(rm_db->db); + + cfg_type = rm_db->db[parms->subtype].cfg_type; /* Bail out if not controlled by RM */ - if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA) + if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD) return -ENOTSUP; - /* Bail out if the pool is not valid, should never happen */ - if (rm_db->db[parms->db_index].pool == NULL) { - rc = -ENOTSUP; - TFP_DRV_LOG(ERR, - "%s: Invalid pool for this type:%d, rc:%s\n", - tf_dir_2_str(rm_db->dir), - parms->db_index, - strerror(-rc)); + rc = tf_rm_get_pool(rm_db, parms->subtype, &pool, &subtype); + if (rc) return rc; - } - /* * priority 0: allocate from top of the tcam i.e. high * priority !0: allocate index from bottom i.e lowest */ if (parms->priority) - id = ba_alloc_reverse(rm_db->db[parms->db_index].pool); + id = ba_alloc_reverse(pool); else - id = ba_alloc(rm_db->db[parms->db_index].pool); + id = ba_alloc(pool); if (id == BA_FAIL) { rc = -ENOMEM; TFP_DRV_LOG(ERR, @@ -747,7 +916,7 @@ tf_rm_allocate(struct tf_rm_allocate_parms *parms) /* Adjust for any non zero start value */ rc = tf_rm_adjust_index(rm_db->db, TF_RM_ADJUST_ADD_BASE, - parms->db_index, + subtype, id, &index); if (rc) { @@ -772,39 +941,35 @@ tf_rm_free(struct tf_rm_free_parms *parms) uint32_t adj_index; struct tf_rm_new_db *rm_db; enum tf_rm_elem_cfg_type cfg_type; + struct bitalloc *pool; + uint16_t subtype; TF_CHECK_PARMS2(parms, parms->rm_db); - rm_db = (struct tf_rm_new_db *)parms->rm_db; - if (!rm_db->db) - return -EINVAL; - cfg_type = rm_db->db[parms->db_index].cfg_type; + TF_CHECK_PARMS1(rm_db->db); + + cfg_type = rm_db->db[parms->subtype].cfg_type; /* Bail out if not controlled by RM */ - if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA) + if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD) return -ENOTSUP; - /* Bail out if the pool is not valid, should never happen */ - if (rm_db->db[parms->db_index].pool == NULL) { - rc = -ENOTSUP; - TFP_DRV_LOG(ERR, - "%s: Invalid pool for this type:%d, rc:%s\n", - tf_dir_2_str(rm_db->dir), - parms->db_index, - strerror(-rc)); + rc = tf_rm_get_pool(rm_db, parms->subtype, &pool, &subtype); + if (rc) return rc; - } /* Adjust for any non zero start value */ rc = tf_rm_adjust_index(rm_db->db, TF_RM_ADJUST_RM_BASE, - parms->db_index, + subtype, parms->index, &adj_index); if (rc) return rc; - rc = ba_free(rm_db->db[parms->db_index].pool, adj_index); + rc = ba_free(pool, adj_index); /* No logging direction matters and that is not available here */ if (rc) return rc; @@ -819,33 +984,30 @@ tf_rm_is_allocated(struct tf_rm_is_allocated_parms *parms) uint32_t adj_index; struct tf_rm_new_db *rm_db; enum tf_rm_elem_cfg_type cfg_type; + struct bitalloc *pool; + uint16_t subtype; TF_CHECK_PARMS2(parms, parms->rm_db); - rm_db = (struct tf_rm_new_db *)parms->rm_db; - if (!rm_db->db) - return -EINVAL; - cfg_type = rm_db->db[parms->db_index].cfg_type; + TF_CHECK_PARMS1(rm_db->db); + + cfg_type = rm_db->db[parms->subtype].cfg_type; + /* Bail out if not controlled by RM */ - if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA) + if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD) return -ENOTSUP; - /* Bail out if the pool is not valid, should never happen */ - if (rm_db->db[parms->db_index].pool == NULL) { - rc = -ENOTSUP; - TFP_DRV_LOG(ERR, - "%s: Invalid pool for this type:%d, rc:%s\n", - tf_dir_2_str(rm_db->dir), - parms->db_index, - strerror(-rc)); + rc = tf_rm_get_pool(rm_db, parms->subtype, &pool, &subtype); + if (rc) return rc; - } /* Adjust for any non zero start value */ rc = tf_rm_adjust_index(rm_db->db, TF_RM_ADJUST_RM_BASE, - parms->db_index, + subtype, parms->index, &adj_index); if (rc) @@ -853,8 +1015,7 @@ tf_rm_is_allocated(struct tf_rm_is_allocated_parms *parms) if (parms->base_index) *parms->base_index = adj_index; - *parms->allocated = ba_inuse(rm_db->db[parms->db_index].pool, - adj_index); + *parms->allocated = ba_inuse(pool, adj_index); return rc; } @@ -866,19 +1027,17 @@ tf_rm_get_info(struct tf_rm_get_alloc_info_parms *parms) enum tf_rm_elem_cfg_type cfg_type; TF_CHECK_PARMS2(parms, parms->rm_db); - rm_db = (struct tf_rm_new_db *)parms->rm_db; - if (!rm_db->db) - return -EINVAL; - cfg_type = rm_db->db[parms->db_index].cfg_type; + TF_CHECK_PARMS1(rm_db->db); + + cfg_type = rm_db->db[parms->subtype].cfg_type; /* Bail out if not controlled by HCAPI */ - if (cfg_type != TF_RM_ELEM_CFG_HCAPI && - cfg_type != TF_RM_ELEM_CFG_HCAPI_BA) + if (cfg_type == TF_RM_ELEM_CFG_NULL) return -ENOTSUP; memcpy(parms->info, - &rm_db->db[parms->db_index].alloc, + &rm_db->db[parms->subtype].alloc, sizeof(struct tf_rm_alloc_info)); return 0; @@ -891,18 +1050,16 @@ tf_rm_get_hcapi_type(struct tf_rm_get_hcapi_parms *parms) enum tf_rm_elem_cfg_type cfg_type; TF_CHECK_PARMS2(parms, parms->rm_db); - rm_db = (struct tf_rm_new_db *)parms->rm_db; - if (!rm_db->db) - return -EINVAL; - cfg_type = rm_db->db[parms->db_index].cfg_type; + TF_CHECK_PARMS1(rm_db->db); + + cfg_type = rm_db->db[parms->subtype].cfg_type; /* Bail out if not controlled by HCAPI */ - if (cfg_type != TF_RM_ELEM_CFG_HCAPI && - cfg_type != TF_RM_ELEM_CFG_HCAPI_BA) + if (cfg_type == TF_RM_ELEM_CFG_NULL) return -ENOTSUP; - *parms->hcapi_type = rm_db->db[parms->db_index].hcapi_type; + *parms->hcapi_type = rm_db->db[parms->subtype].hcapi_type; return 0; } @@ -915,30 +1072,31 @@ tf_rm_get_inuse_count(struct tf_rm_get_inuse_count_parms *parms) enum tf_rm_elem_cfg_type cfg_type; TF_CHECK_PARMS2(parms, parms->rm_db); - rm_db = (struct tf_rm_new_db *)parms->rm_db; - if (!rm_db->db) - return -EINVAL; - cfg_type = rm_db->db[parms->db_index].cfg_type; + TF_CHECK_PARMS1(rm_db->db); - /* Bail out if not controlled by RM */ - if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA) + cfg_type = rm_db->db[parms->subtype].cfg_type; + + /* Bail out if not a BA pool */ + if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD) return -ENOTSUP; /* Bail silently (no logging), if the pool is not valid there * was no elements allocated for it. */ - if (rm_db->db[parms->db_index].pool == NULL) { + if (rm_db->db[parms->subtype].pool == NULL) { *parms->count = 0; return 0; } - *parms->count = ba_inuse_count(rm_db->db[parms->db_index].pool); + *parms->count = ba_inuse_count(rm_db->db[parms->subtype].pool); return rc; - } - +/* Only used for table bulk get at this time + */ int tf_rm_check_indexes_in_range(struct tf_rm_check_indexes_in_range_parms *parms) { @@ -947,31 +1105,27 @@ tf_rm_check_indexes_in_range(struct tf_rm_check_indexes_in_range_parms *parms) uint32_t base_index; uint32_t stride; int rc = 0; + struct bitalloc *pool; + uint16_t subtype; TF_CHECK_PARMS2(parms, parms->rm_db); - rm_db = (struct tf_rm_new_db *)parms->rm_db; - if (!rm_db->db) - return -EINVAL; - cfg_type = rm_db->db[parms->db_index].cfg_type; + TF_CHECK_PARMS1(rm_db->db); - /* Bail out if not controlled by RM */ - if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA) + cfg_type = rm_db->db[parms->subtype].cfg_type; + + /* Bail out if not a BA pool */ + if (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT && + cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_CHILD) return -ENOTSUP; - /* Bail out if the pool is not valid, should never happen */ - if (rm_db->db[parms->db_index].pool == NULL) { - rc = -ENOTSUP; - TFP_DRV_LOG(ERR, - "%s: Invalid pool for this type:%d, rc:%s\n", - tf_dir_2_str(rm_db->dir), - parms->db_index, - strerror(-rc)); + rc = tf_rm_get_pool(rm_db, parms->subtype, &pool, &subtype); + if (rc) return rc; - } - base_index = rm_db->db[parms->db_index].alloc.entry.start; - stride = rm_db->db[parms->db_index].alloc.entry.stride; + base_index = rm_db->db[subtype].alloc.entry.start; + stride = rm_db->db[subtype].alloc.entry.stride; if (parms->starting_index < base_index || parms->starting_index + parms->num_entries > base_index + stride) diff --git a/drivers/net/bnxt/tf_core/tf_rm.h b/drivers/net/bnxt/tf_core/tf_rm.h index 291086c7c7..407c7d5bf9 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.h +++ b/drivers/net/bnxt/tf_core/tf_rm.h @@ -35,11 +35,11 @@ struct tf; * The RM DB will work on its initial allocated sizes so the * capability of dynamically growing a particular resource is not * possible. If this capability later becomes a requirement then the - * MAX pool size of the Chip œneeds to be added to the tf_rm_elem_info + * MAX pool size of the chip needs to be added to the tf_rm_elem_info * structure and several new APIs would need to be added to allow for * growth of a single TF resource type. * - * The access functions does not check for NULL pointers as it's a + * The access functions do not check for NULL pointers as they are a * support module, not called directly. */ @@ -65,19 +65,28 @@ enum tf_rm_elem_cfg_type { * No configuration */ TF_RM_ELEM_CFG_NULL, - /** HCAPI 'controlled', no RM storage thus the Device Module + /** HCAPI 'controlled', no RM storage so the module * using the RM can chose to handle storage locally. */ TF_RM_ELEM_CFG_HCAPI, - /** HCAPI 'controlled', uses a Bit Allocator Pool for internal + /** HCAPI 'controlled', uses a bit allocator pool for internal * storage in the RM. */ TF_RM_ELEM_CFG_HCAPI_BA, /** - * Shared element thus it belongs to a shared FW Session and - * is not controlled by the Host. + * HCAPI 'controlled', uses a bit allocator pool for internal + * storage in the RM but multiple TF types map to a single + * HCAPI type. Parent manages the table. */ - TF_RM_ELEM_CFG_SHARED, + TF_RM_ELEM_CFG_HCAPI_BA_PARENT, + /** + * HCAPI 'controlled', uses a bit allocator pool for internal + * storage in the RM but multiple TF types map to a single + * HCAPI type. Child accesses the parent db. + */ + TF_RM_ELEM_CFG_HCAPI_BA_CHILD, + + TF_RM_TYPE_MAX }; @@ -114,6 +123,30 @@ struct tf_rm_element_cfg { * conversion. */ uint16_t hcapi_type; + + /** + * if cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD + * + * Parent Truflow module subtype associated with this resource type. + */ + uint16_t parent_subtype; + + /** + * if cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD + * + * Resource slices. How many slices will fit in the + * resource pool chunk size. + */ + uint8_t slices; + /** + * Pool element divider count + * If 0 or 1, there is 1:1 correspondence between the RM + * BA pool resource element and the HCAPI RM firmware + * resource. If > 1, the RM BA pool element has a 1:n + * correspondence to the HCAPI RM firmware resource. + */ + uint8_t divider; + }; /** @@ -135,9 +168,9 @@ struct tf_rm_alloc_info { */ struct tf_rm_create_db_parms { /** - * [in] Device module type. Used for logging purposes. + * [in] Module type. Used for logging purposes. */ - enum tf_device_module_type type; + enum tf_module_type module; /** * [in] Receive or transmit direction. */ @@ -153,8 +186,7 @@ struct tf_rm_create_db_parms { /** * Resource allocation count array. This array content * originates from the tf_session_resources that is passed in - * on session open. - * Array size is num_elements. + * on session open. Array size is num_elements. */ uint16_t *alloc_cnt; /** @@ -186,10 +218,11 @@ struct tf_rm_allocate_parms { */ void *rm_db; /** - * [in] DB Index, indicates which DB entry to perform the - * action on. + * [in] Module subtype indicates which DB entry to perform the + * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module + * TF_MODULE_TYPE_TCAM) */ - uint16_t db_index; + uint16_t subtype; /** * [in] Pointer to the allocated index in normalized * form. Normalized means the index has been adjusted, @@ -219,10 +252,11 @@ struct tf_rm_free_parms { */ void *rm_db; /** - * [in] DB Index, indicates which DB entry to perform the - * action on. + * [in] TF subtype indicates which DB entry to perform the + * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module + * TF_MODULE_TYPE_TCAM) */ - uint16_t db_index; + uint16_t subtype; /** * [in] Index to free */ @@ -238,10 +272,11 @@ struct tf_rm_is_allocated_parms { */ void *rm_db; /** - * [in] DB Index, indicates which DB entry to perform the - * action on. + * [in] TF subtype indicates which DB entry to perform the + * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module + * TF_MODULE_TYPE_TCAM) */ - uint16_t db_index; + uint16_t subtype; /** * [in] Index to free */ @@ -265,13 +300,14 @@ struct tf_rm_get_alloc_info_parms { */ void *rm_db; /** - * [in] DB Index, indicates which DB entry to perform the - * action on. + * [in] TF subtype indicates which DB entry to perform the + * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module + * TF_MODULE_TYPE_TCAM) */ - uint16_t db_index; + uint16_t subtype; /** * [out] Pointer to the requested allocation information for - * the specified db_index + * the specified subtype */ struct tf_rm_alloc_info *info; }; @@ -285,12 +321,13 @@ struct tf_rm_get_hcapi_parms { */ void *rm_db; /** - * [in] DB Index, indicates which DB entry to perform the - * action on. + * [in] TF subtype indicates which DB entry to perform the + * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module + * TF_MODULE_TYPE_TCAM) */ - uint16_t db_index; + uint16_t subtype; /** - * [out] Pointer to the hcapi type for the specified db_index + * [out] Pointer to the hcapi type for the specified subtype */ uint16_t *hcapi_type; }; @@ -304,12 +341,13 @@ struct tf_rm_get_inuse_count_parms { */ void *rm_db; /** - * [in] DB Index, indicates which DB entry to perform the - * action on. + * [in] TF subtype indicates which DB entry to perform the + * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module + * TF_MODULE_TYPE_TCAM) */ - uint16_t db_index; + uint16_t subtype; /** - * [out] Pointer to the inuse count for the specified db_index + * [out] Pointer to the inuse count for the specified subtype */ uint16_t *count; }; @@ -323,10 +361,11 @@ struct tf_rm_check_indexes_in_range_parms { */ void *rm_db; /** - * [in] DB Index, indicates which DB entry to perform the - * action on. + * [in] TF subtype indicates which DB entry to perform the + * action on. (e.g. TF_TCAM_TBL_TYPE_L2_CTXT subtype of module + * TF_MODULE_TYPE_TCAM) */ - uint16_t db_index; + uint16_t subtype; /** * [in] Starting index */ diff --git a/drivers/net/bnxt/tf_core/tf_shadow_tbl.c b/drivers/net/bnxt/tf_core/tf_shadow_tbl.c deleted file mode 100644 index 396ebdb0a9..0000000000 --- a/drivers/net/bnxt/tf_core/tf_shadow_tbl.c +++ /dev/null @@ -1,783 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom - * All rights reserved. - */ - -#include "tf_common.h" -#include "tf_util.h" -#include "tfp.h" -#include "tf_core.h" -#include "tf_shadow_tbl.h" -#include "tf_hash.h" - -/** - * The implementation includes 3 tables per table table type. - * - hash table - * - sized so that a minimum of 4 slots per shadow entry are available to - * minimize the likelihood of collisions. - * - shadow key table - * - sized to the number of entries requested and is directly indexed - * - the index is zero based and is the table index - the base address - * - the data associated with the entry is stored in the key table. - * - The stored key is actually the data associated with the entry. - * - shadow result table - * - the result table is stored separately since it only needs to be accessed - * when the key matches. - * - the result has a back pointer to the hash table via the hb handle. The - * hb handle is a 32 bit represention of the hash with a valid bit, bucket - * element index, and the hash index. It is necessary to store the hb handle - * with the result since subsequent removes only provide the table index. - * - * - Max entries is limited in the current implementation since bit 15 is the - * valid bit in the hash table. - * - A 16bit hash is calculated and masked based on the number of entries - * - 64b wide bucket is used and broken into 4x16bit elements. - * This decision is based on quicker bucket scanning to determine if any - * elements are in use. - * - bit 15 of each bucket element is the valid, this is done to prevent having - * to read the larger key/result data for determining VALID. It also aids - * in the more efficient scanning of the bucket for slot usage. - */ - -/* - * The maximum number of shadow entries supported. The value also doubles as - * the maximum number of hash buckets. There are only 15 bits of data per - * bucket to point to the shadow tables. - */ -#define TF_SHADOW_ENTRIES_MAX (1 << 15) - -/* The number of elements(BE) per hash bucket (HB) */ -#define TF_SHADOW_HB_NUM_ELEM (4) -#define TF_SHADOW_BE_VALID (1 << 15) -#define TF_SHADOW_BE_IS_VALID(be) (((be) & TF_SHADOW_BE_VALID) != 0) - -/** - * The hash bucket handle is 32b - * - bit 31, the Valid bit - * - bit 29-30, the element - * - bits 0-15, the hash idx (is masked based on the allocated size) - */ -#define TF_SHADOW_HB_HANDLE_IS_VALID(hndl) (((hndl) & (1 << 31)) != 0) -#define TF_SHADOW_HB_HANDLE_CREATE(idx, be) ((1 << 31) | \ - ((be) << 29) | (idx)) - -#define TF_SHADOW_HB_HANDLE_BE_GET(hdl) (((hdl) >> 29) & \ - (TF_SHADOW_HB_NUM_ELEM - 1)) - -#define TF_SHADOW_HB_HANDLE_HASH_GET(ctxt, hdl)((hdl) & \ - (ctxt)->hash_ctxt.hid_mask) - -/** - * The idx provided by the caller is within a region, so currently the base is - * either added or subtracted from the idx to ensure it can be used as a - * compressed index - */ - -/* Convert the table index to a shadow index */ -#define TF_SHADOW_IDX_TO_SHIDX(ctxt, idx) ((idx) - \ - (ctxt)->shadow_ctxt.base_addr) - -/* Convert the shadow index to a tbl index */ -#define TF_SHADOW_SHIDX_TO_IDX(ctxt, idx) ((idx) + \ - (ctxt)->shadow_ctxt.base_addr) - -/* Simple helper masks for clearing en element from the bucket */ -#define TF_SHADOW_BE0_MASK_CLEAR(hb) ((hb) & 0xffffffffffff0000ull) -#define TF_SHADOW_BE1_MASK_CLEAR(hb) ((hb) & 0xffffffff0000ffffull) -#define TF_SHADOW_BE2_MASK_CLEAR(hb) ((hb) & 0xffff0000ffffffffull) -#define TF_SHADOW_BE3_MASK_CLEAR(hb) ((hb) & 0x0000ffffffffffffull) - -/** - * This should be coming from external, but for now it is assumed that no key - * is greater than 512 bits (64B). This makes allocation of the key table - * easier without having to allocate on the fly. - */ -#define TF_SHADOW_MAX_KEY_SZ 64 - -/* - * Local only defines for the internal data. - */ - -/** - * tf_shadow_tbl_shadow_key_entry is the key entry of the key table. - * The key stored in the table is the result data of the index table. - */ -struct tf_shadow_tbl_shadow_key_entry { - uint8_t key[TF_SHADOW_MAX_KEY_SZ]; -}; - -/** - * tf_shadow_tbl_shadow_result_entry is the result table entry. - * The result table writes are broken into two phases: - * - The search phase, which stores the hb_handle and key size and - * - The set phase, which writes the refcnt - */ -struct tf_shadow_tbl_shadow_result_entry { - uint16_t key_size; - uint32_t refcnt; - uint32_t hb_handle; -}; - -/** - * tf_shadow_tbl_shadow_ctxt holds all information for accessing the key and - * result tables. - */ -struct tf_shadow_tbl_shadow_ctxt { - struct tf_shadow_tbl_shadow_key_entry *sh_key_tbl; - struct tf_shadow_tbl_shadow_result_entry *sh_res_tbl; - uint32_t base_addr; - uint16_t num_entries; - uint16_t alloc_idx; -}; - -/** - * tf_shadow_tbl_hash_ctxt holds all information related to accessing the hash - * table. - */ -struct tf_shadow_tbl_hash_ctxt { - uint64_t *hashtbl; - uint16_t hid_mask; - uint16_t hash_entries; -}; - -/** - * tf_shadow_tbl_ctxt holds the hash and shadow tables for the current shadow - * table db. This structure is per table table type as each table table has - * it's own shadow and hash table. - */ -struct tf_shadow_tbl_ctxt { - struct tf_shadow_tbl_shadow_ctxt shadow_ctxt; - struct tf_shadow_tbl_hash_ctxt hash_ctxt; -}; - -/** - * tf_shadow_tbl_db is the allocated db structure returned as an opaque - * void * pointer to the caller during create db. It holds the pointers for - * each table associated with the db. - */ -struct tf_shadow_tbl_db { - /* Each context holds the shadow and hash table information */ - struct tf_shadow_tbl_ctxt *ctxt[TF_TBL_TYPE_MAX]; -}; - -/** - * Simple routine that decides what table types can be searchable. - * - */ -static int tf_shadow_tbl_is_searchable(enum tf_tbl_type type) -{ - int rc = 0; - - switch (type) { - case TF_TBL_TYPE_ACT_ENCAP_8B: - case TF_TBL_TYPE_ACT_ENCAP_16B: - case TF_TBL_TYPE_ACT_ENCAP_32B: - case TF_TBL_TYPE_ACT_ENCAP_64B: - case TF_TBL_TYPE_ACT_SP_SMAC: - case TF_TBL_TYPE_ACT_SP_SMAC_IPV4: - case TF_TBL_TYPE_ACT_SP_SMAC_IPV6: - case TF_TBL_TYPE_ACT_MODIFY_IPV4: - rc = 1; - break; - default: - rc = 0; - break; - }; - - return rc; -} - -/** - * Returns the number of entries in the contexts shadow table. - */ -static inline uint16_t -tf_shadow_tbl_sh_num_entries_get(struct tf_shadow_tbl_ctxt *ctxt) -{ - return ctxt->shadow_ctxt.num_entries; -} - -/** - * Compare the give key with the key in the shadow table. - * - * Returns 0 if the keys match - */ -static int -tf_shadow_tbl_key_cmp(struct tf_shadow_tbl_ctxt *ctxt, - uint8_t *key, - uint16_t sh_idx, - uint16_t size) -{ - if (size != ctxt->shadow_ctxt.sh_res_tbl[sh_idx].key_size || - sh_idx >= tf_shadow_tbl_sh_num_entries_get(ctxt) || !key) - return -1; - - return memcmp(key, ctxt->shadow_ctxt.sh_key_tbl[sh_idx].key, size); -} - -/** - * Free the memory associated with the context. - */ -static void -tf_shadow_tbl_ctxt_delete(struct tf_shadow_tbl_ctxt *ctxt) -{ - if (!ctxt) - return; - - tfp_free(ctxt->hash_ctxt.hashtbl); - tfp_free(ctxt->shadow_ctxt.sh_key_tbl); - tfp_free(ctxt->shadow_ctxt.sh_res_tbl); -} - -/** - * The TF Shadow TBL context is per TBL and holds all information relating to - * managing the shadow and search capability. This routine allocated data that - * needs to be deallocated by the tf_shadow_tbl_ctxt_delete prior when deleting - * the shadow db. - */ -static int -tf_shadow_tbl_ctxt_create(struct tf_shadow_tbl_ctxt *ctxt, - uint16_t num_entries, - uint16_t base_addr) -{ - struct tfp_calloc_parms cparms; - uint16_t hash_size = 1; - uint16_t hash_mask; - int rc; - - /* Hash table is a power of two that holds the number of entries */ - if (num_entries > TF_SHADOW_ENTRIES_MAX) { - TFP_DRV_LOG(ERR, "Too many entries for shadow %d > %d\n", - num_entries, - TF_SHADOW_ENTRIES_MAX); - return -ENOMEM; - } - - while (hash_size < num_entries) - hash_size = hash_size << 1; - - hash_mask = hash_size - 1; - - /* Allocate the hash table */ - cparms.nitems = hash_size; - cparms.size = sizeof(uint64_t); - cparms.alignment = 0; - rc = tfp_calloc(&cparms); - if (rc) - goto error; - ctxt->hash_ctxt.hashtbl = cparms.mem_va; - ctxt->hash_ctxt.hid_mask = hash_mask; - ctxt->hash_ctxt.hash_entries = hash_size; - - /* allocate the shadow tables */ - /* allocate the shadow key table */ - cparms.nitems = num_entries; - cparms.size = sizeof(struct tf_shadow_tbl_shadow_key_entry); - cparms.alignment = 0; - rc = tfp_calloc(&cparms); - if (rc) - goto error; - ctxt->shadow_ctxt.sh_key_tbl = cparms.mem_va; - - /* allocate the shadow result table */ - cparms.nitems = num_entries; - cparms.size = sizeof(struct tf_shadow_tbl_shadow_result_entry); - cparms.alignment = 0; - rc = tfp_calloc(&cparms); - if (rc) - goto error; - ctxt->shadow_ctxt.sh_res_tbl = cparms.mem_va; - - ctxt->shadow_ctxt.num_entries = num_entries; - ctxt->shadow_ctxt.base_addr = base_addr; - - return 0; -error: - tf_shadow_tbl_ctxt_delete(ctxt); - - return -ENOMEM; -} - -/** - * Get a shadow table context given the db and the table type - */ -static struct tf_shadow_tbl_ctxt * -tf_shadow_tbl_ctxt_get(struct tf_shadow_tbl_db *shadow_db, - enum tf_tbl_type type) -{ - if (type >= TF_TBL_TYPE_MAX || - !shadow_db || - !shadow_db->ctxt[type]) - return NULL; - - return shadow_db->ctxt[type]; -} - -/** - * Sets the hash entry into the table given the table context, hash bucket - * handle, and shadow index. - */ -static inline int -tf_shadow_tbl_set_hash_entry(struct tf_shadow_tbl_ctxt *ctxt, - uint32_t hb_handle, - uint16_t sh_idx) -{ - uint16_t hid = TF_SHADOW_HB_HANDLE_HASH_GET(ctxt, hb_handle); - uint16_t be = TF_SHADOW_HB_HANDLE_BE_GET(hb_handle); - uint64_t entry = sh_idx | TF_SHADOW_BE_VALID; - - if (hid >= ctxt->hash_ctxt.hash_entries) - return -EINVAL; - - ctxt->hash_ctxt.hashtbl[hid] |= entry << (be * 16); - return 0; -} - -/** - * Clears the hash entry given the TBL context and hash bucket handle. - */ -static inline void -tf_shadow_tbl_clear_hash_entry(struct tf_shadow_tbl_ctxt *ctxt, - uint32_t hb_handle) -{ - uint16_t hid, be; - uint64_t *bucket; - - if (!TF_SHADOW_HB_HANDLE_IS_VALID(hb_handle)) - return; - - hid = TF_SHADOW_HB_HANDLE_HASH_GET(ctxt, hb_handle); - be = TF_SHADOW_HB_HANDLE_BE_GET(hb_handle); - bucket = &ctxt->hash_ctxt.hashtbl[hid]; - - switch (be) { - case 0: - *bucket = TF_SHADOW_BE0_MASK_CLEAR(*bucket); - break; - case 1: - *bucket = TF_SHADOW_BE1_MASK_CLEAR(*bucket); - break; - case 2: - *bucket = TF_SHADOW_BE2_MASK_CLEAR(*bucket); - break; - case 3: - *bucket = TF_SHADOW_BE2_MASK_CLEAR(*bucket); - break; - default: - /* - * Since the BE_GET masks non-inclusive bits, this will not - * happen. - */ - break; - } -} - -/** - * Clears the shadow key and result entries given the table context and - * shadow index. - */ -static void -tf_shadow_tbl_clear_sh_entry(struct tf_shadow_tbl_ctxt *ctxt, - uint16_t sh_idx) -{ - struct tf_shadow_tbl_shadow_key_entry *sk_entry; - struct tf_shadow_tbl_shadow_result_entry *sr_entry; - - if (sh_idx >= tf_shadow_tbl_sh_num_entries_get(ctxt)) - return; - - sk_entry = &ctxt->shadow_ctxt.sh_key_tbl[sh_idx]; - sr_entry = &ctxt->shadow_ctxt.sh_res_tbl[sh_idx]; - - /* - * memset key/result to zero for now, possibly leave the data alone - * in the future and rely on the valid bit in the hash table. - */ - memset(sk_entry, 0, sizeof(struct tf_shadow_tbl_shadow_key_entry)); - memset(sr_entry, 0, sizeof(struct tf_shadow_tbl_shadow_result_entry)); -} - -/** - * Binds the allocated tbl index with the hash and shadow tables. - * The entry will be incomplete until the set has happened with the result - * data. - */ -int -tf_shadow_tbl_bind_index(struct tf_shadow_tbl_bind_index_parms *parms) -{ - int rc; - uint16_t idx, len; - struct tf_shadow_tbl_ctxt *ctxt; - struct tf_shadow_tbl_db *shadow_db; - struct tf_shadow_tbl_shadow_key_entry *sk_entry; - struct tf_shadow_tbl_shadow_result_entry *sr_entry; - - if (!parms || !TF_SHADOW_HB_HANDLE_IS_VALID(parms->hb_handle) || - !parms->data) { - TFP_DRV_LOG(ERR, "Invalid parms\n"); - return -EINVAL; - } - - shadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db; - ctxt = tf_shadow_tbl_ctxt_get(shadow_db, parms->type); - if (!ctxt) { - TFP_DRV_LOG(DEBUG, "%s no ctxt for table\n", - tf_tbl_type_2_str(parms->type)); - return -EINVAL; - } - - idx = TF_SHADOW_IDX_TO_SHIDX(ctxt, parms->idx); - len = parms->data_sz_in_bytes; - if (idx >= tf_shadow_tbl_sh_num_entries_get(ctxt) || - len > TF_SHADOW_MAX_KEY_SZ) { - TFP_DRV_LOG(ERR, "%s:%s Invalid len (%d) > %d || oob idx %d\n", - tf_dir_2_str(parms->dir), - tf_tbl_type_2_str(parms->type), - len, - TF_SHADOW_MAX_KEY_SZ, idx); - - return -EINVAL; - } - - rc = tf_shadow_tbl_set_hash_entry(ctxt, parms->hb_handle, idx); - if (rc) - return -EINVAL; - - sk_entry = &ctxt->shadow_ctxt.sh_key_tbl[idx]; - sr_entry = &ctxt->shadow_ctxt.sh_res_tbl[idx]; - - /* For tables, the data is the key */ - memcpy(sk_entry->key, parms->data, len); - - /* Write the result table */ - sr_entry->key_size = len; - sr_entry->hb_handle = parms->hb_handle; - sr_entry->refcnt = 1; - - return 0; -} - -/** - * Deletes hash/shadow information if no more references. - * - * Returns 0 - The caller should delete the table entry in hardware. - * Returns non-zero - The number of references to the entry - */ -int -tf_shadow_tbl_remove(struct tf_shadow_tbl_remove_parms *parms) -{ - uint16_t idx; - uint32_t hb_handle; - struct tf_shadow_tbl_ctxt *ctxt; - struct tf_shadow_tbl_db *shadow_db; - struct tf_tbl_free_parms *fparms; - struct tf_shadow_tbl_shadow_result_entry *sr_entry; - - if (!parms || !parms->fparms) { - TFP_DRV_LOG(ERR, "Invalid parms\n"); - return -EINVAL; - } - - fparms = parms->fparms; - if (!tf_shadow_tbl_is_searchable(fparms->type)) - return 0; - /* - * Initialize the ref count to zero. The default would be to remove - * the entry. - */ - fparms->ref_cnt = 0; - - shadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db; - ctxt = tf_shadow_tbl_ctxt_get(shadow_db, fparms->type); - if (!ctxt) { - TFP_DRV_LOG(DEBUG, "%s no ctxt for table\n", - tf_tbl_type_2_str(fparms->type)); - return 0; - } - - idx = TF_SHADOW_IDX_TO_SHIDX(ctxt, fparms->idx); - if (idx >= tf_shadow_tbl_sh_num_entries_get(ctxt)) { - TFP_DRV_LOG(DEBUG, "%s %d >= %d\n", - tf_tbl_type_2_str(fparms->type), - fparms->idx, - tf_shadow_tbl_sh_num_entries_get(ctxt)); - return 0; - } - - sr_entry = &ctxt->shadow_ctxt.sh_res_tbl[idx]; - if (sr_entry->refcnt <= 1) { - hb_handle = sr_entry->hb_handle; - tf_shadow_tbl_clear_hash_entry(ctxt, hb_handle); - tf_shadow_tbl_clear_sh_entry(ctxt, idx); - } else { - sr_entry->refcnt--; - fparms->ref_cnt = sr_entry->refcnt; - } - - return 0; -} - -int -tf_shadow_tbl_search(struct tf_shadow_tbl_search_parms *parms) -{ - uint16_t len; - uint64_t bucket; - uint32_t i, hid32; - struct tf_shadow_tbl_ctxt *ctxt; - struct tf_shadow_tbl_db *shadow_db; - uint16_t hid16, hb_idx, hid_mask, shtbl_idx, shtbl_key, be_valid; - struct tf_tbl_alloc_search_parms *sparms; - uint32_t be_avail = TF_SHADOW_HB_NUM_ELEM; - - if (!parms || !parms->sparms) { - TFP_DRV_LOG(ERR, "tbl search with invalid parms\n"); - return -EINVAL; - } - - sparms = parms->sparms; - /* Check that caller was supposed to call search */ - if (!tf_shadow_tbl_is_searchable(sparms->type)) - return -EINVAL; - - /* Initialize return values to invalid */ - sparms->hit = 0; - sparms->search_status = REJECT; - parms->hb_handle = 0; - sparms->ref_cnt = 0; - - shadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db; - ctxt = tf_shadow_tbl_ctxt_get(shadow_db, sparms->type); - if (!ctxt) { - TFP_DRV_LOG(ERR, "%s Unable to get tbl mgr context\n", - tf_tbl_type_2_str(sparms->type)); - return -EINVAL; - } - - len = sparms->result_sz_in_bytes; - if (len > TF_SHADOW_MAX_KEY_SZ || !sparms->result || !len) { - TFP_DRV_LOG(ERR, "%s:%s Invalid parms %d : %p\n", - tf_dir_2_str(sparms->dir), - tf_tbl_type_2_str(sparms->type), - len, - sparms->result); - return -EINVAL; - } - - /* - * Calculate the crc32 - * Fold it to create a 16b value - * Reduce it to fit the table - */ - hid32 = tf_hash_calc_crc32(sparms->result, len); - hid16 = (uint16_t)(((hid32 >> 16) & 0xffff) ^ (hid32 & 0xffff)); - hid_mask = ctxt->hash_ctxt.hid_mask; - hb_idx = hid16 & hid_mask; - - bucket = ctxt->hash_ctxt.hashtbl[hb_idx]; - if (!bucket) { - /* empty bucket means a miss and available entry */ - sparms->search_status = MISS; - parms->hb_handle = TF_SHADOW_HB_HANDLE_CREATE(hb_idx, 0); - sparms->idx = 0; - return 0; - } - - /* Set the avail to max so we can detect when there is an avail entry */ - be_avail = TF_SHADOW_HB_NUM_ELEM; - for (i = 0; i < TF_SHADOW_HB_NUM_ELEM; i++) { - shtbl_idx = (uint16_t)((bucket >> (i * 16)) & 0xffff); - be_valid = TF_SHADOW_BE_IS_VALID(shtbl_idx); - if (!be_valid) { - /* The element is avail, keep going */ - be_avail = i; - continue; - } - /* There is a valid entry, compare it */ - shtbl_key = shtbl_idx & ~TF_SHADOW_BE_VALID; - if (!tf_shadow_tbl_key_cmp(ctxt, - sparms->result, - shtbl_key, - len)) { - /* - * It matches, increment the ref count if the caller - * requested allocation and return the info - */ - if (sparms->alloc) - ctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt = - ctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt + 1; - - sparms->hit = 1; - sparms->search_status = HIT; - parms->hb_handle = - TF_SHADOW_HB_HANDLE_CREATE(hb_idx, i); - sparms->idx = TF_SHADOW_SHIDX_TO_IDX(ctxt, shtbl_key); - sparms->ref_cnt = - ctxt->shadow_ctxt.sh_res_tbl[shtbl_key].refcnt; - - return 0; - } - } - - /* No hits, return avail entry if exists */ - if (be_avail < TF_SHADOW_HB_NUM_ELEM) { - /* - * There is an available hash entry, so return MISS and the - * hash handle for the subsequent bind. - */ - parms->hb_handle = TF_SHADOW_HB_HANDLE_CREATE(hb_idx, be_avail); - sparms->search_status = MISS; - sparms->hit = 0; - sparms->idx = 0; - } else { - /* No room for the entry in the hash table, must REJECT */ - sparms->search_status = REJECT; - } - - return 0; -} - -int -tf_shadow_tbl_insert(struct tf_shadow_tbl_insert_parms *parms) -{ - uint16_t idx; - struct tf_shadow_tbl_ctxt *ctxt; - struct tf_tbl_set_parms *sparms; - struct tf_shadow_tbl_db *shadow_db; - struct tf_shadow_tbl_shadow_result_entry *sr_entry; - - if (!parms || !parms->sparms) { - TFP_DRV_LOG(ERR, "Null parms\n"); - return -EINVAL; - } - - sparms = parms->sparms; - if (!sparms->data || !sparms->data_sz_in_bytes) { - TFP_DRV_LOG(ERR, "%s:%s No result to set.\n", - tf_dir_2_str(sparms->dir), - tf_tbl_type_2_str(sparms->type)); - return -EINVAL; - } - - shadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db; - ctxt = tf_shadow_tbl_ctxt_get(shadow_db, sparms->type); - if (!ctxt) { - /* We aren't tracking this table, so return success */ - TFP_DRV_LOG(DEBUG, "%s Unable to get tbl mgr context\n", - tf_tbl_type_2_str(sparms->type)); - return 0; - } - - idx = TF_SHADOW_IDX_TO_SHIDX(ctxt, sparms->idx); - if (idx >= tf_shadow_tbl_sh_num_entries_get(ctxt)) { - TFP_DRV_LOG(ERR, "%s:%s Invalid idx(0x%x)\n", - tf_dir_2_str(sparms->dir), - tf_tbl_type_2_str(sparms->type), - sparms->idx); - return -EINVAL; - } - - /* Write the result table, the key/hash has been written already */ - sr_entry = &ctxt->shadow_ctxt.sh_res_tbl[idx]; - - /* - * If the handle is not valid, the bind was never called. We aren't - * tracking this entry. - */ - if (!TF_SHADOW_HB_HANDLE_IS_VALID(sr_entry->hb_handle)) - return 0; - - return 0; -} - -int -tf_shadow_tbl_free_db(struct tf_shadow_tbl_free_db_parms *parms) -{ - struct tf_shadow_tbl_db *shadow_db; - int i; - - TF_CHECK_PARMS1(parms); - - shadow_db = (struct tf_shadow_tbl_db *)parms->shadow_db; - if (!shadow_db) { - TFP_DRV_LOG(DEBUG, "Shadow db is NULL cannot be freed\n"); - return -EINVAL; - } - - for (i = 0; i < TF_TBL_TYPE_MAX; i++) { - if (shadow_db->ctxt[i]) { - tf_shadow_tbl_ctxt_delete(shadow_db->ctxt[i]); - tfp_free(shadow_db->ctxt[i]); - } - } - - tfp_free(shadow_db); - - return 0; -} - -/** - * Allocate the table resources for search and allocate - * - */ -int tf_shadow_tbl_create_db(struct tf_shadow_tbl_create_db_parms *parms) -{ - int rc; - int i; - uint16_t base; - struct tfp_calloc_parms cparms; - struct tf_shadow_tbl_db *shadow_db = NULL; - - TF_CHECK_PARMS1(parms); - - /* Build the shadow DB per the request */ - cparms.nitems = 1; - cparms.size = sizeof(struct tf_shadow_tbl_db); - cparms.alignment = 0; - rc = tfp_calloc(&cparms); - if (rc) - return rc; - shadow_db = (void *)cparms.mem_va; - - for (i = 0; i < TF_TBL_TYPE_MAX; i++) { - /* If the element didn't request an allocation no need - * to create a pool nor verify if we got a reservation. - */ - if (!parms->cfg->alloc_cnt[i] || - !tf_shadow_tbl_is_searchable(i)) { - shadow_db->ctxt[i] = NULL; - continue; - } - - cparms.nitems = 1; - cparms.size = sizeof(struct tf_shadow_tbl_ctxt); - cparms.alignment = 0; - rc = tfp_calloc(&cparms); - if (rc) - goto error; - - shadow_db->ctxt[i] = cparms.mem_va; - base = parms->cfg->base_addr[i]; - rc = tf_shadow_tbl_ctxt_create(shadow_db->ctxt[i], - parms->cfg->alloc_cnt[i], - base); - if (rc) - goto error; - } - - *parms->shadow_db = (void *)shadow_db; - - TFP_DRV_LOG(INFO, - "TF SHADOW TABLE - initialized\n"); - - return 0; -error: - for (i = 0; i < TF_TBL_TYPE_MAX; i++) { - if (shadow_db->ctxt[i]) { - tf_shadow_tbl_ctxt_delete(shadow_db->ctxt[i]); - tfp_free(shadow_db->ctxt[i]); - } - } - - tfp_free(shadow_db); - - return -ENOMEM; -} diff --git a/drivers/net/bnxt/tf_core/tf_shadow_tbl.h b/drivers/net/bnxt/tf_core/tf_shadow_tbl.h deleted file mode 100644 index 354240efce..0000000000 --- a/drivers/net/bnxt/tf_core/tf_shadow_tbl.h +++ /dev/null @@ -1,256 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom - * All rights reserved. - */ - -#ifndef _TF_SHADOW_TBL_H_ -#define _TF_SHADOW_TBL_H_ - -#include "tf_core.h" - -/** - * The Shadow Table module provides shadow DB handling for table based - * TF types. A shadow DB provides the capability that allows for reuse - * of TF resources. - * - * A Shadow table DB is intended to be used by the Table Type module - * only. - */ - -/** - * Shadow DB configuration information for a single table type. - * - * During Device initialization the HCAPI device specifics are learned - * and as well as the RM DB creation. From that those initial steps - * this structure can be populated. - * - * NOTE: - * If used in an array of table types then such array must be ordered - * by the TF type is represents. - */ -struct tf_shadow_tbl_cfg_parms { - /** - * [in] The number of elements in the alloc_cnt and base_addr - * For now, it should always be equal to TF_TBL_TYPE_MAX - */ - int num_entries; - - /** - * [in] Resource allocation count array - * This array content originates from the tf_session_resources - * that is passed in on session open - * Array size is TF_TBL_TYPE_MAX - */ - uint16_t *alloc_cnt; - /** - * [in] The base index for each table - */ - uint16_t base_addr[TF_TBL_TYPE_MAX]; -}; - -/** - * Shadow table DB creation parameters - */ -struct tf_shadow_tbl_create_db_parms { - /** - * [in] Receive or transmit direction - */ - enum tf_dir dir; - /** - * [in] Configuration information for the shadow db - */ - struct tf_shadow_tbl_cfg_parms *cfg; - /** - * [out] Shadow table DB handle - */ - void **shadow_db; -}; - -/** - * Shadow table DB free parameters - */ -struct tf_shadow_tbl_free_db_parms { - /** - * [in] Shadow table DB handle - */ - void *shadow_db; -}; - -/** - * Shadow table search parameters - */ -struct tf_shadow_tbl_search_parms { - /** - * [in] Shadow table DB handle - */ - void *shadow_db; - /** - * [in,out] The search parms from tf core - */ - struct tf_tbl_alloc_search_parms *sparms; - /** - * [out] Reference count incremented if hit - */ - uint32_t hb_handle; -}; - -/** - * Shadow Table bind index parameters - */ -struct tf_shadow_tbl_bind_index_parms { - /** - * [in] Shadow tcam DB handle - */ - void *shadow_db; - /** - * [in] receive or transmit direction - */ - enum tf_dir dir; - /** - * [in] TCAM table type - */ - enum tf_tbl_type type; - /** - * [in] index of the entry to program - */ - uint16_t idx; - /** - * [in] struct containing key - */ - uint8_t *data; - /** - * [in] data size in bytes - */ - uint16_t data_sz_in_bytes; - /** - * [in] The hash bucket handled returned from the search - */ - uint32_t hb_handle; -}; - -/** - * Shadow table insert parameters - */ -struct tf_shadow_tbl_insert_parms { - /** - * [in] Shadow table DB handle - */ - void *shadow_db; - /** - * [in] The insert parms from tf core - */ - struct tf_tbl_set_parms *sparms; -}; - -/** - * Shadow table remove parameters - */ -struct tf_shadow_tbl_remove_parms { - /** - * [in] Shadow table DB handle - */ - void *shadow_db; - /** - * [in] The free parms from tf core - */ - struct tf_tbl_free_parms *fparms; -}; - -/** - * @page shadow_tbl Shadow table DB - * - * @ref tf_shadow_tbl_create_db - * - * @ref tf_shadow_tbl_free_db - * - * @reg tf_shadow_tbl_search - * - * @reg tf_shadow_tbl_insert - * - * @reg tf_shadow_tbl_remove - */ - -/** - * Creates and fills a Shadow table DB. The DB is indexed per the - * parms structure. - * - * [in] parms - * Pointer to create db parameters - * - * Returns - * - (0) if successful. - * - (-EINVAL) on failure. - */ -int tf_shadow_tbl_create_db(struct tf_shadow_tbl_create_db_parms *parms); - -/** - * Closes the Shadow table DB and frees all allocated - * resources per the associated database. - * - * [in] parms - * Pointer to the free DB parameters - * - * Returns - * - (0) if successful. - * - (-EINVAL) on failure. - */ -int tf_shadow_tbl_free_db(struct tf_shadow_tbl_free_db_parms *parms); - -/** - * Search Shadow table db for matching result - * - * [in] parms - * Pointer to the search parameters - * - * Returns - * - (0) if successful, element was found. - * - (-EINVAL) on failure. - * - * If there is a miss, but there is room for insertion, the hb_handle returned - * is used for insertion during the bind index API - */ -int tf_shadow_tbl_search(struct tf_shadow_tbl_search_parms *parms); - -/** - * Bind Shadow table db hash and result tables with result from search/alloc - * - * [in] parms - * Pointer to the search parameters - * - * Returns - * - (0) if successful - * - (-EINVAL) on failure. - * - * This is only called after a MISS in the search returns a hb_handle - */ -int tf_shadow_tbl_bind_index(struct tf_shadow_tbl_bind_index_parms *parms); - -/** - * Inserts an element into the Shadow table DB. Will fail if the - * elements ref_count is different from 0. Ref_count after insert will - * be incremented. - * - * [in] parms - * Pointer to insert parameters - * - * Returns - * - (0) if successful. - * - (-EINVAL) on failure. - */ -int tf_shadow_tbl_insert(struct tf_shadow_tbl_insert_parms *parms); - -/** - * Removes an element from the Shadow table DB. Will fail if the - * elements ref_count is 0. Ref_count after removal will be - * decremented. - * - * [in] parms - * Pointer to remove parameter - * - * Returns - * - (0) if successful. - * - (-EINVAL) on failure. - */ -int tf_shadow_tbl_remove(struct tf_shadow_tbl_remove_parms *parms); - -#endif /* _TF_SHADOW_TBL_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index 67a43311cc..7d15c3c5d4 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -13,11 +13,9 @@ #include "tf_util.h" #include "tf_msg.h" #include "tfp.h" -#include "tf_shadow_tbl.h" #include "tf_session.h" #include "tf_device.h" - struct tf; /** @@ -44,13 +42,7 @@ int tf_tbl_bind(struct tf *tfp, struct tf_tbl_cfg_parms *parms) { - int rc, d, i; - struct tf_rm_alloc_info info; - struct tf_rm_free_db_parms fparms; - struct tf_shadow_tbl_free_db_parms fshadow; - struct tf_rm_get_alloc_info_parms ainfo; - struct tf_shadow_tbl_cfg_parms shadow_cfg; - struct tf_shadow_tbl_create_db_parms shadow_cdb; + int rc, d; struct tf_rm_create_db_parms db_cfg = { 0 }; TF_CHECK_PARMS2(tfp, parms); @@ -62,7 +54,7 @@ tf_tbl_bind(struct tf *tfp, } db_cfg.num_elements = parms->num_elements; - db_cfg.type = TF_DEVICE_MODULE_TYPE_TABLE; + db_cfg.module = TF_MODULE_TYPE_TABLE; db_cfg.num_elements = parms->num_elements; db_cfg.cfg = parms->cfg; @@ -80,72 +72,12 @@ tf_tbl_bind(struct tf *tfp, } } - /* Initialize the Shadow Table. */ - if (parms->shadow_copy) { - for (d = 0; d < TF_DIR_MAX; d++) { - memset(&shadow_cfg, 0, sizeof(shadow_cfg)); - memset(&shadow_cdb, 0, sizeof(shadow_cdb)); - /* Get the base addresses of the tables */ - for (i = 0; i < TF_TBL_TYPE_MAX; i++) { - memset(&info, 0, sizeof(info)); - - if (!parms->resources->tbl_cnt[d].cnt[i]) - continue; - ainfo.rm_db = tbl_db[d]; - ainfo.db_index = i; - ainfo.info = &info; - rc = tf_rm_get_info(&ainfo); - if (rc) - goto error; - - shadow_cfg.base_addr[i] = info.entry.start; - } - - /* Create the shadow db */ - shadow_cfg.alloc_cnt = - parms->resources->tbl_cnt[d].cnt; - shadow_cfg.num_entries = parms->num_elements; - - shadow_cdb.shadow_db = &shadow_tbl_db[d]; - shadow_cdb.cfg = &shadow_cfg; - rc = tf_shadow_tbl_create_db(&shadow_cdb); - if (rc) { - TFP_DRV_LOG(ERR, - "Shadow TBL DB creation failed " - "rc=%d\n", rc); - goto error; - } - } - shadow_init = 1; - } - init = 1; TFP_DRV_LOG(INFO, "Table Type - initialized\n"); return 0; -error: - for (d = 0; d < TF_DIR_MAX; d++) { - memset(&fparms, 0, sizeof(fparms)); - fparms.dir = d; - fparms.rm_db = tbl_db[d]; - /* Ignoring return here since we are in the error case */ - (void)tf_rm_free_db(tfp, &fparms); - - if (parms->shadow_copy) { - fshadow.shadow_db = shadow_tbl_db[d]; - tf_shadow_tbl_free_db(&fshadow); - shadow_tbl_db[d] = NULL; - } - - tbl_db[d] = NULL; - } - - shadow_init = 0; - init = 0; - - return rc; } int @@ -154,8 +86,6 @@ tf_tbl_unbind(struct tf *tfp) int rc; int i; struct tf_rm_free_db_parms fparms = { 0 }; - struct tf_shadow_tbl_free_db_parms fshadow; - TF_CHECK_PARMS1(tfp); /* Bail if nothing has been initialized */ @@ -173,13 +103,6 @@ tf_tbl_unbind(struct tf *tfp) return rc; tbl_db[i] = NULL; - - if (shadow_init) { - memset(&fshadow, 0, sizeof(fshadow)); - fshadow.shadow_db = shadow_tbl_db[i]; - tf_shadow_tbl_free_db(&fshadow); - shadow_tbl_db[i] = NULL; - } } init = 0; @@ -207,7 +130,7 @@ tf_tbl_alloc(struct tf *tfp __rte_unused, /* Allocate requested element */ aparms.rm_db = tbl_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = &idx; rc = tf_rm_allocate(&aparms); if (rc) { @@ -230,7 +153,6 @@ tf_tbl_free(struct tf *tfp __rte_unused, int rc; struct tf_rm_is_allocated_parms aparms = { 0 }; struct tf_rm_free_parms fparms = { 0 }; - struct tf_shadow_tbl_remove_parms shparms; int allocated = 0; TF_CHECK_PARMS2(tfp, parms); @@ -244,7 +166,7 @@ tf_tbl_free(struct tf *tfp __rte_unused, /* Check if element is in use */ aparms.rm_db = tbl_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = parms->idx; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); @@ -259,40 +181,9 @@ tf_tbl_free(struct tf *tfp __rte_unused, parms->idx); return -EINVAL; } - - /* - * The Shadow mgmt, if enabled, determines if the entry needs - * to be deleted. - */ - if (shadow_init) { - memset(&shparms, 0, sizeof(shparms)); - shparms.shadow_db = shadow_tbl_db[parms->dir]; - shparms.fparms = parms; - rc = tf_shadow_tbl_remove(&shparms); - if (rc) { - /* - * Should not get here, log it and let the entry be - * deleted. - */ - TFP_DRV_LOG(ERR, "%s: Shadow free fail, " - "type:%d index:%d deleting the entry.\n", - tf_dir_2_str(parms->dir), - parms->type, - parms->idx); - } else { - /* - * If the entry still has references, just return the - * ref count to the caller. No need to remove entry - * from rm. - */ - if (parms->ref_cnt >= 1) - return rc; - } - } - /* Free requested element */ fparms.rm_db = tbl_db[parms->dir]; - fparms.db_index = parms->type; + fparms.subtype = parms->type; fparms.index = parms->idx; rc = tf_rm_free(&fparms); if (rc) { @@ -311,15 +202,7 @@ int tf_tbl_alloc_search(struct tf *tfp, struct tf_tbl_alloc_search_parms *parms) { - int rc, frc; - uint32_t idx; - struct tf_session *tfs; - struct tf_dev_info *dev; - struct tf_tbl_alloc_parms aparms; - struct tf_shadow_tbl_search_parms sparms; - struct tf_shadow_tbl_bind_index_parms bparms; - struct tf_tbl_free_parms fparms; - + int rc = 0; TF_CHECK_PARMS2(tfp, parms); if (!shadow_init || !shadow_tbl_db[parms->dir]) { @@ -328,103 +211,6 @@ tf_tbl_alloc_search(struct tf *tfp, return -EINVAL; } - memset(&sparms, 0, sizeof(sparms)); - sparms.sparms = parms; - sparms.shadow_db = shadow_tbl_db[parms->dir]; - rc = tf_shadow_tbl_search(&sparms); - if (rc) - return rc; - - /* - * The app didn't request us to alloc the entry, so return now. - * The hit should have been updated in the original search parm. - */ - if (!parms->alloc || parms->search_status != MISS) - return rc; - - /* Retrieve the session information */ - rc = tf_session_get_session(tfp, &tfs); - if (rc) { - TFP_DRV_LOG(ERR, - "%s: Failed to lookup session, rc:%s\n", - tf_dir_2_str(parms->dir), - strerror(-rc)); - return rc; - } - - /* Retrieve the device information */ - rc = tf_session_get_device(tfs, &dev); - if (rc) { - TFP_DRV_LOG(ERR, - "%s: Failed to lookup device, rc:%s\n", - tf_dir_2_str(parms->dir), - strerror(-rc)); - return rc; - } - - /* Allocate the index */ - if (dev->ops->tf_dev_alloc_tbl == NULL) { - rc = -EOPNOTSUPP; - TFP_DRV_LOG(ERR, - "%s: Operation not supported, rc:%s\n", - tf_dir_2_str(parms->dir), - strerror(-rc)); - return -EOPNOTSUPP; - } - - memset(&aparms, 0, sizeof(aparms)); - aparms.dir = parms->dir; - aparms.type = parms->type; - aparms.tbl_scope_id = parms->tbl_scope_id; - aparms.idx = &idx; - rc = dev->ops->tf_dev_alloc_tbl(tfp, &aparms); - if (rc) { - TFP_DRV_LOG(ERR, - "%s: Table allocation failed, rc:%s\n", - tf_dir_2_str(parms->dir), - strerror(-rc)); - return rc; - } - - /* Bind the allocated index to the data */ - memset(&bparms, 0, sizeof(bparms)); - bparms.shadow_db = shadow_tbl_db[parms->dir]; - bparms.dir = parms->dir; - bparms.type = parms->type; - bparms.idx = idx; - bparms.data = parms->result; - bparms.data_sz_in_bytes = parms->result_sz_in_bytes; - bparms.hb_handle = sparms.hb_handle; - rc = tf_shadow_tbl_bind_index(&bparms); - if (rc) { - /* Error binding entry, need to free the allocated idx */ - if (dev->ops->tf_dev_free_tbl == NULL) { - rc = -EOPNOTSUPP; - TFP_DRV_LOG(ERR, - "%s: Operation not supported, rc:%s\n", - tf_dir_2_str(parms->dir), - strerror(-rc)); - return rc; - } - - memset(&fparms, 0, sizeof(fparms)); - fparms.dir = parms->dir; - fparms.type = parms->type; - fparms.idx = idx; - frc = dev->ops->tf_dev_free_tbl(tfp, &fparms); - if (frc) { - TFP_DRV_LOG(ERR, - "%s: Failed free index allocated during " - "search. rc=%s\n", - tf_dir_2_str(parms->dir), - strerror(-frc)); - /* return the original failure. */ - return rc; - } - } - - parms->idx = idx; - return rc; } @@ -449,7 +235,7 @@ tf_tbl_set(struct tf *tfp, /* Verify that the entry has been previously allocated */ aparms.rm_db = tbl_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = parms->idx; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); @@ -467,7 +253,7 @@ tf_tbl_set(struct tf *tfp, /* Set the entry */ hparms.rm_db = tbl_db[parms->dir]; - hparms.db_index = parms->type; + hparms.subtype = parms->type; hparms.hcapi_type = &hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); if (rc) { @@ -518,7 +304,7 @@ tf_tbl_get(struct tf *tfp, /* Verify that the entry has been previously allocated */ aparms.rm_db = tbl_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = parms->idx; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); @@ -536,7 +322,7 @@ tf_tbl_get(struct tf *tfp, /* Set the entry */ hparms.rm_db = tbl_db[parms->dir]; - hparms.db_index = parms->type; + hparms.subtype = parms->type; hparms.hcapi_type = &hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); if (rc) { @@ -588,7 +374,7 @@ tf_tbl_bulk_get(struct tf *tfp, /* Verify that the entries are in the range of reserved resources. */ cparms.rm_db = tbl_db[parms->dir]; - cparms.db_index = parms->type; + cparms.subtype = parms->type; cparms.starting_index = parms->starting_idx; cparms.num_entries = parms->num_entries; @@ -605,7 +391,7 @@ tf_tbl_bulk_get(struct tf *tfp, } hparms.rm_db = tbl_db[parms->dir]; - hparms.db_index = parms->type; + hparms.subtype = parms->type; hparms.hcapi_type = &hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); if (rc) { diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index a18d0e1e19..42d503f500 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -71,7 +71,7 @@ tf_tcam_bind(struct tf *tfp, memset(&db_cfg, 0, sizeof(db_cfg)); - db_cfg.type = TF_DEVICE_MODULE_TYPE_TCAM; + db_cfg.module = TF_MODULE_TYPE_TCAM; db_cfg.num_elements = parms->num_elements; db_cfg.cfg = parms->cfg; @@ -100,7 +100,7 @@ tf_tcam_bind(struct tf *tfp, if (!parms->resources->tcam_cnt[d].cnt[i]) continue; ainfo.rm_db = tcam_db[d]; - ainfo.db_index = i; + ainfo.subtype = i; ainfo.info = &info; rc = tf_rm_get_info(&ainfo); if (rc) @@ -248,7 +248,7 @@ tf_tcam_alloc(struct tf *tfp, memset(&aparms, 0, sizeof(aparms)); aparms.rm_db = tcam_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.priority = parms->priority; aparms.index = (uint32_t *)&parms->idx; rc = tf_rm_allocate(&aparms); @@ -331,7 +331,7 @@ tf_tcam_free(struct tf *tfp, memset(&aparms, 0, sizeof(aparms)); aparms.rm_db = tcam_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = parms->idx / num_slice_per_row; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); @@ -379,7 +379,7 @@ tf_tcam_free(struct tf *tfp, /* Free requested element */ memset(&fparms, 0, sizeof(fparms)); fparms.rm_db = tcam_db[parms->dir]; - fparms.db_index = parms->type; + fparms.subtype = parms->type; fparms.index = parms->idx / num_slice_per_row; rc = tf_rm_free(&fparms); if (rc) { @@ -421,7 +421,7 @@ tf_tcam_free(struct tf *tfp, memset(&hparms, 0, sizeof(hparms)); hparms.rm_db = tcam_db[parms->dir]; - hparms.db_index = parms->type; + hparms.subtype = parms->type; hparms.hcapi_type = &parms->hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); @@ -625,7 +625,7 @@ tf_tcam_set(struct tf *tfp __rte_unused, memset(&aparms, 0, sizeof(aparms)); aparms.rm_db = tcam_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = parms->idx / num_slice_per_row; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); @@ -645,7 +645,7 @@ tf_tcam_set(struct tf *tfp __rte_unused, memset(&hparms, 0, sizeof(hparms)); hparms.rm_db = tcam_db[parms->dir]; - hparms.db_index = parms->type; + hparms.subtype = parms->type; hparms.hcapi_type = &parms->hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); @@ -736,7 +736,7 @@ tf_tcam_get(struct tf *tfp __rte_unused, memset(&aparms, 0, sizeof(aparms)); aparms.rm_db = tcam_db[parms->dir]; - aparms.db_index = parms->type; + aparms.subtype = parms->type; aparms.index = parms->idx / num_slice_per_row; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); @@ -756,7 +756,7 @@ tf_tcam_get(struct tf *tfp __rte_unused, memset(&hparms, 0, sizeof(hparms)); hparms.rm_db = tcam_db[parms->dir]; - hparms.db_index = parms->type; + hparms.subtype = parms->type; hparms.hcapi_type = &parms->hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); diff --git a/drivers/net/bnxt/tf_core/tf_util.c b/drivers/net/bnxt/tf_core/tf_util.c index 74c8f26204..b4d47d5a8c 100644 --- a/drivers/net/bnxt/tf_core/tf_util.c +++ b/drivers/net/bnxt/tf_core/tf_util.c @@ -137,34 +137,34 @@ tf_em_tbl_type_2_str(enum tf_em_tbl_type em_type) } const char * -tf_device_module_type_subtype_2_str(enum tf_device_module_type dm_type, - uint16_t mod_type) +tf_module_subtype_2_str(enum tf_module_type module, + uint16_t subtype) { - switch (dm_type) { - case TF_DEVICE_MODULE_TYPE_IDENTIFIER: - return tf_ident_2_str(mod_type); - case TF_DEVICE_MODULE_TYPE_TABLE: - return tf_tbl_type_2_str(mod_type); - case TF_DEVICE_MODULE_TYPE_TCAM: - return tf_tcam_tbl_2_str(mod_type); - case TF_DEVICE_MODULE_TYPE_EM: - return tf_em_tbl_type_2_str(mod_type); + switch (module) { + case TF_MODULE_TYPE_IDENTIFIER: + return tf_ident_2_str(subtype); + case TF_MODULE_TYPE_TABLE: + return tf_tbl_type_2_str(subtype); + case TF_MODULE_TYPE_TCAM: + return tf_tcam_tbl_2_str(subtype); + case TF_MODULE_TYPE_EM: + return tf_em_tbl_type_2_str(subtype); default: - return "Invalid Device Module type"; + return "Invalid Module type"; } } const char * -tf_device_module_type_2_str(enum tf_device_module_type dm_type) +tf_module_2_str(enum tf_module_type module) { - switch (dm_type) { - case TF_DEVICE_MODULE_TYPE_IDENTIFIER: + switch (module) { + case TF_MODULE_TYPE_IDENTIFIER: return "Identifier"; - case TF_DEVICE_MODULE_TYPE_TABLE: + case TF_MODULE_TYPE_TABLE: return "Table"; - case TF_DEVICE_MODULE_TYPE_TCAM: + case TF_MODULE_TYPE_TCAM: return "TCAM"; - case TF_DEVICE_MODULE_TYPE_EM: + case TF_MODULE_TYPE_EM: return "EM"; default: return "Invalid Device Module type"; diff --git a/drivers/net/bnxt/tf_core/tf_util.h b/drivers/net/bnxt/tf_core/tf_util.h index 4225c756f6..1aa35b6b82 100644 --- a/drivers/net/bnxt/tf_core/tf_util.h +++ b/drivers/net/bnxt/tf_core/tf_util.h @@ -65,34 +65,30 @@ const char *tf_tbl_type_2_str(enum tf_tbl_type tbl_type); const char *tf_em_tbl_type_2_str(enum tf_em_tbl_type em_type); /** - * Helper function converting device module type and module type to + * Helper function converting module and submodule type to * text string. * - * [in] dm_type - * Device Module type + * [in] module + * Module type * - * [in] mod_type - * Module specific type + * [in] submodule + * Module specific subtype * * Returns: * Pointer to a char string holding the string for the EM type */ -const char *tf_device_module_type_subtype_2_str - (enum tf_device_module_type dm_type, - uint16_t mod_type); +const char *tf_module_subtype_2_str(enum tf_module_type module, + uint16_t subtype); /** - * Helper function converting device module type to text string + * Helper function converting module type to text string * - * [in] dm_type - * Device Module type - * - * [in] mod_type - * Module specific type + * [in] module + * Module type * * Returns: * Pointer to a char string holding the string for the EM type */ -const char *tf_device_module_type_2_str(enum tf_device_module_type dm_type); +const char *tf_module_2_str(enum tf_module_type module); #endif /* _TF_UTIL_H_ */ From patchwork Sun Jun 13 00:06:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94103 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A5983A0C41; Sun, 13 Jun 2021 02:08:12 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 74D2F41150; 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Sat, 12 Jun 2021 17:07:09 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.08 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:08 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Randy Schacher , Venkat Duvvuru , Farah Smith Date: Sat, 12 Jun 2021 17:06:03 -0700 Message-Id: <20210613000652.28191-10-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 09/58] net/bnxt: add Thor WC TCAM support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding 1. Add set/get/free/alloc for WC TCAM 2. Rework the key size in slice management. 3. Add 3 FKB WC keys for WC TCAM set cli cmd 4. Add transform key function for WC TCAM FKB key 5. Add checking for key buffer length for get_tcam Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_core.c | 2 + drivers/net/bnxt/tf_core/tf_core.h | 5 +- drivers/net/bnxt/tf_core/tf_device_p4.c | 2 - drivers/net/bnxt/tf_core/tf_device_p58.c | 7 +- drivers/net/bnxt/tf_core/tf_device_p58.h | 3 + drivers/net/bnxt/tf_core/tf_msg.c | 31 ++-- drivers/net/bnxt/tf_core/tf_tcam.c | 192 ++++++++++++----------- 7 files changed, 132 insertions(+), 110 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index a3b6afbc88..573fa0b1ed 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -842,8 +842,10 @@ tf_get_tcam_entry(struct tf *tfp __rte_unused, gparms.type = parms->tcam_tbl_type; gparms.idx = parms->idx; gparms.key = parms->key; + gparms.key_size = dev->ops->tf_dev_word_align(parms->key_sz_in_bits); gparms.mask = parms->mask; gparms.result = parms->result; + gparms.result_size = TF_BITS2BYTES_WORD_ALIGN(parms->result_sz_in_bits); rc = dev->ops->tf_dev_get_tcam(tfp, &gparms); if (rc) { diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 0cc3719a1b..fcba492dc5 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -1286,7 +1286,7 @@ struct tf_get_tcam_entry_parms { */ uint8_t *mask; /** - * [out] key size in bits + * [in/out] key size in bits */ uint16_t key_sz_in_bits; /** @@ -1294,7 +1294,7 @@ struct tf_get_tcam_entry_parms { */ uint8_t *result; /** - * [out] struct containing result size in bits + * [in/out] struct containing result size in bits */ uint16_t result_sz_in_bits; }; @@ -1961,6 +1961,7 @@ enum tf_tunnel_encap_offsets { enum tf_global_config_type { TF_TUNNEL_ENCAP, /**< Tunnel Encap Config(TECT) */ TF_ACTION_BLOCK, /**< Action Block Config(ABCR) */ + TF_COUNTER_CFG, /**< Counter Configuration (CNTRS_CTRL) */ TF_GLOBAL_CFG_TYPE_MAX }; diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index d0bede89e3..e5aaaac9a0 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -144,8 +144,6 @@ tf_dev_p4_get_tcam_slice_info(struct tf *tfp __rte_unused, *num_slices_per_row = CFA_P4_WC_TCAM_SLICES_PER_ROW; if (key_sz > *num_slices_per_row * CFA_P4_WC_TCAM_SLICE_SIZE) return -ENOTSUP; - - *num_slices_per_row = 1; } else { /* for other type of tcam */ *num_slices_per_row = 1; } diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 50a8d82074..65e283ed11 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -123,15 +123,14 @@ tf_dev_p58_get_tcam_slice_info(struct tf *tfp __rte_unused, uint16_t key_sz, uint16_t *num_slices_per_row) { -#define CFA_P58_WC_TCAM_SLICES_PER_ROW 2 -#define CFA_P58_WC_TCAM_SLICE_SIZE 12 +#define CFA_P58_WC_TCAM_SLICES_PER_ROW 1 +#define CFA_P58_WC_TCAM_SLICE_SIZE 24 if (type == TF_TCAM_TBL_TYPE_WC_TCAM) { + /* only support single slice key size now */ *num_slices_per_row = CFA_P58_WC_TCAM_SLICES_PER_ROW; if (key_sz > *num_slices_per_row * CFA_P58_WC_TCAM_SLICE_SIZE) return -ENOTSUP; - - *num_slices_per_row = 1; } else { /* for other type of tcam */ *num_slices_per_row = 1; } diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.h b/drivers/net/bnxt/tf_core/tf_device_p58.h index abd916985e..07f022769b 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.h +++ b/drivers/net/bnxt/tf_core/tf_device_p58.h @@ -189,5 +189,8 @@ struct tf_global_cfg_cfg tf_global_cfg_p58[TF_GLOBAL_CFG_TYPE_MAX] = { [TF_ACTION_BLOCK] = { TF_GLOBAL_CFG_CFG_HCAPI, TF_ACTION_BLOCK }, + [TF_COUNTER_CFG] = { + TF_GLOBAL_CFG_CFG_HCAPI, TF_COUNTER_CFG + }, }; #endif /* _TF_DEVICE_P58_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index 1af5c6d11c..ec4c7890c3 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -39,19 +39,8 @@ * array size (define above) should be checked and compared. */ #define TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET 56 -static_assert(sizeof(struct hwrm_tf_global_cfg_set_input) == - TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET, - "HWRM message size changed: hwrm_tf_global_cfg_set_input"); - #define TF_MSG_SIZE_HWRM_TF_EM_INSERT 104 -static_assert(sizeof(struct hwrm_tf_em_insert_input) == - TF_MSG_SIZE_HWRM_TF_EM_INSERT, - "HWRM message size changed: hwrm_tf_em_insert_input"); - #define TF_MSG_SIZE_HWRM_TF_TBL_TYPE_SET 128 -static_assert(sizeof(struct hwrm_tf_tbl_type_set_input) == - TF_MSG_SIZE_HWRM_TF_TBL_TYPE_SET, - "HWRM message size changed: hwrm_tf_tbl_type_set_input"); /** * This is the MAX data we can transport across regular HWRM @@ -630,6 +619,9 @@ tf_msg_insert_em_internal_entry(struct tf *tfp, struct tf_dev_info *dev; struct tf_session *tfs; + RTE_BUILD_BUG_ON(sizeof(struct hwrm_tf_em_insert_input) != + TF_MSG_SIZE_HWRM_TF_EM_INSERT); + /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) { @@ -1255,6 +1247,17 @@ tf_msg_tcam_entry_get(struct tf *tfp, if (mparms.tf_resp_code != 0) return tfp_le_to_cpu_32(mparms.tf_resp_code); + if (parms->key_size < resp.key_size || + parms->result_size < resp.result_size) { + rc = -EINVAL; + TFP_DRV_LOG(ERR, + "%s: Key buffer(%d) is smaller than the key(%d), rc:%s\n", + tf_dir_2_str(parms->dir), + parms->key_size, + resp.key_size, + strerror(-rc)); + return rc; + } parms->key_size = resp.key_size; parms->result_size = resp.result_size; tfp_memcpy(parms->key, resp.dev_data, resp.key_size); @@ -1320,6 +1323,9 @@ tf_msg_set_tbl_entry(struct tf *tfp, struct tf_dev_info *dev; struct tf_session *tfs; + RTE_BUILD_BUG_ON(sizeof(struct hwrm_tf_tbl_type_set_input) != + TF_MSG_SIZE_HWRM_TF_TBL_TYPE_SET); + /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) { @@ -1554,6 +1560,9 @@ tf_msg_set_global_cfg(struct tf *tfp, struct tf_dev_info *dev; struct tf_session *tfs; + RTE_BUILD_BUG_ON(sizeof(struct hwrm_tf_global_cfg_set_input) != + TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET); + /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) { diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index 42d503f500..1b5c29815d 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -48,10 +48,13 @@ tf_tcam_bind(struct tf *tfp, struct tf_rm_free_db_parms fparms; struct tf_rm_create_db_parms db_cfg; struct tf_tcam_resources *tcam_cnt; - struct tf_shadow_tcam_free_db_parms fshadow; struct tf_rm_get_alloc_info_parms ainfo; + struct tf_shadow_tcam_free_db_parms fshadow; struct tf_shadow_tcam_cfg_parms shadow_cfg; struct tf_shadow_tcam_create_db_parms shadow_cdb; + uint16_t num_slices = 1; + struct tf_session *tfs; + struct tf_dev_info *dev; TF_CHECK_PARMS2(tfp, parms); @@ -61,11 +64,37 @@ tf_tcam_bind(struct tf *tfp, return -EINVAL; } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + if (dev->ops->tf_dev_get_tcam_slice_info == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "Operation not supported, rc:%s\n", + strerror(-rc)); + return rc; + } + + rc = dev->ops->tf_dev_get_tcam_slice_info(tfp, + TF_TCAM_TBL_TYPE_WC_TCAM, + 0, + &num_slices); + if (rc) + return rc; + tcam_cnt = parms->resources->tcam_cnt; - if ((tcam_cnt[TF_DIR_RX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] % 2) || - (tcam_cnt[TF_DIR_TX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] % 2)) { + if ((tcam_cnt[TF_DIR_RX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] % num_slices) || + (tcam_cnt[TF_DIR_TX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] % num_slices)) { TFP_DRV_LOG(ERR, - "Number of WC TCAM entries cannot be odd num\n"); + "Requested num of WC TCAM entries has to be multiple %d\n", + num_slices); return -EINVAL; } @@ -88,6 +117,26 @@ tf_tcam_bind(struct tf *tfp, } } + /* check if reserved resource for WC is multiple of num_slices */ + for (d = 0; d < TF_DIR_MAX; d++) { + memset(&info, 0, sizeof(info)); + ainfo.rm_db = tcam_db[d]; + ainfo.subtype = TF_TCAM_TBL_TYPE_WC_TCAM; + ainfo.info = &info; + rc = tf_rm_get_info(&ainfo); + if (rc) + goto error; + + if (info.entry.start % num_slices != 0 || + info.entry.stride % num_slices != 0) { + TFP_DRV_LOG(ERR, + "%s: TCAM reserved resource is not multiple of %d\n", + tf_dir_2_str(d), + num_slices); + return -EINVAL; + } + } + /* Initialize the TCAM manager. */ if (parms->shadow_copy) { for (d = 0; d < TF_DIR_MAX; d++) { @@ -163,7 +212,6 @@ tf_tcam_unbind(struct tf *tfp) int i; struct tf_rm_free_db_parms fparms; struct tf_shadow_tcam_free_db_parms fshadow; - TF_CHECK_PARMS1(tfp); /* Bail if nothing has been initialized */ @@ -202,11 +250,12 @@ int tf_tcam_alloc(struct tf *tfp, struct tf_tcam_alloc_parms *parms) { - int rc; + int rc, i; struct tf_session *tfs; struct tf_dev_info *dev; struct tf_rm_allocate_parms aparms; - uint16_t num_slice_per_row = 1; + uint16_t num_slices = 1; + uint32_t index; TF_CHECK_PARMS2(tfp, parms); @@ -236,32 +285,24 @@ tf_tcam_alloc(struct tf *tfp, return rc; } - /* Need to retrieve row size etc */ + /* Need to retrieve number of slices based on the key_size */ rc = dev->ops->tf_dev_get_tcam_slice_info(tfp, parms->type, parms->key_size, - &num_slice_per_row); + &num_slices); if (rc) return rc; - /* Allocate requested element */ - memset(&aparms, 0, sizeof(aparms)); - - aparms.rm_db = tcam_db[parms->dir]; - aparms.subtype = parms->type; - aparms.priority = parms->priority; - aparms.index = (uint32_t *)&parms->idx; - rc = tf_rm_allocate(&aparms); - if (rc) { - TFP_DRV_LOG(ERR, - "%s: Failed tcam, type:%d\n", - tf_dir_2_str(parms->dir), - parms->type); - return rc; - } - - if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM && - (parms->idx % 2) != 0) { + /* + * For WC TCAM, number of slices could be 4, 2, 1 based on + * the key_size. For other TCAM, it is always 1 + */ + for (i = 0; i < num_slices; i++) { + memset(&aparms, 0, sizeof(aparms)); + aparms.rm_db = tcam_db[parms->dir]; + aparms.subtype = parms->type; + aparms.priority = parms->priority; + aparms.index = &index; rc = tf_rm_allocate(&aparms); if (rc) { TFP_DRV_LOG(ERR, @@ -270,9 +311,11 @@ tf_tcam_alloc(struct tf *tfp, parms->type); return rc; } - } - parms->idx *= num_slice_per_row; + /* return the start index of each row */ + if (i == 0) + parms->idx = index; + } return 0; } @@ -287,9 +330,10 @@ tf_tcam_free(struct tf *tfp, struct tf_rm_is_allocated_parms aparms; struct tf_rm_free_parms fparms; struct tf_rm_get_hcapi_parms hparms; - uint16_t num_slice_per_row = 1; + uint16_t num_slices = 1; int allocated = 0; struct tf_shadow_tcam_remove_parms shparms; + int i; TF_CHECK_PARMS2(tfp, parms); @@ -323,16 +367,24 @@ tf_tcam_free(struct tf *tfp, rc = dev->ops->tf_dev_get_tcam_slice_info(tfp, parms->type, 0, - &num_slice_per_row); + &num_slices); if (rc) return rc; + if (parms->idx % num_slices) { + TFP_DRV_LOG(ERR, + "%s: TCAM reserved resource is not multiple of %d\n", + tf_dir_2_str(parms->dir), + num_slices); + return -EINVAL; + } + /* Check if element is in use */ memset(&aparms, 0, sizeof(aparms)); aparms.rm_db = tcam_db[parms->dir]; aparms.subtype = parms->type; - aparms.index = parms->idx / num_slice_per_row; + aparms.index = parms->idx; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); if (rc) @@ -376,44 +428,20 @@ tf_tcam_free(struct tf *tfp, } } - /* Free requested element */ - memset(&fparms, 0, sizeof(fparms)); - fparms.rm_db = tcam_db[parms->dir]; - fparms.subtype = parms->type; - fparms.index = parms->idx / num_slice_per_row; - rc = tf_rm_free(&fparms); - if (rc) { - TFP_DRV_LOG(ERR, - "%s: Free failed, type:%d, index:%d\n", - tf_dir_2_str(parms->dir), - parms->type, - parms->idx); - return rc; - } - - if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM) { - int i; - - for (i = -1; i < 3; i += 3) { - aparms.index += i; - rc = tf_rm_is_allocated(&aparms); - if (rc) - return rc; - - if (allocated == TF_RM_ALLOCATED_ENTRY_IN_USE) { - /* Free requested element */ - fparms.index = aparms.index; - rc = tf_rm_free(&fparms); - if (rc) { - TFP_DRV_LOG(ERR, - "%s: Free failed, type:%d, " - "index:%d\n", - tf_dir_2_str(parms->dir), - parms->type, - fparms.index); - return rc; - } - } + for (i = 0; i < num_slices; i++) { + /* Free requested element */ + memset(&fparms, 0, sizeof(fparms)); + fparms.rm_db = tcam_db[parms->dir]; + fparms.subtype = parms->type; + fparms.index = parms->idx + i; + rc = tf_rm_free(&fparms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Free failed, type:%d, index:%d\n", + tf_dir_2_str(parms->dir), + parms->type, + parms->idx); + return rc; } } @@ -449,8 +477,8 @@ tf_tcam_alloc_search(struct tf *tfp, { struct tf_shadow_tcam_search_parms sparms; struct tf_shadow_tcam_bind_index_parms bparms; - struct tf_tcam_alloc_parms aparms; struct tf_tcam_free_parms fparms; + struct tf_tcam_alloc_parms aparms; uint16_t num_slice_per_row = 1; struct tf_session *tfs; struct tf_dev_info *dev; @@ -626,7 +654,7 @@ tf_tcam_set(struct tf *tfp __rte_unused, aparms.rm_db = tcam_db[parms->dir]; aparms.subtype = parms->type; - aparms.index = parms->idx / num_slice_per_row; + aparms.index = parms->idx; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); if (rc) @@ -693,7 +721,6 @@ tf_tcam_get(struct tf *tfp __rte_unused, struct tf_dev_info *dev; struct tf_rm_is_allocated_parms aparms; struct tf_rm_get_hcapi_parms hparms; - uint16_t num_slice_per_row = 1; int allocated = 0; TF_CHECK_PARMS2(tfp, parms); @@ -715,29 +742,12 @@ tf_tcam_get(struct tf *tfp __rte_unused, if (rc) return rc; - if (dev->ops->tf_dev_get_tcam_slice_info == NULL) { - rc = -EOPNOTSUPP; - TFP_DRV_LOG(ERR, - "%s: Operation not supported, rc:%s\n", - tf_dir_2_str(parms->dir), - strerror(-rc)); - return rc; - } - - /* Need to retrieve row size etc */ - rc = dev->ops->tf_dev_get_tcam_slice_info(tfp, - parms->type, - parms->key_size, - &num_slice_per_row); - if (rc) - return rc; - /* Check if element is in use */ memset(&aparms, 0, sizeof(aparms)); aparms.rm_db = tcam_db[parms->dir]; aparms.subtype = parms->type; - aparms.index = parms->idx / num_slice_per_row; + aparms.index = parms->idx; aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); if (rc) From patchwork Sun Jun 13 00:06:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94105 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9CFADA0C41; Sun, 13 Jun 2021 02:08:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F12EC4115F; Sun, 13 Jun 2021 02:07:15 +0200 (CEST) Received: from mail-pg1-f179.google.com (mail-pg1-f179.google.com [209.85.215.179]) by mails.dpdk.org (Postfix) with ESMTP id 57E8F410ED for ; Sun, 13 Jun 2021 02:07:12 +0200 (CEST) Received: by mail-pg1-f179.google.com with SMTP id y11so5602865pgp.11 for ; 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Sat, 12 Jun 2021 17:07:10 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.09 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:10 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Randy Schacher , Venkat Duvvuru Date: Sat, 12 Jun 2021 17:06:04 -0700 Message-Id: <20210613000652.28191-11-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 10/58] net/bnxt: add 64B SRAM record management with RM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith HCAPI RM now manages 64Byte records instead of 8Byte. Truflow core RM will manage the same. The tf_tbl core APIs now return 8B pointer addresses. These can be used directly as SRAM pointers in Action Records. When communicating with the firmware 8 byte addresses will be used. Signed-off-by: Farah Smith Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_device.h | 29 ++++- drivers/net/bnxt/tf_core/tf_device_p4.c | 2 + drivers/net/bnxt/tf_core/tf_device_p58.c | 71 ++++++++++ drivers/net/bnxt/tf_core/tf_device_p58.h | 24 ++-- drivers/net/bnxt/tf_core/tf_rm.h | 2 +- drivers/net/bnxt/tf_core/tf_tbl.c | 158 ++++++++++++++++++++++- 6 files changed, 267 insertions(+), 19 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index 2cbb42fe2a..a18d59660b 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -220,9 +220,36 @@ struct tf_dev_ops { */ int (*tf_dev_search_ident)(struct tf *tfp, struct tf_ident_search_parms *parms); + /** + * Get SRAM table information. + * + * Converts an internal RM allocated element offset to + * a user address and vice versa. + * + * [in] tfp + * Pointer to TF handle + * + * [in] type + * Truflow index table type, e.g. TF_TYPE_FULL_ACT_RECORD + * + * [in/out] base + * Pointer to the base address of the associated table type. + * + * [in/out] shift + * Pointer to any shift required for the associated table type. + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ + int (*tf_dev_get_tbl_info)(struct tf *tfp, + void *tbl_db, + enum tf_tbl_type type, + uint16_t *base, + uint16_t *shift); /** - * Allocation of a table type element. + * Allocation of an index table type element. * * This API allocates the specified table type element from a * device specific table type DB. The allocated element is diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index e5aaaac9a0..8274978bfe 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -206,6 +206,7 @@ const struct tf_dev_ops tf_dev_ops_p4_init = { .tf_dev_alloc_ident = NULL, .tf_dev_free_ident = NULL, .tf_dev_search_ident = NULL, + .tf_dev_get_tbl_info = NULL, .tf_dev_alloc_ext_tbl = NULL, .tf_dev_alloc_tbl = NULL, .tf_dev_free_ext_tbl = NULL, @@ -246,6 +247,7 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_alloc_ident = tf_ident_alloc, .tf_dev_free_ident = tf_ident_free, .tf_dev_search_ident = tf_ident_search, + .tf_dev_get_tbl_info = NULL, .tf_dev_alloc_tbl = tf_tbl_alloc, .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc, .tf_dev_free_tbl = tf_tbl_free, diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 65e283ed11..b61c58e41b 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -148,6 +148,75 @@ static int tf_dev_p58_word_align(uint16_t size) return ((((size) + 63) >> 6) * 8); } + +#define TF_DEV_P58_BANK_SZ_64B 2048 +/** + * Get SRAM table information. + * + * Converts an internal RM allocated element offset to + * a user address and vice versa. + * + * [in] tfp + * Pointer to TF handle + * + * [in] type + * Truflow index table type, e.g. TF_TYPE_FULL_ACT_RECORD + * + * [in/out] base + * Pointer to the Base address of the associated SRAM bank used for + * the type of record allocated. + * + * [in/out] shift + * Pointer to the factor to be used as a multiplier to translate + * between the RM units to the user address. SRAM manages 64B entries + * Addresses must be shifted to an 8B address. + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +static int tf_dev_p58_get_sram_tbl_info(struct tf *tfp __rte_unused, + void *db, + enum tf_tbl_type type, + uint16_t *base, + uint16_t *shift) +{ + uint16_t hcapi_type; + struct tf_rm_get_hcapi_parms parms; + int rc; + + parms.rm_db = db; + parms.subtype = type; + parms.hcapi_type = &hcapi_type; + + rc = tf_rm_get_hcapi_type(&parms); + if (rc) + return rc; + + switch (hcapi_type) { + case CFA_RESOURCE_TYPE_P58_SRAM_BANK_0: + *base = 0; + *shift = 3; + break; + case CFA_RESOURCE_TYPE_P58_SRAM_BANK_1: + *base = TF_DEV_P58_BANK_SZ_64B; + *shift = 3; + break; + case CFA_RESOURCE_TYPE_P58_SRAM_BANK_2: + *base = TF_DEV_P58_BANK_SZ_64B * 2; + *shift = 3; + break; + case CFA_RESOURCE_TYPE_P58_SRAM_BANK_3: + *base = TF_DEV_P58_BANK_SZ_64B * 3; + *shift = 3; + break; + default: + *base = 0; + *shift = 0; + break; + } + return 0; +} /** * Truflow P58 device specific functions */ @@ -158,6 +227,7 @@ const struct tf_dev_ops tf_dev_ops_p58_init = { .tf_dev_alloc_ident = NULL, .tf_dev_free_ident = NULL, .tf_dev_search_ident = NULL, + .tf_dev_get_tbl_info = NULL, .tf_dev_alloc_ext_tbl = NULL, .tf_dev_alloc_tbl = NULL, .tf_dev_free_ext_tbl = NULL, @@ -198,6 +268,7 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_alloc_ident = tf_ident_alloc, .tf_dev_free_ident = tf_ident_free, .tf_dev_search_ident = tf_ident_search, + .tf_dev_get_tbl_info = tf_dev_p58_get_sram_tbl_info, .tf_dev_alloc_tbl = tf_tbl_alloc, .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc, .tf_dev_free_tbl = tf_tbl_free, diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.h b/drivers/net/bnxt/tf_core/tf_device_p58.h index 07f022769b..4d7a78e52c 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.h +++ b/drivers/net/bnxt/tf_core/tf_device_p58.h @@ -68,35 +68,35 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = { [TF_TBL_TYPE_FULL_ACT_RECORD] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_1, - .slices = 4, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_COMPACT_ACT_RECORD] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, .parent_subtype = TF_TBL_TYPE_FULL_ACT_RECORD, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_1, - .slices = 8, + .slices = 1, .divider = 8, }, /* Policy - Encaps in bank 2 */ [TF_TBL_TYPE_ACT_ENCAP_8B] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, - .slices = 8, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_ACT_ENCAP_16B] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, - .slices = 4, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_ACT_ENCAP_32B] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, - .slices = 2, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_ACT_ENCAP_64B] = { @@ -111,21 +111,21 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, - .slices = 8, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_ACT_MODIFY_16B] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, - .slices = 4, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_ACT_MODIFY_32B] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, .parent_subtype = TF_TBL_TYPE_ACT_ENCAP_8B, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_2, - .slices = 2, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_ACT_MODIFY_64B] = { @@ -139,28 +139,28 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = { [TF_TBL_TYPE_ACT_SP_SMAC] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0, - .slices = 8, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, .parent_subtype = TF_TBL_TYPE_ACT_SP_SMAC, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0, - .slices = 4, + .slices = 1, .divider = 8, }, [TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_CHILD, .parent_subtype = TF_TBL_TYPE_ACT_SP_SMAC, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_0, - .slices = 2, + .slices = 1, .divider = 8, }, /* Policy - Stats in bank 3 */ [TF_TBL_TYPE_ACT_STATS_64] = { .cfg_type = TF_RM_ELEM_CFG_HCAPI_BA_PARENT, .hcapi_type = CFA_RESOURCE_TYPE_P58_SRAM_BANK_3, - .slices = 8, + .slices = 1, .divider = 8, }, }; diff --git a/drivers/net/bnxt/tf_core/tf_rm.h b/drivers/net/bnxt/tf_core/tf_rm.h index 407c7d5bf9..6eb6865dac 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.h +++ b/drivers/net/bnxt/tf_core/tf_rm.h @@ -138,6 +138,7 @@ struct tf_rm_element_cfg { * resource pool chunk size. */ uint8_t slices; + /** * Pool element divider count * If 0 or 1, there is 1:1 correspondence between the RM @@ -146,7 +147,6 @@ struct tf_rm_element_cfg { * correspondence to the HCAPI RM firmware resource. */ uint8_t divider; - }; /** diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index 7d15c3c5d4..75dbe2066f 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -16,6 +16,14 @@ #include "tf_session.h" #include "tf_device.h" +#define TF_TBL_RM_TO_PTR(new_idx, idx, base, shift) { \ + *(new_idx) = (((idx) + (base)) << (shift)); \ +} + +#define TF_TBL_PTR_TO_RM(new_idx, idx, base, shift) { \ + *(new_idx) = (((idx) >> (shift)) - (base)); \ +} + struct tf; /** @@ -118,6 +126,9 @@ tf_tbl_alloc(struct tf *tfp __rte_unused, int rc; uint32_t idx; struct tf_rm_allocate_parms aparms = { 0 }; + struct tf_session *tfs; + struct tf_dev_info *dev; + uint16_t base = 0, shift = 0; TF_CHECK_PARMS2(tfp, parms); @@ -128,6 +139,29 @@ tf_tbl_alloc(struct tf *tfp __rte_unused, return -EINVAL; } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + /* Only get table info if required for the device */ + if (dev->ops->tf_dev_get_tbl_info) { + rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], + parms->type, &base, &shift); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to get table info:%d\n", + tf_dir_2_str(parms->dir), + parms->type); + return rc; + } + } + /* Allocate requested element */ aparms.rm_db = tbl_db[parms->dir]; aparms.subtype = parms->type; @@ -141,6 +175,7 @@ tf_tbl_alloc(struct tf *tfp __rte_unused, return rc; } + TF_TBL_RM_TO_PTR(&idx, idx, base, shift); *parms->idx = idx; return 0; @@ -154,6 +189,9 @@ tf_tbl_free(struct tf *tfp __rte_unused, struct tf_rm_is_allocated_parms aparms = { 0 }; struct tf_rm_free_parms fparms = { 0 }; int allocated = 0; + struct tf_session *tfs; + struct tf_dev_info *dev; + uint16_t base = 0, shift = 0; TF_CHECK_PARMS2(tfp, parms); @@ -163,11 +201,35 @@ tf_tbl_free(struct tf *tfp __rte_unused, tf_dir_2_str(parms->dir)); return -EINVAL; } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + /* Only get table info if required for the device */ + if (dev->ops->tf_dev_get_tbl_info) { + rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], + parms->type, &base, &shift); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to get table info:%d\n", + tf_dir_2_str(parms->dir), + parms->type); + return rc; + } + } /* Check if element is in use */ aparms.rm_db = tbl_db[parms->dir]; aparms.subtype = parms->type; - aparms.index = parms->idx; + + TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift); + aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); if (rc) @@ -184,7 +246,9 @@ tf_tbl_free(struct tf *tfp __rte_unused, /* Free requested element */ fparms.rm_db = tbl_db[parms->dir]; fparms.subtype = parms->type; - fparms.index = parms->idx; + + TF_TBL_PTR_TO_RM(&fparms.index, parms->idx, base, shift); + rc = tf_rm_free(&fparms); if (rc) { TFP_DRV_LOG(ERR, @@ -223,6 +287,9 @@ tf_tbl_set(struct tf *tfp, uint16_t hcapi_type; struct tf_rm_is_allocated_parms aparms = { 0 }; struct tf_rm_get_hcapi_parms hparms = { 0 }; + struct tf_session *tfs; + struct tf_dev_info *dev; + uint16_t base = 0, shift = 0; TF_CHECK_PARMS3(tfp, parms, parms->data); @@ -233,10 +300,34 @@ tf_tbl_set(struct tf *tfp, return -EINVAL; } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + /* Only get table info if required for the device */ + if (dev->ops->tf_dev_get_tbl_info) { + rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], + parms->type, &base, &shift); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to get table info:%d\n", + tf_dir_2_str(parms->dir), + parms->type); + return rc; + } + } + /* Verify that the entry has been previously allocated */ aparms.rm_db = tbl_db[parms->dir]; aparms.subtype = parms->type; - aparms.index = parms->idx; + TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift); + aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); if (rc) @@ -292,6 +383,9 @@ tf_tbl_get(struct tf *tfp, int allocated = 0; struct tf_rm_is_allocated_parms aparms = { 0 }; struct tf_rm_get_hcapi_parms hparms = { 0 }; + struct tf_session *tfs; + struct tf_dev_info *dev; + uint16_t base = 0, shift = 0; TF_CHECK_PARMS3(tfp, parms, parms->data); @@ -302,10 +396,35 @@ tf_tbl_get(struct tf *tfp, return -EINVAL; } + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + /* Only get table info if required for the device */ + if (dev->ops->tf_dev_get_tbl_info) { + rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], + parms->type, &base, &shift); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to get table info:%d\n", + tf_dir_2_str(parms->dir), + parms->type); + return rc; + } + } + /* Verify that the entry has been previously allocated */ aparms.rm_db = tbl_db[parms->dir]; aparms.subtype = parms->type; - aparms.index = parms->idx; + TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift); + aparms.allocated = &allocated; rc = tf_rm_is_allocated(&aparms); if (rc) @@ -361,6 +480,9 @@ tf_tbl_bulk_get(struct tf *tfp, uint16_t hcapi_type; struct tf_rm_get_hcapi_parms hparms = { 0 }; struct tf_rm_check_indexes_in_range_parms cparms = { 0 }; + struct tf_session *tfs; + struct tf_dev_info *dev; + uint16_t base = 0, shift = 0; TF_CHECK_PARMS2(tfp, parms); @@ -372,10 +494,36 @@ tf_tbl_bulk_get(struct tf *tfp, return -EINVAL; } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + /* Only get table info if required for the device */ + if (dev->ops->tf_dev_get_tbl_info) { + rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], + parms->type, &base, &shift); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to get table info:%d\n", + tf_dir_2_str(parms->dir), + parms->type); + return rc; + } + } + /* Verify that the entries are in the range of reserved resources. */ cparms.rm_db = tbl_db[parms->dir]; cparms.subtype = parms->type; - cparms.starting_index = parms->starting_idx; + + TF_TBL_PTR_TO_RM(&cparms.starting_index, parms->starting_idx, + base, shift); + cparms.num_entries = parms->num_entries; rc = tf_rm_check_indexes_in_range(&cparms); From patchwork Sun Jun 13 00:06:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94106 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 44723A0C41; Sun, 13 Jun 2021 02:08:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C1FC64116E; Sun, 13 Jun 2021 02:07:17 +0200 (CEST) Received: from mail-pg1-f179.google.com (mail-pg1-f179.google.com [209.85.215.179]) by mails.dpdk.org (Postfix) with ESMTP id DF9424111B for ; Sun, 13 Jun 2021 02:07:13 +0200 (CEST) Received: by mail-pg1-f179.google.com with SMTP id l184so5615181pgd.8 for ; Sat, 12 Jun 2021 17:07:13 -0700 (PDT) DKIM-Signature: v=1; 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Sat, 12 Jun 2021 17:07:12 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.11 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:11 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Peter Spreadborough , Venkat Duvvuru , Randy Schacher , Farah Smith Date: Sat, 12 Jun 2021 17:06:05 -0700 Message-Id: <20210613000652.28191-12-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 11/58] net/bnxt: add hashing changes for Thor X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Peter Spreadborough - Move HCAPI hashing code to common file and add Thor support. - Change DPDK EM insert for FKB to use limited size Type 3 key. - Update FKB builder to be able to tell between EM and WC keys during transform. FKB is the Flexible Key Builder in Thor used while inserting flows. Signed-off-by: Peter Spreadborough Signed-off-by: Venkat Duvvuru Reviewed-by: Randy Schacher Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h | 72 ++++++++++- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c | 85 +++++++++++++ drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h | 15 +++ drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c | 107 +--------------- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c | 120 ++++++++++++++++++ drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h | 6 + drivers/net/bnxt/hcapi/cfa/meson.build | 4 +- drivers/net/bnxt/tf_core/tf_device.h | 15 +++ drivers/net/bnxt/tf_core/tf_device_p4.c | 1 + drivers/net/bnxt/tf_core/tf_device_p58.c | 1 + drivers/net/bnxt/tf_core/tf_em.h | 8 +- drivers/net/bnxt/tf_core/tf_em_common.c | 42 ++++-- .../net/bnxt/tf_core/tf_em_hash_internal.c | 22 +++- 13 files changed, 373 insertions(+), 125 deletions(-) create mode 100644 drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c create mode 100644 drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h index c67aa29ad0..0580e07c45 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h @@ -63,10 +63,74 @@ struct hcapi_cfa_devops { */ uint64_t (*hcapi_cfa_key_hash)(uint64_t *key_data, uint16_t bitlen); - /** hardware operation on the CFA EM key - * - * This API provides the functionality to program the exact match and - * key data to exact match record memory. +int hcapi_cfa_action_hw_op(struct hcapi_cfa_hwop *op, + uint8_t *act_tbl, + struct hcapi_cfa_data *act_obj); +int hcapi_cfa_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id, + struct hcapi_cfa_data *obj_data); +int hcapi_cfa_rm_register_client(hcapi_cfa_rm_data_t *data, + const char *client_name, + int *client_id); +int hcapi_cfa_rm_unregister_client(hcapi_cfa_rm_data_t *data, + int client_id); +int hcapi_cfa_rm_query_resources(hcapi_cfa_rm_data_t *data, + int client_id, + uint16_t chnl_id, + struct hcapi_cfa_resc_req_db *req_db); +int hcapi_cfa_rm_query_resources_one(hcapi_cfa_rm_data_t *data, + int clien_id, + struct hcapi_cfa_resc_db *resc_db); +int hcapi_cfa_rm_reserve_resources(hcapi_cfa_rm_data_t *data, + int client_id, + struct hcapi_cfa_resc_req_db *resc_req, + struct hcapi_cfa_resc_db *resc_db); +int hcapi_cfa_rm_release_resources(hcapi_cfa_rm_data_t *data, + int client_id, + struct hcapi_cfa_resc_req_db *resc_req, + struct hcapi_cfa_resc_db *resc_db); +int hcapi_cfa_rm_initialize(hcapi_cfa_rm_data_t *data); + +#if SUPPORT_CFA_HW_P4 + +int hcapi_cfa_p4_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id, + struct hcapi_cfa_data *obj_data); +int hcapi_cfa_p4_prof_l2ctxt_hwop(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_data *obj_data); +int hcapi_cfa_p4_prof_l2ctxtrmp_hwop(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_data *obj_data); +int hcapi_cfa_p4_prof_tcam_hwop(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_data *obj_data); +int hcapi_cfa_p4_prof_tcamrmp_hwop(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_data *obj_data); +int hcapi_cfa_p4_wc_tcam_hwop(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_data *obj_data); +int hcapi_cfa_p4_wc_tcam_rec_hwop(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_data *obj_data); +int hcapi_cfa_p4_mirror_hwop(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_data *mirror); +int hcapi_cfa_p4_global_cfg_hwop(struct hcapi_cfa_hwop *op, + uint32_t type, + struct hcapi_cfa_data *config); +/* SUPPORT_CFA_HW_P4 */ +#elif SUPPORT_CFA_HW_P45 +int hcapi_cfa_p45_mirror_hwop(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_data *mirror); +int hcapi_cfa_p45_global_cfg_hwop(struct hcapi_cfa_hwop *op, + uint32_t type, + struct hcapi_cfa_data *config); +/* SUPPORT_CFA_HW_P45 */ +#endif + +/** + * HCAPI CFA device HW operation function callback definition + * This is standardized function callback hook to install different + * CFA HW table programming function callback. + */ + +struct hcapi_cfa_tbl_cb { + /** + * This function callback provides the functionality to read/write + * HW table entry from a HW table. * * @param[in] op * A pointer to the Hardware operation parameter diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c new file mode 100644 index 0000000000..fc96e3bff7 --- /dev/null +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c @@ -0,0 +1,85 @@ +/* + * Copyright(c) 2019-2021 Broadcom Limited. + * All rights reserved. + */ + +#include "hcapi_cfa_defs.h" +#include +#include "assert.h" + +const uint32_t crc32tbl[] = { /* CRC polynomial 0xedb88320 */ +0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, +0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, +0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, +0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, +0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, +0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, +0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, +0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, +0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, +0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, +0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, +0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, +0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, +0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, +0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, +0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, +0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, +0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, +0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, +0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, +0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, +0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, +0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, +0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, +0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, +0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, +0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, +0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, +0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, +0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, +0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, +0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, +0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, +0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, +0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, +0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, +0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, +0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, +0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, +0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, +0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, +0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, +0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, +0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, +0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, +0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, +0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, +0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, +0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, +0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, +0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, +0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, +0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, +0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, +0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, +0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, +0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, +0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, +0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, +0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, +0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, +0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, +0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, +0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d +}; + +uint32_t hcapi_cfa_crc32i(uint32_t crc, const uint8_t *buf, size_t len) +{ + int l; + + for (l = (len - 1); l >= 0; l--) + crc = ucrc32(buf[l], crc); + + return ~crc; +} diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h index 8e5095a6ef..579f1d5693 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h @@ -54,6 +54,16 @@ enum hcapi_cfa_dir { HCAPI_CFA_DIR_MAX = 2 }; +/* + * Hashing defines + */ +#define HCAPI_CFA_LKUP_SEED_MEM_SIZE 512 + +/* CRC32i support for Key0 hash */ +#define ucrc32(ch, crc) (crc32tbl[((crc) ^ (ch)) & 0xff] ^ ((crc) >> 8)) +#define crc32(x, y) crc32i(~0, x, y) + + /** * CFA HW OPCODE definition */ @@ -282,4 +292,9 @@ int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op, uint64_t hcapi_get_table_page(struct hcapi_cfa_em_table *mem, uint32_t page); +uint32_t hcapi_cfa_crc32i(uint32_t crc, const uint8_t *buf, size_t len); +uint64_t hcapi_cfa_p4_key_hash(uint64_t *key_data, + uint16_t bitlen); +uint64_t hcapi_cfa_p58_key_hash(uint64_t *key_data, + uint16_t bitlen); #endif /* HCAPI_CFA_DEFS_H_ */ diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c index 3a0476a33d..f097be9dfb 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c @@ -12,10 +12,9 @@ #include "hcapi_cfa_defs.h" -#define HCAPI_CFA_LKUP_SEED_MEM_SIZE 512 -uint32_t hcapi_cfa_lkup_lkup3_init_cfg; -uint32_t hcapi_cfa_lkup_em_seed_mem[HCAPI_CFA_LKUP_SEED_MEM_SIZE]; -bool hcapi_cfa_lkup_init; +static uint32_t hcapi_cfa_lkup_lkup3_init_cfg; +static uint32_t hcapi_cfa_lkup_em_seed_mem[HCAPI_CFA_LKUP_SEED_MEM_SIZE]; +static bool hcapi_cfa_lkup_init; static inline uint32_t SWAP_WORDS32(uint32_t val32) { @@ -47,102 +46,6 @@ static void hcapi_cfa_seeds_init(void) } } -/* CRC32i support for Key0 hash */ -#define ucrc32(ch, crc) (crc32tbl[((crc) ^ (ch)) & 0xff] ^ ((crc) >> 8)) -#define crc32(x, y) crc32i(~0, x, y) - -static const uint32_t crc32tbl[] = { /* CRC polynomial 0xedb88320 */ -0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, -0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, -0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, -0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, -0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, -0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, -0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, -0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, -0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, -0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, -0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, -0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, -0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, -0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, -0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, -0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, -0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, -0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, -0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, -0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, -0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, -0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, -0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, -0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, -0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, -0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, -0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, -0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, -0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, -0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, -0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, -0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, -0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, -0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, -0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, -0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, -0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, -0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, -0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, -0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, -0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, -0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, -0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, -0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, -0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, -0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, -0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, -0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, -0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, -0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, -0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, -0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, -0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, -0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, -0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, -0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, -0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, -0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, -0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, -0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, -0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, -0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, -0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, -0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d -}; - -static uint32_t hcapi_cfa_crc32i(uint32_t crc, const uint8_t *buf, size_t len) -{ - int l; - -#ifdef TF_EEM_DEBUG - TFP_DRV_LOG(DEBUG, "CRC2:"); -#endif - for (l = (len - 1); l >= 0; l--) { - crc = ucrc32(buf[l], crc); -#ifdef TF_EEM_DEBUG - TFP_DRV_LOG(DEBUG, - "%02X %08X %08X\n", - (buf[l] & 0xff), - crc, - ~crc); -#endif - } - -#ifdef TF_EEM_DEBUG - TFP_DRV_LOG(DEBUG, "\n"); -#endif - - return ~crc; -} - static uint32_t hcapi_cfa_crc32_hash(uint8_t *key) { int i; @@ -221,8 +124,8 @@ uint64_t hcapi_get_table_page(struct hcapi_cfa_em_table *mem, * Return: * */ -uint64_t hcapi_cfa_key_hash(uint64_t *key_data, - uint16_t bitlen) +uint64_t hcapi_cfa_p4_key_hash(uint64_t *key_data, + uint16_t bitlen) { uint32_t key0_hash; uint32_t key1_hash; diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c new file mode 100644 index 0000000000..15cbdc6eba --- /dev/null +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c @@ -0,0 +1,120 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2021 Broadcom + * All rights reserved. + */ + +#include +#include +#include +#include +#include "lookup3.h" +#include "rand.h" + +#include "hcapi_cfa_defs.h" + +static uint32_t hcapi_cfa_lkup_lkup3_init_cfg; +static uint32_t hcapi_cfa_lkup_em_seed_mem[HCAPI_CFA_LKUP_SEED_MEM_SIZE]; +static bool hcapi_cfa_lkup_init; + +static void hcapi_cfa_seeds_init(void) +{ + int i; + uint32_t r; + + if (hcapi_cfa_lkup_init) + return; + + hcapi_cfa_lkup_init = true; + + /* Initialize the lfsr */ + rand_init(); + + /* RX and TX use the same seed values */ + hcapi_cfa_lkup_lkup3_init_cfg = rand32(); + + for (i = 0; i < HCAPI_CFA_LKUP_SEED_MEM_SIZE / 2; i++) { + r = rand32(); + hcapi_cfa_lkup_em_seed_mem[i * 2] = r; + r = rand32(); + hcapi_cfa_lkup_em_seed_mem[i * 2 + 1] = (r & 0x1); + } +} + +static uint32_t hcapi_cfa_crc32_hash(uint8_t *key) +{ + int i; + uint32_t index; + uint32_t val1, val2; + uint8_t temp[4]; + uint8_t *kptr = key; + + /* Do byte-wise XOR of the 52-byte HASH key first. */ + index = *key; + kptr--; + + for (i = CFA_P58_EEM_KEY_MAX_SIZE - 2; i >= 0; i--) { + index = index ^ *kptr; + kptr--; + } + + /* Get seeds */ + val1 = hcapi_cfa_lkup_em_seed_mem[index * 2]; + val2 = hcapi_cfa_lkup_em_seed_mem[index * 2 + 1]; + + temp[3] = (uint8_t)(val1 >> 24); + temp[2] = (uint8_t)(val1 >> 16); + temp[1] = (uint8_t)(val1 >> 8); + temp[0] = (uint8_t)(val1 & 0xff); + val1 = 0; + + /* Start with seed */ + if (!(val2 & 0x1)) + val1 = hcapi_cfa_crc32i(~val1, temp, 4); + + val1 = hcapi_cfa_crc32i(~val1, + (key - (CFA_P58_EEM_KEY_MAX_SIZE - 1)), + CFA_P58_EEM_KEY_MAX_SIZE); + + /* End with seed */ + if (val2 & 0x1) + val1 = hcapi_cfa_crc32i(~val1, temp, 4); + + return val1; +} + +static uint32_t hcapi_cfa_lookup3_hash(uint8_t *in_key) +{ + uint32_t val1; + + val1 = hashword(((uint32_t *)in_key) + 1, + CFA_P58_EEM_KEY_MAX_SIZE / (sizeof(uint32_t)), + hcapi_cfa_lkup_lkup3_init_cfg); + + return val1; +} + + +/** Approximation of HCAPI hcapi_cfa_key_hash() + * + * Return: + * + */ +uint64_t hcapi_cfa_p58_key_hash(uint64_t *key_data, + uint16_t bitlen) +{ + uint32_t key0_hash; + uint32_t key1_hash; + + /* + * Init the seeds if needed + */ + if (!hcapi_cfa_lkup_init) + hcapi_cfa_seeds_init(); + + key0_hash = hcapi_cfa_crc32_hash(((uint8_t *)key_data) + + (bitlen / 8) - 1); + + key1_hash = hcapi_cfa_lookup3_hash((uint8_t *)key_data); + + return ((uint64_t)key0_hash) << 32 | (uint64_t)key1_hash; +} diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h index b2535098d2..27796b1b2f 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h @@ -6,6 +6,12 @@ #ifndef _HCAPI_CFA_P58_H_ #define _HCAPI_CFA_P58_H_ +/** + * EEM Key entry sizes + */ +#define CFA_P58_EEM_KEY_MAX_SIZE 80 +#define CFA_P58_EEM_KEY_RECORD_SIZE 80 + /** CFA phase 5.8 fix formatted table(layout) ID definition * */ diff --git a/drivers/net/bnxt/hcapi/cfa/meson.build b/drivers/net/bnxt/hcapi/cfa/meson.build index 8b70d273f4..5cdb1862f3 100644 --- a/drivers/net/bnxt/hcapi/cfa/meson.build +++ b/drivers/net/bnxt/hcapi/cfa/meson.build @@ -7,4 +7,6 @@ includes += include_directories('.') #Add the source files sources += files( - 'hcapi_cfa_p4.c') + 'hcapi_cfa_p4.c', + 'hcapi_cfa_p58.c', + 'hcapi_cfa_common.c') diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index a18d59660b..3f2c24a0c6 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -752,6 +752,21 @@ struct tf_dev_ops { * Size in byte */ int (*tf_dev_word_align)(uint16_t size); + + /** + * Hash key using crc32 and lookup3 + * + * [in] key_data + * Pointer to key + * + * [in] bitlen + * Number of key bits + * + * Returns + * Hashes + */ + uint64_t (*tf_dev_cfa_key_hash)(uint64_t *key_data, + uint16_t bitlen); }; /** diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index 8274978bfe..8797afa100 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -276,4 +276,5 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_get_global_cfg = tf_global_cfg_get, .tf_dev_get_mailbox = tf_dev_p4_get_mailbox, .tf_dev_word_align = tf_dev_p4_word_align, + .tf_dev_cfa_key_hash = hcapi_cfa_p4_key_hash }; diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index b61c58e41b..b44648d216 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -297,4 +297,5 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_get_global_cfg = tf_global_cfg_get, .tf_dev_get_mailbox = tf_dev_p58_get_mailbox, .tf_dev_word_align = tf_dev_p58_word_align, + .tf_dev_cfa_key_hash = hcapi_cfa_p58_key_hash }; diff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h index 5a67ca3509..4de9e42cbc 100644 --- a/drivers/net/bnxt/tf_core/tf_em.h +++ b/drivers/net/bnxt/tf_core/tf_em.h @@ -14,8 +14,10 @@ #define TF_EM_MIN_ENTRIES (1 << 15) /* 32K */ #define TF_EM_MAX_ENTRIES (1 << 27) /* 128M */ -#define TF_HW_EM_KEY_MAX_SIZE 52 -#define TF_EM_KEY_RECORD_SIZE 64 +#define TF_P4_HW_EM_KEY_MAX_SIZE 52 +#define TF_P4_EM_KEY_RECORD_SIZE 64 + +#define TF_P58_HW_EM_KEY_MAX_SIZE 80 #define TF_EM_MAX_MASK 0x7FFF #define TF_EM_MAX_ENTRY (128 * 1024 * 1024) @@ -95,7 +97,7 @@ struct tf_em_64b_entry { /** Header is 8 bytes long */ struct cfa_p4_eem_entry_hdr hdr; /** Key is 448 bits - 56 bytes */ - uint8_t key[TF_EM_KEY_RECORD_SIZE - sizeof(struct cfa_p4_eem_entry_hdr)]; + uint8_t key[TF_P4_EM_KEY_RECORD_SIZE - sizeof(struct cfa_p4_eem_entry_hdr)]; }; /** EEM Memory Type diff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c index 589df60041..d8278f1ce1 100644 --- a/drivers/net/bnxt/tf_core/tf_em_common.c +++ b/drivers/net/bnxt/tf_core/tf_em_common.c @@ -284,7 +284,7 @@ tf_em_create_key_entry(struct cfa_p4_eem_entry_hdr *result, { key_entry->hdr.word1 = result->word1; key_entry->hdr.pointer = result->pointer; - memcpy(key_entry->key, in_key, TF_HW_EM_KEY_MAX_SIZE + 4); + memcpy(key_entry->key, in_key, TF_P4_HW_EM_KEY_MAX_SIZE + 4); } @@ -680,7 +680,8 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb, * TF_ERR_EM_DUP - key is already in table */ static int -tf_insert_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb, +tf_insert_eem_entry(struct tf_dev_info *dev, + struct tf_tbl_scope_cb *tbl_scope_cb, struct tf_insert_em_entry_parms *parms) { uint32_t mask; @@ -706,11 +707,14 @@ tf_insert_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb, return -EINVAL; #ifdef TF_EEM_DEBUG - dump_raw((uint8_t *)parms->key, TF_HW_EM_KEY_MAX_SIZE + 4, "In Key"); + dump_raw((uint8_t *)parms->key, TF_P4_HW_EM_KEY_MAX_SIZE + 4, "In Key"); #endif - big_hash = hcapi_cfa_key_hash((uint64_t *)parms->key, - (TF_HW_EM_KEY_MAX_SIZE + 4) * 8); + if (dev->ops->tf_dev_cfa_key_hash == NULL) + return -EINVAL; + + big_hash = dev->ops->tf_dev_cfa_key_hash((uint64_t *)parms->key, + (TF_P4_HW_EM_KEY_MAX_SIZE + 4) * 8); key0_hash = (uint32_t)(big_hash >> 32); key1_hash = (uint32_t)(big_hash & 0xFFFFFFFF); @@ -739,9 +743,9 @@ tf_insert_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb, key_tbl.base0 = (uint8_t *)&tbl_scope_cb->em_ctx_info[parms->dir].em_tables[TF_KEY0_TABLE]; key_tbl.page_size = TF_EM_PAGE_SIZE; - key_obj.offset = index * TF_EM_KEY_RECORD_SIZE; + key_obj.offset = index * TF_P4_EM_KEY_RECORD_SIZE; key_obj.data = (uint8_t *)&key_entry; - key_obj.size = TF_EM_KEY_RECORD_SIZE; + key_obj.size = TF_P4_EM_KEY_RECORD_SIZE; rc = hcapi_cfa_key_hw_op(&op, &key_tbl, @@ -755,7 +759,7 @@ tf_insert_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb, key_tbl.base0 = (uint8_t *)&tbl_scope_cb->em_ctx_info[parms->dir].em_tables[TF_KEY1_TABLE]; - key_obj.offset = index * TF_EM_KEY_RECORD_SIZE; + key_obj.offset = index * TF_P4_EM_KEY_RECORD_SIZE; rc = hcapi_cfa_key_hw_op(&op, &key_tbl, @@ -818,9 +822,9 @@ tf_delete_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb, (uint8_t *)&tbl_scope_cb->em_ctx_info[parms->dir].em_tables [(hash_type == 0 ? TF_KEY0_TABLE : TF_KEY1_TABLE)]; key_tbl.page_size = TF_EM_PAGE_SIZE; - key_obj.offset = index * TF_EM_KEY_RECORD_SIZE; + key_obj.offset = index * TF_P4_EM_KEY_RECORD_SIZE; key_obj.data = NULL; - key_obj.size = TF_EM_KEY_RECORD_SIZE; + key_obj.size = TF_P4_EM_KEY_RECORD_SIZE; rc = hcapi_cfa_key_hw_op(&op, &key_tbl, @@ -843,7 +847,10 @@ int tf_em_insert_ext_entry(struct tf *tfp __rte_unused, struct tf_insert_em_entry_parms *parms) { + int rc; struct tf_tbl_scope_cb *tbl_scope_cb; + struct tf_session *tfs; + struct tf_dev_info *dev; tbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id); if (tbl_scope_cb == NULL) { @@ -851,9 +858,20 @@ tf_em_insert_ext_entry(struct tf *tfp __rte_unused, return -EINVAL; } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + return tf_insert_eem_entry - (tbl_scope_cb, - parms); + (dev, + tbl_scope_cb, + parms); } /** Delete EM hash entry API diff --git a/drivers/net/bnxt/tf_core/tf_em_hash_internal.c b/drivers/net/bnxt/tf_core/tf_em_hash_internal.c index 09183b42f0..f6c9772b44 100644 --- a/drivers/net/bnxt/tf_core/tf_em_hash_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_hash_internal.c @@ -15,6 +15,7 @@ #include "tf_msg.h" #include "tfp.h" #include "tf_ext_flow_handle.h" +#include "tf_device.h" #include "bnxt.h" @@ -43,6 +44,18 @@ tf_em_hash_insert_int_entry(struct tf *tfp, uint32_t key0_hash; uint32_t key1_hash; uint64_t big_hash; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; rc = stack_pop(pool, &index); if (rc) { @@ -52,8 +65,11 @@ tf_em_hash_insert_int_entry(struct tf *tfp, return rc; } - big_hash = hcapi_cfa_key_hash((uint64_t *)parms->key, - (TF_HW_EM_KEY_MAX_SIZE + 4) * 8); + if (dev->ops->tf_dev_cfa_key_hash == NULL) + return -EINVAL; + + big_hash = dev->ops->tf_dev_cfa_key_hash((uint64_t *)parms->key, + TF_P58_HW_EM_KEY_MAX_SIZE * 8); key0_hash = (uint32_t)(big_hash >> 32); key1_hash = (uint32_t)(big_hash & 0xFFFFFFFF); @@ -93,7 +109,7 @@ tf_em_hash_insert_int_entry(struct tf *tfp, TF_SET_FIELDS_IN_FLOW_HANDLE(parms->flow_handle, (uint32_t)num_of_entries, 0, - 0, + TF_FLAGS_FLOW_HANDLE_INTERNAL, rptr_index, rptr_entry, 0); From patchwork Sun Jun 13 00:06:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94108 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7EDA9A0C41; Sun, 13 Jun 2021 02:08:59 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9492B4117E; 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Sat, 12 Jun 2021 17:07:14 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.12 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:13 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Peter Spreadborough , Randy Schacher , Venkat Duvvuru Date: Sat, 12 Jun 2021 17:06:06 -0700 Message-Id: <20210613000652.28191-13-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 12/58] net/bnxt: modify TRUFLOW HWRM messages X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith - Move Bulk get to a direct HWRM message - Deprecate code based on HCAPI changes Signed-off-by: Farah Smith Signed-off-by: Peter Spreadborough Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h | 72 +---- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c | 4 +- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h | 193 ++++++++---- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c | 113 +++---- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h | 282 +---------------- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c | 2 +- drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h | 287 +----------------- drivers/net/bnxt/tf_core/hwrm_tf.h | 196 ------------ drivers/net/bnxt/tf_core/lookup3.h | 2 +- drivers/net/bnxt/tf_core/tf_core.c | 1 - drivers/net/bnxt/tf_core/tf_core.h | 127 ++++---- drivers/net/bnxt/tf_core/tf_device.c | 2 +- drivers/net/bnxt/tf_core/tf_device_p4.h | 75 +++-- drivers/net/bnxt/tf_core/tf_device_p58.h | 48 ++- drivers/net/bnxt/tf_core/tf_em.h | 4 +- drivers/net/bnxt/tf_core/tf_em_common.c | 250 ++++++++++----- drivers/net/bnxt/tf_core/tf_em_common.h | 68 ++++- drivers/net/bnxt/tf_core/tf_em_host.c | 109 +++++-- drivers/net/bnxt/tf_core/tf_msg.c | 263 ++++++++++++++-- drivers/net/bnxt/tf_core/tf_msg.h | 87 ++++++ drivers/net/bnxt/tf_core/tf_msg_common.h | 3 - drivers/net/bnxt/tf_core/tf_session.c | 115 +++++++ drivers/net/bnxt/tf_core/tf_session.h | 90 ++++++ drivers/net/bnxt/tf_core/tf_tbl.h | 30 -- drivers/net/bnxt/tf_core/tf_util.c | 12 - drivers/net/bnxt/tf_core/tf_util.h | 4 + drivers/net/bnxt/tf_core/tfp.c | 34 --- drivers/net/bnxt/tf_core/tfp.h | 52 ---- 28 files changed, 1198 insertions(+), 1327 deletions(-) delete mode 100644 drivers/net/bnxt/tf_core/hwrm_tf.h diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h index 0580e07c45..c67aa29ad0 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h @@ -63,74 +63,10 @@ struct hcapi_cfa_devops { */ uint64_t (*hcapi_cfa_key_hash)(uint64_t *key_data, uint16_t bitlen); -int hcapi_cfa_action_hw_op(struct hcapi_cfa_hwop *op, - uint8_t *act_tbl, - struct hcapi_cfa_data *act_obj); -int hcapi_cfa_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_rm_register_client(hcapi_cfa_rm_data_t *data, - const char *client_name, - int *client_id); -int hcapi_cfa_rm_unregister_client(hcapi_cfa_rm_data_t *data, - int client_id); -int hcapi_cfa_rm_query_resources(hcapi_cfa_rm_data_t *data, - int client_id, - uint16_t chnl_id, - struct hcapi_cfa_resc_req_db *req_db); -int hcapi_cfa_rm_query_resources_one(hcapi_cfa_rm_data_t *data, - int clien_id, - struct hcapi_cfa_resc_db *resc_db); -int hcapi_cfa_rm_reserve_resources(hcapi_cfa_rm_data_t *data, - int client_id, - struct hcapi_cfa_resc_req_db *resc_req, - struct hcapi_cfa_resc_db *resc_db); -int hcapi_cfa_rm_release_resources(hcapi_cfa_rm_data_t *data, - int client_id, - struct hcapi_cfa_resc_req_db *resc_req, - struct hcapi_cfa_resc_db *resc_db); -int hcapi_cfa_rm_initialize(hcapi_cfa_rm_data_t *data); - -#if SUPPORT_CFA_HW_P4 - -int hcapi_cfa_p4_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_prof_l2ctxt_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_prof_l2ctxtrmp_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_prof_tcam_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_prof_tcamrmp_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_wc_tcam_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_wc_tcam_rec_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *obj_data); -int hcapi_cfa_p4_mirror_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *mirror); -int hcapi_cfa_p4_global_cfg_hwop(struct hcapi_cfa_hwop *op, - uint32_t type, - struct hcapi_cfa_data *config); -/* SUPPORT_CFA_HW_P4 */ -#elif SUPPORT_CFA_HW_P45 -int hcapi_cfa_p45_mirror_hwop(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_data *mirror); -int hcapi_cfa_p45_global_cfg_hwop(struct hcapi_cfa_hwop *op, - uint32_t type, - struct hcapi_cfa_data *config); -/* SUPPORT_CFA_HW_P45 */ -#endif - -/** - * HCAPI CFA device HW operation function callback definition - * This is standardized function callback hook to install different - * CFA HW table programming function callback. - */ - -struct hcapi_cfa_tbl_cb { - /** - * This function callback provides the functionality to read/write - * HW table entry from a HW table. + /** hardware operation on the CFA EM key + * + * This API provides the functionality to program the exact match and + * key data to exact match record memory. * * @param[in] op * A pointer to the Hardware operation parameter diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c index fc96e3bff7..93a9f555df 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c @@ -3,9 +3,7 @@ * All rights reserved. */ -#include "hcapi_cfa_defs.h" -#include -#include "assert.h" +#include "hcapi_cfa.h" const uint32_t crc32tbl[] = { /* CRC polynomial 0xedb88320 */ 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h index 579f1d5693..581dc6bc64 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h @@ -1,6 +1,5 @@ - /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2019-2021 Broadcom * All rights reserved. */ @@ -14,27 +13,54 @@ #include #include #include -#include #include +#include + +#if !defined(__GNUC__) +#pragma anon_unions +#endif #define CFA_BITS_PER_BYTE (8) +#define CFA_BITS_PER_WORD (sizeof(uint32_t) * CFA_BITS_PER_BYTE) #define __CFA_ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask)) -#define CFA_ALIGN(x, a) __CFA_ALIGN_MASK(x, (a) - 1) +#define CFA_ALIGN(x, a) __CFA_ALIGN_MASK((x), (a) - 1) +#define CFA_ALIGN_256(x) CFA_ALIGN(x, 256) #define CFA_ALIGN_128(x) CFA_ALIGN(x, 128) #define CFA_ALIGN_32(x) CFA_ALIGN(x, 32) -#define NUM_WORDS_ALIGN_32BIT(x) \ - (CFA_ALIGN_32(x) / (sizeof(uint32_t) * CFA_BITS_PER_BYTE)) -#define NUM_WORDS_ALIGN_128BIT(x) \ - (CFA_ALIGN_128(x) / (sizeof(uint32_t) * CFA_BITS_PER_BYTE)) +#define NUM_WORDS_ALIGN_32BIT(x) (CFA_ALIGN_32(x) / CFA_BITS_PER_WORD) +#define NUM_WORDS_ALIGN_128BIT(x) (CFA_ALIGN_128(x) / CFA_BITS_PER_WORD) +#define NUM_WORDS_ALIGN_256BIT(x) (CFA_ALIGN_256(x) / CFA_BITS_PER_WORD) +/* TODO: redefine according to chip variant */ #define CFA_GLOBAL_CFG_DATA_SZ (100) +#ifndef SUPPORT_CFA_HW_P4 +#define SUPPORT_CFA_HW_P4 (0) +#endif + +#ifndef SUPPORT_CFA_HW_P45 +#define SUPPORT_CFA_HW_P45 (0) +#endif + +#ifndef SUPPORT_CFA_HW_P58 +#define SUPPORT_CFA_HW_P58 (0) +#endif + #if SUPPORT_CFA_HW_ALL #include "hcapi_cfa_p4.h" #include "hcapi_cfa_p58.h" #endif /* SUPPORT_CFA_HW_ALL */ +/* + * Hashing defines + */ +#define HCAPI_CFA_LKUP_SEED_MEM_SIZE 512 + +/* CRC32i support for Key0 hash */ +#define ucrc32(ch, crc) (crc32tbl[((crc) ^ (ch)) & 0xff] ^ ((crc) >> 8)) +#define crc32(x, y) crc32i(~0, x, y) + /** * CFA HW version definition */ @@ -54,35 +80,30 @@ enum hcapi_cfa_dir { HCAPI_CFA_DIR_MAX = 2 }; -/* - * Hashing defines - */ -#define HCAPI_CFA_LKUP_SEED_MEM_SIZE 512 - -/* CRC32i support for Key0 hash */ -#define ucrc32(ch, crc) (crc32tbl[((crc) ^ (ch)) & 0xff] ^ ((crc) >> 8)) -#define crc32(x, y) crc32i(~0, x, y) - - /** * CFA HW OPCODE definition */ enum hcapi_cfa_hwops { - HCAPI_CFA_HWOPS_PUT, /**< Write to HW operation */ - HCAPI_CFA_HWOPS_GET, /**< Read from HW operation */ - HCAPI_CFA_HWOPS_ADD, /**< For operations which require more than simple - * writes to HW, this operation is used. The - * distinction with this operation when compared - * to the PUT ops is that this operation is used - * in conjunction with the HCAPI_CFA_HWOPS_DEL - * op to remove the operations issued by the - * ADD OP. - */ - HCAPI_CFA_HWOPS_DEL, /**< This issues operations to clear the hardware. - * This operation is used in conjunction - * with the HCAPI_CFA_HWOPS_ADD op and is the - * way to undo/clear the ADD op. - */ + HCAPI_CFA_HWOPS_PUT, /**< Write to HW operation */ + HCAPI_CFA_HWOPS_GET, /**< Read from HW operation */ + HCAPI_CFA_HWOPS_ADD, /*< + * For operations which require more then + * simple writes to HW, this operation is + * used. The distinction with this operation + * when compared to the PUT ops is that this + * operation is used in conjunction with + * the HCAPI_CFA_HWOPS_DEL op to remove + * the operations issued by the ADD OP. + */ + HCAPI_CFA_HWOPS_DEL, /*< + * Beside to delete from the hardware, this + * operation is also undo the add operation + * performed by the HCAPI_CFA_HWOPS_ADD op. + */ + HCAPI_CFA_HWOPS_EVICT, /*< This operation is used to evict entries from + * CFA cache memories. This operation is only + * applicable to tables that use CFA caches. + */ HCAPI_CFA_HWOPS_MAX }; @@ -91,11 +112,10 @@ enum hcapi_cfa_hwops { */ enum hcapi_cfa_key_ctrlops { HCAPI_CFA_KEY_CTRLOPS_INSERT, /**< insert control bits */ - HCAPI_CFA_KEY_CTRLOPS_STRIP, /**< strip control bits */ + HCAPI_CFA_KEY_CTRLOPS_STRIP, /**< strip control bits */ HCAPI_CFA_KEY_CTRLOPS_MAX }; - /** * CFA HW definition */ @@ -132,18 +152,23 @@ struct hcapi_cfa_data { /** [in] physical offset to the HW table for the data to be * written to. If this is an array of registers, this is the * index into the array of registers. For writing keys, this - * is the byte offset into the memory where the key should be + * is the byte pointer into the memory where the key should be * written. */ union { uint32_t index; uint32_t byte_offset; - } u; + }; /** [in] HW data buffer pointer */ uint8_t *data; - /** [in] HW data mask buffer pointer */ + /** [in] HW data mask buffer pointer. + * When the CFA data is a FKB and data_mask pointer + * is NULL, then the default mask to enable all bit will + * be used. + */ uint8_t *data_mask; - /** [in] size of the HW data buffer in bytes */ + /** [in/out] size of the HW data buffer in bytes + */ uint16_t data_sz; }; @@ -160,35 +185,36 @@ enum hcapi_cfa_em_table_type { TF_KEY1_TABLE, TF_RECORD_TABLE, TF_EFC_TABLE, + TF_ACTION_TABLE, + TF_EM_LKUP_TABLE, TF_MAX_TABLE }; struct hcapi_cfa_em_page_tbl { - uint32_t pg_count; - uint32_t pg_size; - void **pg_va_tbl; - uint64_t *pg_pa_tbl; + uint32_t pg_count; + uint32_t pg_size; + void **pg_va_tbl; + uint64_t *pg_pa_tbl; }; struct hcapi_cfa_em_table { - int type; - uint32_t num_entries; - uint16_t ctx_id; - uint32_t entry_size; - int num_lvl; - uint32_t page_cnt[TF_PT_LVL_MAX]; - uint64_t num_data_pages; - void *l0_addr; - uint64_t l0_dma_addr; - struct hcapi_cfa_em_page_tbl pg_tbl[TF_PT_LVL_MAX]; + int type; + uint32_t num_entries; + uint16_t ctx_id; + uint32_t entry_size; + int num_lvl; + uint32_t page_cnt[TF_PT_LVL_MAX]; + uint64_t num_data_pages; + void *l0_addr; + uint64_t l0_dma_addr; + struct hcapi_cfa_em_page_tbl pg_tbl[TF_PT_LVL_MAX]; }; struct hcapi_cfa_em_ctx_mem_info { - struct hcapi_cfa_em_table em_tables[TF_MAX_TABLE]; + struct hcapi_cfa_em_table em_tables[TF_MAX_TABLE]; }; /*********************** Truflow end ****************************/ - /** * CFA HW key table definition * @@ -210,6 +236,10 @@ struct hcapi_cfa_key_tbl { * applicable for newer chip */ uint8_t *base1; + /** [in] Optional - If the table is managed by a Backing Store + * database, then this object can be use to configure the EM Key. + */ + struct hcapi_cfa_bs_db *bs_db; /** [in] Page size for EEM tables */ uint32_t page_size; }; @@ -220,7 +250,7 @@ struct hcapi_cfa_key_tbl { struct hcapi_cfa_key_obj { /** [in] pointer to the key data buffer */ uint32_t *data; - /** [in] buffer len in bits */ + /** [in] buffer len in bytes */ uint32_t len; /** [in] Pointer to the key layout */ struct hcapi_cfa_key_layout *layout; @@ -239,6 +269,13 @@ struct hcapi_cfa_key_data { uint8_t *data; /** [in] size of the key in bytes */ uint16_t size; + /** [in] optional table scope ID */ + uint8_t tbl_scope; + /** [in] the fid owner of the key */ + uint64_t metadata; + /** [in] stored with the bucket which can be used to by + * the caller to retreved later via the GET HW OP. + */ }; /** @@ -247,8 +284,52 @@ struct hcapi_cfa_key_data { struct hcapi_cfa_key_loc { /** [out] on-chip EM bucket offset or off-chip EM bucket mem pointer */ uint64_t bucket_mem_ptr; + /** [out] off-chip EM key offset mem pointer */ + uint64_t mem_ptr; + /** [out] index within the array of the EM buckets */ + uint32_t bucket_mem_idx; /** [out] index within the EM bucket */ uint8_t bucket_idx; + /** [out] index within the EM records */ + uint32_t mem_idx; +}; + +/** + * Action record info + */ +struct hcapi_cfa_action_addr { + /** [in] action SRAM block ID for on-chip action records or table + * scope of the action backing store + */ + uint16_t blk_id; + /** [in] ar_id or cache line aligned address offset for the action + * record + */ + uint32_t offset; +}; + +/** + * Action data definition + */ +struct hcapi_cfa_action_data { + /** [in] action record addr info for on-chip action records */ + struct hcapi_cfa_action_addr addr; + /** [in/out] pointer to the action data buffer */ + uint32_t *data; + /** [in] action data buffer len in bytes */ + uint32_t len; +}; + +/** + * Action object definition + */ +struct hcapi_cfa_action_obj { + /** [in] pointer to the action data buffer */ + uint32_t *data; + /** [in] buffer len in bytes */ + uint32_t len; + /** [in] pointer to the action layout */ + struct hcapi_cfa_action_layout *layout; }; /** diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c index f097be9dfb..813b33943c 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c @@ -2,7 +2,7 @@ * Copyright(c) 2019-2021 Broadcom * All rights reserved. */ -#include + #include #include #include @@ -10,6 +10,7 @@ #include "lookup3.h" #include "rand.h" +#include "hcapi_cfa.h" #include "hcapi_cfa_defs.h" static uint32_t hcapi_cfa_lkup_lkup3_init_cfg; @@ -18,8 +19,7 @@ static bool hcapi_cfa_lkup_init; static inline uint32_t SWAP_WORDS32(uint32_t val32) { - return (((val32 & 0x0000ffff) << 16) | - ((val32 & 0xffff0000) >> 16)); + return (((val32 & 0x0000ffff) << 16) | ((val32 & 0xffff0000) >> 16)); } static void hcapi_cfa_seeds_init(void) @@ -77,9 +77,8 @@ static uint32_t hcapi_cfa_crc32_hash(uint8_t *key) if (!(val2 & 0x1)) val1 = hcapi_cfa_crc32i(~val1, temp, 4); - val1 = hcapi_cfa_crc32i(~val1, - (key - (CFA_P4_EEM_KEY_MAX_SIZE - 1)), - CFA_P4_EEM_KEY_MAX_SIZE); + val1 = hcapi_cfa_crc32i(~val1, (key - (CFA_P4_EEM_KEY_MAX_SIZE - 1)), + CFA_P4_EEM_KEY_MAX_SIZE); /* End with seed */ if (val2 & 0x1) @@ -92,16 +91,14 @@ static uint32_t hcapi_cfa_lookup3_hash(uint8_t *in_key) { uint32_t val1; - val1 = hashword(((const uint32_t *)(uintptr_t *)in_key) + 1, - CFA_P4_EEM_KEY_MAX_SIZE / (sizeof(uint32_t)), - hcapi_cfa_lkup_lkup3_init_cfg); + val1 = hashword(((uint32_t *)in_key) + 1, + CFA_P4_EEM_KEY_MAX_SIZE / (sizeof(uint32_t)), + hcapi_cfa_lkup_lkup3_init_cfg); return val1; } - -uint64_t hcapi_get_table_page(struct hcapi_cfa_em_table *mem, - uint32_t page) +uint64_t hcapi_get_table_page(struct hcapi_cfa_em_table *mem, uint32_t page) { int level = 0; uint64_t addr; @@ -114,7 +111,7 @@ uint64_t hcapi_get_table_page(struct hcapi_cfa_em_table *mem, */ level = mem->num_lvl - 1; - addr = (uintptr_t)mem->pg_tbl[level].pg_va_tbl[page]; + addr = (uint64_t)mem->pg_tbl[level].pg_va_tbl[page]; return addr; } @@ -136,42 +133,39 @@ uint64_t hcapi_cfa_p4_key_hash(uint64_t *key_data, if (!hcapi_cfa_lkup_init) hcapi_cfa_seeds_init(); - key0_hash = hcapi_cfa_crc32_hash(((uint8_t *)key_data) + - (bitlen / 8) - 1); + key0_hash = + hcapi_cfa_crc32_hash(((uint8_t *)key_data) + (bitlen / 8) - 1); key1_hash = hcapi_cfa_lookup3_hash((uint8_t *)key_data); return ((uint64_t)key0_hash) << 32 | (uint64_t)key1_hash; } -static int hcapi_cfa_key_hw_op_put(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_key_data *key_obj) +static int hcapi_cfa_p4_key_hw_op_put(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_key_data *key_obj) { int rc = 0; - memcpy((uint8_t *)(uintptr_t)op->hw.base_addr + - key_obj->offset, - key_obj->data, - key_obj->size); + memcpy((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, + key_obj->data, key_obj->size); return rc; } -static int hcapi_cfa_key_hw_op_get(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_key_data *key_obj) +static int hcapi_cfa_p4_key_hw_op_get(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_key_data *key_obj) { int rc = 0; memcpy(key_obj->data, - (uint8_t *)(uintptr_t)op->hw.base_addr + - key_obj->offset, + (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, key_obj->size); return rc; } -static int hcapi_cfa_key_hw_op_add(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_key_data *key_obj) +static int hcapi_cfa_p4_key_hw_op_add(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_key_data *key_obj) { int rc = 0; struct cfa_p4_eem_64b_entry table_entry; @@ -180,8 +174,7 @@ static int hcapi_cfa_key_hw_op_add(struct hcapi_cfa_hwop *op, * Is entry free? */ memcpy(&table_entry, - (uint8_t *)(uintptr_t)op->hw.base_addr + - key_obj->offset, + (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, key_obj->size); /* @@ -190,16 +183,14 @@ static int hcapi_cfa_key_hw_op_add(struct hcapi_cfa_hwop *op, if (table_entry.hdr.word1 & (1 << CFA_P4_EEM_ENTRY_VALID_SHIFT)) return -1; - memcpy((uint8_t *)(uintptr_t)op->hw.base_addr + - key_obj->offset, - key_obj->data, - key_obj->size); + memcpy((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, + key_obj->data, key_obj->size); return rc; } -static int hcapi_cfa_key_hw_op_del(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_key_data *key_obj) +static int hcapi_cfa_p4_key_hw_op_del(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_key_data *key_obj) { int rc = 0; struct cfa_p4_eem_64b_entry table_entry; @@ -208,8 +199,7 @@ static int hcapi_cfa_key_hw_op_del(struct hcapi_cfa_hwop *op, * Read entry */ memcpy(&table_entry, - (uint8_t *)(uintptr_t)op->hw.base_addr + - key_obj->offset, + (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, key_obj->size); /* @@ -221,8 +211,7 @@ static int hcapi_cfa_key_hw_op_del(struct hcapi_cfa_hwop *op, * before deleting the entry. */ if (key_obj->data != NULL) { - if (memcmp(&table_entry, - key_obj->data, + if (memcmp(&table_entry, key_obj->data, key_obj->size) != 0) return -1; } @@ -230,40 +219,33 @@ static int hcapi_cfa_key_hw_op_del(struct hcapi_cfa_hwop *op, return -1; } - /* * Delete entry */ - memset((uint8_t *)(uintptr_t)op->hw.base_addr + - key_obj->offset, - 0, - key_obj->size); + memset((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, 0, key_obj->size); return rc; } - /** Apporiximation of hcapi_cfa_key_hw_op() * * */ -int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op, - struct hcapi_cfa_key_tbl *key_tbl, - struct hcapi_cfa_key_data *key_obj, - struct hcapi_cfa_key_loc *key_loc) +static int hcapi_cfa_p4_key_hw_op(struct hcapi_cfa_hwop *op, + struct hcapi_cfa_key_tbl *key_tbl, + struct hcapi_cfa_key_data *key_obj, + struct hcapi_cfa_key_loc *key_loc) { int rc = 0; + struct hcapi_cfa_em_table *em_tbl; + uint32_t page; - if (op == NULL || - key_tbl == NULL || - key_obj == NULL || - key_loc == NULL) + if (op == NULL || key_tbl == NULL || key_obj == NULL || key_loc == NULL) return -1; - op->hw.base_addr = - hcapi_get_table_page((struct hcapi_cfa_em_table *) - key_tbl->base0, - key_obj->offset / key_tbl->page_size); + page = key_obj->offset / key_tbl->page_size; + em_tbl = (struct hcapi_cfa_em_table *)key_tbl->base0; + op->hw.base_addr = hcapi_get_table_page(em_tbl, page); /* Offset is adjusted to be the offset into the page */ key_obj->offset = key_obj->offset % key_tbl->page_size; @@ -272,14 +254,14 @@ int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op, switch (op->opcode) { case HCAPI_CFA_HWOPS_PUT: /**< Write to HW operation */ - rc = hcapi_cfa_key_hw_op_put(op, key_obj); + rc = hcapi_cfa_p4_key_hw_op_put(op, key_obj); break; case HCAPI_CFA_HWOPS_GET: /**< Read from HW operation */ - rc = hcapi_cfa_key_hw_op_get(op, key_obj); + rc = hcapi_cfa_p4_key_hw_op_get(op, key_obj); break; case HCAPI_CFA_HWOPS_ADD: - /**< For operations which require more than - * simple writes to HW, this operation is used. The + /**< For operations which require more then simple + * writes to HW, this operation is used. The * distinction with this operation when compared * to the PUT ops is that this operation is used * in conjunction with the HCAPI_CFA_HWOPS_DEL @@ -287,11 +269,11 @@ int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op, * ADD OP. */ - rc = hcapi_cfa_key_hw_op_add(op, key_obj); + rc = hcapi_cfa_p4_key_hw_op_add(op, key_obj); break; case HCAPI_CFA_HWOPS_DEL: - rc = hcapi_cfa_key_hw_op_del(op, key_obj); + rc = hcapi_cfa_p4_key_hw_op_del(op, key_obj); break; default: rc = -1; @@ -300,3 +282,8 @@ int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op, return rc; } + +const struct hcapi_cfa_devops cfa_p4_devops = { + .hcapi_cfa_key_hash = hcapi_cfa_p4_key_hash, + .hcapi_cfa_key_hw_op = hcapi_cfa_p4_key_hw_op, +}; diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h index 74a5483c0b..363ffcd57c 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2021 Broadcom + * Copyright(c) 2019-2021 Broadcom * All rights reserved. */ @@ -44,286 +44,6 @@ struct cfa_p4_prof_key_cfg { enum cfa_p4_mac_sel_mode mode; }; -/** - * CFA action layout definition - */ - -#define CFA_P4_ACTION_MAX_LAYOUT_SIZE 184 - -/** - * Action object template structure - * - * Template structure presents data fields that are necessary to know - * at the beginning of Action Builder (AB) processing. Like before the - * AB compilation. One such example could be a template that is - * flexible in size (Encap Record) and the presence of these fields - * allows for determining the template size as well as where the - * fields are located in the record. - * - * The template may also present fields that are not made visible to - * the caller by way of the action fields. - * - * Template fields also allow for additional checking on user visible - * fields. One such example could be the encap pointer behavior on a - * CFA_P4_ACT_OBJ_TYPE_ACT or CFA_P4_ACT_OBJ_TYPE_ACT_SRAM. - */ -struct cfa_p4_action_template { - /** Action Object type - * - * Controls the type of the Action Template - */ - enum { - /** Select this type to build an Action Record Object - */ - CFA_P4_ACT_OBJ_TYPE_ACT, - /** Select this type to build an Action Statistics - * Object - */ - CFA_P4_ACT_OBJ_TYPE_STAT, - /** Select this type to build a SRAM Action Record - * Object. - */ - CFA_P4_ACT_OBJ_TYPE_ACT_SRAM, - /** Select this type to build a SRAM Action - * Encapsulation Object. - */ - CFA_P4_ACT_OBJ_TYPE_ENCAP_SRAM, - /** Select this type to build a SRAM Action Modify - * Object, with IPv4 capability. - */ - /* In case of Stingray the term Modify is used for the 'NAT - * action'. Action builder is leveraged to fill in the NAT - * object which then can be referenced by the action - * record. - */ - CFA_P4_ACT_OBJ_TYPE_MODIFY_IPV4_SRAM, - /** Select this type to build a SRAM Action Source - * Property Object. - */ - /* In case of Stingray this is not a 'pure' action record. - * Action builder is leveraged to full in the Source Property - * object which can then be referenced by the action - * record. - */ - CFA_P4_ACT_OBJ_TYPE_SRC_PROP_SRAM, - /** Select this type to build a SRAM Action Statistics - * Object - */ - CFA_P4_ACT_OBJ_TYPE_STAT_SRAM, - } obj_type; - - /** Action Control - * - * Controls the internals of the Action Template - * - * act is valid when: - * (obj_type == CFA_P4_ACT_OBJ_TYPE_ACT) - */ - /* - * Stat and encap are always inline for EEM as table scope - * allocation does not allow for separate Stats allocation, - * but has the xx_inline flags as to be forward compatible - * with Stingray 2, always treated as TRUE. - */ - struct { - /** Set to CFA_HCAPI_TRUE to enable statistics - */ - uint8_t stat_enable; - /** Set to CFA_HCAPI_TRUE to enable statistics to be inlined - */ - uint8_t stat_inline; - - /** Set to CFA_HCAPI_TRUE to enable encapsulation - */ - uint8_t encap_enable; - /** Set to CFA_HCAPI_TRUE to enable encapsulation to be inlined - */ - uint8_t encap_inline; - } act; - - /** Modify Setting - * - * Controls the type of the Modify Action the template is - * describing - * - * modify is valid when: - * (obj_type == CFA_P4_ACT_OBJ_TYPE_MODIFY_SRAM) - */ - enum { - /** Set to enable Modify of Source IPv4 Address - */ - CFA_P4_MR_REPLACE_SOURCE_IPV4 = 0, - /** Set to enable Modify of Destination IPv4 Address - */ - CFA_P4_MR_REPLACE_DEST_IPV4 - } modify; - - /** Encap Control - * Controls the type of encapsulation the template is - * describing - * - * encap is valid when: - * ((obj_type == CFA_P4_ACT_OBJ_TYPE_ACT) && - * act.encap_enable) || - * ((obj_type == CFA_P4_ACT_OBJ_TYPE_SRC_PROP_SRAM) - */ - struct { - /* Direction is required as Stingray Encap on RX is - * limited to l2 and VTAG only. - */ - /** Receive or Transmit direction - */ - uint8_t direction; - /** Set to CFA_HCAPI_TRUE to enable L2 capability in the - * template - */ - uint8_t l2_enable; - /** vtag controls the Encap Vector - VTAG Encoding, 4 bits - * - *
    - *
  • CFA_P4_ACT_ENCAP_VTAGS_PUSH_0, default, no VLAN - * Tags applied - *
  • CFA_P4_ACT_ENCAP_VTAGS_PUSH_1, adds capability to - * set 1 VLAN Tag. Action Template compile adds - * the following field to the action object - * ::TF_ER_VLAN1 - *
  • CFA_P4_ACT_ENCAP_VTAGS_PUSH_2, adds capability to - * set 2 VLAN Tags. Action Template compile adds - * the following fields to the action object - * ::TF_ER_VLAN1 and ::TF_ER_VLAN2 - *
- */ - enum { CFA_P4_ACT_ENCAP_VTAGS_PUSH_0 = 0, - CFA_P4_ACT_ENCAP_VTAGS_PUSH_1, - CFA_P4_ACT_ENCAP_VTAGS_PUSH_2 } vtag; - - /* - * The remaining fields are NOT supported when - * direction is RX and ((obj_type == - * CFA_P4_ACT_OBJ_TYPE_ACT) && act.encap_enable). - * ab_compile_layout will perform the checking and - * skip remaining fields. - */ - /** L3 Encap controls the Encap Vector - L3 Encoding, - * 3 bits. Defines the type of L3 Encapsulation the - * template is describing. - *
    - *
  • CFA_P4_ACT_ENCAP_L3_NONE, default, no L3 - * Encapsulation processing. - *
  • CFA_P4_ACT_ENCAP_L3_IPV4, enables L3 IPv4 - * Encapsulation. - *
  • CFA_P4_ACT_ENCAP_L3_IPV6, enables L3 IPv6 - * Encapsulation. - *
  • CFA_P4_ACT_ENCAP_L3_MPLS_8847, enables L3 MPLS - * 8847 Encapsulation. - *
  • CFA_P4_ACT_ENCAP_L3_MPLS_8848, enables L3 MPLS - * 8848 Encapsulation. - *
- */ - enum { - /** Set to disable any L3 encapsulation - * processing, default - */ - CFA_P4_ACT_ENCAP_L3_NONE = 0, - /** Set to enable L3 IPv4 encapsulation - */ - CFA_P4_ACT_ENCAP_L3_IPV4 = 4, - /** Set to enable L3 IPv6 encapsulation - */ - CFA_P4_ACT_ENCAP_L3_IPV6 = 5, - /** Set to enable L3 MPLS 8847 encapsulation - */ - CFA_P4_ACT_ENCAP_L3_MPLS_8847 = 6, - /** Set to enable L3 MPLS 8848 encapsulation - */ - CFA_P4_ACT_ENCAP_L3_MPLS_8848 = 7 - } l3; - -#define CFA_P4_ACT_ENCAP_MAX_MPLS_LABELS 8 - /** 1-8 labels, valid when - * (l3 == CFA_P4_ACT_ENCAP_L3_MPLS_8847) || - * (l3 == CFA_P4_ACT_ENCAP_L3_MPLS_8848) - * - * MAX number of MPLS Labels 8. - */ - uint8_t l3_num_mpls_labels; - - /** Set to CFA_HCAPI_TRUE to enable L4 capability in the - * template. - * - * CFA_HCAPI_TRUE adds ::TF_EN_UDP_SRC_PORT and - * ::TF_EN_UDP_DST_PORT to the template. - */ - uint8_t l4_enable; - - /** Tunnel Encap controls the Encap Vector - Tunnel - * Encap, 3 bits. Defines the type of Tunnel - * encapsulation the template is describing - *
    - *
  • CFA_P4_ACT_ENCAP_TNL_NONE, default, no Tunnel - * Encapsulation processing. - *
  • CFA_P4_ACT_ENCAP_TNL_GENERIC_FULL - *
  • CFA_P4_ACT_ENCAP_TNL_VXLAN. NOTE: Expects - * l4_enable set to CFA_P4_TRUE; - *
  • CFA_P4_ACT_ENCAP_TNL_NGE. NOTE: Expects l4_enable - * set to CFA_P4_TRUE; - *
  • CFA_P4_ACT_ENCAP_TNL_NVGRE. NOTE: only valid if - * l4_enable set to CFA_HCAPI_FALSE. - *
  • CFA_P4_ACT_ENCAP_TNL_GRE.NOTE: only valid if - * l4_enable set to CFA_HCAPI_FALSE. - *
  • CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4 - *
  • CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL - *
- */ - enum { - /** Set to disable Tunnel header encapsulation - * processing, default - */ - CFA_P4_ACT_ENCAP_TNL_NONE = 0, - /** Set to enable Tunnel Generic Full header - * encapsulation - */ - CFA_P4_ACT_ENCAP_TNL_GENERIC_FULL, - /** Set to enable VXLAN header encapsulation - */ - CFA_P4_ACT_ENCAP_TNL_VXLAN, - /** Set to enable NGE (VXLAN2) header encapsulation - */ - CFA_P4_ACT_ENCAP_TNL_NGE, - /** Set to enable NVGRE header encapsulation - */ - CFA_P4_ACT_ENCAP_TNL_NVGRE, - /** Set to enable GRE header encapsulation - */ - CFA_P4_ACT_ENCAP_TNL_GRE, - /** Set to enable Generic header after Tunnel - * L4 encapsulation - */ - CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4, - /** Set to enable Generic header after Tunnel - * encapsulation - */ - CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL - } tnl; - - /** Number of bytes of generic tunnel header, - * valid when - * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_FULL) || - * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4) || - * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL) - */ - uint8_t tnl_generic_size; - /** Number of 32b words of nge options, - * valid when - * (tnl == CFA_P4_ACT_ENCAP_TNL_NGE) - */ - uint8_t tnl_nge_op_len; - /* Currently not planned */ - /* Custom Header */ - /* uint8_t custom_enable; */ - } encap; -}; - /** * Enumeration of SRAM entry types, used for allocation of * fixed SRAM entities. The memory model for CFA HCAPI diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c index 15cbdc6eba..a82add3526 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c @@ -86,7 +86,7 @@ static uint32_t hcapi_cfa_lookup3_hash(uint8_t *in_key) { uint32_t val1; - val1 = hashword(((uint32_t *)in_key) + 1, + val1 = hashword(((uint32_t *)in_key), CFA_P58_EEM_KEY_MAX_SIZE / (sizeof(uint32_t)), hcapi_cfa_lkup_lkup3_init_cfg); diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h index 27796b1b2f..d272d3ffec 100644 --- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h +++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h @@ -12,6 +12,11 @@ #define CFA_P58_EEM_KEY_MAX_SIZE 80 #define CFA_P58_EEM_KEY_RECORD_SIZE 80 +#define CFA_P58_EM_FKB_NUM_WORDS 4 +#define CFA_P58_EM_FKB_NUM_ENTRIES 64 +#define CFA_P58_WC_TCAM_FKB_NUM_WORDS 4 +#define CFA_P58_WC_TCAM_FKB_NUM_ENTRIES 64 + /** CFA phase 5.8 fix formatted table(layout) ID definition * */ @@ -29,7 +34,7 @@ enum cfa_p58_tbl_id { CFA_P58_TBL_PROF_PARIF_DFLT_ACT_REC_PTR, /** Error Profile TCAM Miss Action Record Pointer Table */ CFA_P58_TBL_PROF_PARIF_ERR_ACT_REC_PTR, - /** SR2 VNIC/SVIF Properties Table */ + /** VNIC/SVIF Properties Table */ CFA_P58_TBL_VSPT, CFA_P58_TBL_MAX }; @@ -56,286 +61,6 @@ struct cfa_p58_prof_key_cfg { enum cfa_p58_mac_sel_mode mode; }; -/** - * CFA action layout definition - */ - -#define CFA_P58_ACTION_MAX_LAYOUT_SIZE 184 - -/** - * Action object template structure - * - * Template structure presents data fields that are necessary to know - * at the beginning of Action Builder (AB) processing. Like before the - * AB compilation. One such example could be a template that is - * flexible in size (Encap Record) and the presence of these fields - * allows for determining the template size as well as where the - * fields are located in the record. - * - * The template may also present fields that are not made visible to - * the caller by way of the action fields. - * - * Template fields also allow for additional checking on user visible - * fields. One such example could be the encap pointer behavior on a - * CFA_P58_ACT_OBJ_TYPE_ACT or CFA_P58_ACT_OBJ_TYPE_ACT_SRAM. - */ -struct cfa_p58_action_template { - /** Action Object type - * - * Controls the type of the Action Template - */ - enum { - /** Select this type to build an Action Record Object - */ - CFA_P58_ACT_OBJ_TYPE_ACT, - /** Select this type to build an Action Statistics - * Object - */ - CFA_P58_ACT_OBJ_TYPE_STAT, - /** Select this type to build a SRAM Action Record - * Object. - */ - CFA_P58_ACT_OBJ_TYPE_ACT_SRAM, - /** Select this type to build a SRAM Action - * Encapsulation Object. - */ - CFA_P58_ACT_OBJ_TYPE_ENCAP_SRAM, - /** Select this type to build a SRAM Action Modify - * Object, with IPv4 capability. - */ - /* In case of Stingray the term Modify is used for the 'NAT - * action'. Action builder is leveraged to fill in the NAT - * object which then can be referenced by the action - * record. - */ - CFA_P58_ACT_OBJ_TYPE_MODIFY_IPV4_SRAM, - /** Select this type to build a SRAM Action Source - * Property Object. - */ - /* In case of Stingray this is not a 'pure' action record. - * Action builder is leveraged to full in the Source Property - * object which can then be referenced by the action - * record. - */ - CFA_P58_ACT_OBJ_TYPE_SRC_PROP_SRAM, - /** Select this type to build a SRAM Action Statistics - * Object - */ - CFA_P58_ACT_OBJ_TYPE_STAT_SRAM, - } obj_type; - - /** Action Control - * - * Controls the internals of the Action Template - * - * act is valid when: - * (obj_type == CFA_P58_ACT_OBJ_TYPE_ACT) - */ - /* - * Stat and encap are always inline for EEM as table scope - * allocation does not allow for separate Stats allocation, - * but has the xx_inline flags as to be forward compatible - * with Stingray 2, always treated as TRUE. - */ - struct { - /** Set to CFA_HCAPI_TRUE to enable statistics - */ - uint8_t stat_enable; - /** Set to CFA_HCAPI_TRUE to enable statistics to be inlined - */ - uint8_t stat_inline; - - /** Set to CFA_HCAPI_TRUE to enable encapsulation - */ - uint8_t encap_enable; - /** Set to CFA_HCAPI_TRUE to enable encapsulation to be inlined - */ - uint8_t encap_inline; - } act; - - /** Modify Setting - * - * Controls the type of the Modify Action the template is - * describing - * - * modify is valid when: - * (obj_type == CFA_P58_ACT_OBJ_TYPE_MODIFY_SRAM) - */ - enum { - /** Set to enable Modify of Source IPv4 Address - */ - CFA_P58_MR_REPLACE_SOURCE_IPV4 = 0, - /** Set to enable Modify of Destination IPv4 Address - */ - CFA_P58_MR_REPLACE_DEST_IPV4 - } modify; - - /** Encap Control - * Controls the type of encapsulation the template is - * describing - * - * encap is valid when: - * ((obj_type == CFA_P58_ACT_OBJ_TYPE_ACT) && - * act.encap_enable) || - * ((obj_type == CFA_P58_ACT_OBJ_TYPE_SRC_PROP_SRAM) - */ - struct { - /* Direction is required as Stingray Encap on RX is - * limited to l2 and VTAG only. - */ - /** Receive or Transmit direction - */ - uint8_t direction; - /** Set to CFA_HCAPI_TRUE to enable L2 capability in the - * template - */ - uint8_t l2_enable; - /** vtag controls the Encap Vector - VTAG Encoding, 4 bits - * - *
    - *
  • CFA_P58_ACT_ENCAP_VTAGS_PUSH_0, default, no VLAN - * Tags applied - *
  • CFA_P58_ACT_ENCAP_VTAGS_PUSH_1, adds capability to - * set 1 VLAN Tag. Action Template compile adds - * the following field to the action object - * ::TF_ER_VLAN1 - *
  • CFA_P58_ACT_ENCAP_VTAGS_PUSH_2, adds capability to - * set 2 VLAN Tags. Action Template compile adds - * the following fields to the action object - * ::TF_ER_VLAN1 and ::TF_ER_VLAN2 - *
- */ - enum { CFA_P58_ACT_ENCAP_VTAGS_PUSH_0 = 0, - CFA_P58_ACT_ENCAP_VTAGS_PUSH_1, - CFA_P58_ACT_ENCAP_VTAGS_PUSH_2 } vtag; - - /* - * The remaining fields are NOT supported when - * direction is RX and ((obj_type == - * CFA_P58_ACT_OBJ_TYPE_ACT) && act.encap_enable). - * ab_compile_layout will perform the checking and - * skip remaining fields. - */ - /** L3 Encap controls the Encap Vector - L3 Encoding, - * 3 bits. Defines the type of L3 Encapsulation the - * template is describing. - *
    - *
  • CFA_P58_ACT_ENCAP_L3_NONE, default, no L3 - * Encapsulation processing. - *
  • CFA_P58_ACT_ENCAP_L3_IPV4, enables L3 IPv4 - * Encapsulation. - *
  • CFA_P58_ACT_ENCAP_L3_IPV6, enables L3 IPv6 - * Encapsulation. - *
  • CFA_P58_ACT_ENCAP_L3_MPLS_8847, enables L3 MPLS - * 8847 Encapsulation. - *
  • CFA_P58_ACT_ENCAP_L3_MPLS_8848, enables L3 MPLS - * 8848 Encapsulation. - *
- */ - enum { - /** Set to disable any L3 encapsulation - * processing, default - */ - CFA_P58_ACT_ENCAP_L3_NONE = 0, - /** Set to enable L3 IPv4 encapsulation - */ - CFA_P58_ACT_ENCAP_L3_IPV4 = 4, - /** Set to enable L3 IPv6 encapsulation - */ - CFA_P58_ACT_ENCAP_L3_IPV6 = 5, - /** Set to enable L3 MPLS 8847 encapsulation - */ - CFA_P58_ACT_ENCAP_L3_MPLS_8847 = 6, - /** Set to enable L3 MPLS 8848 encapsulation - */ - CFA_P58_ACT_ENCAP_L3_MPLS_8848 = 7 - } l3; - -#define CFA_P58_ACT_ENCAP_MAX_MPLS_LABELS 8 - /** 1-8 labels, valid when - * (l3 == CFA_P58_ACT_ENCAP_L3_MPLS_8847) || - * (l3 == CFA_P58_ACT_ENCAP_L3_MPLS_8848) - * - * MAX number of MPLS Labels 8. - */ - uint8_t l3_num_mpls_labels; - - /** Set to CFA_HCAPI_TRUE to enable L4 capability in the - * template. - * - * CFA_HCAPI_TRUE adds ::TF_EN_UDP_SRC_PORT and - * ::TF_EN_UDP_DST_PORT to the template. - */ - uint8_t l4_enable; - - /** Tunnel Encap controls the Encap Vector - Tunnel - * Encap, 3 bits. Defines the type of Tunnel - * encapsulation the template is describing - *
    - *
  • CFA_P58_ACT_ENCAP_TNL_NONE, default, no Tunnel - * Encapsulation processing. - *
  • CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL - *
  • CFA_P58_ACT_ENCAP_TNL_VXLAN. NOTE: Expects - * l4_enable set to CFA_P58_TRUE; - *
  • CFA_P58_ACT_ENCAP_TNL_NGE. NOTE: Expects l4_enable - * set to CFA_P58_TRUE; - *
  • CFA_P58_ACT_ENCAP_TNL_NVGRE. NOTE: only valid if - * l4_enable set to CFA_HCAPI_FALSE. - *
  • CFA_P58_ACT_ENCAP_TNL_GRE.NOTE: only valid if - * l4_enable set to CFA_HCAPI_FALSE. - *
  • CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4 - *
  • CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL - *
- */ - enum { - /** Set to disable Tunnel header encapsulation - * processing, default - */ - CFA_P58_ACT_ENCAP_TNL_NONE = 0, - /** Set to enable Tunnel Generic Full header - * encapsulation - */ - CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL, - /** Set to enable VXLAN header encapsulation - */ - CFA_P58_ACT_ENCAP_TNL_VXLAN, - /** Set to enable NGE (VXLAN2) header encapsulation - */ - CFA_P58_ACT_ENCAP_TNL_NGE, - /** Set to enable NVGRE header encapsulation - */ - CFA_P58_ACT_ENCAP_TNL_NVGRE, - /** Set to enable GRE header encapsulation - */ - CFA_P58_ACT_ENCAP_TNL_GRE, - /** Set to enable Generic header after Tunnel - * L4 encapsulation - */ - CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4, - /** Set to enable Generic header after Tunnel - * encapsulation - */ - CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL - } tnl; - - /** Number of bytes of generic tunnel header, - * valid when - * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL) || - * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4) || - * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL) - */ - uint8_t tnl_generic_size; - /** Number of 32b words of nge options, - * valid when - * (tnl == CFA_P58_ACT_ENCAP_TNL_NGE) - */ - uint8_t tnl_nge_op_len; - /* Currently not planned */ - /* Custom Header */ - /* uint8_t custom_enable; */ - } encap; -}; - /** * Enumeration of SRAM entry types, used for allocation of * fixed SRAM entities. The memory model for CFA HCAPI diff --git a/drivers/net/bnxt/tf_core/hwrm_tf.h b/drivers/net/bnxt/tf_core/hwrm_tf.h deleted file mode 100644 index 9cc9a1435c..0000000000 --- a/drivers/net/bnxt/tf_core/hwrm_tf.h +++ /dev/null @@ -1,196 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2019-2021 Broadcom - * All rights reserved. - */ -#ifndef _HWRM_TF_H_ -#define _HWRM_TF_H_ - -#include "tf_core.h" - -typedef enum tf_type { - TF_TYPE_TRUFLOW, - TF_TYPE_LAST = TF_TYPE_TRUFLOW, -} tf_type_t; - -typedef enum tf_subtype { - HWRM_TFT_GET_GLOBAL_CFG = 821, - HWRM_TFT_SET_GLOBAL_CFG = 822, - HWRM_TFT_TBL_TYPE_BULK_GET = 825, - HWRM_TFT_IF_TBL_SET = 827, - HWRM_TFT_IF_TBL_GET = 828, - TF_SUBTYPE_LAST = HWRM_TFT_IF_TBL_GET, -} tf_subtype_t; - -/* Request and Response compile time checking */ -/* u32_t tlv_req_value[26]; */ -#define TF_MAX_REQ_SIZE 104 -/* u32_t tlv_resp_value[170]; */ -#define TF_MAX_RESP_SIZE 680 - -/* Use this to allocate/free any kind of - * indexes over HWRM and fill the parms pointer - */ -#define TF_BULK_RECV 128 -#define TF_BULK_SEND 16 - -/* EM Key value */ -#define TF_DEV_DATA_TYPE_TF_EM_RULE_INSERT_KEY_DATA 0x2e30UL -/* EM Key value */ -#define TF_DEV_DATA_TYPE_TF_EM_RULE_DELETE_KEY_DATA 0x2e40UL -/* L2 Context DMA Address Type */ -#define TF_DEV_DATA_TYPE_TF_L2_CTX_DMA_ADDR 0x2fe0UL -/* L2 Context Entry */ -#define TF_DEV_DATA_TYPE_TF_L2_CTX_ENTRY 0x2fe1UL -/* Prof tcam DMA Address Type */ -#define TF_DEV_DATA_TYPE_TF_PROF_TCAM_DMA_ADDR 0x3030UL -/* Prof tcam Entry */ -#define TF_DEV_DATA_TYPE_TF_PROF_TCAM_ENTRY 0x3031UL -/* WC DMA Address Type */ -#define TF_DEV_DATA_TYPE_TF_WC_DMA_ADDR 0x30d0UL -/* WC Entry */ -#define TF_DEV_DATA_TYPE_TF_WC_ENTRY 0x30d1UL -/* SPIF DFLT L2 CTXT Entry */ -#define TF_DEV_DATA_TYPE_SPIF_DFLT_L2_CTXT 0x3131UL -/* PARIF DFLT ACT REC PTR Entry */ -#define TF_DEV_DATA_TYPE_PARIF_DFLT_ACT_REC 0x3132UL -/* PARIF ERR DFLT ACT REC PTR Entry */ -#define TF_DEV_DATA_TYPE_PARIF_ERR_DFLT_ACT_REC 0x3133UL -/* ILT Entry */ -#define TF_DEV_DATA_TYPE_ILT 0x3134UL -/* VNIC SVIF entry */ -#define TF_DEV_DATA_TYPE_VNIC_SVIF 0x3135UL -/* Action Data */ -#define TF_DEV_DATA_TYPE_TF_ACTION_DATA 0x3170UL -#define TF_DEV_DATA_TYPE_LAST TF_DEV_DATA_TYPE_TF_ACTION_DATA - -#define TF_BITS2BYTES(x) (((x) + 7) >> 3) -#define TF_BITS2BYTES_WORD_ALIGN(x) ((((x) + 31) >> 5) * 4) -#define TF_BITS2BYTES_64B_WORD_ALIGN(x) ((((x) + 63) >> 6) * 8) - -struct tf_set_global_cfg_input; -struct tf_get_global_cfg_input; -struct tf_get_global_cfg_output; -struct tf_tbl_type_bulk_get_input; -struct tf_tbl_type_bulk_get_output; -struct tf_if_tbl_set_input; -struct tf_if_tbl_get_input; -struct tf_if_tbl_get_output; -/* Input params for global config set */ -typedef struct tf_set_global_cfg_input { - /* Session Id */ - uint32_t fw_session_id; - /* flags */ - uint32_t flags; - /* When set to 0, indicates the query apply to RX */ -#define TF_SET_GLOBAL_CFG_INPUT_FLAGS_DIR_RX (0x0) - /* When set to 1, indicates the query apply to TX */ -#define TF_SET_GLOBAL_CFG_INPUT_FLAGS_DIR_TX (0x1) - /* Config type */ - uint32_t type; - /* Offset of the type */ - uint32_t offset; - /* Size of the data to set in bytes */ - uint16_t size; - /* Data to set */ - uint8_t data[TF_BULK_SEND]; -} tf_set_global_cfg_input_t, *ptf_set_global_cfg_input_t; - -/* Input params for global config to get */ -typedef struct tf_get_global_cfg_input { - /* Session Id */ - uint32_t fw_session_id; - /* flags */ - uint32_t flags; - /* When set to 0, indicates the query apply to RX */ -#define TF_GET_GLOBAL_CFG_INPUT_FLAGS_DIR_RX (0x0) - /* When set to 1, indicates the query apply to TX */ -#define TF_GET_GLOBAL_CFG_INPUT_FLAGS_DIR_TX (0x1) - /* Config to retrieve */ - uint32_t type; - /* Offset to retrieve */ - uint32_t offset; - /* Size of the data to set in bytes */ - uint16_t size; -} tf_get_global_cfg_input_t, *ptf_get_global_cfg_input_t; - -/* Output params for global config */ -typedef struct tf_get_global_cfg_output { - /* Size of the total data read in bytes */ - uint16_t size; - /* Data to get */ - uint8_t data[TF_BULK_SEND]; -} tf_get_global_cfg_output_t, *ptf_get_global_cfg_output_t; - -/* Input params for table type get */ -typedef struct tf_tbl_type_bulk_get_input { - /* Session Id */ - uint32_t fw_session_id; - /* flags */ - uint32_t flags; - /* When set to 0, indicates the get apply to RX */ -#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_DIR_RX (0x0) - /* When set to 1, indicates the get apply to TX */ -#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_DIR_TX (0x1) - /* When set to 1, indicates the clear entry on read */ -#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_CLEAR_ON_READ (0x2) - /* Type of the object to set */ - uint32_t type; - /* Starting index to get from */ - uint32_t start_index; - /* Number of entries to get */ - uint32_t num_entries; - /* Host memory where data will be stored */ - uint64_t host_addr; -} tf_tbl_type_bulk_get_input_t, *ptf_tbl_type_bulk_get_input_t; - -/* Output params for table type get */ -typedef struct tf_tbl_type_bulk_get_output { - /* Size of the total data read in bytes */ - uint16_t size; -} tf_tbl_type_bulk_get_output_t, *ptf_tbl_type_bulk_get_output_t; - -/* Input params for if tbl set */ -typedef struct tf_if_tbl_set_input { - /* Session Id */ - uint32_t fw_session_id; - /* flags */ - uint16_t flags; - /* When set to 0, indicates the query apply to RX */ -#define TF_IF_TBL_SET_INPUT_FLAGS_DIR_RX (0x0) - /* When set to 1, indicates the query apply to TX */ -#define TF_IF_TBL_SET_INPUT_FLAGS_DIR_TX (0x1) - /* if table type */ - uint16_t tf_if_tbl_type; - /* index of table entry */ - uint16_t idx; - /* size of the data write to table entry */ - uint32_t data_sz_in_bytes; - /* data to write into table entry */ - uint32_t data[2]; -} tf_if_tbl_set_input_t, *ptf_if_tbl_set_input_t; - -/* Input params for if tbl get */ -typedef struct tf_if_tbl_get_input { - /* Session Id */ - uint32_t fw_session_id; - /* flags */ - uint16_t flags; - /* When set to 0, indicates the query apply to RX */ -#define TF_IF_TBL_GET_INPUT_FLAGS_DIR_RX (0x0) - /* When set to 1, indicates the query apply to TX */ -#define TF_IF_TBL_GET_INPUT_FLAGS_DIR_TX (0x1) - /* if table type */ - uint16_t tf_if_tbl_type; - /* size of the data get from table entry */ - uint32_t data_sz_in_bytes; - /* index of table entry */ - uint16_t idx; -} tf_if_tbl_get_input_t, *ptf_if_tbl_get_input_t; - -/* output params for if tbl get */ -typedef struct tf_if_tbl_get_output { - /* Value read from table entry */ - uint32_t data[2]; -} tf_if_tbl_get_output_t, *ptf_if_tbl_get_output_t; - -#endif /* _HWRM_TF_H_ */ diff --git a/drivers/net/bnxt/tf_core/lookup3.h b/drivers/net/bnxt/tf_core/lookup3.h index b1fd2cd436..743c4d9c4f 100644 --- a/drivers/net/bnxt/tf_core/lookup3.h +++ b/drivers/net/bnxt/tf_core/lookup3.h @@ -122,7 +122,7 @@ static inline uint32_t hashword(const uint32_t *k, size_t length, uint32_t initval) { uint32_t a, b, c; - int index = 12; + int index = length - 1; /* Set up the internal state */ a = 0xdeadbeef + (((uint32_t)length) << 2) + initval; diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index 573fa0b1ed..9b8677caac 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -18,7 +18,6 @@ #include "bnxt.h" #include "rand.h" #include "tf_common.h" -#include "hwrm_tf.h" #include "tf_ext_flow_handle.h" int diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index fcba492dc5..7b26b58000 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -10,7 +10,7 @@ #include #include #include -#include "hcapi/cfa/hcapi_cfa_defs.h" +#include "hcapi_cfa_defs.h" #include "tf_project.h" /** @@ -43,6 +43,29 @@ enum tf_mem { TF_MEM_MAX }; +/** + * External memory control channel type + */ +enum tf_ext_mem_chan_type { + /** + * Direct memory write(Wh+/SR) + */ + TF_EXT_MEM_CHAN_TYPE_DIRECT = 0, + /** + * Ring interface MPC + */ + TF_EXT_MEM_CHAN_TYPE_RING_IF, + /** + * Use HWRM message to firmware + */ + TF_EXT_MEM_CHAN_TYPE_FW, + /** + * Use ring_if message to firmware + */ + TF_EXT_MEM_CHAN_TYPE_RING_IF_FW, + TF_EXT_MEM_CHAN_TYPE_MAX +}; + /** * EEM record AR helper * @@ -149,7 +172,6 @@ enum tf_device_type { TF_DEVICE_TYPE_WH = 0, /**< Whitney+ */ TF_DEVICE_TYPE_SR, /**< Stingray */ TF_DEVICE_TYPE_THOR, /**< Thor */ - TF_DEVICE_TYPE_SR2, /**< Stingray2 */ TF_DEVICE_TYPE_MAX /**< Maximum */ }; @@ -182,40 +204,39 @@ enum tf_module_type { */ enum tf_identifier_type { /** - * WH/SR/TH/SR2 + * WH/SR/TH * The L2 Context is returned from the L2 Ctxt TCAM lookup * and can be used in WC TCAM or EM keys to virtualize further * lookups. */ TF_IDENT_TYPE_L2_CTXT_HIGH, /** - * WH/SR/TH/SR2 + * WH/SR/TH * The L2 Context is returned from the L2 Ctxt TCAM lookup * and can be used in WC TCAM or EM keys to virtualize further * lookups. */ TF_IDENT_TYPE_L2_CTXT_LOW, /** - * WH/SR/TH/SR2 + * WH/SR/TH * The WC profile func is returned from the L2 Ctxt TCAM lookup * to enable virtualization of the profile TCAM. */ TF_IDENT_TYPE_PROF_FUNC, /** - * WH/SR/TH/SR2 + * WH/SR/TH * The WC profile ID is included in the WC lookup key * to enable virtualization of the WC TCAM hardware. */ TF_IDENT_TYPE_WC_PROF, /** - * WH/SR/TH/SR2 + * WH/SR/TH * The EM profile ID is included in the EM lookup key - * to enable virtualization of the EM hardware. (not required for SR2 - * as it has table scope) + * to enable virtualization of the EM hardware. */ TF_IDENT_TYPE_EM_PROF, /** - * TH/SR2 + * TH * The L2 func is included in the ILT result and from recycling to * enable virtualization of further lookups. */ @@ -273,23 +294,15 @@ enum tf_tbl_type { TF_TBL_TYPE_MIRROR_CONFIG, /** (Future) UPAR */ TF_TBL_TYPE_UPAR, - /** (Future) SR2 Epoch 0 table */ - TF_TBL_TYPE_EPOCH0, - /** (Future) SR2 Epoch 1 table */ - TF_TBL_TYPE_EPOCH1, - /** (Future) TH/SR2 Metadata */ + /** (Future) TH Metadata */ TF_TBL_TYPE_METADATA, - /** (Future) TH/SR2 CT State */ + /** (Future) TH CT State */ TF_TBL_TYPE_CT_STATE, - /** (Future) TH/SR2 Range Profile */ + /** (Future) TH Range Profile */ TF_TBL_TYPE_RANGE_PROF, - /** (Future) SR2 Range Entry */ - TF_TBL_TYPE_RANGE_ENTRY, - /** (Future) SR2 LAG Entry */ - TF_TBL_TYPE_LAG, - /** TH/SR2 EM Flexible Key builder */ + /** TH EM Flexible Key builder */ TF_TBL_TYPE_EM_FKB, - /** TH/SR2 WC Flexible Key builder */ + /** TH WC Flexible Key builder */ TF_TBL_TYPE_WC_FKB, /* External */ @@ -301,14 +314,6 @@ enum tf_tbl_type { * a pool of 64B entries. */ TF_TBL_TYPE_EXT, - /* (Future) SR2 32B External EM Action 32B Pool */ - TF_TBL_TYPE_EXT_32B, - /* (Future) SR2 64B External EM Action 64B Pool */ - TF_TBL_TYPE_EXT_64B, - /* (Future) SR2 96B External EM Action 96B Pool */ - TF_TBL_TYPE_EXT_96B, - /* (Future) SR2 128B External EM Action 128B Pool */ - TF_TBL_TYPE_EXT_128B, TF_TBL_TYPE_MAX }; @@ -969,20 +974,13 @@ struct tf_map_tbl_scope_parms { /** * allocate a table scope * - * On SR2 Firmware will allocate a scope ID. On other devices, the scope - * is a software construct to identify an EEM table. This function will + * The scope is a software construct to identify an EEM table. This function will * divide the hash memory/buckets and records according to the device * device constraints based upon calculations using either the number of flows * requested or the size of memory indicated. Other parameters passed in * determine the configuration (maximum key size, maximum external action record * size). * - * This API will allocate the table region in DRAM, program the PTU page table - * entries, and program the number of static buckets (if SR2) in the RX and TX - * CFAs. Buckets are assumed to start at 0 in the EM memory for the scope. - * Upon successful completion of this API, hash tables are fully initialized and - * ready for entries to be inserted. - * * A single API is used to allocate a common table scope identifier in both * receive and transmit CFA. The scope identifier is common due to nature of * connection tracking sending notifications between RX and TX direction. @@ -1028,7 +1026,7 @@ int tf_map_tbl_scope(struct tf *tfp, * * Firmware checks that the table scope ID is owned by the TruFlow * session, verifies that no references to this table scope remains - * (SR2 ILT) or Profile TCAM entries for either CFA (RX/TX) direction, + * or Profile TCAM entries for either CFA (RX/TX) direction, * then frees the table scope ID. * * Returns success or failure code. @@ -1589,6 +1587,10 @@ struct tf_set_tbl_entry_parms { * [in] Entry size */ uint16_t data_sz_in_bytes; + /** + * [in] External memory channel type to use + */ + enum tf_ext_mem_chan_type chan_type; /** * [in] Entry index to write to */ @@ -1627,6 +1629,10 @@ struct tf_get_tbl_entry_parms { * [in] Entry size */ uint16_t data_sz_in_bytes; + /** + * [in] External memory channel type to use + */ + enum tf_ext_mem_chan_type chan_type; /** * [in] Entry index to read */ @@ -1679,6 +1685,10 @@ struct tf_bulk_get_tbl_entry_parms { * structure for the physical address. */ uint64_t physical_mem_addr; + /** + * [in] External memory channel type to use + */ + enum tf_ext_mem_chan_type chan_type; }; /** @@ -1723,10 +1733,6 @@ struct tf_insert_em_entry_parms { * [in] ID of table scope to use (external only) */ uint32_t tbl_scope_id; - /** - * [in] ID of table interface to use (SR2 only) - */ - uint32_t tbl_if_id; /** * [in] ptr to structure containing key fields */ @@ -1747,6 +1753,10 @@ struct tf_insert_em_entry_parms { * [in] duplicate check flag */ uint8_t dup_check; + /** + * [in] External memory channel type to use + */ + enum tf_ext_mem_chan_type chan_type; /** * [out] Flow handle value for the inserted entry. This is encoded * as the entries[4]:bucket[2]:hashId[1]:hash[14] @@ -1775,19 +1785,14 @@ struct tf_delete_em_entry_parms { * [in] ID of table scope to use (external only) */ uint32_t tbl_scope_id; - /** - * [in] ID of table interface to use (SR2 only) - */ - uint32_t tbl_if_id; - /** - * [in] epoch group IDs of entry to delete - * 2 element array with 2 ids. (SR2 only) - */ - uint16_t *epochs; /** * [out] The index of the entry */ uint16_t index; + /** + * [in] External memory channel type to use + */ + enum tf_ext_mem_chan_type chan_type; /** * [in] structure containing flow delete handle information */ @@ -1809,10 +1814,6 @@ struct tf_search_em_entry_parms { * [in] ID of table scope to use (external only) */ uint32_t tbl_scope_id; - /** - * [in] ID of table interface to use (SR2 only) - */ - uint32_t tbl_if_id; /** * [in] ptr to structure containing key fields */ @@ -1830,10 +1831,9 @@ struct tf_search_em_entry_parms { */ uint16_t em_record_sz_in_bits; /** - * [in] epoch group IDs of entry to lookup - * 2 element array with 2 ids. (SR2 only) + * [in] External memory channel type to use */ - uint16_t *epochs; + enum tf_ext_mem_chan_type chan_type; /** * [in] ptr to structure containing flow delete handle */ @@ -1858,9 +1858,6 @@ struct tf_search_em_entry_parms { * This API inserts an exact match entry into DRAM EM table memory of the * specified direction and table scope. * - * When inserting an entry into an exact match table, the TruFlow library may - * need to allocate a dynamic bucket for the entry (SR2 only). - * * The insertion of duplicate entries in an EM table is not permitted. If a * TruFlow application can guarantee that it will never insert duplicates, it * can disable duplicate checking by passing a zero value in the dup_check @@ -2040,9 +2037,9 @@ enum tf_if_tbl_type { TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, /** Default Error Profile TCAM Miss Action Record Pointer Table */ TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, - /** SR2 Ingress lookup table */ + /** Ingress lookup table */ TF_IF_TBL_TYPE_ILT, - /** SR2 VNIC/SVIF Properties Table */ + /** VNIC/SVIF Properties Table */ TF_IF_TBL_TYPE_VSPT, TF_IF_TBL_TYPE_MAX }; diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index 61b3746d8b..9e71c04bf2 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -487,7 +487,7 @@ tf_dev_bind_p58(struct tf *tfp, * - (-EINVAL) on failure. */ static int - tf_dev_unbind_p58(struct tf *tfp) +tf_dev_unbind_p58(struct tf *tfp) { int rc = 0; bool fail = false; diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h index ee283ce29d..a73ba3cd70 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.h +++ b/drivers/net/bnxt/tf_core/tf_device_p4.h @@ -14,92 +14,117 @@ struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = { [TF_IDENT_TYPE_L2_CTXT_HIGH] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH, + 0, 0, 0 }, [TF_IDENT_TYPE_L2_CTXT_LOW] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW, + 0, 0, 0 }, [TF_IDENT_TYPE_PROF_FUNC] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC, + 0, 0, 0 }, [TF_IDENT_TYPE_WC_PROF] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID, + 0, 0, 0 }, [TF_IDENT_TYPE_EM_PROF] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID, + 0, 0, 0 }, }; struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = { [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH, + 0, 0, 0 }, [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW, + 0, 0, 0 }, [TF_TCAM_TBL_TYPE_PROF_TCAM] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM, + 0, 0, 0 }, [TF_TCAM_TBL_TYPE_WC_TCAM] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM, + 0, 0, 0 }, [TF_TCAM_TBL_TYPE_SP_TCAM] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM, + 0, 0, 0 }, }; struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = { [TF_TBL_TYPE_FULL_ACT_RECORD] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION, + 0, 0, 0 }, [TF_TBL_TYPE_MCAST_GROUPS] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG, + 0, 0, 0 }, [TF_TBL_TYPE_ACT_ENCAP_8B] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B, + 0, 0, 0 }, [TF_TBL_TYPE_ACT_ENCAP_16B] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B, + 0, 0, 0 }, [TF_TBL_TYPE_ACT_ENCAP_64B] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B, + 0, 0, 0 }, [TF_TBL_TYPE_ACT_SP_SMAC] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC, + 0, 0, 0 }, [TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4, + 0, 0, 0 }, [TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6, + 0, 0, 0 }, [TF_TBL_TYPE_ACT_STATS_64] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B, + 0, 0, 0 }, [TF_TBL_TYPE_ACT_MODIFY_IPV4] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4 + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4, + 0, 0, 0 }, [TF_TBL_TYPE_METER_PROF] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF, + 0, 0, 0 }, [TF_TBL_TYPE_METER_INST] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER, + 0, 0, 0 }, [TF_TBL_TYPE_MIRROR_CONFIG] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR, + 0, 0, 0 }, }; struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = { [TF_EM_TBL_TYPE_TBL_SCOPE] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE, + 0, 0, 0 }, }; struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = { [TF_EM_TBL_TYPE_EM_RECORD] = { - TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC + TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC, + 0, 0, 0 }, }; diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.h b/drivers/net/bnxt/tf_core/tf_device_p58.h index 4d7a78e52c..b5e2598cb6 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.h +++ b/drivers/net/bnxt/tf_core/tf_device_p58.h @@ -14,55 +14,70 @@ struct tf_rm_element_cfg tf_ident_p58[TF_IDENT_TYPE_MAX] = { [TF_IDENT_TYPE_L2_CTXT_HIGH] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH, + 0, 0, 0 }, [TF_IDENT_TYPE_L2_CTXT_LOW] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW, + 0, 0, 0 }, [TF_IDENT_TYPE_PROF_FUNC] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_FUNC + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_FUNC, + 0, 0, 0 }, [TF_IDENT_TYPE_WC_PROF] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID, + 0, 0, 0 }, [TF_IDENT_TYPE_EM_PROF] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_PROF_ID + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_PROF_ID, + 0, 0, 0 }, }; struct tf_rm_element_cfg tf_tcam_p58[TF_TCAM_TBL_TYPE_MAX] = { [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH, + 0, 0, 0 }, [TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW, + 0, 0, 0 }, [TF_TCAM_TBL_TYPE_PROF_TCAM] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_TCAM + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_TCAM, + 0, 0, 0 }, [TF_TCAM_TBL_TYPE_WC_TCAM] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM, + 0, 0, 0 }, [TF_TCAM_TBL_TYPE_VEB_TCAM] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_VEB_TCAM + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_VEB_TCAM, + 0, 0, 0 }, }; struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = { [TF_TBL_TYPE_EM_FKB] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_FKB + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_FKB, + 0, 0, 0 }, [TF_TBL_TYPE_WC_FKB] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_FKB + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_FKB, + 0, 0, 0 }, [TF_TBL_TYPE_METER_PROF] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER_PROF + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER_PROF, + 0, 0, 0 }, [TF_TBL_TYPE_METER_INST] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER, + 0, 0, 0 }, [TF_TBL_TYPE_MIRROR_CONFIG] = { - TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_MIRROR + TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_MIRROR, + 0, 0, 0 }, /* Policy - ARs in bank 1 */ [TF_TBL_TYPE_FULL_ACT_RECORD] = { @@ -167,7 +182,8 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = { struct tf_rm_element_cfg tf_em_int_p58[TF_EM_TBL_TYPE_MAX] = { [TF_EM_TBL_TYPE_EM_RECORD] = { - TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P58_EM_REC + TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P58_EM_REC, + 0, 0, 0 }, }; diff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h index 4de9e42cbc..2de1862cd9 100644 --- a/drivers/net/bnxt/tf_core/tf_em.h +++ b/drivers/net/bnxt/tf_core/tf_em.h @@ -9,7 +9,9 @@ #include "tf_core.h" #include "tf_session.h" -#include "hcapi/cfa/hcapi_cfa_defs.h" +#include "tf_em_common.h" + +#include "hcapi_cfa_defs.h" #define TF_EM_MIN_ENTRIES (1 << 15) /* 32K */ #define TF_EM_MAX_ENTRIES (1 << 27) /* 128M */ diff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c index d8278f1ce1..4dc3c86b57 100644 --- a/drivers/net/bnxt/tf_core/tf_em_common.c +++ b/drivers/net/bnxt/tf_core/tf_em_common.c @@ -19,18 +19,13 @@ #include "tfp.h" #include "tf_device.h" #include "tf_ext_flow_handle.h" -#include "cfa_resource_types.h" +#include "hcapi_cfa.h" #include "bnxt.h" /* Number of pointers per page_size */ #define MAX_PAGE_PTRS(page_size) ((page_size) / sizeof(void *)) -/** - * EM DBs. - */ -void *eem_db[TF_DIR_MAX]; - /** * Init flag, set on bind and cleared on unbind */ @@ -41,36 +36,7 @@ static uint8_t init; */ static enum tf_mem_type mem_type; -/** Table scope array */ -struct tf_tbl_scope_cb tbl_scopes[TF_NUM_TBL_SCOPE]; - /* API defined in tf_em.h */ -struct tf_tbl_scope_cb * -tbl_scope_cb_find(uint32_t tbl_scope_id) -{ - int i; - struct tf_rm_is_allocated_parms parms = { 0 }; - int allocated; - - /* Check that id is valid */ - parms.rm_db = eem_db[TF_DIR_RX]; - parms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE; - parms.index = tbl_scope_id; - parms.allocated = &allocated; - - i = tf_rm_is_allocated(&parms); - - if (i < 0 || allocated != TF_RM_ALLOCATED_ENTRY_IN_USE) - return NULL; - - for (i = 0; i < TF_NUM_TBL_SCOPE; i++) { - if (tbl_scopes[i].tbl_scope_id == tbl_scope_id) - return &tbl_scopes[i]; - } - - return NULL; -} - int tf_create_tbl_pool_external(enum tf_dir dir, struct tf_tbl_scope_cb *tbl_scope_cb, @@ -158,6 +124,44 @@ tf_destroy_tbl_pool_external(enum tf_dir dir, tfp_free(ext_act_pool_mem); } +/** + * Looks up table scope control block using tbl_scope_id from tf_session. + * + * [in] tfp + * Pointer to Truflow Handle + * [in] tbl_scope_id + * table scope id + * + * Return: + * - Pointer to the tf_tbl_scope_cb, if found. + * - (NULL) on failure, not found. + */ +struct tf_tbl_scope_cb * +tf_em_ext_common_tbl_scope_find(struct tf *tfp, + uint32_t tbl_scope_id) +{ + int rc; + struct em_ext_db *ext_db; + void *ext_ptr = NULL; + struct tf_tbl_scope_cb *tbl_scope_cb = NULL; + struct ll_entry *entry; + + rc = tf_session_get_em_ext_db(tfp, &ext_ptr); + if (rc) + return NULL; + + ext_db = (struct em_ext_db *)ext_ptr; + + for (entry = ext_db->tbl_scope_ll.head; entry != NULL; + entry = entry->next) { + tbl_scope_cb = (struct tf_tbl_scope_cb *)entry; + if (tbl_scope_cb->tbl_scope_id == tbl_scope_id) + return tbl_scope_cb; + } + + return NULL; +} + /** * Allocate External Tbl entry from the scope pool. * @@ -182,16 +186,14 @@ tf_tbl_ext_alloc(struct tf *tfp, TF_CHECK_PARMS2(tfp, parms); - /* Get the pool info from the table scope - */ - tbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id); - + tbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id); if (tbl_scope_cb == NULL) { TFP_DRV_LOG(ERR, "%s, table scope not allocated\n", tf_dir_2_str(parms->dir)); return -EINVAL; } + pool = &tbl_scope_cb->ext_act_pool[parms->dir]; /* Allocate an element @@ -237,10 +239,7 @@ tf_tbl_ext_free(struct tf *tfp, TF_CHECK_PARMS2(tfp, parms); - /* Get the pool info from the table scope - */ - tbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id); - + tbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id); if (tbl_scope_cb == NULL) { TFP_DRV_LOG(ERR, "%s, table scope error\n", @@ -646,7 +645,18 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb, tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_RECORD_TABLE].entry_size = parms->rx_max_action_entry_sz_in_bits / 8; - tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EFC_TABLE].num_entries = 0; + tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EFC_TABLE].num_entries = + 0; + + tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_ACTION_TABLE].num_entries = + parms->rx_num_flows_in_k * TF_KILOBYTE; + tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_ACTION_TABLE].entry_size = + parms->rx_max_action_entry_sz_in_bits / 8; + + tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EM_LKUP_TABLE].num_entries = + parms->rx_num_flows_in_k * TF_KILOBYTE; + tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EM_LKUP_TABLE].entry_size = + parms->rx_max_key_sz_in_bits / 8; /* Tx */ tbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_KEY0_TABLE].num_entries = @@ -664,7 +674,18 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb, tbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_RECORD_TABLE].entry_size = parms->tx_max_action_entry_sz_in_bits / 8; - tbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_EFC_TABLE].num_entries = 0; + tbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_EFC_TABLE].num_entries = + 0; + + tbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_ACTION_TABLE].num_entries = + parms->rx_num_flows_in_k * TF_KILOBYTE; + tbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_ACTION_TABLE].entry_size = + parms->tx_max_action_entry_sz_in_bits / 8; + + tbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_EM_LKUP_TABLE].num_entries = + parms->rx_num_flows_in_k * TF_KILOBYTE; + tbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_EM_LKUP_TABLE].entry_size = + parms->tx_max_key_sz_in_bits / 8; return 0; } @@ -747,10 +768,10 @@ tf_insert_eem_entry(struct tf_dev_info *dev, key_obj.data = (uint8_t *)&key_entry; key_obj.size = TF_P4_EM_KEY_RECORD_SIZE; - rc = hcapi_cfa_key_hw_op(&op, - &key_tbl, - &key_obj, - &key_loc); + rc = cfa_p4_devops.hcapi_cfa_key_hw_op(&op, + &key_tbl, + &key_obj, + &key_loc); if (rc == 0) { table_type = TF_KEY0_TABLE; @@ -761,10 +782,10 @@ tf_insert_eem_entry(struct tf_dev_info *dev, (uint8_t *)&tbl_scope_cb->em_ctx_info[parms->dir].em_tables[TF_KEY1_TABLE]; key_obj.offset = index * TF_P4_EM_KEY_RECORD_SIZE; - rc = hcapi_cfa_key_hw_op(&op, - &key_tbl, - &key_obj, - &key_loc); + rc = cfa_p4_devops.hcapi_cfa_key_hw_op(&op, + &key_tbl, + &key_obj, + &key_loc); if (rc != 0) return rc; @@ -781,7 +802,7 @@ tf_insert_eem_entry(struct tf_dev_info *dev, TF_SET_FIELDS_IN_FLOW_HANDLE(parms->flow_handle, 0, 0, - TF_FLAGS_FLOW_HANDLE_EXTERNAL, + 0, index, 0, table_type); @@ -826,10 +847,10 @@ tf_delete_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb, key_obj.data = NULL; key_obj.size = TF_P4_EM_KEY_RECORD_SIZE; - rc = hcapi_cfa_key_hw_op(&op, - &key_tbl, - &key_obj, - &key_loc); + rc = cfa_p4_devops.hcapi_cfa_key_hw_op(&op, + &key_tbl, + &key_obj, + &key_loc); if (!rc) return rc; @@ -844,7 +865,7 @@ tf_delete_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb, * -EINVAL - Error */ int -tf_em_insert_ext_entry(struct tf *tfp __rte_unused, +tf_em_insert_ext_entry(struct tf *tfp, struct tf_insert_em_entry_parms *parms) { int rc; @@ -852,7 +873,7 @@ tf_em_insert_ext_entry(struct tf *tfp __rte_unused, struct tf_session *tfs; struct tf_dev_info *dev; - tbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id); + tbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id); if (tbl_scope_cb == NULL) { TFP_DRV_LOG(ERR, "Invalid tbl_scope_cb\n"); return -EINVAL; @@ -881,12 +902,12 @@ tf_em_insert_ext_entry(struct tf *tfp __rte_unused, * -EINVAL - Error */ int -tf_em_delete_ext_entry(struct tf *tfp __rte_unused, +tf_em_delete_ext_entry(struct tf *tfp, struct tf_delete_em_entry_parms *parms) { struct tf_tbl_scope_cb *tbl_scope_cb; - tbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id); + tbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id); if (tbl_scope_cb == NULL) { TFP_DRV_LOG(ERR, "Invalid tbl_scope_cb\n"); return -EINVAL; @@ -904,6 +925,8 @@ tf_em_ext_common_bind(struct tf *tfp, int i; struct tf_rm_create_db_parms db_cfg = { 0 }; uint8_t db_exists = 0; + struct em_ext_db *ext_db; + struct tfp_calloc_parms cparms; TF_CHECK_PARMS2(tfp, parms); @@ -913,6 +936,21 @@ tf_em_ext_common_bind(struct tf *tfp, return -EINVAL; } + cparms.nitems = 1; + cparms.size = sizeof(struct em_ext_db); + cparms.alignment = 0; + if (tfp_calloc(&cparms) != 0) { + TFP_DRV_LOG(ERR, "em_ext_db alloc error %s\n", + strerror(ENOMEM)); + return -ENOMEM; + } + + ext_db = cparms.mem_va; + ll_init(&ext_db->tbl_scope_ll); + for (i = 0; i < TF_DIR_MAX; i++) + ext_db->eem_db[i] = NULL; + tf_session_set_em_ext_db(tfp, ext_db); + db_cfg.module = TF_MODULE_TYPE_EM; db_cfg.num_elements = parms->num_elements; db_cfg.cfg = parms->cfg; @@ -927,7 +965,7 @@ tf_em_ext_common_bind(struct tf *tfp, if (db_cfg.alloc_cnt[TF_EM_TBL_TYPE_TBL_SCOPE] == 0) continue; - db_cfg.rm_db = &eem_db[i]; + db_cfg.rm_db = (void *)&ext_db->eem_db[i]; rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, @@ -953,6 +991,13 @@ tf_em_ext_common_unbind(struct tf *tfp) int rc; int i; struct tf_rm_free_db_parms fparms = { 0 }; + struct em_ext_db *ext_db = NULL; + struct tf_session *tfs = NULL; + struct tf_dev_info *dev; + struct ll_entry *entry; + struct tf_tbl_scope_cb *tbl_scope_cb = NULL; + void *ext_ptr = NULL; + struct tf_free_tbl_scope_parms tparms = { 0 }; TF_CHECK_PARMS1(tfp); @@ -963,16 +1008,62 @@ tf_em_ext_common_unbind(struct tf *tfp) return 0; } + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, "Failed to get tf_session, rc:%s\n", + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } + + rc = tf_session_get_em_ext_db(tfp, &ext_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + ext_db = (struct em_ext_db *)ext_ptr; + + entry = ext_db->tbl_scope_ll.head; + while (entry != NULL) { + tbl_scope_cb = (struct tf_tbl_scope_cb *)entry; + entry = entry->next; + tparms.tbl_scope_id = tbl_scope_cb->tbl_scope_id; + + if (dev->ops->tf_dev_free_tbl_scope) { + dev->ops->tf_dev_free_tbl_scope(tfp, &tparms); + } else { + /* should not reach here */ + ll_delete(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry); + tfp_free(tbl_scope_cb); + } + } + for (i = 0; i < TF_DIR_MAX; i++) { + if (ext_db->eem_db[i] == NULL) + continue; + fparms.dir = i; - fparms.rm_db = eem_db[i]; + fparms.rm_db = ext_db->eem_db[i]; rc = tf_rm_free_db(tfp, &fparms); if (rc) return rc; - eem_db[i] = NULL; + ext_db->eem_db[i] = NULL; } + tfp_free(ext_db); + tf_session_set_em_ext_db(tfp, NULL); + init = 0; return 0; @@ -1022,11 +1113,7 @@ int tf_tbl_ext_common_set(struct tf *tfp, return -EINVAL; } - /* Get the table scope control block associated with the - * external pool - */ - tbl_scope_cb = tbl_scope_cb_find(tbl_scope_id); - + tbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, tbl_scope_id); if (tbl_scope_cb == NULL) { TFP_DRV_LOG(ERR, "%s, table scope error\n", @@ -1042,10 +1129,10 @@ int tf_tbl_ext_common_set(struct tf *tfp, key_obj.data = parms->data; key_obj.size = parms->data_sz_in_bytes; - rc = hcapi_cfa_key_hw_op(&op, - &key_tbl, - &key_obj, - &key_loc); + rc = cfa_p4_devops.hcapi_cfa_key_hw_op(&op, + &key_tbl, + &key_obj, + &key_loc); return rc; } @@ -1076,14 +1163,6 @@ int tf_em_ext_map_tbl_scope(struct tf *tfp, uint32_t sz_in_bytes = 8; struct tf_dev_info *dev; - tbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id); - - if (tbl_scope_cb == NULL) { - TFP_DRV_LOG(ERR, "Invalid tbl_scope_cb tbl_scope_id(%d)\n", - parms->tbl_scope_id); - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -1094,6 +1173,13 @@ int tf_em_ext_map_tbl_scope(struct tf *tfp, if (rc) return rc; + tbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id); + if (tbl_scope_cb == NULL) { + TFP_DRV_LOG(ERR, "Invalid tbl_scope_cb tbl_scope_id(%d)\n", + parms->tbl_scope_id); + return -EINVAL; + } + if (dev->ops->tf_dev_map_tbl_scope == NULL) { rc = -EOPNOTSUPP; TFP_DRV_LOG(ERR, diff --git a/drivers/net/bnxt/tf_core/tf_em_common.h b/drivers/net/bnxt/tf_core/tf_em_common.h index 5e55f4e968..7f215adef2 100644 --- a/drivers/net/bnxt/tf_core/tf_em_common.h +++ b/drivers/net/bnxt/tf_core/tf_em_common.h @@ -8,7 +8,7 @@ #include "tf_core.h" #include "tf_session.h" - +#include "ll.h" /** * Function to search for table scope control block structure @@ -23,6 +23,53 @@ */ struct tf_tbl_scope_cb *tbl_scope_cb_find(uint32_t tbl_scope_id); +/** + * Table scope control block content + */ +struct tf_em_caps { + uint32_t flags; + uint32_t supported; + uint32_t max_entries_supported; + uint16_t key_entry_size; + uint16_t record_entry_size; + uint16_t efc_entry_size; +}; + +/** + * EEM data + * + * Link list of ext em data allocated and managed by EEM module + * for a TruFlow session. + */ +struct em_ext_db { + struct ll tbl_scope_ll; + struct rm_db *eem_db[TF_DIR_MAX]; +}; + +/** + * Table Scope Control Block + * + * Holds private data for a table scope. + */ +struct tf_tbl_scope_cb { + /** + * Linked list of tbl_scope + */ + struct ll_entry ll_entry; /* For inserting in link list, must be + * first field of struct. + */ + + uint32_t tbl_scope_id; + + /** The pf or parent pf of the vf used for table scope creation + */ + uint16_t pf; + struct hcapi_cfa_em_ctx_mem_info em_ctx_info[TF_DIR_MAX]; + struct tf_em_caps em_caps[TF_DIR_MAX]; + struct stack ext_act_pool[TF_DIR_MAX]; + uint32_t *ext_act_pool_mem[TF_DIR_MAX]; +}; + /** * Create and initialize a stack to use for action entries * @@ -131,4 +178,23 @@ int tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb, int tf_em_size_table(struct hcapi_cfa_em_table *tbl, uint32_t page_size); + +/** + * Look up table scope control block using tbl_scope_id from + * tf_session + * + * [in] tbl_scope_cb + * Pointer to Truflow Handle + * + * [in] tbl_scope_id + * table scope id + * + * Returns: + * - Pointer to the tf_tbl_scope_cb, if found. + * - (NULL) on failure, not found. + */ +struct tf_tbl_scope_cb * +tf_em_ext_common_tbl_scope_find(struct tf *tfp, + uint32_t tbl_scope_id); + #endif /* _TF_EM_COMMON_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_em_host.c b/drivers/net/bnxt/tf_core/tf_em_host.c index 166f397935..869a78e904 100644 --- a/drivers/net/bnxt/tf_core/tf_em_host.c +++ b/drivers/net/bnxt/tf_core/tf_em_host.c @@ -29,13 +29,6 @@ /* Number of pointers per page_size */ #define MAX_PAGE_PTRS(page_size) ((page_size) / sizeof(void *)) -/** - * EM DBs. - */ -extern void *eem_db[TF_DIR_MAX]; - -extern struct tf_tbl_scope_cb tbl_scopes[TF_NUM_TBL_SCOPE]; - /** * Function to free a page table * @@ -367,7 +360,8 @@ tf_em_ctx_reg(struct tf *tfp, } int -tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) +tf_em_ext_alloc(struct tf *tfp, + struct tf_alloc_tbl_scope_parms *parms) { int rc; enum tf_dir dir; @@ -376,30 +370,65 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) struct tf_free_tbl_scope_parms free_parms; struct tf_rm_allocate_parms aparms = { 0 }; struct tf_rm_free_parms fparms = { 0 }; + struct tfp_calloc_parms cparms; + struct tf_session *tfs = NULL; + struct em_ext_db *ext_db = NULL; + void *ext_ptr = NULL; + uint16_t pf; + + + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, "Failed to get tf_session, rc:%s\n", + strerror(-rc)); + return rc; + } + + rc = tf_session_get_em_ext_db(tfp, &ext_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + ext_db = (struct em_ext_db *)ext_ptr; + + rc = tfp_get_pf(tfp, &pf); + if (rc) { + TFP_DRV_LOG(ERR, + "EEM: PF query error rc:%s\n", + strerror(-rc)); + goto cleanup; + } /* Get Table Scope control block from the session pool */ - aparms.rm_db = eem_db[TF_DIR_RX]; + aparms.rm_db = ext_db->eem_db[TF_DIR_RX]; aparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE; aparms.index = (uint32_t *)&parms->tbl_scope_id; rc = tf_rm_allocate(&aparms); if (rc) { TFP_DRV_LOG(ERR, "Failed to allocate table scope\n"); - return rc; + goto cleanup; } - tbl_scope_cb = &tbl_scopes[parms->tbl_scope_id]; - tbl_scope_cb->index = parms->tbl_scope_id; - tbl_scope_cb->tbl_scope_id = parms->tbl_scope_id; - - rc = tfp_get_pf(tfp, &tbl_scope_cb->pf); + /* Create tbl_scope, initialize and attach to the session */ + cparms.nitems = 1; + cparms.size = sizeof(struct tf_tbl_scope_cb); + cparms.alignment = 0; + rc = tfp_calloc(&cparms); if (rc) { + /* Log error */ TFP_DRV_LOG(ERR, - "EEM: PF query error rc:%s\n", - strerror(-rc)); + "Failed to allocate session table scope, rc:%s\n", + strerror(-rc)); goto cleanup; } + tbl_scope_cb = cparms.mem_va; + tbl_scope_cb->tbl_scope_id = parms->tbl_scope_id; + tbl_scope_cb->pf = pf; + for (dir = 0; dir < TF_DIR_MAX; dir++) { rc = tf_msg_em_qcaps(tfp, dir, @@ -409,7 +438,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) "EEM: Unable to query for EEM capability," " rc:%s\n", strerror(-rc)); - goto cleanup; + goto cleanup_ts; } } @@ -417,7 +446,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) * Validate and setup table sizes */ if (tf_em_validate_num_entries(tbl_scope_cb, parms)) - goto cleanup; + goto cleanup_ts; for (dir = 0; dir < TF_DIR_MAX; dir++) { /* @@ -429,7 +458,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) "EEM: Unable to register for EEM ctx," " rc:%s\n", strerror(-rc)); - goto cleanup; + goto cleanup_ts; } em_tables = tbl_scope_cb->em_ctx_info[dir].em_tables; @@ -478,19 +507,29 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) } } + /* Insert into session tbl_scope list */ + ll_insert(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry); return 0; cleanup_full: free_parms.tbl_scope_id = parms->tbl_scope_id; + /* Insert into session list prior to ext_free */ + ll_insert(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry); tf_em_ext_free(tfp, &free_parms); return -EINVAL; +cleanup_ts: + tfp_free(tbl_scope_cb); + cleanup: /* Free Table control block */ - fparms.rm_db = eem_db[TF_DIR_RX]; + fparms.rm_db = ext_db->eem_db[TF_DIR_RX]; fparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE; fparms.index = parms->tbl_scope_id; - tf_rm_free(&fparms); + rc = tf_rm_free(&fparms); + if (rc) + TFP_DRV_LOG(ERR, "Failed to free table scope\n"); + return -EINVAL; } @@ -501,17 +540,35 @@ tf_em_ext_free(struct tf *tfp, int rc = 0; enum tf_dir dir; struct tf_tbl_scope_cb *tbl_scope_cb; + struct tf_session *tfs; + struct em_ext_db *ext_db = NULL; + void *ext_ptr = NULL; struct tf_rm_free_parms aparms = { 0 }; - tbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id); + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, "Failed to get tf_session, rc:%s\n", + strerror(-rc)); + return -EINVAL; + } + + rc = tf_session_get_em_ext_db(tfp, &ext_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + ext_db = (struct em_ext_db *)ext_ptr; + tbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id); if (tbl_scope_cb == NULL) { TFP_DRV_LOG(ERR, "Table scope error\n"); return -EINVAL; } /* Free Table control block */ - aparms.rm_db = eem_db[TF_DIR_RX]; + aparms.rm_db = ext_db->eem_db[TF_DIR_RX]; aparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE; aparms.index = parms->tbl_scope_id; rc = tf_rm_free(&aparms); @@ -534,6 +591,8 @@ tf_em_ext_free(struct tf *tfp, tf_em_ctx_unreg(tfp, tbl_scope_cb, dir); } - tbl_scopes[parms->tbl_scope_id].tbl_scope_id = TF_TBL_SCOPE_INVALID; + /* remove from session list and free tbl_scope */ + ll_delete(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry); + tfp_free(tbl_scope_cb); return rc; } diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index ec4c7890c3..c6eb94bee0 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -9,6 +9,7 @@ #include #include +#include "tf_em_common.h" #include "tf_msg_common.h" #include "tf_device.h" #include "tf_msg.h" @@ -16,7 +17,6 @@ #include "tf_common.h" #include "tf_session.h" #include "tfp.h" -#include "hwrm_tf.h" #include "tf_em.h" /* Specific msg size defines as we cannot use defines in tf.yaml. This @@ -39,8 +39,19 @@ * array size (define above) should be checked and compared. */ #define TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET 56 +static_assert(sizeof(struct hwrm_tf_global_cfg_set_input) == + TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET, + "HWRM message size changed: hwrm_tf_global_cfg_set_input"); + #define TF_MSG_SIZE_HWRM_TF_EM_INSERT 104 +static_assert(sizeof(struct hwrm_tf_em_insert_input) == + TF_MSG_SIZE_HWRM_TF_EM_INSERT, + "HWRM message size changed: hwrm_tf_em_insert_input"); + #define TF_MSG_SIZE_HWRM_TF_TBL_TYPE_SET 128 +static_assert(sizeof(struct hwrm_tf_tbl_type_set_input) == + TF_MSG_SIZE_HWRM_TF_TBL_TYPE_SET, + "HWRM message size changed: hwrm_tf_tbl_type_set_input"); /** * This is the MAX data we can transport across regular HWRM @@ -862,6 +873,117 @@ tf_msg_delete_em_entry(struct tf *tfp, return 0; } +int tf_msg_ext_em_ctxt_mem_alloc(struct tf *tfp, + struct hcapi_cfa_em_table *tbl, + uint64_t *dma_addr, + uint32_t *page_lvl, + uint32_t *page_size) +{ + struct tfp_send_msg_parms parms = { 0 }; + struct hwrm_tf_ctxt_mem_alloc_input req = {0}; + struct hwrm_tf_ctxt_mem_alloc_output resp = {0}; + uint32_t mem_size_k; + int rc = 0; + struct tf_dev_info *dev; + struct tf_session *tfs; + uint32_t fw_se_id; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } + /* Retrieve the session information */ + fw_se_id = tfs->session_id.internal.fw_session_id; + + if (tbl->num_entries && tbl->entry_size) { + /* unit: kbytes */ + mem_size_k = (tbl->num_entries / TF_KILOBYTE) * tbl->entry_size; + req.mem_size = tfp_cpu_to_le_32(mem_size_k); + req.fw_session_id = tfp_cpu_to_le_32(fw_se_id); + parms.tf_type = HWRM_TF_CTXT_MEM_ALLOC; + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = dev->ops->tf_dev_get_mailbox(); + rc = tfp_send_msg_direct(tfp, &parms); + if (rc) { + TFP_DRV_LOG(ERR, "Failed ext_em_alloc error rc:%s\n", + strerror(-rc)); + return rc; + } + + *dma_addr = tfp_le_to_cpu_64(resp.page_dir); + *page_lvl = resp.page_level; + *page_size = resp.page_size; + } + + return rc; +} + +int tf_msg_ext_em_ctxt_mem_free(struct tf *tfp, + uint32_t mem_size_k, + uint64_t dma_addr, + uint8_t page_level, + uint8_t page_size) +{ + struct tfp_send_msg_parms parms = { 0 }; + struct hwrm_tf_ctxt_mem_free_input req = {0}; + struct hwrm_tf_ctxt_mem_free_output resp = {0}; + int rc = 0; + struct tf_dev_info *dev; + struct tf_session *tfs; + uint32_t fw_se_id; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } + /* Retrieve the session information */ + fw_se_id = tfs->session_id.internal.fw_session_id; + + req.fw_session_id = tfp_cpu_to_le_32(fw_se_id); + req.mem_size = tfp_cpu_to_le_32(mem_size_k); + req.page_dir = tfp_cpu_to_le_64(dma_addr); + req.page_level = page_level; + req.page_size = page_size; + parms.tf_type = HWRM_TF_CTXT_MEM_FREE; + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = dev->ops->tf_dev_get_mailbox(); + rc = tfp_send_msg_direct(tfp, &parms); + + return rc; +} + int tf_msg_em_mem_rgtr(struct tf *tfp, int page_lvl, @@ -875,6 +997,7 @@ tf_msg_em_mem_rgtr(struct tf *tfp, struct tfp_send_msg_parms parms = { 0 }; struct tf_dev_info *dev; struct tf_session *tfs; + uint32_t fw_se_id; /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); @@ -893,7 +1016,9 @@ tf_msg_em_mem_rgtr(struct tf *tfp, strerror(-rc)); return rc; } + fw_se_id = tfs->session_id.internal.fw_session_id; + req.fw_session_id = tfp_cpu_to_le_32(fw_se_id); req.page_level = page_lvl; req.page_size = page_size; req.page_dir = tfp_cpu_to_le_64(dma_addr); @@ -925,6 +1050,7 @@ tf_msg_em_mem_unrgtr(struct tf *tfp, struct tfp_send_msg_parms parms = { 0 }; struct tf_dev_info *dev; struct tf_session *tfs; + uint32_t fw_se_id; /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); @@ -944,6 +1070,9 @@ tf_msg_em_mem_unrgtr(struct tf *tfp, return rc; } + fw_se_id = tfs->session_id.internal.fw_session_id; + req.fw_session_id = tfp_cpu_to_le_32(fw_se_id); + req.ctx_id = tfp_cpu_to_le_32(*ctx_id); parms.tf_type = HWRM_TF_CTXT_MEM_UNRGTR; @@ -970,6 +1099,7 @@ tf_msg_em_qcaps(struct tf *tfp, struct tfp_send_msg_parms parms = { 0 }; struct tf_dev_info *dev; struct tf_session *tfs; + uint32_t fw_se_id; /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); @@ -980,6 +1110,7 @@ tf_msg_em_qcaps(struct tf *tfp, strerror(-rc)); return rc; } + fw_se_id = tfs->session_id.internal.fw_session_id; /* Retrieve the device information */ rc = tf_session_get_device(tfs, &dev); @@ -996,6 +1127,7 @@ tf_msg_em_qcaps(struct tf *tfp, req.flags = tfp_cpu_to_le_32(flags); parms.tf_type = HWRM_TF_EXT_EM_QCAPS; + req.fw_session_id = tfp_cpu_to_le_32(fw_se_id); parms.req_data = (uint32_t *)&req; parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; @@ -1082,6 +1214,80 @@ tf_msg_em_cfg(struct tf *tfp, return rc; } +int +tf_msg_ext_em_cfg(struct tf *tfp, + struct tf_tbl_scope_cb *tbl_scope_cb, + uint32_t st_buckets, + uint8_t flush_interval, + enum tf_dir dir) +{ + struct hcapi_cfa_em_ctx_mem_info *ctxp = &tbl_scope_cb->em_ctx_info[dir]; + struct hcapi_cfa_em_table *lkup_tbl, *act_tbl; + struct hwrm_tf_ext_em_cfg_input req = {0}; + struct hwrm_tf_ext_em_cfg_output resp = {0}; + struct tfp_send_msg_parms parms = { 0 }; + uint32_t flags; + struct tf_dev_info *dev; + struct tf_session *tfs; + uint32_t fw_se_id; + int rc; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + fw_se_id = tfs->session_id.internal.fw_session_id; + + lkup_tbl = &ctxp->em_tables[TF_EM_LKUP_TABLE]; + act_tbl = &ctxp->em_tables[TF_ACTION_TABLE]; + flags = (dir == TF_DIR_TX ? HWRM_TF_EXT_EM_CFG_INPUT_FLAGS_DIR_TX : + HWRM_TF_EXT_EM_CFG_INPUT_FLAGS_DIR_RX); + flags |= HWRM_TF_EXT_EM_QCAPS_INPUT_FLAGS_PREFERRED_OFFLOAD; + + req.flags = tfp_cpu_to_le_32(flags); + req.num_entries = tfp_cpu_to_le_32(act_tbl->num_entries); + req.lkup_static_buckets = tfp_cpu_to_le_32(st_buckets); + req.fw_session_id = tfp_cpu_to_le_32(fw_se_id); + req.flush_interval = flush_interval; + req.action_ctx_id = tfp_cpu_to_le_16(act_tbl->ctx_id); + req.action_tbl_scope = tfp_cpu_to_le_16(tbl_scope_cb->tbl_scope_id); + req.lkup_ctx_id = tfp_cpu_to_le_16(lkup_tbl->ctx_id); + req.lkup_tbl_scope = tfp_cpu_to_le_16(tbl_scope_cb->tbl_scope_id); + + req.enables = (HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_ACTION_CTX_ID | + HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_ACTION_TBL_SCOPE | + HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_LKUP_CTX_ID | + HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_LKUP_TBL_SCOPE | + HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_LKUP_STATIC_BUCKETS | + HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_NUM_ENTRIES); + + parms.tf_type = HWRM_TF_EXT_EM_CFG; + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = dev->ops->tf_dev_get_mailbox(); + + rc = tfp_send_msg_direct(tfp, + &parms); + return rc; +} + int tf_msg_em_op(struct tf *tfp, int dir, @@ -1244,9 +1450,6 @@ tf_msg_tcam_entry_get(struct tf *tfp, if (rc != 0) return rc; - if (mparms.tf_resp_code != 0) - return tfp_le_to_cpu_32(mparms.tf_resp_code); - if (parms->key_size < resp.key_size || parms->result_size < resp.result_size) { rc = -EINVAL; @@ -1264,7 +1467,7 @@ tf_msg_tcam_entry_get(struct tf *tfp, tfp_memcpy(parms->mask, &resp.dev_data[resp.key_size], resp.key_size); tfp_memcpy(parms->result, &resp.dev_data[resp.result_offset], resp.result_size); - return tfp_le_to_cpu_32(mparms.tf_resp_code); + return 0; } int @@ -1388,7 +1591,7 @@ tf_msg_set_tbl_entry(struct tf *tfp, if (rc) return rc; - return tfp_le_to_cpu_32(parms.tf_resp_code); + return 0; } int @@ -1454,15 +1657,22 @@ tf_msg_get_tbl_entry(struct tf *tfp, if (rc) return rc; - /* Verify that we got enough buffer to return the requested data */ - if (tfp_le_to_cpu_32(resp.size) != size) + /* + * The response will be 64 bytes long, the response size will + * be in words (16). All we can test for is that the response + * size is < to the requested size. + */ + if ((tfp_le_to_cpu_32(resp.size) * 4) < size) return -EINVAL; + /* + * Copy the requested number of bytes + */ tfp_memcpy(data, &resp.data, size); - return tfp_le_to_cpu_32(parms.tf_resp_code); + return 0; } /* HWRM Tunneled messages */ @@ -1544,7 +1754,7 @@ tf_msg_get_global_cfg(struct tf *tfp, else return -EFAULT; - return tfp_le_to_cpu_32(parms.tf_resp_code); + return 0; } int @@ -1560,9 +1770,6 @@ tf_msg_set_global_cfg(struct tf *tfp, struct tf_dev_info *dev; struct tf_session *tfs; - RTE_BUILD_BUG_ON(sizeof(struct hwrm_tf_global_cfg_set_input) != - TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET); - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) { @@ -1637,7 +1844,7 @@ tf_msg_set_global_cfg(struct tf *tfp, if (rc != 0) return rc; - return tfp_le_to_cpu_32(parms.tf_resp_code); + return 0; } int @@ -1651,8 +1858,8 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp, { int rc; struct tfp_send_msg_parms parms = { 0 }; - struct tf_tbl_type_bulk_get_input req = { 0 }; - struct tf_tbl_type_bulk_get_output resp = { 0 }; + struct hwrm_tf_tbl_type_bulk_get_input req = { 0 }; + struct hwrm_tf_tbl_type_bulk_get_output resp = { 0 }; int data_size = 0; uint8_t fw_session_id; struct tf_dev_info *dev; @@ -1698,14 +1905,15 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp, req.host_addr = tfp_cpu_to_le_64(physical_mem_addr); - MSG_PREP(parms, - dev->ops->tf_dev_get_mailbox(), - HWRM_TF, - HWRM_TFT_TBL_TYPE_BULK_GET, - req, - resp); + parms.tf_type = HWRM_TF_TBL_TYPE_BULK_GET; + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_tunneled(tfp, &parms); + rc = tfp_send_msg_direct(tfp, + &parms); if (rc) return rc; @@ -1713,7 +1921,7 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp, if (tfp_le_to_cpu_32(resp.size) != data_size) return -EINVAL; - return tfp_le_to_cpu_32(parms.tf_resp_code); + return 0; } int @@ -1772,12 +1980,9 @@ tf_msg_get_if_tbl_entry(struct tf *tfp, if (rc != 0) return rc; - if (parms.tf_resp_code != 0) - return tfp_le_to_cpu_32(parms.tf_resp_code); - tfp_memcpy(params->data, resp.data, req.size); - return tfp_le_to_cpu_32(parms.tf_resp_code); + return 0; } int @@ -1832,5 +2037,5 @@ tf_msg_set_if_tbl_entry(struct tf *tfp, if (rc != 0) return rc; - return tfp_le_to_cpu_32(parms.tf_resp_code); + return 0; } diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h index a14bcd3927..7b4a6a3d92 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.h +++ b/drivers/net/bnxt/tf_core/tf_msg.h @@ -9,6 +9,7 @@ #include #include +#include "tf_em_common.h" #include "tf_tbl.h" #include "tf_rm.h" #include "tf_tcam.h" @@ -275,6 +276,60 @@ tf_msg_hash_insert_em_internal_entry(struct tf *tfp, int tf_msg_delete_em_entry(struct tf *tfp, struct tf_delete_em_entry_parms *em_parms); +/** + * Sends Ext EM mem allocation request to Firmware + * + * [in] tfp + * Pointer to TF handle + * + * [in] tbl + * memory allocation details + * + * [out] dma_addr + * memory address + * + * [out] page_lvl + * page level + * + * [out] page_size + * page size + * + * Returns: + * 0 on Success else internal Truflow error + */ +int tf_msg_ext_em_ctxt_mem_alloc(struct tf *tfp, + struct hcapi_cfa_em_table *tbl, + uint64_t *dma_addr, + uint32_t *page_lvl, + uint32_t *page_size); + +/** + * Sends Ext EM mem allocation request to Firmware + * + * [in] tfp + * Pointer to TF handle + * + * [in] mem_size_k + * memory size in KB + * + * [in] page_dir + * Pointer to the PBL or PDL depending on number of levels + * + * [in] page_level + * PBL indirect levels + * + * [in] page_size + * page size + * + * Returns: + * 0 on Success else internal Truflow error + */ +int tf_msg_ext_em_ctxt_mem_free(struct tf *tfp, + uint32_t mem_size_k, + uint64_t dma_addr, + uint8_t page_level, + uint8_t page_size); + /** * Sends EM mem register request to Firmware * @@ -377,6 +432,38 @@ int tf_msg_em_cfg(struct tf *tfp, uint8_t flush_interval, int dir); +/** + * Sends Ext EM config request to Firmware + * + * [in] tfp + * Pointer to TF handle + * + * [in] fw_se_id + * FW session id + * + * [in] tbl_scope_cb + * Table scope parameters + * + * [in] st_buckets + * static bucket size + * + * [in] flush_interval + * Flush pending HW cached flows every 1/10th of value set in + * seconds, both idle and active flows are flushed from the HW + * cache. If set to 0, this feature will be disabled. + * + * [in] dir + * Receive or Transmit direction + * + * Returns: + * 0 on Success else internal Truflow error + */ +int tf_msg_ext_em_cfg(struct tf *tfp, + struct tf_tbl_scope_cb *tbl_scope_cb, + uint32_t st_buckets, + uint8_t flush_interval, + enum tf_dir dir); + /** * Sends EM operation request to Firmware * diff --git a/drivers/net/bnxt/tf_core/tf_msg_common.h b/drivers/net/bnxt/tf_core/tf_msg_common.h index 0c5c21fd68..49f334717d 100644 --- a/drivers/net/bnxt/tf_core/tf_msg_common.h +++ b/drivers/net/bnxt/tf_core/tf_msg_common.h @@ -15,7 +15,6 @@ parms.mailbox = mb; \ parms.tf_type = type; \ parms.tf_subtype = subtype; \ - parms.tf_resp_code = 0; \ parms.req_size = sizeof(req); \ parms.req_data = (uint32_t *)&(req); \ parms.resp_size = sizeof(resp); \ @@ -26,7 +25,6 @@ parms.mailbox = mb; \ parms.tf_type = type; \ parms.tf_subtype = subtype; \ - parms.tf_resp_code = 0; \ parms.req_size = 0; \ parms.req_data = NULL; \ parms.resp_size = sizeof(resp); \ @@ -37,7 +35,6 @@ parms.mailbox = mb; \ parms.tf_type = type; \ parms.tf_subtype = subtype; \ - parms.tf_resp_code = 0; \ parms.req_size = sizeof(req); \ parms.req_data = (uint32_t *)&(req); \ parms.resp_size = 0; \ diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index d2b24f5e20..f591fbe3f5 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -173,6 +173,9 @@ tf_session_create(struct tf *tfp, ll_insert(&session->client_ll, &client->ll_entry); session->ref_count++; + /* Init session em_ext_db */ + session->em_ext_db_handle = NULL; + rc = tf_dev_bind(tfp, parms->open_cfg->device_type, session->shadow_copy, @@ -796,3 +799,115 @@ tf_session_get_session_id(struct tf *tfp, return 0; } + +int +tf_session_get_em_ext_db(struct tf *tfp, + void **em_ext_db_handle) +{ + struct tf_session *tfs = NULL; + int rc = 0; + + *em_ext_db_handle = NULL; + + if (tfp == NULL) + return (-EINVAL); + + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + *em_ext_db_handle = tfs->em_ext_db_handle; + return rc; +} + +int +tf_session_set_em_ext_db(struct tf *tfp, + void *em_ext_db_handle) +{ + struct tf_session *tfs = NULL; + int rc = 0; + + if (tfp == NULL) + return (-EINVAL); + + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + tfs->em_ext_db_handle = em_ext_db_handle; + return rc; +} + +int +tf_session_get_db(struct tf *tfp, + enum tf_module_type type, + void **db_handle) +{ + struct tf_session *tfs = NULL; + int rc = 0; + + *db_handle = NULL; + + if (tfp == NULL) + return (-EINVAL); + + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + switch (type) { + case TF_MODULE_TYPE_IDENTIFIER: + *db_handle = tfs->id_db_handle; + break; + case TF_MODULE_TYPE_TABLE: + *db_handle = tfs->tbl_db_handle; + break; + case TF_MODULE_TYPE_TCAM: + *db_handle = tfs->tcam_db_handle; + break; + case TF_MODULE_TYPE_EM: + *db_handle = tfs->em_db_handle; + break; + default: + rc = -EINVAL; + break; + } + + return rc; +} + +int +tf_session_set_db(struct tf *tfp, + enum tf_module_type type, + void *db_handle) +{ + struct tf_session *tfs = NULL; + int rc = 0; + + if (tfp == NULL) + return (-EINVAL); + + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + switch (type) { + case TF_MODULE_TYPE_IDENTIFIER: + tfs->id_db_handle = db_handle; + break; + case TF_MODULE_TYPE_TABLE: + tfs->tbl_db_handle = db_handle; + break; + case TF_MODULE_TYPE_TCAM: + tfs->tcam_db_handle = db_handle; + break; + case TF_MODULE_TYPE_EM: + tfs->em_db_handle = db_handle; + break; + default: + rc = -EINVAL; + break; + } + + return rc; +} diff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h index 1d51fa12f8..e5c7a07daf 100644 --- a/drivers/net/bnxt/tf_core/tf_session.h +++ b/drivers/net/bnxt/tf_core/tf_session.h @@ -112,6 +112,31 @@ struct tf_session { * Linked list of clients registered for this session */ struct ll client_ll; + + /** + * em ext db reference for the session + */ + void *em_ext_db_handle; + + /** + * tcam db reference for the session + */ + void *tcam_db_handle; + + /** + * table db reference for the session + */ + void *tbl_db_handle; + + /** + * identifier db reference for the session + */ + void *id_db_handle; + + /** + * em db reference for the session + */ + void *em_db_handle; }; /** @@ -410,4 +435,69 @@ int tf_session_get_fw_session_id(struct tf *tfp, int tf_session_get_session_id(struct tf *tfp, union tf_session_id *session_id); +/** + * API to get the em_ext_db from tf_session. + * + * [in] tfp + * Pointer to TF handle + * + * [out] em_ext_db_handle, pointer to eem handle + * + * Returns: + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int +tf_session_get_em_ext_db(struct tf *tfp, + void **em_ext_db_handle); + +/** + * API to set the em_ext_db in tf_session. + * + * [in] tfp + * Pointer to TF handle + * + * [in] em_ext_db_handle, pointer to eem handle + * + * Returns: + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int +tf_session_set_em_ext_db(struct tf *tfp, + void *em_ext_db_handle); + +/** + * API to get the db from tf_session. + * + * [in] tfp + * Pointer to TF handle + * + * [out] db_handle, pointer to db handle + * + * Returns: + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int +tf_session_get_db(struct tf *tfp, + enum tf_module_type type, + void **db_handle); + +/** + * API to set the db in tf_session. + * + * [in] tfp + * Pointer to TF handle + * + * [in] db_handle, pointer to db handle + * + * Returns: + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int +tf_session_set_db(struct tf *tfp, + enum tf_module_type type, + void *db_handle); #endif /* _TF_SESSION_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_tbl.h b/drivers/net/bnxt/tf_core/tf_tbl.h index f0d8e94f7e..9271cf28eb 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.h +++ b/drivers/net/bnxt/tf_core/tf_tbl.h @@ -15,39 +15,9 @@ struct tf; * The Table module provides processing of Internal TF table types. */ -/** - * Table scope control block content - */ -struct tf_em_caps { - uint32_t flags; - uint32_t supported; - uint32_t max_entries_supported; - uint16_t key_entry_size; - uint16_t record_entry_size; - uint16_t efc_entry_size; -}; - /** Invalid table scope id */ #define TF_TBL_SCOPE_INVALID 0xffffffff -/** - * Table Scope Control Block - * - * Holds private data for a table scope. Only one instance of a table - * scope with Internal EM is supported. - */ -struct tf_tbl_scope_cb { - uint32_t tbl_scope_id; - /** The pf or parent pf of the vf used for table scope creation - */ - uint16_t pf; - int index; - struct hcapi_cfa_em_ctx_mem_info em_ctx_info[TF_DIR_MAX]; - struct tf_em_caps em_caps[TF_DIR_MAX]; - struct stack ext_act_pool[TF_DIR_MAX]; - uint32_t *ext_act_pool_mem[TF_DIR_MAX]; -}; - /** * Table configuration parameters */ diff --git a/drivers/net/bnxt/tf_core/tf_util.c b/drivers/net/bnxt/tf_core/tf_util.c index b4d47d5a8c..25f5c152d2 100644 --- a/drivers/net/bnxt/tf_core/tf_util.c +++ b/drivers/net/bnxt/tf_core/tf_util.c @@ -98,20 +98,8 @@ tf_tbl_type_2_str(enum tf_tbl_type tbl_type) return "Mirror"; case TF_TBL_TYPE_UPAR: return "UPAR"; - case TF_TBL_TYPE_EPOCH0: - return "EPOCH0"; - case TF_TBL_TYPE_EPOCH1: - return "EPOCH1"; case TF_TBL_TYPE_METADATA: return "Metadata"; - case TF_TBL_TYPE_CT_STATE: - return "Connection State"; - case TF_TBL_TYPE_RANGE_PROF: - return "Range Profile"; - case TF_TBL_TYPE_RANGE_ENTRY: - return "Range"; - case TF_TBL_TYPE_LAG: - return "Link Aggregation"; case TF_TBL_TYPE_EM_FKB: return "EM Flexible Key Builder"; case TF_TBL_TYPE_WC_FKB: diff --git a/drivers/net/bnxt/tf_core/tf_util.h b/drivers/net/bnxt/tf_core/tf_util.h index 1aa35b6b82..4caf50349d 100644 --- a/drivers/net/bnxt/tf_core/tf_util.h +++ b/drivers/net/bnxt/tf_core/tf_util.h @@ -9,6 +9,10 @@ #include "tf_core.h" #include "tf_device.h" +#define TF_BITS2BYTES(x) (((x) + 7) >> 3) +#define TF_BITS2BYTES_WORD_ALIGN(x) ((((x) + 31) >> 5) * 4) +#define TF_BITS2BYTES_64B_WORD_ALIGN(x) ((((x) + 63) >> 6) * 8) + /** * Helper function converting direction to text string * diff --git a/drivers/net/bnxt/tf_core/tfp.c b/drivers/net/bnxt/tf_core/tfp.c index b88affcf1e..37c49b587d 100644 --- a/drivers/net/bnxt/tf_core/tfp.c +++ b/drivers/net/bnxt/tf_core/tfp.c @@ -53,40 +53,6 @@ tfp_send_msg_direct(struct tf *tfp, return rc; } -/** - * Sends preformatted TruFlow msg to the TruFlow Firmware using - * the Truflow tunnel HWRM message type. - * - * Returns success or failure code. - */ -int -tfp_send_msg_tunneled(struct tf *tfp, - struct tfp_send_msg_parms *parms) -{ - int rc = 0; - uint8_t use_kong_mb = 1; - - if (parms == NULL) - return -EINVAL; - - if (parms->mailbox == TF_CHIMP_MB) - use_kong_mb = 0; - - rc = bnxt_hwrm_tf_message_tunneled(container_of(tfp, - struct bnxt, - tfp), - use_kong_mb, - parms->tf_type, - parms->tf_subtype, - &parms->tf_resp_code, - parms->req_data, - parms->req_size, - parms->resp_data, - parms->resp_size); - - return rc; -} - /** * Allocates zero'ed memory from the heap. * diff --git a/drivers/net/bnxt/tf_core/tfp.h b/drivers/net/bnxt/tf_core/tfp.h index 2e4ca7ac44..bcc56b0a54 100644 --- a/drivers/net/bnxt/tf_core/tfp.h +++ b/drivers/net/bnxt/tf_core/tfp.h @@ -56,11 +56,6 @@ struct tfp_send_msg_parms { * [in] tlv_subtype, specifies the tlv_subtype. */ uint16_t tf_subtype; - /** - * [out] tf_resp_code, response code from the internal tlv - * message. Only supported on tunneled messages. - */ - uint32_t tf_resp_code; /** * [out] size, number specifying the request size of the data in bytes */ @@ -111,7 +106,6 @@ struct tfp_calloc_parms { * @page Portability * * @ref tfp_send_direct - * @ref tfp_send_msg_tunneled * * @ref tfp_calloc * @ref tfp_memcpy @@ -139,37 +133,6 @@ struct tfp_calloc_parms { int tfp_send_msg_direct(struct tf *tfp, struct tfp_send_msg_parms *parms); -/** - * Provides communication capability from the TrueFlow API layer to - * the TrueFlow firmware. The portability layer internally provides - * the transport to the firmware. - * - * [in] session, pointer to session handle - * [in] parms, parameter structure - * - * Returns: - * 0 - Success - * -1 - Global error like not supported - * -EINVAL - Parameter Error - */ -int tfp_send_msg_tunneled(struct tf *tfp, - struct tfp_send_msg_parms *parms); - -/** - * Sends OEM command message to Chimp - * - * [in] session, pointer to session handle - * [in] max_flows, max number of flows requested - * - * Returns: - * 0 - Success - * -1 - Global error like not supported - * -EINVAL - Parameter Error - */ -int -tfp_msg_hwrm_oem_cmd(struct tf *tfp, - uint32_t max_flows); - /** * Sends OEM command message to Chimp * @@ -253,21 +216,6 @@ int tfp_get_fid(struct tf *tfp, uint16_t *fw_fid); #define tfp_bswap_32(val) rte_bswap32(val) #define tfp_bswap_64(val) rte_bswap64(val) -/** - * Lookup of the FID in the platform specific structure. - * - * [in] session - * Pointer to session handle - * - * [out] fw_fid - * Pointer to the fw_fid - * - * Returns: - * 0 - Success - * -EINVAL - Parameter error - */ -int tfp_get_fid(struct tf *tfp, uint16_t *fw_fid); - /** * Get the PF associated with the fw communications channel. * From patchwork Sun Jun 13 00:06:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94107 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F1F0EA0C41; Sun, 13 Jun 2021 02:08:51 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6A13441178; Sun, 13 Jun 2021 02:07:19 +0200 (CEST) Received: from mail-pl1-f180.google.com (mail-pl1-f180.google.com [209.85.214.180]) by mails.dpdk.org (Postfix) with ESMTP id 664AD41168 for ; Sun, 13 Jun 2021 02:07:17 +0200 (CEST) Received: by mail-pl1-f180.google.com with SMTP id h1so4699092plt.1 for ; Sat, 12 Jun 2021 17:07:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=pDIeaYza0e/tbrmJjRaQ+6E7AXCNiCtg7pH5FY8rEdQ=; b=SEsOf5ZzpsTlxZyhkhO3u37tKE7cM5Szuv/ngfEBfZQbGSsBEwQPzi3cF9PKd+4zTL QqsghL2oksqXr1Pq5eNK3k30G4y11AfR3WmGFwL3QYWsGBCwsKw+yksQrUn/0ld7q38K 3MJ+YnN9lUOLI/h3MCuCzcPRvgFV9EyJUtDkM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=pDIeaYza0e/tbrmJjRaQ+6E7AXCNiCtg7pH5FY8rEdQ=; b=kIIbhjK95KdS73rOIBvPbVkUPqQLW9ZMISuhg5jhAJhvNBkBsAI+NQrk5uT7ZYtJE5 FIkVRjRhtdRwIlQyfgJ+RyTauF38pbT8X12KFqYqulD6U5r2SHFSJCWBWdK+ng9NPG6W v4a96PK9kPa2w5Xxren38Al69uFllruOvcUGKUndyOfXOdthAa2Wh1wFLi0jAGI2f+wS A6nVjJV9qv3DZvt+U/SK12C+hrhzq8WZ6nzO8NQfkqtKs2KIFgqGEy2MvSxVEU7cf7+/ iBZtuDNIdg1yXmSX9K+Eqz/OB0K6fYyjvRreTVpsahTrgyaSLv3jfxJZYJ0Ha5DbK+JW 7D9A== X-Gm-Message-State: AOAM5305Fh+NkTOdftwNPaAvKxJS7cMuROqMlpDnft/vSDo+UR6mZi9o QW0xegmzEY4uAQ7ZZpE41G5qWG93I0wLC6KOER7GjZ2GZajFeDjNBx3EoOeuUNhdgNttUHQwp2D P6IBdEuQ4Pdwy/fw6ZsuKSY24bjHvVV/npN1+yDecwMZjt8CLTEN5yfN9LBMAiGw= X-Google-Smtp-Source: ABdhPJxJXs/K5Zt8whPImyA7Y+LwzLKqlG/KQagpffNl32VmswINiUQtfUqpYjFK5TbQtcFYZ6Vmwg== X-Received: by 2002:a17:902:cec3:b029:105:fff1:74ad with SMTP id d3-20020a170902cec3b0290105fff174admr10160306plg.69.1623542835399; Sat, 12 Jun 2021 17:07:15 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.14 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:14 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Randy Schacher , Venkat Duvvuru , Farah Smith Date: Sat, 12 Jun 2021 17:06:07 -0700 Message-Id: <20210613000652.28191-14-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 13/58] net/bnxt: change RM database type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding RM databases are statically defined in each module. New static database needs to be defined in the code when multiple sessions are added. Add dynamic alloc database and associate it to each session. Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_em.h | 10 ++ drivers/net/bnxt/tf_core/tf_em_internal.c | 44 +++++-- drivers/net/bnxt/tf_core/tf_identifier.c | 82 ++++++++++-- drivers/net/bnxt/tf_core/tf_identifier.h | 10 ++ drivers/net/bnxt/tf_core/tf_tbl.c | 151 +++++++++++++++++----- drivers/net/bnxt/tf_core/tf_tbl.h | 10 ++ drivers/net/bnxt/tf_core/tf_tcam.c | 107 ++++++++++++--- drivers/net/bnxt/tf_core/tf_tcam.h | 10 ++ 8 files changed, 351 insertions(+), 73 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h index 2de1862cd9..19ad7f12be 100644 --- a/drivers/net/bnxt/tf_core/tf_em.h +++ b/drivers/net/bnxt/tf_core/tf_em.h @@ -133,6 +133,16 @@ struct tf_em_cfg_parms { enum tf_mem_type mem_type; }; +/** + * EM database + * + * EM rm database + * + */ +struct em_rm_db { + struct rm_db *em_db[TF_DIR_MAX]; +}; + /** * @page em EM * diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index 043f9be4da..5a100ef1de 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -18,11 +18,6 @@ #include "bnxt.h" -/** - * EM DBs. - */ -static void *em_db[TF_DIR_MAX]; - #define TF_EM_DB_EM_REC 0 /** @@ -242,6 +237,8 @@ tf_em_int_bind(struct tf *tfp, uint8_t db_exists = 0; struct tf_rm_get_alloc_info_parms iparms; struct tf_rm_alloc_info info; + struct em_rm_db *em_db; + struct tfp_calloc_parms cparms; TF_CHECK_PARMS2(tfp, parms); @@ -251,6 +248,21 @@ tf_em_int_bind(struct tf *tfp, return -EINVAL; } + memset(&db_cfg, 0, sizeof(db_cfg)); + cparms.nitems = 1; + cparms.size = sizeof(struct em_rm_db); + cparms.alignment = 0; + if (tfp_calloc(&cparms) != 0) { + TFP_DRV_LOG(ERR, "em_rm_db alloc error %s\n", + strerror(ENOMEM)); + return -ENOMEM; + } + + em_db = cparms.mem_va; + for (i = 0; i < TF_DIR_MAX; i++) + em_db->em_db[i] = NULL; + tf_session_set_db(tfp, TF_MODULE_TYPE_EM, em_db); + db_cfg.module = TF_MODULE_TYPE_EM; db_cfg.num_elements = parms->num_elements; db_cfg.cfg = parms->cfg; @@ -277,7 +289,8 @@ tf_em_int_bind(struct tf *tfp, return rc; } - db_cfg.rm_db = &em_db[i]; + db_cfg.rm_db = (void *)&em_db->em_db[i]; + rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, @@ -293,7 +306,7 @@ tf_em_int_bind(struct tf *tfp, init = 1; for (i = 0; i < TF_DIR_MAX; i++) { - iparms.rm_db = em_db[i]; + iparms.rm_db = em_db->em_db[i]; iparms.subtype = TF_EM_DB_EM_REC; iparms.info = &info; @@ -323,6 +336,8 @@ tf_em_int_unbind(struct tf *tfp) int rc; int i; struct tf_rm_free_db_parms fparms = { 0 }; + struct em_rm_db *em_db; + void *em_db_ptr = NULL; TF_CHECK_PARMS1(tfp); @@ -336,16 +351,25 @@ tf_em_int_unbind(struct tf *tfp) for (i = 0; i < TF_DIR_MAX; i++) tf_free_em_pool(i); + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_EM, &em_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + em_db = (struct em_rm_db *)em_db_ptr; + for (i = 0; i < TF_DIR_MAX; i++) { fparms.dir = i; - fparms.rm_db = em_db[i]; - if (em_db[i] != NULL) { + fparms.rm_db = em_db->em_db[i]; + if (em_db->em_db[i] != NULL) { rc = tf_rm_free_db(tfp, &fparms); if (rc) return rc; } - em_db[i] = NULL; + em_db->em_db[i] = NULL; } init = 0; diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c index 9d0a578085..ee68b6ca58 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.c +++ b/drivers/net/bnxt/tf_core/tf_identifier.c @@ -11,14 +11,10 @@ #include "tf_rm.h" #include "tf_util.h" #include "tfp.h" +#include "tf_session.h" struct tf; -/** - * Identifier DBs. - */ -static void *ident_db[TF_DIR_MAX]; - /** * Init flag, set on bind and cleared on unbind */ @@ -43,6 +39,8 @@ tf_ident_bind(struct tf *tfp, struct tf_rm_create_db_parms db_cfg = { 0 }; struct tf_shadow_ident_cfg_parms shadow_cfg = { 0 }; struct tf_shadow_ident_create_db_parms shadow_cdb = { 0 }; + struct ident_rm_db *ident_db; + struct tfp_calloc_parms cparms; TF_CHECK_PARMS2(tfp, parms); @@ -52,14 +50,29 @@ tf_ident_bind(struct tf *tfp, return -EINVAL; } + memset(&db_cfg, 0, sizeof(db_cfg)); + cparms.nitems = 1; + cparms.size = sizeof(struct ident_rm_db); + cparms.alignment = 0; + if (tfp_calloc(&cparms) != 0) { + TFP_DRV_LOG(ERR, "ident_rm_db alloc error %s\n", + strerror(ENOMEM)); + return -ENOMEM; + } + + ident_db = cparms.mem_va; + for (i = 0; i < TF_DIR_MAX; i++) + ident_db->ident_db[i] = NULL; + tf_session_set_db(tfp, TF_MODULE_TYPE_IDENTIFIER, ident_db); + db_cfg.module = TF_MODULE_TYPE_IDENTIFIER; db_cfg.num_elements = parms->num_elements; db_cfg.cfg = parms->cfg; for (i = 0; i < TF_DIR_MAX; i++) { + db_cfg.rm_db = (void *)&ident_db->ident_db[i]; db_cfg.dir = i; db_cfg.alloc_cnt = parms->resources->ident_cnt[i].cnt; - db_cfg.rm_db = &ident_db[i]; rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, @@ -102,6 +115,8 @@ tf_ident_unbind(struct tf *tfp) int i; struct tf_rm_free_db_parms fparms = { 0 }; struct tf_shadow_ident_free_db_parms sparms = { 0 }; + struct ident_rm_db *ident_db; + void *ident_db_ptr = NULL; TF_CHECK_PARMS1(tfp); @@ -112,9 +127,18 @@ tf_ident_unbind(struct tf *tfp) return 0; } + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get ident_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + ident_db = (struct ident_rm_db *)ident_db_ptr; + for (i = 0; i < TF_DIR_MAX; i++) { + fparms.rm_db = ident_db->ident_db[i]; fparms.dir = i; - fparms.rm_db = ident_db[i]; rc = tf_rm_free_db(tfp, &fparms); if (rc) { TFP_DRV_LOG(ERR, @@ -131,7 +155,7 @@ tf_ident_unbind(struct tf *tfp) } ident_shadow_db[i] = NULL; } - ident_db[i] = NULL; + ident_db->ident_db[i] = NULL; } init = 0; @@ -149,6 +173,8 @@ tf_ident_alloc(struct tf *tfp __rte_unused, uint32_t base_id; struct tf_rm_allocate_parms aparms = { 0 }; struct tf_shadow_ident_insert_parms iparms = { 0 }; + struct ident_rm_db *ident_db; + void *ident_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -159,8 +185,16 @@ tf_ident_alloc(struct tf *tfp __rte_unused, return -EINVAL; } - /* Allocate requested element */ - aparms.rm_db = ident_db[parms->dir]; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get ident_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + ident_db = (struct ident_rm_db *)ident_db_ptr; + + aparms.rm_db = ident_db->ident_db[parms->dir]; aparms.subtype = parms->type; aparms.index = &id; aparms.base_index = &base_id; @@ -203,6 +237,8 @@ tf_ident_free(struct tf *tfp __rte_unused, struct tf_shadow_ident_remove_parms rparms = { 0 }; int allocated = 0; uint32_t base_id; + struct ident_rm_db *ident_db; + void *ident_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -213,8 +249,17 @@ tf_ident_free(struct tf *tfp __rte_unused, return -EINVAL; } + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get ident_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + ident_db = (struct ident_rm_db *)ident_db_ptr; + /* Check if element is in use */ - aparms.rm_db = ident_db[parms->dir]; + aparms.rm_db = ident_db->ident_db[parms->dir]; aparms.subtype = parms->type; aparms.index = parms->id; aparms.base_index = &base_id; @@ -254,7 +299,7 @@ tf_ident_free(struct tf *tfp __rte_unused, } /* Free requested element */ - fparms.rm_db = ident_db[parms->dir]; + fparms.rm_db = ident_db->ident_db[parms->dir]; fparms.subtype = parms->type; fparms.index = parms->id; rc = tf_rm_free(&fparms); @@ -279,6 +324,8 @@ tf_ident_search(struct tf *tfp __rte_unused, struct tf_shadow_ident_search_parms sparms = { 0 }; int allocated = 0; uint32_t base_id; + struct ident_rm_db *ident_db; + void *ident_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -296,8 +343,17 @@ tf_ident_search(struct tf *tfp __rte_unused, return -EINVAL; } + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get ident_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + ident_db = (struct ident_rm_db *)ident_db_ptr; + /* Check if element is in use */ - aparms.rm_db = ident_db[parms->dir]; + aparms.rm_db = ident_db->ident_db[parms->dir]; aparms.subtype = parms->type; aparms.index = parms->search_id; aparms.base_index = &base_id; diff --git a/drivers/net/bnxt/tf_core/tf_identifier.h b/drivers/net/bnxt/tf_core/tf_identifier.h index 2700416c71..54cecbfd4c 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.h +++ b/drivers/net/bnxt/tf_core/tf_identifier.h @@ -99,6 +99,16 @@ struct tf_ident_search_parms { uint32_t *ref_cnt; }; +/** + * Identifier database + * + * Identifier rm database + * + */ +struct ident_rm_db { + struct rm_db *ident_db[TF_DIR_MAX]; +}; + /** * @page ident Identity Management * diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index 75dbe2066f..2d0dda18c9 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -26,11 +26,6 @@ struct tf; -/** - * Table DBs. - */ -static void *tbl_db[TF_DIR_MAX]; - /** * Table Shadow DBs */ @@ -50,8 +45,10 @@ int tf_tbl_bind(struct tf *tfp, struct tf_tbl_cfg_parms *parms) { - int rc, d; + int rc, d, i; struct tf_rm_create_db_parms db_cfg = { 0 }; + struct tbl_rm_db *tbl_db; + struct tfp_calloc_parms cparms; TF_CHECK_PARMS2(tfp, parms); @@ -61,6 +58,21 @@ tf_tbl_bind(struct tf *tfp, return -EINVAL; } + memset(&db_cfg, 0, sizeof(db_cfg)); + cparms.nitems = 1; + cparms.size = sizeof(struct tbl_rm_db); + cparms.alignment = 0; + if (tfp_calloc(&cparms) != 0) { + TFP_DRV_LOG(ERR, "tbl_rm_db alloc error %s\n", + strerror(ENOMEM)); + return -ENOMEM; + } + + tbl_db = cparms.mem_va; + for (i = 0; i < TF_DIR_MAX; i++) + tbl_db->tbl_db[i] = NULL; + tf_session_set_db(tfp, TF_MODULE_TYPE_TABLE, tbl_db); + db_cfg.num_elements = parms->num_elements; db_cfg.module = TF_MODULE_TYPE_TABLE; db_cfg.num_elements = parms->num_elements; @@ -69,7 +81,8 @@ tf_tbl_bind(struct tf *tfp, for (d = 0; d < TF_DIR_MAX; d++) { db_cfg.dir = d; db_cfg.alloc_cnt = parms->resources->tbl_cnt[d].cnt; - db_cfg.rm_db = &tbl_db[d]; + db_cfg.rm_db = (void *)&tbl_db->tbl_db[d]; + rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, @@ -79,7 +92,6 @@ tf_tbl_bind(struct tf *tfp, return rc; } } - init = 1; TFP_DRV_LOG(INFO, @@ -94,6 +106,8 @@ tf_tbl_unbind(struct tf *tfp) int rc; int i; struct tf_rm_free_db_parms fparms = { 0 }; + struct tbl_rm_db *tbl_db; + void *tbl_db_ptr = NULL; TF_CHECK_PARMS1(tfp); /* Bail if nothing has been initialized */ @@ -103,14 +117,23 @@ tf_tbl_unbind(struct tf *tfp) return 0; } + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tbl_db = (struct tbl_rm_db *)tbl_db_ptr; + for (i = 0; i < TF_DIR_MAX; i++) { fparms.dir = i; - fparms.rm_db = tbl_db[i]; + fparms.rm_db = tbl_db->tbl_db[i]; rc = tf_rm_free_db(tfp, &fparms); if (rc) return rc; - tbl_db[i] = NULL; + tbl_db->tbl_db[i] = NULL; } init = 0; @@ -129,6 +152,8 @@ tf_tbl_alloc(struct tf *tfp __rte_unused, struct tf_session *tfs; struct tf_dev_info *dev; uint16_t base = 0, shift = 0; + struct tbl_rm_db *tbl_db; + void *tbl_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -149,10 +174,22 @@ tf_tbl_alloc(struct tf *tfp __rte_unused, if (rc) return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tbl_db = (struct tbl_rm_db *)tbl_db_ptr; + /* Only get table info if required for the device */ if (dev->ops->tf_dev_get_tbl_info) { - rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], - parms->type, &base, &shift); + rc = dev->ops->tf_dev_get_tbl_info(tfp, + tbl_db->tbl_db[parms->dir], + parms->type, + &base, + &shift); if (rc) { TFP_DRV_LOG(ERR, "%s: Failed to get table info:%d\n", @@ -163,7 +200,7 @@ tf_tbl_alloc(struct tf *tfp __rte_unused, } /* Allocate requested element */ - aparms.rm_db = tbl_db[parms->dir]; + aparms.rm_db = tbl_db->tbl_db[parms->dir]; aparms.subtype = parms->type; aparms.index = &idx; rc = tf_rm_allocate(&aparms); @@ -192,6 +229,8 @@ tf_tbl_free(struct tf *tfp __rte_unused, struct tf_session *tfs; struct tf_dev_info *dev; uint16_t base = 0, shift = 0; + struct tbl_rm_db *tbl_db; + void *tbl_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -211,10 +250,22 @@ tf_tbl_free(struct tf *tfp __rte_unused, if (rc) return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tbl_db = (struct tbl_rm_db *)tbl_db_ptr; + /* Only get table info if required for the device */ if (dev->ops->tf_dev_get_tbl_info) { - rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], - parms->type, &base, &shift); + rc = dev->ops->tf_dev_get_tbl_info(tfp, + tbl_db->tbl_db[parms->dir], + parms->type, + &base, + &shift); if (rc) { TFP_DRV_LOG(ERR, "%s: Failed to get table info:%d\n", @@ -225,7 +276,7 @@ tf_tbl_free(struct tf *tfp __rte_unused, } /* Check if element is in use */ - aparms.rm_db = tbl_db[parms->dir]; + aparms.rm_db = tbl_db->tbl_db[parms->dir]; aparms.subtype = parms->type; TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift); @@ -244,7 +295,7 @@ tf_tbl_free(struct tf *tfp __rte_unused, return -EINVAL; } /* Free requested element */ - fparms.rm_db = tbl_db[parms->dir]; + fparms.rm_db = tbl_db->tbl_db[parms->dir]; fparms.subtype = parms->type; TF_TBL_PTR_TO_RM(&fparms.index, parms->idx, base, shift); @@ -290,6 +341,8 @@ tf_tbl_set(struct tf *tfp, struct tf_session *tfs; struct tf_dev_info *dev; uint16_t base = 0, shift = 0; + struct tbl_rm_db *tbl_db; + void *tbl_db_ptr = NULL; TF_CHECK_PARMS3(tfp, parms, parms->data); @@ -310,10 +363,22 @@ tf_tbl_set(struct tf *tfp, if (rc) return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tbl_db = (struct tbl_rm_db *)tbl_db_ptr; + /* Only get table info if required for the device */ if (dev->ops->tf_dev_get_tbl_info) { - rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], - parms->type, &base, &shift); + rc = dev->ops->tf_dev_get_tbl_info(tfp, + tbl_db->tbl_db[parms->dir], + parms->type, + &base, + &shift); if (rc) { TFP_DRV_LOG(ERR, "%s: Failed to get table info:%d\n", @@ -324,7 +389,7 @@ tf_tbl_set(struct tf *tfp, } /* Verify that the entry has been previously allocated */ - aparms.rm_db = tbl_db[parms->dir]; + aparms.rm_db = tbl_db->tbl_db[parms->dir]; aparms.subtype = parms->type; TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift); @@ -343,7 +408,7 @@ tf_tbl_set(struct tf *tfp, } /* Set the entry */ - hparms.rm_db = tbl_db[parms->dir]; + hparms.rm_db = tbl_db->tbl_db[parms->dir]; hparms.subtype = parms->type; hparms.hcapi_type = &hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); @@ -386,6 +451,8 @@ tf_tbl_get(struct tf *tfp, struct tf_session *tfs; struct tf_dev_info *dev; uint16_t base = 0, shift = 0; + struct tbl_rm_db *tbl_db; + void *tbl_db_ptr = NULL; TF_CHECK_PARMS3(tfp, parms, parms->data); @@ -407,10 +474,22 @@ tf_tbl_get(struct tf *tfp, if (rc) return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tbl_db = (struct tbl_rm_db *)tbl_db_ptr; + /* Only get table info if required for the device */ if (dev->ops->tf_dev_get_tbl_info) { - rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], - parms->type, &base, &shift); + rc = dev->ops->tf_dev_get_tbl_info(tfp, + tbl_db->tbl_db[parms->dir], + parms->type, + &base, + &shift); if (rc) { TFP_DRV_LOG(ERR, "%s: Failed to get table info:%d\n", @@ -421,7 +500,7 @@ tf_tbl_get(struct tf *tfp, } /* Verify that the entry has been previously allocated */ - aparms.rm_db = tbl_db[parms->dir]; + aparms.rm_db = tbl_db->tbl_db[parms->dir]; aparms.subtype = parms->type; TF_TBL_PTR_TO_RM(&aparms.index, parms->idx, base, shift); @@ -440,7 +519,7 @@ tf_tbl_get(struct tf *tfp, } /* Set the entry */ - hparms.rm_db = tbl_db[parms->dir]; + hparms.rm_db = tbl_db->tbl_db[parms->dir]; hparms.subtype = parms->type; hparms.hcapi_type = &hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); @@ -483,6 +562,8 @@ tf_tbl_bulk_get(struct tf *tfp, struct tf_session *tfs; struct tf_dev_info *dev; uint16_t base = 0, shift = 0; + struct tbl_rm_db *tbl_db; + void *tbl_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -504,10 +585,22 @@ tf_tbl_bulk_get(struct tf *tfp, if (rc) return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tbl_db = (struct tbl_rm_db *)tbl_db_ptr; + /* Only get table info if required for the device */ if (dev->ops->tf_dev_get_tbl_info) { - rc = dev->ops->tf_dev_get_tbl_info(tfp, tbl_db[parms->dir], - parms->type, &base, &shift); + rc = dev->ops->tf_dev_get_tbl_info(tfp, + tbl_db->tbl_db[parms->dir], + parms->type, + &base, + &shift); if (rc) { TFP_DRV_LOG(ERR, "%s: Failed to get table info:%d\n", @@ -518,7 +611,7 @@ tf_tbl_bulk_get(struct tf *tfp, } /* Verify that the entries are in the range of reserved resources. */ - cparms.rm_db = tbl_db[parms->dir]; + cparms.rm_db = tbl_db->tbl_db[parms->dir]; cparms.subtype = parms->type; TF_TBL_PTR_TO_RM(&cparms.starting_index, parms->starting_idx, @@ -538,7 +631,7 @@ tf_tbl_bulk_get(struct tf *tfp, return rc; } - hparms.rm_db = tbl_db[parms->dir]; + hparms.rm_db = tbl_db->tbl_db[parms->dir]; hparms.subtype = parms->type; hparms.hcapi_type = &hcapi_type; rc = tf_rm_get_hcapi_type(&hparms); diff --git a/drivers/net/bnxt/tf_core/tf_tbl.h b/drivers/net/bnxt/tf_core/tf_tbl.h index 9271cf28eb..83b72d1b3f 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.h +++ b/drivers/net/bnxt/tf_core/tf_tbl.h @@ -229,6 +229,16 @@ struct tf_tbl_get_bulk_parms { uint64_t physical_mem_addr; }; +/** + * Table RM database + * + * Table rm database + * + */ +struct tbl_rm_db { + struct rm_db *tbl_db[TF_DIR_MAX]; +}; + /** * @page tbl Table * diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index 1b5c29815d..c2eef26dbb 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -18,11 +18,6 @@ struct tf; -/** - * TCAM DBs. - */ -static void *tcam_db[TF_DIR_MAX]; - /** * TCAM Shadow DBs */ @@ -55,6 +50,8 @@ tf_tcam_bind(struct tf *tfp, uint16_t num_slices = 1; struct tf_session *tfs; struct tf_dev_info *dev; + struct tcam_rm_db *tcam_db; + struct tfp_calloc_parms cparms; TF_CHECK_PARMS2(tfp, parms); @@ -99,6 +96,19 @@ tf_tcam_bind(struct tf *tfp, } memset(&db_cfg, 0, sizeof(db_cfg)); + cparms.nitems = 1; + cparms.size = sizeof(struct tcam_rm_db); + cparms.alignment = 0; + if (tfp_calloc(&cparms) != 0) { + TFP_DRV_LOG(ERR, "tcam_rm_db alloc error %s\n", + strerror(ENOMEM)); + return -ENOMEM; + } + + tcam_db = cparms.mem_va; + for (i = 0; i < TF_DIR_MAX; i++) + tcam_db->tcam_db[i] = NULL; + tf_session_set_db(tfp, TF_MODULE_TYPE_TCAM, tcam_db); db_cfg.module = TF_MODULE_TYPE_TCAM; db_cfg.num_elements = parms->num_elements; @@ -107,7 +117,7 @@ tf_tcam_bind(struct tf *tfp, for (d = 0; d < TF_DIR_MAX; d++) { db_cfg.dir = d; db_cfg.alloc_cnt = parms->resources->tcam_cnt[d].cnt; - db_cfg.rm_db = &tcam_db[d]; + db_cfg.rm_db = (void *)&tcam_db->tcam_db[d]; rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, @@ -120,7 +130,7 @@ tf_tcam_bind(struct tf *tfp, /* check if reserved resource for WC is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { memset(&info, 0, sizeof(info)); - ainfo.rm_db = tcam_db[d]; + ainfo.rm_db = tcam_db->tcam_db[d]; ainfo.subtype = TF_TCAM_TBL_TYPE_WC_TCAM; ainfo.info = &info; rc = tf_rm_get_info(&ainfo); @@ -148,7 +158,7 @@ tf_tcam_bind(struct tf *tfp, if (!parms->resources->tcam_cnt[d].cnt[i]) continue; - ainfo.rm_db = tcam_db[d]; + ainfo.rm_db = tcam_db->tcam_db[d]; ainfo.subtype = i; ainfo.info = &info; rc = tf_rm_get_info(&ainfo); @@ -186,7 +196,7 @@ tf_tcam_bind(struct tf *tfp, for (i = 0; i < TF_DIR_MAX; i++) { memset(&fparms, 0, sizeof(fparms)); fparms.dir = i; - fparms.rm_db = tcam_db[i]; + fparms.rm_db = tcam_db->tcam_db[i]; /* Ignoring return here since we are in the error case */ (void)tf_rm_free_db(tfp, &fparms); @@ -196,7 +206,8 @@ tf_tcam_bind(struct tf *tfp, shadow_tcam_db[i] = NULL; } - tcam_db[i] = NULL; + tcam_db->tcam_db[i] = NULL; + tf_session_set_db(tfp, TF_MODULE_TYPE_TCAM, NULL); } shadow_init = 0; @@ -211,6 +222,8 @@ tf_tcam_unbind(struct tf *tfp) int rc; int i; struct tf_rm_free_db_parms fparms; + struct tcam_rm_db *tcam_db; + void *tcam_db_ptr = NULL; struct tf_shadow_tcam_free_db_parms fshadow; TF_CHECK_PARMS1(tfp); @@ -221,15 +234,24 @@ tf_tcam_unbind(struct tf *tfp) return 0; } + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; + for (i = 0; i < TF_DIR_MAX; i++) { memset(&fparms, 0, sizeof(fparms)); fparms.dir = i; - fparms.rm_db = tcam_db[i]; + fparms.rm_db = tcam_db->tcam_db[i]; rc = tf_rm_free_db(tfp, &fparms); if (rc) return rc; - tcam_db[i] = NULL; + tcam_db->tcam_db[i] = NULL; if (shadow_init) { memset(&fshadow, 0, sizeof(fshadow)); @@ -256,6 +278,8 @@ tf_tcam_alloc(struct tf *tfp, struct tf_rm_allocate_parms aparms; uint16_t num_slices = 1; uint32_t index; + struct tcam_rm_db *tcam_db; + void *tcam_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -293,13 +317,22 @@ tf_tcam_alloc(struct tf *tfp, if (rc) return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; + /* * For WC TCAM, number of slices could be 4, 2, 1 based on * the key_size. For other TCAM, it is always 1 */ for (i = 0; i < num_slices; i++) { memset(&aparms, 0, sizeof(aparms)); - aparms.rm_db = tcam_db[parms->dir]; + aparms.rm_db = tcam_db->tcam_db[parms->dir]; aparms.subtype = parms->type; aparms.priority = parms->priority; aparms.index = &index; @@ -334,6 +367,8 @@ tf_tcam_free(struct tf *tfp, int allocated = 0; struct tf_shadow_tcam_remove_parms shparms; int i; + struct tcam_rm_db *tcam_db; + void *tcam_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -379,10 +414,18 @@ tf_tcam_free(struct tf *tfp, return -EINVAL; } + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; + /* Check if element is in use */ memset(&aparms, 0, sizeof(aparms)); - - aparms.rm_db = tcam_db[parms->dir]; + aparms.rm_db = tcam_db->tcam_db[parms->dir]; aparms.subtype = parms->type; aparms.index = parms->idx; aparms.allocated = &allocated; @@ -431,7 +474,7 @@ tf_tcam_free(struct tf *tfp, for (i = 0; i < num_slices; i++) { /* Free requested element */ memset(&fparms, 0, sizeof(fparms)); - fparms.rm_db = tcam_db[parms->dir]; + fparms.rm_db = tcam_db->tcam_db[parms->dir]; fparms.subtype = parms->type; fparms.index = parms->idx + i; rc = tf_rm_free(&fparms); @@ -448,7 +491,7 @@ tf_tcam_free(struct tf *tfp, /* Convert TF type to HCAPI RM type */ memset(&hparms, 0, sizeof(hparms)); - hparms.rm_db = tcam_db[parms->dir]; + hparms.rm_db = tcam_db->tcam_db[parms->dir]; hparms.subtype = parms->type; hparms.hcapi_type = &parms->hcapi_type; @@ -612,6 +655,8 @@ tf_tcam_set(struct tf *tfp __rte_unused, struct tf_shadow_tcam_insert_parms iparms; uint16_t num_slice_per_row = 1; int allocated = 0; + struct tcam_rm_db *tcam_db; + void *tcam_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -649,10 +694,19 @@ tf_tcam_set(struct tf *tfp __rte_unused, if (rc) return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; + /* Check if element is in use */ memset(&aparms, 0, sizeof(aparms)); - aparms.rm_db = tcam_db[parms->dir]; + aparms.rm_db = tcam_db->tcam_db[parms->dir]; aparms.subtype = parms->type; aparms.index = parms->idx; aparms.allocated = &allocated; @@ -672,7 +726,7 @@ tf_tcam_set(struct tf *tfp __rte_unused, /* Convert TF type to HCAPI RM type */ memset(&hparms, 0, sizeof(hparms)); - hparms.rm_db = tcam_db[parms->dir]; + hparms.rm_db = tcam_db->tcam_db[parms->dir]; hparms.subtype = parms->type; hparms.hcapi_type = &parms->hcapi_type; @@ -722,6 +776,8 @@ tf_tcam_get(struct tf *tfp __rte_unused, struct tf_rm_is_allocated_parms aparms; struct tf_rm_get_hcapi_parms hparms; int allocated = 0; + struct tcam_rm_db *tcam_db; + void *tcam_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -742,10 +798,19 @@ tf_tcam_get(struct tf *tfp __rte_unused, if (rc) return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; + /* Check if element is in use */ memset(&aparms, 0, sizeof(aparms)); - aparms.rm_db = tcam_db[parms->dir]; + aparms.rm_db = tcam_db->tcam_db[parms->dir]; aparms.subtype = parms->type; aparms.index = parms->idx; aparms.allocated = &allocated; @@ -765,7 +830,7 @@ tf_tcam_get(struct tf *tfp __rte_unused, /* Convert TF type to HCAPI RM type */ memset(&hparms, 0, sizeof(hparms)); - hparms.rm_db = tcam_db[parms->dir]; + hparms.rm_db = tcam_db->tcam_db[parms->dir]; hparms.subtype = parms->type; hparms.hcapi_type = &parms->hcapi_type; diff --git a/drivers/net/bnxt/tf_core/tf_tcam.h b/drivers/net/bnxt/tf_core/tf_tcam.h index b550fa43ca..acab223532 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.h +++ b/drivers/net/bnxt/tf_core/tf_tcam.h @@ -237,6 +237,16 @@ struct tf_tcam_get_parms { uint16_t result_size; }; +/** + * TCAM database + * + * Tcam rm database + * + */ +struct tcam_rm_db { + struct rm_db *tcam_db[TF_DIR_MAX]; +}; + /** * @page tcam TCAM * From patchwork Sun Jun 13 00:06:08 2021 Content-Type: text/plain; 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Sat, 12 Jun 2021 17:07:17 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.15 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:16 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Randy Schacher , Venkat Duvvuru , Farah Smith Date: Sat, 12 Jun 2021 17:06:08 -0700 Message-Id: <20210613000652.28191-15-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 14/58] net/bnxt: add shared session support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding There are 2 types of sessions - shared and non-shared. For non-shared all the allocated resources are owned and managed by a single session instance. No other applications have access to the resources owned by the non-shared session. For a shared session, resources are shared between 2 applications. The FW shared session can only be created by one application and shared by other apps. The host session that creates the FW shared session is the creator. Applications can retrieve the reserved resources through a new API tf_get_session_resc_info. Each module supports two sessions, one is shared session, the other is non-shared session. Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/hsi_struct_def_dpdk.h | 250 ++++++++++++++++--- drivers/net/bnxt/tf_core/bitalloc.c | 10 +- drivers/net/bnxt/tf_core/bitalloc.h | 3 +- drivers/net/bnxt/tf_core/tf_core.c | 105 ++++++++ drivers/net/bnxt/tf_core/tf_core.h | 177 +++++++++++++- drivers/net/bnxt/tf_core/tf_device.c | 76 +++--- drivers/net/bnxt/tf_core/tf_device.h | 73 ++++++ drivers/net/bnxt/tf_core/tf_device_p4.c | 8 + drivers/net/bnxt/tf_core/tf_device_p58.c | 8 + drivers/net/bnxt/tf_core/tf_em.h | 17 ++ drivers/net/bnxt/tf_core/tf_em_common.c | 25 -- drivers/net/bnxt/tf_core/tf_em_internal.c | 118 +++++---- drivers/net/bnxt/tf_core/tf_identifier.c | 89 +++---- drivers/net/bnxt/tf_core/tf_identifier.h | 16 ++ drivers/net/bnxt/tf_core/tf_msg.c | 223 ++++++++++++++--- drivers/net/bnxt/tf_core/tf_msg.h | 47 +++- drivers/net/bnxt/tf_core/tf_rm.c | 277 +++++++++++++++++++++- drivers/net/bnxt/tf_core/tf_rm.h | 34 +++ drivers/net/bnxt/tf_core/tf_session.c | 37 ++- drivers/net/bnxt/tf_core/tf_session.h | 66 ++++++ drivers/net/bnxt/tf_core/tf_tbl.c | 104 ++++---- drivers/net/bnxt/tf_core/tf_tbl.h | 17 ++ drivers/net/bnxt/tf_core/tf_tcam.c | 103 ++++---- drivers/net/bnxt/tf_core/tf_tcam.h | 16 ++ drivers/net/bnxt/tf_core/tfp.c | 6 +- drivers/net/bnxt/tf_core/tfp.h | 3 +- 26 files changed, 1557 insertions(+), 351 deletions(-) diff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h b/drivers/net/bnxt/hsi_struct_def_dpdk.h index aea9305486..1f0b37addf 100644 --- a/drivers/net/bnxt/hsi_struct_def_dpdk.h +++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h @@ -699,6 +699,8 @@ struct cmd_nums { /* Experimental */ #define HWRM_TF_SESSION_RESC_FLUSH UINT32_C(0x2cf) /* Experimental */ + #define HWRM_TF_SESSION_RESC_INFO UINT32_C(0x2d0) + /* Experimental */ #define HWRM_TF_TBL_TYPE_GET UINT32_C(0x2da) /* Experimental */ #define HWRM_TF_TBL_TYPE_SET UINT32_C(0x2db) @@ -727,6 +729,8 @@ struct cmd_nums { /* Experimental */ #define HWRM_TF_EM_HASH_INSERT UINT32_C(0x2ec) /* Experimental */ + #define HWRM_TF_EM_MOVE UINT32_C(0x2ed) + /* Experimental */ #define HWRM_TF_TCAM_SET UINT32_C(0x2f8) /* Experimental */ #define HWRM_TF_TCAM_GET UINT32_C(0x2f9) @@ -986,8 +990,8 @@ struct hwrm_err_output { #define HWRM_VERSION_MINOR 10 #define HWRM_VERSION_UPDATE 2 /* non-zero means beta version */ -#define HWRM_VERSION_RSVD 15 -#define HWRM_VERSION_STR "1.10.2.15" +#define HWRM_VERSION_RSVD 22 +#define HWRM_VERSION_STR "1.10.2.22" /**************** * hwrm_ver_get * @@ -30177,7 +30181,7 @@ struct hwrm_vnic_qcaps_output { UINT32_C(0x20) /* * When this bit is '1', the capability to - * mirror the the RoCE traffic is supported. + * mirror the RoCE traffic is supported. * If set to '0', then the capability to mirror the * RoCE traffic is not supported. */ @@ -30930,7 +30934,7 @@ struct hwrm_vnic_plcmodes_cfg_input { uint16_t hds_threshold; /* * When virtio placement algorithm is enabled, this - * value is used to determine the the maximum number of BDs + * value is used to determine the maximum number of BDs * that can be used to place an Rx Packet. * If an incoming packet does not fit in the buffers described * by the max BDs, the packet will be dropped and an error @@ -31094,7 +31098,7 @@ struct hwrm_vnic_plcmodes_qcfg_output { uint16_t hds_threshold; /* * When virtio placement algorithm is enabled, this - * value is used to determine the the maximum number of BDs + * value is used to determine the maximum number of BDs * that can be used to place an Rx Packet. * If an incoming packet does not fit in the buffers described * by the max BDs, the packet will be dropped and an error @@ -42143,8 +42147,24 @@ struct hwrm_tf_session_open_output { * the newly created session. */ uint32_t fw_session_client_id; - /* unused. */ - uint32_t unused0; + uint32_t flags; + /* Indicates if the shared session has been created. */ + #define HWRM_TF_SESSION_OPEN_OUTPUT_FLAGS_SHARED_SESSION \ + UINT32_C(0x1) + /* + * If this bit set to 0, then it indicates the shared session + * has been created by another session. + */ + #define HWRM_TF_SESSION_OPEN_OUTPUT_FLAGS_SHARED_SESSION_NOT_CREATOR \ + UINT32_C(0x0) + /* + * If this bit is set to 1, then it indicates the shared session + * is created by this session. + */ + #define HWRM_TF_SESSION_OPEN_OUTPUT_FLAGS_SHARED_SESSION_CREATOR \ + UINT32_C(0x1) + #define HWRM_TF_SESSION_OPEN_OUTPUT_FLAGS_SHARED_SESSION_LAST \ + HWRM_TF_SESSION_OPEN_OUTPUT_FLAGS_SHARED_SESSION_CREATOR /* unused. */ uint8_t unused1[3]; /* @@ -42948,6 +42968,105 @@ struct hwrm_tf_session_resc_flush_output { uint8_t valid; } __rte_packed; +/***************************** + * hwrm_tf_session_resc_info * + *****************************/ + + +/* hwrm_tf_session_resc_info_input (size:320b/40B) */ +struct hwrm_tf_session_resc_info_input { + /* The HWRM command request type. */ + uint16_t req_type; + /* + * The completion ring to send the completion event on. This should + * be the NQ ID returned from the `nq_alloc` HWRM command. + */ + uint16_t cmpl_ring; + /* + * The sequence ID is used by the driver for tracking multiple + * commands. This ID is treated as opaque data by the firmware and + * the value is returned in the `hwrm_resp_hdr` upon completion. + */ + uint16_t seq_id; + /* + * The target ID of the command: + * * 0x0-0xFFF8 - The function ID + * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors + * * 0xFFFD - Reserved for user-space HWRM interface + * * 0xFFFF - HWRM + */ + uint16_t target_id; + /* + * A physical address pointer pointing to a host buffer that the + * command's response data will be written. This can be either a host + * physical address (HPA) or a guest physical address (GPA) and must + * point to a physically contiguous block of memory. + */ + uint64_t resp_addr; + /* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent. */ + uint32_t fw_session_id; + /* Control flags. */ + uint16_t flags; + /* Indicates the flow direction. */ + #define HWRM_TF_SESSION_RESC_INFO_INPUT_FLAGS_DIR UINT32_C(0x1) + /* If this bit set to 0, then it indicates rx flow. */ + #define HWRM_TF_SESSION_RESC_INFO_INPUT_FLAGS_DIR_RX UINT32_C(0x0) + /* If this bit is set to 1, then it indicates tx flow. */ + #define HWRM_TF_SESSION_RESC_INFO_INPUT_FLAGS_DIR_TX UINT32_C(0x1) + #define HWRM_TF_SESSION_RESC_INFO_INPUT_FLAGS_DIR_LAST \ + HWRM_TF_SESSION_RESC_INFO_INPUT_FLAGS_DIR_TX + /* + * Defines the array size of the provided req_addr and + * resv_addr array buffers. Should be set to the number of + * request entries. + */ + uint16_t req_size; + /* + * This is the DMA address for the request input data array + * buffer. Array is of tf_rm_resc_req_entry type. Size of the + * array buffer is provided by the 'req_size' field in this + * message. + */ + uint64_t req_addr; + /* + * This is the DMA address for the resc output data array + * buffer. Array is of tf_rm_resc_entry type. Size of the array + * buffer is provided by the 'req_size' field in this + * message. + */ + uint64_t resc_addr; +} __rte_packed; + +/* hwrm_tf_session_resc_info_output (size:128b/16B) */ +struct hwrm_tf_session_resc_info_output { + /* The specific error status for the command. */ + uint16_t error_code; + /* The HWRM command request type. */ + uint16_t req_type; + /* The sequence ID from the original command. */ + uint16_t seq_id; + /* The length of the response data in number of bytes. */ + uint16_t resp_len; + /* + * Size of the returned tf_rm_resc_entry data array. The value + * cannot exceed the req_size defined by the input msg. The data + * array is returned using the resv_addr specified DMA + * address also provided by the input msg. + */ + uint16_t size; + /* unused. */ + uint8_t unused0[5]; + /* + * This field is used in Output records to indicate that the output + * is completely written to RAM. This field should be read as '1' + * to indicate that the output has been completely written. + * When writing a command completion or response to an internal + * processor, the order of writes has to be such that this field is + * written last. + */ + uint8_t valid; +} __rte_packed; + /* TruFlow RM capability of a resource. */ /* tf_rm_resc_req_entry (size:64b/8B) */ struct tf_rm_resc_req_entry { @@ -44434,6 +44553,79 @@ struct hwrm_tf_em_delete_output { uint16_t unused0[3]; } __rte_packed; +/******************* + * hwrm_tf_em_move * + *******************/ + + +/* hwrm_tf_em_move_input (size:320b/40B) */ +struct hwrm_tf_em_move_input { + /* The HWRM command request type. */ + uint16_t req_type; + /* + * The completion ring to send the completion event on. This should + * be the NQ ID returned from the `nq_alloc` HWRM command. + */ + uint16_t cmpl_ring; + /* + * The sequence ID is used by the driver for tracking multiple + * commands. This ID is treated as opaque data by the firmware and + * the value is returned in the `hwrm_resp_hdr` upon completion. + */ + uint16_t seq_id; + /* + * The target ID of the command: + * * 0x0-0xFFF8 - The function ID + * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors + * * 0xFFFD - Reserved for user-space HWRM interface + * * 0xFFFF - HWRM + */ + uint16_t target_id; + /* + * A physical address pointer pointing to a host buffer that the + * command's response data will be written. This can be either a host + * physical address (HPA) or a guest physical address (GPA) and must + * point to a physically contiguous block of memory. + */ + uint64_t resp_addr; + /* Session Id. */ + uint32_t fw_session_id; + /* Control flags. */ + uint16_t flags; + /* Indicates the flow direction. */ + #define HWRM_TF_EM_MOVE_INPUT_FLAGS_DIR UINT32_C(0x1) + /* If this bit set to 0, then it indicates rx flow. */ + #define HWRM_TF_EM_MOVE_INPUT_FLAGS_DIR_RX UINT32_C(0x0) + /* If this bit is set to 1, then it indicates tx flow. */ + #define HWRM_TF_EM_MOVE_INPUT_FLAGS_DIR_TX UINT32_C(0x1) + #define HWRM_TF_EM_MOVE_INPUT_FLAGS_DIR_LAST \ + HWRM_TF_EM_MOVE_INPUT_FLAGS_DIR_TX + /* Number of EM entry blocks */ + uint16_t num_blocks; + /* New index for entry */ + uint32_t new_index; + /* Unused */ + uint32_t unused0; + /* EM internal flow handle. */ + uint64_t flow_handle; +} __rte_packed; + +/* hwrm_tf_em_move_output (size:128b/16B) */ +struct hwrm_tf_em_move_output { + /* The specific error status for the command. */ + uint16_t error_code; + /* The HWRM command request type. */ + uint16_t req_type; + /* The sequence ID from the original command. */ + uint16_t seq_id; + /* The length of the response data in number of bytes. */ + uint16_t resp_len; + /* Index of old entry. */ + uint16_t em_index; + /* unused. */ + uint16_t unused0[3]; +} __rte_packed; + /******************** * hwrm_tf_tcam_set * ********************/ @@ -46989,8 +47181,8 @@ struct hwrm_nvm_write_input { */ uint64_t host_src_addr; /* - * The Directory Entry Type (valid values are defined in the bnxnvm - * directory_type enum defined in the file bnxnvm_defs.h). + * The Directory Entry Type (valid values are defined in the + * bnxnvm_directory_type enum defined in the file bnxnvm_defs.h). */ uint16_t dir_type; /* @@ -47003,10 +47195,10 @@ struct hwrm_nvm_write_input { /* Directory Entry Attribute flags (see BNX_DIR_ATTR_* in the file bnxnvm_defs.h). */ uint16_t dir_attr; /* - * Length of data to write, in bytes. May be less than or equal to the allocated - * size for the directory entry. - * The data length stored in the directory entry will be updated to reflect - * this value once the write is complete. + * Length of data to write, in bytes.May be + * less than or equal to the allocated size for the directory entry. + * The data length stored in the directory entry will be updated to + * reflect this value once the write is complete. */ uint32_t dir_data_length; /* Option. */ @@ -47019,15 +47211,15 @@ struct hwrm_nvm_write_input { #define HWRM_NVM_WRITE_INPUT_FLAGS_KEEP_ORIG_ACTIVE_IMG \ UINT32_C(0x1) /* - * The requested length of the allocated NVM for the item, in bytes. This - * value may be greater than or equal to the specified data length (dir_data_length). + * The requested length of the allocated NVM for the item, in bytes. + * This value may be greater than or equal to the specified data length (dir_data_length). * If this value is less than the specified data length, it will be ignored. - * The response will contain the actual allocated item length, which may be - * greater than the requested item length. + * The response will contain the actual allocated item length, which may + * be greater than the requested item length. * The purpose for allocating more than the required number of bytes for * an item's data is to pre-allocate extra storage (padding) to accommodate - * the potential future growth of an item (e.g. upgraded firmware with a - * size increase, log growth, expanded configuration data). + * the potential future growth of an item (e.g. upgraded firmware with + * a size increase, log growth, expanded configuration data). */ uint32_t dir_item_length; uint32_t unused_0; @@ -47045,10 +47237,9 @@ struct hwrm_nvm_write_output { uint16_t resp_len; /* * Length of the allocated NVM for the item, in bytes. The value may be - * greater than or equal to the specified data length or the requested - * item length. - * The actual item length used when creating a new directory entry will be - * a multiple of an NVM block size. + * greater than or equal to the specified data length or the requested item length. + * The actual item length used when creating a new directory entry will + * be a multiple of an NVM block size. */ uint32_t dir_item_length; /* The directory index of the created or modified item. */ @@ -47538,14 +47729,11 @@ struct hwrm_nvm_mod_dir_entry_input { */ uint16_t dir_ordinal; /* - * The Directory Entry Extension flags (see BNX_DIR_EXT_* for extension - * flag definitions). + * The Directory Entry Extension flags (see BNX_DIR_EXT_* for + * extension flag definitions). */ uint16_t dir_ext; - /* - * Directory Entry Attribute flags (see BNX_DIR_ATTR_* for attribute flag - * definitions). - */ + /* Directory Entry Attribute flags (see BNX_DIR_ATTR_* for attribute flag definitions). */ uint16_t dir_attr; /* * If valid, then this field updates the checksum @@ -48406,8 +48594,8 @@ struct hwrm_fw_reset_input { #define HWRM_FW_RESET_INPUT_EMBEDDED_PROC_TYPE_HOST \ UINT32_C(0x4) /* - * AP processor complex (in multi-host environment). Use host_idx to - * control which core is reset + * AP processor complex (in multi-host environment). + * Use host_idx to control which core is reset */ #define HWRM_FW_RESET_INPUT_EMBEDDED_PROC_TYPE_AP \ UINT32_C(0x5) diff --git a/drivers/net/bnxt/tf_core/bitalloc.c b/drivers/net/bnxt/tf_core/bitalloc.c index af1397071b..e253cfc3a6 100644 --- a/drivers/net/bnxt/tf_core/bitalloc.c +++ b/drivers/net/bnxt/tf_core/bitalloc.c @@ -65,7 +65,7 @@ ba_ffs(bitalloc_word_t v) } int -ba_init(struct bitalloc *pool, int size) +ba_init(struct bitalloc *pool, int size, bool free) { bitalloc_word_t *mem = (bitalloc_word_t *)pool; int i; @@ -101,9 +101,11 @@ ba_init(struct bitalloc *pool, int size) pool->storage[offset++] = words[--lev]; } - /* Free the entire pool */ - for (i = 0; i < size; i++) - ba_free(pool, i); + /* Free the entire pool if it is required*/ + if (free) { + for (i = 0; i < size; i++) + ba_free(pool, i); + } return 0; } diff --git a/drivers/net/bnxt/tf_core/bitalloc.h b/drivers/net/bnxt/tf_core/bitalloc.h index 7244b86e95..e3b389e68d 100644 --- a/drivers/net/bnxt/tf_core/bitalloc.h +++ b/drivers/net/bnxt/tf_core/bitalloc.h @@ -7,6 +7,7 @@ #define _BITALLOC_H_ #include +#include /* Bitalloc works on uint32_t as its word size */ typedef uint32_t bitalloc_word_t; @@ -64,7 +65,7 @@ struct bitalloc { * Returns 0 on success, -1 on failure. Size is arbitrary up to * BITALLOC_MAX_SIZE */ -int ba_init(struct bitalloc *pool, int size); +int ba_init(struct bitalloc *pool, int size, bool free); /** * Returns -1 on failure, or index of allocated entry diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index 9b8677caac..69f5c10293 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -27,6 +27,8 @@ tf_open_session(struct tf *tfp, int rc; unsigned int domain, bus, slot, device; struct tf_session_open_session_parms oparms; + int name_len; + char *name; TF_CHECK_PARMS2(tfp, parms); @@ -69,6 +71,13 @@ tf_open_session(struct tf *tfp, } } + name_len = strlen(parms->ctrl_chan_name); + name = &parms->ctrl_chan_name[name_len - strlen("tf_shared")]; + if (!strncmp(name, "tf_shared", strlen("tf_shared"))) { + memset(parms->ctrl_chan_name, 0, strlen(parms->ctrl_chan_name)); + strcpy(parms->ctrl_chan_name, "tf_share"); + } + parms->session_id.internal.domain = domain; parms->session_id.internal.bus = bus; parms->session_id.internal.device = device; @@ -1593,3 +1602,99 @@ tf_get_if_tbl_entry(struct tf *tfp, return 0; } + +int tf_get_session_info(struct tf *tfp, + struct tf_get_session_info_parms *parms) +{ + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup device, rc:%s\n", + strerror(-rc)); + return rc; + } + + TF_CHECK_PARMS2(tfp, parms); + + if (dev->ops->tf_dev_get_ident_resc_info == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "Operation not supported, rc:%s\n", + strerror(-rc)); + return rc; + } + + rc = dev->ops->tf_dev_get_ident_resc_info(tfp, parms->session_info.ident); + if (rc) { + TFP_DRV_LOG(ERR, + "Ident get resc info failed, rc:%s\n", + strerror(-rc)); + return rc; + } + + if (dev->ops->tf_dev_get_tbl_resc_info == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "Operation not supported, rc:%s\n", + strerror(-rc)); + return rc; + } + + rc = dev->ops->tf_dev_get_tbl_resc_info(tfp, parms->session_info.tbl); + if (rc) { + TFP_DRV_LOG(ERR, + "Tbl get resc info failed, rc:%s\n", + strerror(-rc)); + return rc; + } + + if (dev->ops->tf_dev_get_tcam_resc_info == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "Operation not supported, rc:%s\n", + strerror(-rc)); + return rc; + } + + rc = dev->ops->tf_dev_get_tcam_resc_info(tfp, parms->session_info.tcam); + if (rc) { + TFP_DRV_LOG(ERR, + "TCAM get resc info failed, rc:%s\n", + strerror(-rc)); + return rc; + } + + if (dev->ops->tf_dev_get_em_resc_info == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "Operation not supported, rc:%s\n", + strerror(-rc)); + return rc; + } + + rc = dev->ops->tf_dev_get_em_resc_info(tfp, parms->session_info.em); + if (rc) { + TFP_DRV_LOG(ERR, + "EM get resc info failed, rc:%s\n", + strerror(-rc)); + return rc; + } + + return 0; +} diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 7b26b58000..4440d60fe5 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -557,7 +557,8 @@ struct tf_open_session_parms { * rte_eth_dev_get_name_by_port() within the ULP. * * ctrl_chan_name will be used as part of a name for any - * shared memory allocation. + * shared memory allocation. The ctrl_chan_name is usually in format + * 0000:02:00.0. The name for shared session is 0000:02:00.0-tf_shared. */ char ctrl_chan_name[TF_SESSION_NAME_MAX]; /** @@ -616,29 +617,63 @@ struct tf_open_session_parms { * Resource allocation for the session. */ struct tf_session_resources resources; + + /** + * [in] bp + * The pointer to the parent bp struct. This is only used for HWRM + * message passing within the portability layer. The type is struct + * bnxt. + */ + void *bp; + + /** + * [out] shared_session_creator + * + * Indicates whether the application created the session if set. + * Otherwise the shared session already existed. Just for information + * purposes. + */ + int shared_session_creator; }; /** * Opens a new TruFlow Session or session client. * - * What gets created depends on the passed in tfp content. If the tfp - * does not have prior session data a new session with associated - * session client. If tfp has a session already a session client will - * be created. In both cases the session client is created using the - * provided ctrl_chan_name. + * What gets created depends on the passed in tfp content. If the tfp does not + * have prior session data a new session with associated session client. If tfp + * has a session already a session client will be created. In both cases the + * session client is created using the provided ctrl_chan_name. * - * In case of session creation TruFlow will allocate session specific - * memory, shared memory, to hold its session data. This data is - * private to TruFlow. + * In case of session creation TruFlow will allocate session specific memory to + * hold its session data. This data is private to TruFlow. * * No other TruFlow APIs will succeed unless this API is first called * and succeeds. * - * tf_open_session() returns a session id and session client id that - * is used on all other TF APIs. + * tf_open_session() returns a session id and session client id. These are + * also stored within the tfp structure passed in to all other APIs. * * A Session or session client can be closed using tf_close_session(). * + * There are 2 types of sessions - shared and not. For non-shared all + * the allocated resources are owned and managed by a single session instance. + * No other applications have access to the resources owned by the non-shared + * session. For a shared session, resources are shared between 2 applications. + * + * When the caller of tf_open_session() sets the ctrl_chan_name[] to a name + * like "0000:02:00.0-tf_shared", it is a request to create a new "shared" + * session in the firmware or access the existing shared session. There is + * only 1 shared session that can be created. If the shared session has + * already been created in the firmware, this API will return this indication + * by clearing the shared_session_creator flag. Only the first shared session + * create will have the shared_session_creator flag set. + * + * The shared session should always be the first session to be created by + * application and the last session closed due to RM management preference. + * + * Sessions remain open in the firmware until the last client of the session + * closes the session (tf_close_session()). + * * [in] tfp * Pointer to TF handle * @@ -652,6 +687,126 @@ struct tf_open_session_parms { int tf_open_session(struct tf *tfp, struct tf_open_session_parms *parms); +/** + * General internal resource info + * + * TODO: remove tf_rm_new_entry structure and use this structure + * internally. + */ +struct tf_resource_info { + uint16_t start; + uint16_t stride; +}; + +/** + * Identifier resource definition + */ +struct tf_identifier_resource_info { + /** + * Array of TF Identifiers. The index used is tf_identifier_type. + */ + struct tf_resource_info info[TF_IDENT_TYPE_MAX]; +}; + +/** + * Table type resource info definition + */ +struct tf_tbl_resource_info { + /** + * Array of TF Table types. The index used is tf_tbl_type. + */ + struct tf_resource_info info[TF_TBL_TYPE_MAX]; +}; + +/** + * TCAM type resource definition + */ +struct tf_tcam_resource_info { + /** + * Array of TF TCAM types. The index used is tf_tcam_tbl_type. + */ + struct tf_resource_info info[TF_TCAM_TBL_TYPE_MAX]; +}; + +/** + * EM type resource definition + */ +struct tf_em_resource_info { + /** + * Array of TF EM table types. The index used is tf_em_tbl_type. + */ + struct tf_resource_info info[TF_EM_TBL_TYPE_MAX]; +}; + +/** + * tf_session_resources parameter definition. + */ +struct tf_session_resource_info { + /** + * [in] Requested Identifier Resources + * + * Number of identifier resources requested for the + * session. + */ + struct tf_identifier_resource_info ident[TF_DIR_MAX]; + /** + * [in] Requested Index Table resource counts + * + * The number of index table resources requested for the + * session. + */ + struct tf_tbl_resource_info tbl[TF_DIR_MAX]; + /** + * [in] Requested TCAM Table resource counts + * + * The number of TCAM table resources requested for the + * session. + */ + + struct tf_tcam_resource_info tcam[TF_DIR_MAX]; + /** + * [in] Requested EM resource counts + * + * The number of internal EM table resources requested for the + * session. + */ + struct tf_em_resource_info em[TF_DIR_MAX]; +}; + +/** + * tf_get_session_resources parameter definition. + */ +struct tf_get_session_info_parms { + /** + * [out] the structure is used to return the information of + * allocated resources. + * + */ + struct tf_session_resource_info session_info; +}; + +/** (experimental) + * Gets info about a TruFlow Session + * + * Get info about the session which has been created. Whether it exists and + * what resource start and stride offsets are in use. This API is primarily + * intended to be used by an application which has created a shared session + * This application needs to obtain the resources which have already been + * allocated for the shared session. + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to get parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_get_session_info(struct tf *tfp, + struct tf_get_session_info_parms *parms); + /** * Experimental * diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index 9e71c04bf2..fed4156200 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -351,10 +351,16 @@ tf_dev_bind_p58(struct tf *tfp, struct tf_em_cfg_parms em_cfg; struct tf_if_tbl_cfg_parms if_tbl_cfg; struct tf_global_cfg_cfg_parms global_cfg; + struct tf_session *tfs; /* Initial function initialization */ dev_handle->ops = &tf_dev_ops_p58_init; + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + rsv_cnt = tf_dev_reservation_check(TF_IDENT_TYPE_MAX, tf_ident_p58, (uint16_t *)resources->ident_cnt); @@ -440,26 +446,28 @@ tf_dev_bind_p58(struct tf *tfp, /* * IF_TBL */ - if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; - if_tbl_cfg.cfg = tf_if_tbl_p58; - if_tbl_cfg.shadow_copy = shadow_copy; - rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "IF Table initialization failure\n"); - goto fail; - } + if (!tf_session_is_shared_session(tfs)) { + if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; + if_tbl_cfg.cfg = tf_if_tbl_p58; + if_tbl_cfg.shadow_copy = shadow_copy; + rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "IF Table initialization failure\n"); + goto fail; + } - /* - * GLOBAL_CFG - */ - global_cfg.num_elements = TF_GLOBAL_CFG_TYPE_MAX; - global_cfg.cfg = tf_global_cfg_p58; - rc = tf_global_cfg_bind(tfp, &global_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "Global Cfg initialization failure\n"); - goto fail; + /* + * GLOBAL_CFG + */ + global_cfg.num_elements = TF_GLOBAL_CFG_TYPE_MAX; + global_cfg.cfg = tf_global_cfg_p58; + rc = tf_global_cfg_bind(tfp, &global_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Global Cfg initialization failure\n"); + goto fail; + } } /* Final function initialization */ @@ -491,6 +499,12 @@ tf_dev_unbind_p58(struct tf *tfp) { int rc = 0; bool fail = false; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; /* Unbind all the support modules. As this is only done on * close we only report errors as everything has to be cleaned @@ -527,18 +541,20 @@ tf_dev_unbind_p58(struct tf *tfp) fail = true; } - rc = tf_if_tbl_unbind(tfp); - if (rc) { - TFP_DRV_LOG(ERR, - "Device unbind failed, IF Table Type\n"); - fail = true; - } + if (!tf_session_is_shared_session(tfs)) { + rc = tf_if_tbl_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, IF Table Type\n"); + fail = true; + } - rc = tf_global_cfg_unbind(tfp); - if (rc) { - TFP_DRV_LOG(ERR, - "Device unbind failed, Global Cfg Type\n"); - fail = true; + rc = tf_global_cfg_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, Global Cfg Type\n"); + fail = true; + } } if (fail) diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index 3f2c24a0c6..16c2fe0f64 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -220,6 +220,25 @@ struct tf_dev_ops { */ int (*tf_dev_search_ident)(struct tf *tfp, struct tf_ident_search_parms *parms); + + /** + * Retrieves the identifier resource info. + * + * This API retrieves the identifier resource info from the rm db. + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to identifier info + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ + int (*tf_dev_get_ident_resc_info)(struct tf *tfp, + struct tf_identifier_resource_info *parms); + /** * Get SRAM table information. * @@ -425,6 +444,24 @@ struct tf_dev_ops { int (*tf_dev_get_bulk_tbl)(struct tf *tfp, struct tf_tbl_get_bulk_parms *parms); + /** + * Retrieves the table resource info. + * + * This API retrieves the table resource info from the rm db. + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to tbl info + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ + int (*tf_dev_get_tbl_resc_info)(struct tf *tfp, + struct tf_tbl_resource_info *parms); + /** * Allocation of a tcam element. * @@ -524,6 +561,24 @@ struct tf_dev_ops { int (*tf_dev_get_tcam)(struct tf *tfp, struct tf_tcam_get_parms *parms); + /** + * Retrieves the tcam resource info. + * + * This API retrieves the tcam resource info from the rm db. + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to tcam info + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ + int (*tf_dev_get_tcam_resc_info)(struct tf *tfp, + struct tf_tcam_resource_info *parms); + /** * Insert EM hash entry API * @@ -588,6 +643,24 @@ struct tf_dev_ops { int (*tf_dev_delete_ext_em_entry)(struct tf *tfp, struct tf_delete_em_entry_parms *parms); + /** + * Retrieves the em resource info. + * + * This API retrieves the em resource info from the rm db. + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to em info + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ + int (*tf_dev_get_em_resc_info)(struct tf *tfp, + struct tf_em_resource_info *parms); + /** * Allocate EEM table scope * diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index 8797afa100..e74ba6cd8f 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -206,6 +206,7 @@ const struct tf_dev_ops tf_dev_ops_p4_init = { .tf_dev_alloc_ident = NULL, .tf_dev_free_ident = NULL, .tf_dev_search_ident = NULL, + .tf_dev_get_ident_resc_info = NULL, .tf_dev_get_tbl_info = NULL, .tf_dev_alloc_ext_tbl = NULL, .tf_dev_alloc_tbl = NULL, @@ -216,15 +217,18 @@ const struct tf_dev_ops tf_dev_ops_p4_init = { .tf_dev_set_ext_tbl = NULL, .tf_dev_get_tbl = NULL, .tf_dev_get_bulk_tbl = NULL, + .tf_dev_get_tbl_resc_info = NULL, .tf_dev_alloc_tcam = NULL, .tf_dev_free_tcam = NULL, .tf_dev_alloc_search_tcam = NULL, .tf_dev_set_tcam = NULL, .tf_dev_get_tcam = NULL, + .tf_dev_get_tcam_resc_info = NULL, .tf_dev_insert_int_em_entry = NULL, .tf_dev_delete_int_em_entry = NULL, .tf_dev_insert_ext_em_entry = NULL, .tf_dev_delete_ext_em_entry = NULL, + .tf_dev_get_em_resc_info = NULL, .tf_dev_alloc_tbl_scope = NULL, .tf_dev_map_tbl_scope = NULL, .tf_dev_map_parif = NULL, @@ -247,6 +251,7 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_alloc_ident = tf_ident_alloc, .tf_dev_free_ident = tf_ident_free, .tf_dev_search_ident = tf_ident_search, + .tf_dev_get_ident_resc_info = tf_ident_get_resc_info, .tf_dev_get_tbl_info = NULL, .tf_dev_alloc_tbl = tf_tbl_alloc, .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc, @@ -257,15 +262,18 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_set_ext_tbl = tf_tbl_ext_common_set, .tf_dev_get_tbl = tf_tbl_get, .tf_dev_get_bulk_tbl = tf_tbl_bulk_get, + .tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info, .tf_dev_alloc_tcam = tf_tcam_alloc, .tf_dev_free_tcam = tf_tcam_free, .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, .tf_dev_set_tcam = tf_tcam_set, .tf_dev_get_tcam = NULL, + .tf_dev_get_tcam_resc_info = tf_tcam_get_resc_info, .tf_dev_insert_int_em_entry = tf_em_insert_int_entry, .tf_dev_delete_int_em_entry = tf_em_delete_int_entry, .tf_dev_insert_ext_em_entry = tf_em_insert_ext_entry, .tf_dev_delete_ext_em_entry = tf_em_delete_ext_entry, + .tf_dev_get_em_resc_info = tf_em_get_resc_info, .tf_dev_alloc_tbl_scope = tf_em_ext_common_alloc, .tf_dev_map_tbl_scope = tf_em_ext_map_tbl_scope, .tf_dev_map_parif = tf_dev_p4_map_parif, diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index b44648d216..32d621e7da 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -227,6 +227,7 @@ const struct tf_dev_ops tf_dev_ops_p58_init = { .tf_dev_alloc_ident = NULL, .tf_dev_free_ident = NULL, .tf_dev_search_ident = NULL, + .tf_dev_get_ident_resc_info = NULL, .tf_dev_get_tbl_info = NULL, .tf_dev_alloc_ext_tbl = NULL, .tf_dev_alloc_tbl = NULL, @@ -237,15 +238,18 @@ const struct tf_dev_ops tf_dev_ops_p58_init = { .tf_dev_set_ext_tbl = NULL, .tf_dev_get_tbl = NULL, .tf_dev_get_bulk_tbl = NULL, + .tf_dev_get_tbl_resc_info = NULL, .tf_dev_alloc_tcam = NULL, .tf_dev_free_tcam = NULL, .tf_dev_alloc_search_tcam = NULL, .tf_dev_set_tcam = NULL, .tf_dev_get_tcam = NULL, + .tf_dev_get_tcam_resc_info = NULL, .tf_dev_insert_int_em_entry = NULL, .tf_dev_delete_int_em_entry = NULL, .tf_dev_insert_ext_em_entry = NULL, .tf_dev_delete_ext_em_entry = NULL, + .tf_dev_get_em_resc_info = NULL, .tf_dev_alloc_tbl_scope = NULL, .tf_dev_map_tbl_scope = NULL, .tf_dev_map_parif = NULL, @@ -268,6 +272,7 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_alloc_ident = tf_ident_alloc, .tf_dev_free_ident = tf_ident_free, .tf_dev_search_ident = tf_ident_search, + .tf_dev_get_ident_resc_info = tf_ident_get_resc_info, .tf_dev_get_tbl_info = tf_dev_p58_get_sram_tbl_info, .tf_dev_alloc_tbl = tf_tbl_alloc, .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc, @@ -278,15 +283,18 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_set_ext_tbl = tf_tbl_ext_common_set, .tf_dev_get_tbl = tf_tbl_get, .tf_dev_get_bulk_tbl = tf_tbl_bulk_get, + .tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info, .tf_dev_alloc_tcam = tf_tcam_alloc, .tf_dev_free_tcam = tf_tcam_free, .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, .tf_dev_set_tcam = tf_tcam_set, .tf_dev_get_tcam = tf_tcam_get, + .tf_dev_get_tcam_resc_info = tf_tcam_get_resc_info, .tf_dev_insert_int_em_entry = tf_em_hash_insert_int_entry, .tf_dev_delete_int_em_entry = tf_em_hash_delete_int_entry, .tf_dev_insert_ext_em_entry = NULL, .tf_dev_delete_ext_em_entry = NULL, + .tf_dev_get_em_resc_info = tf_em_get_resc_info, .tf_dev_alloc_tbl_scope = NULL, .tf_dev_map_tbl_scope = NULL, .tf_dev_map_parif = NULL, diff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h index 19ad7f12be..60d90e28de 100644 --- a/drivers/net/bnxt/tf_core/tf_em.h +++ b/drivers/net/bnxt/tf_core/tf_em.h @@ -530,4 +530,21 @@ tf_em_ext_system_bind(struct tf *tfp, struct tf_em_cfg_parms *parms); int offload_system_mmap(struct tf_tbl_scope_cb *tbl_scope_cb); + +/** + * Retrieves the allocated resource info + * + * [in] tfp + * Pointer to TF handle, used for HCAPI communication + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int +tf_em_get_resc_info(struct tf *tfp, + struct tf_em_resource_info *em); #endif /* _TF_EM_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c index 4dc3c86b57..ed8f6db58c 100644 --- a/drivers/net/bnxt/tf_core/tf_em_common.c +++ b/drivers/net/bnxt/tf_core/tf_em_common.c @@ -26,11 +26,6 @@ /* Number of pointers per page_size */ #define MAX_PAGE_PTRS(page_size) ((page_size) / sizeof(void *)) -/** - * Init flag, set on bind and cleared on unbind - */ -static uint8_t init; - /** * Host or system */ @@ -924,18 +919,11 @@ tf_em_ext_common_bind(struct tf *tfp, int rc; int i; struct tf_rm_create_db_parms db_cfg = { 0 }; - uint8_t db_exists = 0; struct em_ext_db *ext_db; struct tfp_calloc_parms cparms; TF_CHECK_PARMS2(tfp, parms); - if (init) { - TFP_DRV_LOG(ERR, - "EM Ext DB already initialized\n"); - return -EINVAL; - } - cparms.nitems = 1; cparms.size = sizeof(struct em_ext_db); cparms.alignment = 0; @@ -974,12 +962,8 @@ tf_em_ext_common_bind(struct tf *tfp, return rc; } - db_exists = 1; } - if (db_exists) - init = 1; - mem_type = parms->mem_type; return 0; @@ -1001,13 +985,6 @@ tf_em_ext_common_unbind(struct tf *tfp) TF_CHECK_PARMS1(tfp); - /* Bail if nothing has been initialized */ - if (!init) { - TFP_DRV_LOG(INFO, - "No EM Ext DBs created\n"); - return 0; - } - rc = tf_session_get_session_internal(tfp, &tfs); if (rc) { TFP_DRV_LOG(ERR, "Failed to get tf_session, rc:%s\n", @@ -1064,8 +1041,6 @@ tf_em_ext_common_unbind(struct tf *tfp) tfp_free(ext_db); tf_session_set_em_ext_db(tfp, NULL); - init = 0; - return 0; } diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index 5a100ef1de..e373a9b029 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -20,11 +20,6 @@ #define TF_EM_DB_EM_REC 0 -/** - * Init flag, set on bind and cleared on unbind - */ -static uint8_t init; - /** * EM Pool */ @@ -234,19 +229,18 @@ tf_em_int_bind(struct tf *tfp, int rc; int i; struct tf_rm_create_db_parms db_cfg = { 0 }; - uint8_t db_exists = 0; struct tf_rm_get_alloc_info_parms iparms; struct tf_rm_alloc_info info; struct em_rm_db *em_db; struct tfp_calloc_parms cparms; + struct tf_session *tfs; TF_CHECK_PARMS2(tfp, parms); - if (init) { - TFP_DRV_LOG(ERR, - "EM Int DB already initialized\n"); - return -EINVAL; - } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; memset(&db_cfg, 0, sizeof(db_cfg)); cparms.nitems = 1; @@ -290,8 +284,11 @@ tf_em_int_bind(struct tf *tfp, } db_cfg.rm_db = (void *)&em_db->em_db[i]; - - rc = tf_rm_create_db(tfp, &db_cfg); + if (tf_session_is_shared_session(tfs) && + (!tf_session_is_shared_session_creator(tfs))) + rc = tf_rm_create_db_no_reservation(tfp, &db_cfg); + else + rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, "%s: EM Int DB creation failed\n", @@ -299,34 +296,31 @@ tf_em_int_bind(struct tf *tfp, return rc; } - db_exists = 1; } - if (db_exists) - init = 1; - - for (i = 0; i < TF_DIR_MAX; i++) { - iparms.rm_db = em_db->em_db[i]; - iparms.subtype = TF_EM_DB_EM_REC; - iparms.info = &info; + if (!tf_session_is_shared_session(tfs)) { + for (i = 0; i < TF_DIR_MAX; i++) { + iparms.rm_db = em_db->em_db[i]; + iparms.subtype = TF_EM_DB_EM_REC; + iparms.info = &info; + + rc = tf_rm_get_info(&iparms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: EM DB get info failed\n", + tf_dir_2_str(i)); + return rc; + } - rc = tf_rm_get_info(&iparms); - if (rc) { - TFP_DRV_LOG(ERR, - "%s: EM DB get info failed\n", - tf_dir_2_str(i)); - return rc; + rc = tf_create_em_pool(i, + iparms.info->entry.stride, + iparms.info->entry.start); + /* Logging handled in tf_create_em_pool */ + if (rc) + return rc; } - - rc = tf_create_em_pool(i, - iparms.info->entry.stride, - iparms.info->entry.start); - /* Logging handled in tf_create_em_pool */ - if (rc) - return rc; } - return 0; } @@ -338,18 +332,19 @@ tf_em_int_unbind(struct tf *tfp) struct tf_rm_free_db_parms fparms = { 0 }; struct em_rm_db *em_db; void *em_db_ptr = NULL; + struct tf_session *tfs; TF_CHECK_PARMS1(tfp); - /* Bail if nothing has been initialized */ - if (!init) { - TFP_DRV_LOG(INFO, - "No EM Int DBs created\n"); - return 0; - } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; - for (i = 0; i < TF_DIR_MAX; i++) - tf_free_em_pool(i); + if (!tf_session_is_shared_session(tfs)) { + for (i = 0; i < TF_DIR_MAX; i++) + tf_free_em_pool(i); + } rc = tf_session_get_db(tfp, TF_MODULE_TYPE_EM, &em_db_ptr); if (rc) { @@ -372,7 +367,42 @@ tf_em_int_unbind(struct tf *tfp) em_db->em_db[i] = NULL; } - init = 0; + return 0; +} + +int +tf_em_get_resc_info(struct tf *tfp, + struct tf_em_resource_info *em) +{ + int rc; + int d; + struct tf_resource_info *dinfo; + struct tf_rm_get_alloc_info_parms ainfo; + void *em_db_ptr = NULL; + struct em_rm_db *em_db; + + TF_CHECK_PARMS2(tfp, em); + + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_EM, &em_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + em_db = (struct em_rm_db *)em_db_ptr; + + /* check if reserved resource for WC is multiple of num_slices */ + for (d = 0; d < TF_DIR_MAX; d++) { + ainfo.rm_db = em_db->em_db[d]; + dinfo = em[d].info; + + ainfo.info = (struct tf_rm_alloc_info *)dinfo; + ainfo.subtype = 0; + rc = tf_rm_get_all_info(&ainfo, TF_EM_TBL_TYPE_MAX); + if (rc && rc != -ENOTSUP) + return rc; + } return 0; } diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c index ee68b6ca58..4063f3ba17 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.c +++ b/drivers/net/bnxt/tf_core/tf_identifier.c @@ -15,11 +15,6 @@ struct tf; -/** - * Init flag, set on bind and cleared on unbind - */ -static uint8_t init; - /** * Identifier shadow DBs. */ @@ -41,14 +36,14 @@ tf_ident_bind(struct tf *tfp, struct tf_shadow_ident_create_db_parms shadow_cdb = { 0 }; struct ident_rm_db *ident_db; struct tfp_calloc_parms cparms; + struct tf_session *tfs; TF_CHECK_PARMS2(tfp, parms); - if (init) { - TFP_DRV_LOG(ERR, - "Identifier DB already initialized\n"); - return -EINVAL; - } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; memset(&db_cfg, 0, sizeof(db_cfg)); cparms.nitems = 1; @@ -73,7 +68,11 @@ tf_ident_bind(struct tf *tfp, db_cfg.rm_db = (void *)&ident_db->ident_db[i]; db_cfg.dir = i; db_cfg.alloc_cnt = parms->resources->ident_cnt[i].cnt; - rc = tf_rm_create_db(tfp, &db_cfg); + if (tf_session_is_shared_session(tfs) && + (!tf_session_is_shared_session_creator(tfs))) + rc = tf_rm_create_db_no_reservation(tfp, &db_cfg); + else + rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, "%s: Identifier DB creation failed\n", @@ -100,8 +99,6 @@ tf_ident_bind(struct tf *tfp, } } - init = 1; - TFP_DRV_LOG(INFO, "Identifier - initialized\n"); @@ -120,13 +117,6 @@ tf_ident_unbind(struct tf *tfp) TF_CHECK_PARMS1(tfp); - /* Bail if nothing has been initialized */ - if (!init) { - TFP_DRV_LOG(INFO, - "No Identifier DBs created\n"); - return 0; - } - rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); if (rc) { TFP_DRV_LOG(ERR, @@ -158,7 +148,6 @@ tf_ident_unbind(struct tf *tfp) ident_db->ident_db[i] = NULL; } - init = 0; shadow_init = 0; return 0; @@ -178,13 +167,6 @@ tf_ident_alloc(struct tf *tfp __rte_unused, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No Identifier DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); if (rc) { TFP_DRV_LOG(ERR, @@ -242,13 +224,6 @@ tf_ident_free(struct tf *tfp __rte_unused, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No Identifier DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); if (rc) { TFP_DRV_LOG(ERR, @@ -329,13 +304,6 @@ tf_ident_search(struct tf *tfp __rte_unused, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No Identifier DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - if (!shadow_init) { TFP_DRV_LOG(ERR, "%s: Identifier Shadow copy is not enabled\n", @@ -388,3 +356,40 @@ tf_ident_search(struct tf *tfp __rte_unused, return 0; } + +int +tf_ident_get_resc_info(struct tf *tfp, + struct tf_identifier_resource_info *ident) +{ + int rc; + int d; + struct tf_resource_info *dinfo; + struct tf_rm_get_alloc_info_parms ainfo; + void *ident_db_ptr = NULL; + struct ident_rm_db *ident_db; + + TF_CHECK_PARMS2(tfp, ident); + + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get ident_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + ident_db = (struct ident_rm_db *)ident_db_ptr; + + /* check if reserved resource for WC is multiple of num_slices */ + for (d = 0; d < TF_DIR_MAX; d++) { + ainfo.rm_db = ident_db->ident_db[d]; + dinfo = ident[d].info; + + ainfo.info = (struct tf_rm_alloc_info *)dinfo; + ainfo.subtype = 0; + rc = tf_rm_get_all_info(&ainfo, TF_IDENT_TYPE_MAX); + if (rc) + return rc; + } + + return 0; +} diff --git a/drivers/net/bnxt/tf_core/tf_identifier.h b/drivers/net/bnxt/tf_core/tf_identifier.h index 54cecbfd4c..55c093802e 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.h +++ b/drivers/net/bnxt/tf_core/tf_identifier.h @@ -201,4 +201,20 @@ int tf_ident_free(struct tf *tfp, int tf_ident_search(struct tf *tfp, struct tf_ident_search_parms *parms); +/** + * Retrieves the allocated resource info + * + * [in] tfp + * Pointer to TF handle, used for HCAPI communication + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_ident_get_resc_info(struct tf *tfp, + struct tf_identifier_resource_info *parms); + #endif /* _TF_IDENTIFIER_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index c6eb94bee0..4a840f3473 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -114,11 +114,12 @@ tf_msg_free_dma_buf(struct tf_msg_dma_buf *buf) /* HWRM Direct messages */ int -tf_msg_session_open(struct tf *tfp, +tf_msg_session_open(struct bnxt *bp, char *ctrl_chan_name, uint8_t *fw_session_id, uint8_t *fw_session_client_id, - struct tf_dev_info *dev) + struct tf_dev_info *dev, + bool *shared_session_creator) { int rc; struct hwrm_tf_session_open_input req = { 0 }; @@ -135,7 +136,7 @@ tf_msg_session_open(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(bp, &parms); if (rc) return rc; @@ -143,6 +144,8 @@ tf_msg_session_open(struct tf *tfp, *fw_session_id = (uint8_t)tfp_le_to_cpu_32(resp.fw_session_id); *fw_session_client_id = (uint8_t)tfp_le_to_cpu_32(resp.fw_session_client_id); + *shared_session_creator = (bool)tfp_le_to_cpu_32(resp.flags + & HWRM_TF_SESSION_OPEN_OUTPUT_FLAGS_SHARED_SESSION_CREATOR); return rc; } @@ -198,7 +201,7 @@ tf_msg_session_client_register(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -249,7 +252,7 @@ tf_msg_session_client_unregister(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; @@ -293,7 +296,7 @@ tf_msg_session_close(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; } @@ -345,7 +348,7 @@ tf_msg_session_qcfg(struct tf *tfp) parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; } @@ -367,6 +370,16 @@ tf_msg_session_resc_qcaps(struct tf *tfp, struct tf_msg_dma_buf qcaps_buf = { 0 }; struct tf_rm_resc_req_entry *data; int dma_size; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } TF_CHECK_PARMS3(tfp, query, resv_strategy); @@ -398,7 +411,7 @@ tf_msg_session_resc_qcaps(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) goto cleanup; @@ -416,6 +429,7 @@ tf_msg_session_resc_qcaps(struct tf *tfp, /* Post process the response */ data = (struct tf_rm_resc_req_entry *)qcaps_buf.va_addr; + for (i = 0; i < size; i++) { query[i].type = tfp_le_to_cpu_32(data[i].type); query[i].min = tfp_le_to_cpu_16(data[i].min); @@ -450,6 +464,16 @@ tf_msg_session_resc_alloc(struct tf *tfp, struct tf_rm_resc_req_entry *req_data; struct tf_rm_resc_entry *resv_data; int dma_size; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } TF_CHECK_PARMS3(tfp, request, resv); @@ -497,7 +521,114 @@ tf_msg_session_resc_alloc(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + if (rc) + goto cleanup; + + /* Process the response + * Should always get expected number of entries + */ + if (tfp_le_to_cpu_32(resp.size) != size) { + TFP_DRV_LOG(ERR, + "%s: Alloc message size error, rc:%s\n", + tf_dir_2_str(dir), + strerror(EINVAL)); + rc = -EINVAL; + goto cleanup; + } + + /* Post process the response */ + resv_data = (struct tf_rm_resc_entry *)resv_buf.va_addr; + for (i = 0; i < size; i++) { + resv[i].type = tfp_le_to_cpu_32(resv_data[i].type); + resv[i].start = tfp_le_to_cpu_16(resv_data[i].start); + resv[i].stride = tfp_le_to_cpu_16(resv_data[i].stride); + } + +cleanup: + tf_msg_free_dma_buf(&req_buf); + tf_msg_free_dma_buf(&resv_buf); + + return rc; +} + +int +tf_msg_session_resc_info(struct tf *tfp, + struct tf_dev_info *dev, + enum tf_dir dir, + uint16_t size, + struct tf_rm_resc_req_entry *request, + struct tf_rm_resc_entry *resv) +{ + int rc; + int i; + struct tfp_send_msg_parms parms = { 0 }; + struct hwrm_tf_session_resc_info_input req = { 0 }; + struct hwrm_tf_session_resc_info_output resp = { 0 }; + uint8_t fw_session_id; + struct tf_msg_dma_buf req_buf = { 0 }; + struct tf_msg_dma_buf resv_buf = { 0 }; + struct tf_rm_resc_req_entry *req_data; + struct tf_rm_resc_entry *resv_data; + int dma_size; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } + + TF_CHECK_PARMS3(tfp, request, resv); + + rc = tf_session_get_fw_session_id(tfp, &fw_session_id); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Unable to lookup FW id, rc:%s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + /* Prepare DMA buffers */ + dma_size = size * sizeof(struct tf_rm_resc_req_entry); + rc = tf_msg_alloc_dma_buf(&req_buf, dma_size); + if (rc) + return rc; + + dma_size = size * sizeof(struct tf_rm_resc_entry); + rc = tf_msg_alloc_dma_buf(&resv_buf, dma_size); + if (rc) { + tf_msg_free_dma_buf(&req_buf); + return rc; + } + + /* Populate the request */ + req.fw_session_id = tfp_cpu_to_le_32(fw_session_id); + req.flags = tfp_cpu_to_le_16(dir); + req.req_size = size; + + req_data = (struct tf_rm_resc_req_entry *)req_buf.va_addr; + for (i = 0; i < size; i++) { + req_data[i].type = tfp_cpu_to_le_32(request[i].type); + req_data[i].min = tfp_cpu_to_le_16(request[i].min); + req_data[i].max = tfp_cpu_to_le_16(request[i].max); + } + + req.req_addr = tfp_cpu_to_le_64(req_buf.pa_addr); + req.resc_addr = tfp_cpu_to_le_64(resv_buf.pa_addr); + + parms.tf_type = HWRM_TF_SESSION_RESC_INFO; + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = dev->ops->tf_dev_get_mailbox(); + + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) goto cleanup; @@ -604,7 +735,7 @@ tf_msg_session_resc_flush(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); tf_msg_free_dma_buf(&resv_buf); @@ -698,7 +829,7 @@ tf_msg_insert_em_internal_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -793,7 +924,7 @@ tf_msg_hash_insert_em_internal_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -863,7 +994,7 @@ tf_msg_delete_em_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -919,7 +1050,7 @@ int tf_msg_ext_em_ctxt_mem_alloc(struct tf *tfp, parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) { TFP_DRV_LOG(ERR, "Failed ext_em_alloc error rc:%s\n", strerror(-rc)); @@ -979,7 +1110,7 @@ int tf_msg_ext_em_ctxt_mem_free(struct tf *tfp, parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; } @@ -1030,7 +1161,7 @@ tf_msg_em_mem_rgtr(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -1082,7 +1213,7 @@ tf_msg_em_mem_unrgtr(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; } @@ -1134,7 +1265,7 @@ tf_msg_em_qcaps(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -1209,7 +1340,7 @@ tf_msg_em_cfg(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; } @@ -1283,7 +1414,7 @@ tf_msg_ext_em_cfg(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; } @@ -1333,7 +1464,7 @@ tf_msg_em_op(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; } @@ -1351,6 +1482,16 @@ tf_msg_tcam_entry_set(struct tf *tfp, uint8_t *data = NULL; int data_size = 0; uint8_t fw_session_id; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -1401,7 +1542,7 @@ tf_msg_tcam_entry_set(struct tf *tfp, mparms.resp_size = sizeof(resp); mparms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &mparms); cleanup: @@ -1420,6 +1561,16 @@ tf_msg_tcam_entry_get(struct tf *tfp, struct hwrm_tf_tcam_get_input req = { 0 }; struct hwrm_tf_tcam_get_output resp = { 0 }; uint8_t fw_session_id; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -1444,7 +1595,7 @@ tf_msg_tcam_entry_get(struct tf *tfp, mparms.resp_size = sizeof(resp); mparms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &mparms); if (rc != 0) @@ -1480,6 +1631,16 @@ tf_msg_tcam_entry_free(struct tf *tfp, struct hwrm_tf_tcam_free_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; uint8_t fw_session_id; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to lookup session, rc:%s\n", + strerror(-rc)); + return rc; + } rc = tf_session_get_fw_session_id(tfp, &fw_session_id); if (rc) { @@ -1505,7 +1666,7 @@ tf_msg_tcam_entry_free(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); return rc; } @@ -1586,7 +1747,7 @@ tf_msg_set_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -1652,7 +1813,7 @@ tf_msg_get_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -1738,7 +1899,7 @@ tf_msg_get_global_cfg(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc != 0) return rc; @@ -1839,7 +2000,7 @@ tf_msg_set_global_cfg(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc != 0) return rc; @@ -1912,7 +2073,7 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc) return rc; @@ -1975,7 +2136,7 @@ tf_msg_get_if_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc != 0) return rc; @@ -2032,7 +2193,7 @@ tf_msg_set_if_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tfp, &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); if (rc != 0) return rc; diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h index 7b4a6a3d92..5ecaf9e7e7 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.h +++ b/drivers/net/bnxt/tf_core/tf_msg.h @@ -14,6 +14,7 @@ #include "tf_rm.h" #include "tf_tcam.h" #include "tf_global_cfg.h" +#include "bnxt.h" struct tf; @@ -22,8 +23,8 @@ struct tf; /** * Sends session open request to Firmware * - * [in] session - * Pointer to session handle + * [in] bp + * Pointer to bnxt handle * * [in] ctrl_chan_name * PCI name of the control channel @@ -31,14 +32,24 @@ struct tf; * [in/out] fw_session_id * Pointer to the fw_session_id that is allocated on firmware side * + * [in/out] fw_session_client_id + * Pointer to the fw_session_client_id that is allocated on firmware side + * + * [in/out] dev + * Pointer to the associated device + * + * [out] shared_session_creator + * Pointer to the shared_session_creator + * * Returns: * 0 on Success else internal Truflow error */ -int tf_msg_session_open(struct tf *tfp, +int tf_msg_session_open(struct bnxt *bp, char *ctrl_chan_name, uint8_t *fw_session_id, uint8_t *fw_session_client_id, - struct tf_dev_info *dev); + struct tf_dev_info *dev, + bool *shared_session_creator); /** * Sends session close request to Firmware @@ -178,6 +189,34 @@ int tf_msg_session_resc_alloc(struct tf *tfp, struct tf_rm_resc_req_entry *request, struct tf_rm_resc_entry *resv); +/** + * Sends session HW resource allocation request to TF Firmware + * + * [in] tfp + * Pointer to TF handle + * + * [in] dir + * Receive or Transmit direction + * + * [in] size + * Number of elements in the req and resv arrays + * + * [in] req + * Pointer to an array of request elements + * + * [in] resv + * Pointer to an array of reserved elements + * + * Returns: + * 0 on Success else internal Truflow error + */ +int tf_msg_session_resc_info(struct tf *tfp, + struct tf_dev_info *dev, + enum tf_dir dir, + uint16_t size, + struct tf_rm_resc_req_entry *request, + struct tf_rm_resc_entry *resv); + /** * Sends session resource flush request to TF Firmware * diff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c index 50f6b1eeab..f44b5b1ab6 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.c +++ b/drivers/net/bnxt/tf_core/tf_rm.c @@ -702,7 +702,9 @@ tf_rm_create_db(struct tf *tfp, } db[i].pool = (struct bitalloc *)cparms.mem_va; - rc = ba_init(db[i].pool, resv[j].stride); + rc = ba_init(db[i].pool, + resv[j].stride, + !tf_session_is_shared_session(tfs)); if (rc) { TFP_DRV_LOG(ERR, "%s: Pool init failed, type:%d:%s\n", @@ -746,6 +748,249 @@ tf_rm_create_db(struct tf *tfp, return -EINVAL; } +int +tf_rm_create_db_no_reservation(struct tf *tfp, + struct tf_rm_create_db_parms *parms) +{ + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + int i, j; + uint16_t hcapi_items, *req_cnt; + struct tfp_calloc_parms cparms; + struct tf_rm_resc_req_entry *req; + struct tf_rm_resc_entry *resv; + struct tf_rm_new_db *rm_db; + struct tf_rm_element *db; + uint32_t pool_size; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + /* Copy requested counts (alloc_cnt) from tf_open_session() to local + * copy (req_cnt) so that it can be updated if required. + */ + + cparms.nitems = parms->num_elements; + cparms.size = sizeof(uint16_t); + cparms.alignment = 0; + rc = tfp_calloc(&cparms); + if (rc) + return rc; + + req_cnt = (uint16_t *)cparms.mem_va; + + tfp_memcpy(req_cnt, parms->alloc_cnt, + parms->num_elements * sizeof(uint16_t)); + + /* Process capabilities against DB requirements. However, as a + * DB can hold elements that are not HCAPI we can reduce the + * req msg content by removing those out of the request yet + * the DB holds them all as to give a fast lookup. We can also + * remove entries where there are no request for elements. + */ + tf_rm_count_hcapi_reservations(parms->dir, + parms->module, + parms->cfg, + req_cnt, + parms->num_elements, + &hcapi_items); + + if (hcapi_items == 0) { + TFP_DRV_LOG(ERR, + "%s: module:%s Empty RM DB create request\n", + tf_dir_2_str(parms->dir), + tf_module_2_str(parms->module)); + + parms->rm_db = NULL; + return -ENOMEM; + } + + /* Alloc request, alignment already set */ + cparms.nitems = (size_t)hcapi_items; + cparms.size = sizeof(struct tf_rm_resc_req_entry); + rc = tfp_calloc(&cparms); + if (rc) + return rc; + req = (struct tf_rm_resc_req_entry *)cparms.mem_va; + + /* Alloc reservation, alignment and nitems already set */ + cparms.size = sizeof(struct tf_rm_resc_entry); + rc = tfp_calloc(&cparms); + if (rc) + return rc; + resv = (struct tf_rm_resc_entry *)cparms.mem_va; + + /* Build the request */ + for (i = 0, j = 0; i < parms->num_elements; i++) { + struct tf_rm_element_cfg *cfg = &parms->cfg[i]; + uint16_t hcapi_type = cfg->hcapi_type; + + /* Only perform reservation for requested entries + */ + if (req_cnt[i] == 0) + continue; + + /* Skip any children in the request */ + if (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI || + cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA || + cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) { + req[j].type = hcapi_type; + req[j].min = req_cnt[i]; + req[j].max = req_cnt[i]; + j++; + } + } + + /* Get all resources info for the module type + */ + rc = tf_msg_session_resc_info(tfp, + dev, + parms->dir, + hcapi_items, + req, + resv); + if (rc) + return rc; + + /* Build the RM DB per the request */ + cparms.nitems = 1; + cparms.size = sizeof(struct tf_rm_new_db); + rc = tfp_calloc(&cparms); + if (rc) + return rc; + rm_db = (void *)cparms.mem_va; + + /* Build the DB within RM DB */ + cparms.nitems = parms->num_elements; + cparms.size = sizeof(struct tf_rm_element); + rc = tfp_calloc(&cparms); + if (rc) + return rc; + rm_db->db = (struct tf_rm_element *)cparms.mem_va; + + db = rm_db->db; + for (i = 0, j = 0; i < parms->num_elements; i++) { + struct tf_rm_element_cfg *cfg = &parms->cfg[i]; + const char *type_str; + + dev->ops->tf_dev_get_resource_str(tfp, + cfg->hcapi_type, + &type_str); + + db[i].cfg_type = cfg->cfg_type; + db[i].hcapi_type = cfg->hcapi_type; + + /* Save the parent subtype for later use to find the pool + */ + if (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_CHILD) + db[i].parent_subtype = cfg->parent_subtype; + + /* If the element didn't request an allocation no need + * to create a pool nor verify if we got a reservation. + */ + if (req_cnt[i] == 0) + continue; + + /* Skip any children or invalid + */ + if (cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI && + cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI_BA && + cfg->cfg_type != TF_RM_ELEM_CFG_HCAPI_BA_PARENT) + continue; + + /* If the element had requested an allocation and that + * allocation was a success (full amount) then + * allocate the pool. + */ + if (req_cnt[i] == resv[j].stride) { + db[i].alloc.entry.start = resv[j].start; + db[i].alloc.entry.stride = resv[j].stride; + + /* Only allocate BA pool if a BA type not a child */ + if (cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA || + cfg->cfg_type == TF_RM_ELEM_CFG_HCAPI_BA_PARENT) { + if (cfg->divider) { + resv[j].stride = + resv[j].stride / cfg->divider; + if (resv[j].stride <= 0) { + TFP_DRV_LOG(ERR, + "%s:Divide fails:%d:%s\n", + tf_dir_2_str(parms->dir), + cfg->hcapi_type, type_str); + goto fail; + } + } + /* Create pool */ + pool_size = (BITALLOC_SIZEOF(resv[j].stride) / + sizeof(struct bitalloc)); + /* Alloc request, alignment already set */ + cparms.nitems = pool_size; + cparms.size = sizeof(struct bitalloc); + rc = tfp_calloc(&cparms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Pool alloc failed, type:%d:%s\n", + tf_dir_2_str(parms->dir), + cfg->hcapi_type, type_str); + goto fail; + } + db[i].pool = (struct bitalloc *)cparms.mem_va; + + rc = ba_init(db[i].pool, + resv[j].stride, + !tf_session_is_shared_session(tfs)); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Pool init failed, type:%d:%s\n", + tf_dir_2_str(parms->dir), + cfg->hcapi_type, type_str); + goto fail; + } + } + j++; + } else { + /* Bail out as we want what we requested for + * all elements, not any less. + */ + TFP_DRV_LOG(ERR, + "%s: Alloc failed %d:%s req:%d, alloc:%d\n", + tf_dir_2_str(parms->dir), cfg->hcapi_type, + type_str, req_cnt[i], resv[j].stride); + goto fail; + } + } + + rm_db->num_entries = parms->num_elements; + rm_db->dir = parms->dir; + rm_db->module = parms->module; + *parms->rm_db = (void *)rm_db; + + tfp_free((void *)req); + tfp_free((void *)resv); + tfp_free((void *)req_cnt); + return 0; + + fail: + tfp_free((void *)req); + tfp_free((void *)resv); + tfp_free((void *)db->pool); + tfp_free((void *)db); + tfp_free((void *)rm_db); + tfp_free((void *)req_cnt); + parms->rm_db = NULL; + + return -EINVAL; +} int tf_rm_free_db(struct tf *tfp, struct tf_rm_free_db_parms *parms) @@ -1043,6 +1288,36 @@ tf_rm_get_info(struct tf_rm_get_alloc_info_parms *parms) return 0; } +int +tf_rm_get_all_info(struct tf_rm_get_alloc_info_parms *parms, int size) +{ + struct tf_rm_new_db *rm_db; + enum tf_rm_elem_cfg_type cfg_type; + struct tf_rm_alloc_info *info = parms->info; + int i; + + TF_CHECK_PARMS2(parms, parms->rm_db); + rm_db = (struct tf_rm_new_db *)parms->rm_db; + TF_CHECK_PARMS1(rm_db->db); + + for (i = 0; i < size; i++) { + cfg_type = rm_db->db[i].cfg_type; + + /* Bail out if not controlled by HCAPI */ + if (cfg_type == TF_RM_ELEM_CFG_NULL) { + info++; + continue; + } + + memcpy(info, + &rm_db->db[i].alloc, + sizeof(struct tf_rm_alloc_info)); + info++; + } + + return 0; +} + int tf_rm_get_hcapi_type(struct tf_rm_get_hcapi_parms *parms) { diff --git a/drivers/net/bnxt/tf_core/tf_rm.h b/drivers/net/bnxt/tf_core/tf_rm.h index 6eb6865dac..8b984112e8 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.h +++ b/drivers/net/bnxt/tf_core/tf_rm.h @@ -425,6 +425,24 @@ struct tf_rm_check_indexes_in_range_parms { int tf_rm_create_db(struct tf *tfp, struct tf_rm_create_db_parms *parms); +/** + * Creates and fills a Resource Manager (RM) DB with requested + * elements. The DB is indexed per the parms structure. It only retrieve + * allocated resource information for a exist session. + * + * [in] tfp + * Pointer to TF handle, used for HCAPI communication + * + * [in] parms + * Pointer to create parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_rm_create_db_no_reservation(struct tf *tfp, + struct tf_rm_create_db_parms *parms); + /** * Closes the Resource Manager (RM) DB and frees all allocated * resources per the associated database. @@ -498,6 +516,22 @@ int tf_rm_is_allocated(struct tf_rm_is_allocated_parms *parms); */ int tf_rm_get_info(struct tf_rm_get_alloc_info_parms *parms); +/** + * Retrieves all elements allocation information from the Resource + * Manager (RM) DB. + * + * [in] parms + * Pointer to get info parameters + * + * [in] size + * number of the elements for the specific module + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_rm_get_all_info(struct tf_rm_get_alloc_info_parms *parms, int size); + /** * Performs a lookup in the Resource Manager DB and retrieves the * requested HCAPI RM type. diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index f591fbe3f5..391d8786ab 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -11,6 +11,7 @@ #include "tf_common.h" #include "tf_msg.h" #include "tfp.h" +#include "bnxt.h" struct tf_session_client_create_parms { /** @@ -57,6 +58,7 @@ tf_session_create(struct tf *tfp, uint8_t fw_session_client_id; union tf_session_id *session_id; struct tf_dev_info dev; + bool shared_session_creator; TF_CHECK_PARMS2(tfp, parms); @@ -64,11 +66,12 @@ tf_session_create(struct tf *tfp, &dev); /* Open FW session and get a new session_id */ - rc = tf_msg_session_open(tfp, + rc = tf_msg_session_open(parms->open_cfg->bp, parms->open_cfg->ctrl_chan_name, &fw_session_id, &fw_session_client_id, - &dev); + &dev, + &shared_session_creator); if (rc) { /* Log error */ if (rc == -EEXIST) @@ -137,6 +140,7 @@ tf_session_create(struct tf *tfp, session_id->id = session->session_id.id; session->shadow_copy = parms->open_cfg->shadow_copy; + session->bp = parms->open_cfg->bp; /* Init session client list */ ll_init(&session->client_ll); @@ -175,12 +179,20 @@ tf_session_create(struct tf *tfp, /* Init session em_ext_db */ session->em_ext_db_handle = NULL; + if (!strcmp(parms->open_cfg->ctrl_chan_name, "tf_share")) + session->shared_session = true; + + if (session->shared_session && shared_session_creator) { + session->shared_session_creator = true; + parms->open_cfg->shared_session_creator = true; + } rc = tf_dev_bind(tfp, parms->open_cfg->device_type, session->shadow_copy, &parms->open_cfg->resources, &session->dev); + /* Logging handled by dev_bind */ if (rc) goto cleanup; @@ -857,16 +869,29 @@ tf_session_get_db(struct tf *tfp, switch (type) { case TF_MODULE_TYPE_IDENTIFIER: - *db_handle = tfs->id_db_handle; + if (tfs->id_db_handle) + *db_handle = tfs->id_db_handle; + else + rc = -EINVAL; break; case TF_MODULE_TYPE_TABLE: - *db_handle = tfs->tbl_db_handle; + if (tfs->tbl_db_handle) + *db_handle = tfs->tbl_db_handle; + else + rc = -EINVAL; + break; case TF_MODULE_TYPE_TCAM: - *db_handle = tfs->tcam_db_handle; + if (tfs->tcam_db_handle) + *db_handle = tfs->tcam_db_handle; + else + rc = -EINVAL; break; case TF_MODULE_TYPE_EM: - *db_handle = tfs->em_db_handle; + if (tfs->em_db_handle) + *db_handle = tfs->em_db_handle; + else + rc = -EINVAL; break; default: rc = -EINVAL; diff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h index e5c7a07daf..0b8f63c374 100644 --- a/drivers/net/bnxt/tf_core/tf_session.h +++ b/drivers/net/bnxt/tf_core/tf_session.h @@ -70,6 +70,23 @@ struct tf_session { */ union tf_session_id session_id; + /** + * Boolean controlling the use and availability of shared session. + * Shared session will allow the application to share resources + * on the firmware side without having to allocate them on firmware. + * Additional private session core_data will be allocated if this + * boolean is set to 'true', default 'false'. + * + */ + bool shared_session; + + /** + * This flag indicates the shared session on firmware side is created + * by this session. Some privileges may be assigned to this session. + * + */ + bool shared_session_creator; + /** * Boolean controlling the use and availability of shadow * copy. Shadow copy will allow the TruFlow Core to keep track @@ -137,6 +154,11 @@ struct tf_session { * em db reference for the session */ void *em_db_handle; + + /** + * the pointer to the parent bp struct + */ + void *bp; }; /** @@ -500,4 +522,48 @@ int tf_session_set_db(struct tf *tfp, enum tf_module_type type, void *db_handle); + +/** + * Check if the session is shared session. + * + * [in] session, pointer to the session + * + * Returns: + * - true if it is shared session + * - false if it is not shared session + */ +static inline bool +tf_session_is_shared_session(struct tf_session *tfs) +{ + return tfs->shared_session; +} + +/** + * Check if the session is the shared session creator + * + * [in] session, pointer to the session + * + * Returns: + * - true if it is the shared session creator + * - false if it is not the shared session creator + */ +static inline bool +tf_session_is_shared_session_creator(struct tf_session *tfs) +{ + return tfs->shared_session_creator; +} + +/** + * Get the pointer to the parent bnxt struct + * + * [in] session, pointer to the session + * + * Returns: + * - the pointer to the parent bnxt struct + */ +static inline struct bnxt* +tf_session_get_bp(struct tf_session *tfs) +{ + return tfs->bp; +} #endif /* _TF_SESSION_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index 2d0dda18c9..17fb550917 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -31,11 +31,6 @@ struct tf; */ static void *shadow_tbl_db[TF_DIR_MAX]; -/** - * Init flag, set on bind and cleared on unbind - */ -static uint8_t init; - /** * Shadow init flag, set on bind and cleared on unbind */ @@ -49,14 +44,14 @@ tf_tbl_bind(struct tf *tfp, struct tf_rm_create_db_parms db_cfg = { 0 }; struct tbl_rm_db *tbl_db; struct tfp_calloc_parms cparms; + struct tf_session *tfs; TF_CHECK_PARMS2(tfp, parms); - if (init) { - TFP_DRV_LOG(ERR, - "Table DB already initialized\n"); - return -EINVAL; - } + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; memset(&db_cfg, 0, sizeof(db_cfg)); cparms.nitems = 1; @@ -82,8 +77,11 @@ tf_tbl_bind(struct tf *tfp, db_cfg.dir = d; db_cfg.alloc_cnt = parms->resources->tbl_cnt[d].cnt; db_cfg.rm_db = (void *)&tbl_db->tbl_db[d]; - - rc = tf_rm_create_db(tfp, &db_cfg); + if (tf_session_is_shared_session(tfs) && + (!tf_session_is_shared_session_creator(tfs))) + rc = tf_rm_create_db_no_reservation(tfp, &db_cfg); + else + rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, "%s: Table DB creation failed\n", @@ -92,7 +90,6 @@ tf_tbl_bind(struct tf *tfp, return rc; } } - init = 1; TFP_DRV_LOG(INFO, "Table Type - initialized\n"); @@ -110,13 +107,6 @@ tf_tbl_unbind(struct tf *tfp) void *tbl_db_ptr = NULL; TF_CHECK_PARMS1(tfp); - /* Bail if nothing has been initialized */ - if (!init) { - TFP_DRV_LOG(INFO, - "No Table DBs created\n"); - return 0; - } - rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); if (rc) { TFP_DRV_LOG(ERR, @@ -136,7 +126,6 @@ tf_tbl_unbind(struct tf *tfp) tbl_db->tbl_db[i] = NULL; } - init = 0; shadow_init = 0; return 0; @@ -157,13 +146,6 @@ tf_tbl_alloc(struct tf *tfp __rte_unused, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No Table DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -234,12 +216,6 @@ tf_tbl_free(struct tf *tfp __rte_unused, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No Table DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -346,13 +322,6 @@ tf_tbl_set(struct tf *tfp, TF_CHECK_PARMS3(tfp, parms, parms->data); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No Table DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -456,14 +425,6 @@ tf_tbl_get(struct tf *tfp, TF_CHECK_PARMS3(tfp, parms, parms->data); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No Table DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -567,14 +528,6 @@ tf_tbl_bulk_get(struct tf *tfp, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No Table DBs created\n", - tf_dir_2_str(parms->dir)); - - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -662,3 +615,40 @@ tf_tbl_bulk_get(struct tf *tfp, return rc; } + +int +tf_tbl_get_resc_info(struct tf *tfp, + struct tf_tbl_resource_info *tbl) +{ + int rc; + int d; + struct tf_resource_info *dinfo; + struct tf_rm_get_alloc_info_parms ainfo; + void *tbl_db_ptr = NULL; + struct tbl_rm_db *tbl_db; + + TF_CHECK_PARMS2(tfp, tbl); + + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tbl_db = (struct tbl_rm_db *)tbl_db_ptr; + + /* check if reserved resource for WC is multiple of num_slices */ + for (d = 0; d < TF_DIR_MAX; d++) { + ainfo.rm_db = tbl_db->tbl_db[d]; + dinfo = tbl[d].info; + + ainfo.info = (struct tf_rm_alloc_info *)dinfo; + ainfo.subtype = 0; + rc = tf_rm_get_all_info(&ainfo, TF_TBL_TYPE_MAX); + if (rc) + return rc; + } + + return 0; +} diff --git a/drivers/net/bnxt/tf_core/tf_tbl.h b/drivers/net/bnxt/tf_core/tf_tbl.h index 83b72d1b3f..aba46fd161 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.h +++ b/drivers/net/bnxt/tf_core/tf_tbl.h @@ -396,4 +396,21 @@ int tf_tbl_get(struct tf *tfp, int tf_tbl_bulk_get(struct tf *tfp, struct tf_tbl_get_bulk_parms *parms); +/** + * Retrieves the allocated resource info + * + * [in] tfp + * Pointer to TF handle, used for HCAPI communication + * + * [in] parms + * Pointer to Table resource info parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int +tf_tbl_get_resc_info(struct tf *tfp, + struct tf_tbl_resource_info *tbl); + #endif /* TF_TBL_TYPE_H */ diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index c2eef26dbb..70dc539f15 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -23,11 +23,6 @@ struct tf; */ static void *shadow_tcam_db[TF_DIR_MAX]; -/** - * Init flag, set on bind and cleared on unbind - */ -static uint8_t init; - /** * Shadow init flag, set on bind and cleared on unbind */ @@ -55,12 +50,6 @@ tf_tcam_bind(struct tf *tfp, TF_CHECK_PARMS2(tfp, parms); - if (init) { - TFP_DRV_LOG(ERR, - "TCAM DB already initialized\n"); - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -118,7 +107,11 @@ tf_tcam_bind(struct tf *tfp, db_cfg.dir = d; db_cfg.alloc_cnt = parms->resources->tcam_cnt[d].cnt; db_cfg.rm_db = (void *)&tcam_db->tcam_db[d]; - rc = tf_rm_create_db(tfp, &db_cfg); + if (tf_session_is_shared_session(tfs) && + (!tf_session_is_shared_session_creator(tfs))) + rc = tf_rm_create_db_no_reservation(tfp, &db_cfg); + else + rc = tf_rm_create_db(tfp, &db_cfg); if (rc) { TFP_DRV_LOG(ERR, "%s: TCAM DB creation failed\n", @@ -143,7 +136,8 @@ tf_tcam_bind(struct tf *tfp, "%s: TCAM reserved resource is not multiple of %d\n", tf_dir_2_str(d), num_slices); - return -EINVAL; + rc = -EINVAL; + goto error; } } @@ -186,8 +180,6 @@ tf_tcam_bind(struct tf *tfp, shadow_init = 1; } - init = 1; - TFP_DRV_LOG(INFO, "TCAM - initialized\n"); @@ -211,7 +203,6 @@ tf_tcam_bind(struct tf *tfp, } shadow_init = 0; - init = 0; return rc; } @@ -227,13 +218,6 @@ tf_tcam_unbind(struct tf *tfp) struct tf_shadow_tcam_free_db_parms fshadow; TF_CHECK_PARMS1(tfp); - /* Bail if nothing has been initialized */ - if (!init) { - TFP_DRV_LOG(INFO, - "No TCAM DBs created\n"); - return 0; - } - rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); if (rc) { TFP_DRV_LOG(ERR, @@ -263,7 +247,6 @@ tf_tcam_unbind(struct tf *tfp) } shadow_init = 0; - init = 0; return 0; } @@ -283,13 +266,6 @@ tf_tcam_alloc(struct tf *tfp, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No TCAM DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -372,13 +348,6 @@ tf_tcam_free(struct tf *tfp, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No TCAM DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -529,13 +498,6 @@ tf_tcam_alloc_search(struct tf *tfp, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No TCAM DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - if (!shadow_init || !shadow_tcam_db[parms->dir]) { TFP_DRV_LOG(ERR, "%s: TCAM Shadow not initialized for %s\n", tf_dir_2_str(parms->dir), @@ -660,13 +622,6 @@ tf_tcam_set(struct tf *tfp __rte_unused, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No TCAM DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -781,13 +736,6 @@ tf_tcam_get(struct tf *tfp __rte_unused, TF_CHECK_PARMS2(tfp, parms); - if (!init) { - TFP_DRV_LOG(ERR, - "%s: No TCAM DBs created\n", - tf_dir_2_str(parms->dir)); - return -EINVAL; - } - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) @@ -852,3 +800,40 @@ tf_tcam_get(struct tf *tfp __rte_unused, return 0; } + +int +tf_tcam_get_resc_info(struct tf *tfp, + struct tf_tcam_resource_info *tcam) +{ + int rc; + int d; + struct tf_resource_info *dinfo; + struct tf_rm_get_alloc_info_parms ainfo; + void *tcam_db_ptr = NULL; + struct tcam_rm_db *tcam_db; + + TF_CHECK_PARMS2(tfp, tcam); + + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get em_ext_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; + + /* check if reserved resource for WC is multiple of num_slices */ + for (d = 0; d < TF_DIR_MAX; d++) { + ainfo.rm_db = tcam_db->tcam_db[d]; + dinfo = tcam[d].info; + + ainfo.info = (struct tf_rm_alloc_info *)dinfo; + ainfo.subtype = 0; + rc = tf_rm_get_all_info(&ainfo, TF_TCAM_TBL_TYPE_MAX); + if (rc && rc != -ENOTSUP) + return rc; + } + + return 0; +} diff --git a/drivers/net/bnxt/tf_core/tf_tcam.h b/drivers/net/bnxt/tf_core/tf_tcam.h index acab223532..bed17af6ae 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.h +++ b/drivers/net/bnxt/tf_core/tf_tcam.h @@ -386,4 +386,20 @@ int tf_tcam_set(struct tf *tfp, int tf_tcam_get(struct tf *tfp, struct tf_tcam_get_parms *parms); +/** + * Retrieves the allocated resource info + * + * [in] tfp + * Pointer to TF handle, used for HCAPI communication + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_get_resc_info(struct tf *tfp, + struct tf_tcam_resource_info *parms); + #endif /* _TF_TCAM_H */ diff --git a/drivers/net/bnxt/tf_core/tfp.c b/drivers/net/bnxt/tf_core/tfp.c index 37c49b587d..4d9b37f749 100644 --- a/drivers/net/bnxt/tf_core/tfp.c +++ b/drivers/net/bnxt/tf_core/tfp.c @@ -28,7 +28,7 @@ * Returns success or failure code. */ int -tfp_send_msg_direct(struct tf *tfp, +tfp_send_msg_direct(struct bnxt *bp, struct tfp_send_msg_parms *parms) { int rc = 0; @@ -40,9 +40,7 @@ tfp_send_msg_direct(struct tf *tfp, if (parms->mailbox == TF_CHIMP_MB) use_kong_mb = 0; - rc = bnxt_hwrm_tf_message_direct(container_of(tfp, - struct bnxt, - tfp), + rc = bnxt_hwrm_tf_message_direct(bp, use_kong_mb, parms->tf_type, parms->req_data, diff --git a/drivers/net/bnxt/tf_core/tfp.h b/drivers/net/bnxt/tf_core/tfp.h index bcc56b0a54..58f34bbcab 100644 --- a/drivers/net/bnxt/tf_core/tfp.h +++ b/drivers/net/bnxt/tf_core/tfp.h @@ -15,6 +15,7 @@ #include #include #include +#include /** * DPDK/Driver specific log level for the BNXT Eth driver. @@ -130,7 +131,7 @@ struct tfp_calloc_parms { * -1 - Global error like not supported * -EINVAL - Parameter Error */ -int tfp_send_msg_direct(struct tf *tfp, +int tfp_send_msg_direct(struct bnxt *bp, struct tfp_send_msg_parms *parms); /** From patchwork Sun Jun 13 00:06:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94110 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8965AA0C41; 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Sat, 12 Jun 2021 17:07:18 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Peter Spreadborough , Randy Schacher , Venkat Duvvuru , Farah Smith Date: Sat, 12 Jun 2021 17:06:09 -0700 Message-Id: <20210613000652.28191-16-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 15/58] net/bnxt: add dpool allocator for EM allocation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Peter Spreadborough The dpool allocator supports variable size entries and also supports defragmentation of the allocation space. EM will by default use the fixed size stack allocator. The dynamic allocator may be selected at build time. The dpool allocator supports variable size entries and also supports defragmentation of the allocation space. Signed-off-by: Peter Spreadborough Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/dpool.c | 374 ++++++++++++++++++ drivers/net/bnxt/tf_core/dpool.h | 309 +++++++++++++++ drivers/net/bnxt/tf_core/meson.build | 1 + drivers/net/bnxt/tf_core/tf_core.h | 42 ++ drivers/net/bnxt/tf_core/tf_device.h | 34 ++ drivers/net/bnxt/tf_core/tf_device_p58.c | 5 + drivers/net/bnxt/tf_core/tf_em.h | 26 ++ .../net/bnxt/tf_core/tf_em_hash_internal.c | 102 ++++- drivers/net/bnxt/tf_core/tf_em_internal.c | 215 ++++++++-- drivers/net/bnxt/tf_core/tf_msg.c | 69 ++++ drivers/net/bnxt/tf_core/tf_msg.h | 15 + drivers/net/bnxt/tf_core/tf_session.h | 5 + 12 files changed, 1157 insertions(+), 40 deletions(-) create mode 100644 drivers/net/bnxt/tf_core/dpool.c create mode 100644 drivers/net/bnxt/tf_core/dpool.h diff --git a/drivers/net/bnxt/tf_core/dpool.c b/drivers/net/bnxt/tf_core/dpool.c new file mode 100644 index 0000000000..0dae42b1bb --- /dev/null +++ b/drivers/net/bnxt/tf_core/dpool.c @@ -0,0 +1,374 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2021 Broadcom + * All rights reserved. + */ +#include +#include +#include +#include +#include + +#include + +#include "tfp.h" +#include "dpool.h" + +int dpool_init(struct dpool *dpool, + uint32_t start_index, + uint32_t size, + uint8_t max_alloc_size, + void *user_data, + int (*move_callback)(void *, uint64_t, uint32_t)) +{ + uint32_t i; + int rc; + struct tfp_calloc_parms parms; + + parms.nitems = size; + parms.size = sizeof(struct dpool_entry); + parms.alignment = 0; + + rc = tfp_calloc(&parms); + + if (rc) + return rc; + + dpool->entry = parms.mem_va; + dpool->start_index = start_index; + dpool->size = size; + dpool->max_alloc_size = max_alloc_size; + dpool->user_data = user_data; + dpool->move_callback = move_callback; + /* + * Init entries + */ + for (i = 0; i < size; i++) { + dpool->entry[i].flags = 0; + dpool->entry[i].index = start_index; + dpool->entry[i].entry_data = 0UL; + start_index++; + } + + return 0; +} + +static int dpool_move(struct dpool *dpool, + uint32_t dst_index, + uint32_t src_index) +{ + uint32_t size; + uint32_t i; + if (DP_IS_FREE(dpool->entry[dst_index].flags)) { + size = DP_FLAGS_SIZE(dpool->entry[src_index].flags); + + dpool->entry[dst_index].flags = dpool->entry[src_index].flags; + dpool->entry[dst_index].entry_data = dpool->entry[src_index].entry_data; + + if (dpool->move_callback != NULL) { + dpool->move_callback(dpool->user_data, + dpool->entry[src_index].entry_data, + dst_index + dpool->start_index); + } + + dpool->entry[src_index].flags = 0; + dpool->entry[src_index].entry_data = 0UL; + + for (i = 1; i < size; i++) { + dpool->entry[dst_index + i].flags = size; + dpool->entry[src_index + i].flags = 0; + } + } else { + return -1; + } + + return 0; +} + + +int dpool_defrag(struct dpool *dpool, + uint32_t entry_size, + uint8_t defrag) +{ + struct dpool_free_list *free_list; + struct dpool_adj_list *adj_list; + uint32_t count; + uint32_t index; + uint32_t used; + uint32_t i; + uint32_t size; + uint32_t largest_free_index = 0; + uint32_t largest_free_size; + uint32_t max; + uint32_t max_index; + uint32_t max_size = 0; + int rc; + + free_list = rte_zmalloc("dpool_free_list", + sizeof(struct dpool_free_list), 0); + if (free_list == NULL) { + TFP_DRV_LOG(ERR, "dpool free list allocation failed\n"); + return -ENOMEM; + } + + adj_list = rte_zmalloc("dpool_adjacent_list", + sizeof(struct dpool_adj_list), 0); + if (adj_list == NULL) { + TFP_DRV_LOG(ERR, "dpool adjacent list allocation failed\n"); + return -ENOMEM; + } + + while (1) { + /* + * Create list of free entries + */ + free_list->size = 0; + largest_free_size = 0; + largest_free_index = 0; + count = 0; + + for (i = 0; i < dpool->size; i++) { + if (DP_IS_FREE(dpool->entry[i].flags)) { + if (count == 0) + index = i; + count++; + } else if (count > 0) { + free_list->entry[free_list->size].index = index; + free_list->entry[free_list->size].size = count; + + if (count > largest_free_size) { + largest_free_index = free_list->size; + largest_free_size = count; + } + + free_list->size++; + count = 0; + } + } + + if (free_list->size == 0) + largest_free_size = count; + + /* + * If using defrag to fit and there's a large enough + * space then we are done. + */ + if (defrag == DP_DEFRAG_TO_FIT && + largest_free_size >= entry_size) + goto done; + + /* + * Create list of entries adjacent to free entries + */ + count = 0; + adj_list->size = 0; + used = 0; + + for (i = 0; i < dpool->size; ) { + if (DP_IS_USED(dpool->entry[i].flags)) { + used++; + + if (count > 0) { + adj_list->entry[adj_list->size].index = i; + adj_list->entry[adj_list->size].size = + DP_FLAGS_SIZE(dpool->entry[i].flags); + adj_list->entry[adj_list->size].left = count; + + if (adj_list->size > 0 && used == 1) + adj_list->entry[adj_list->size - 1].right = count; + + adj_list->size++; + } + + count = 0; + i += DP_FLAGS_SIZE(dpool->entry[i].flags); + } else { + used = 0; + count++; + i++; + } + } + + /* + * Using the size of the largest free space available + * select the adjacency list entry of that size with + * the largest left + right + size count. If there + * are no entries of that size then decrement the size + * and try again. + */ + max = 0; + max_index = 0; + max_size = 0; + + for (size = largest_free_size; size > 0; size--) { + for (i = 0; i < adj_list->size; i++) { + if (adj_list->entry[i].size == size && + ((size + + adj_list->entry[i].left + + adj_list->entry[i].right) > max)) { + max = size + + adj_list->entry[i].left + + adj_list->entry[i].right; + max_size = size; + max_index = adj_list->entry[i].index; + } + } + + if (max) + break; + } + + /* + * If the max entry is smaller than the largest_free_size + * find the first entry in the free list that it cn fit in to. + */ + if (max_size < largest_free_size) { + for (i = 0; i < free_list->size; i++) { + if (free_list->entry[i].size >= max_size) { + largest_free_index = i; + break; + } + } + } + + /* + * If we have a contender then move it to the new spot. + */ + if (max) { + rc = dpool_move(dpool, + free_list->entry[largest_free_index].index, + max_index); + if (rc) { + rte_free(free_list); + rte_free(adj_list); + return rc; + } + } else { + break; + } + } + +done: + rte_free(free_list); + rte_free(adj_list); + return largest_free_size; +} + + +uint32_t dpool_alloc(struct dpool *dpool, + uint32_t size, + uint8_t defrag) +{ + uint32_t i; + uint32_t j; + uint32_t count = 0; + uint32_t first_entry_index; + int rc; + + if (size > dpool->max_alloc_size || size == 0) + return DP_INVALID_INDEX; + + /* + * Defrag requires EM move support. + */ + if (defrag != DP_DEFRAG_NONE && + dpool->move_callback == NULL) + return DP_INVALID_INDEX; + + while (1) { + /* + * find consecutive free entries + */ + for (i = 0; i < dpool->size; i++) { + if (DP_IS_FREE(dpool->entry[i].flags)) { + if (count == 0) + first_entry_index = i; + + count++; + + if (count == size) { + for (j = 0; j < size; j++) { + dpool->entry[j + first_entry_index].flags = size; + if (j == 0) + dpool->entry[j + first_entry_index].flags |= + DP_FLAGS_START; + } + + dpool->entry[i].entry_data = 0UL; + return (first_entry_index + dpool->start_index); + } + } else { + count = 0; + } + } + + /* + * If defragging then do it to it + */ + if (defrag != DP_DEFRAG_NONE) { + rc = dpool_defrag(dpool, size, defrag); + + if (rc < 0) + return DP_INVALID_INDEX; + } else { + break; + } + + /* + * If the defrag created enough space then try the + * alloc again else quit. + */ + if ((uint32_t)rc < size) + break; + } + + return DP_INVALID_INDEX; +} + +int dpool_free(struct dpool *dpool, + uint32_t index) +{ + uint32_t i; + int start = (index - dpool->start_index); + uint32_t size; + + if (start < 0) + return -1; + + if (DP_IS_START(dpool->entry[start].flags)) { + size = DP_FLAGS_SIZE(dpool->entry[start].flags); + if (size > dpool->max_alloc_size || size == 0) + return -1; + + for (i = start; i < (start + size); i++) + dpool->entry[i].flags = 0; + + return 0; + } + + return -1; +} + +void dpool_free_all(struct dpool *dpool) +{ + uint32_t i; + + for (i = 0; i < dpool->size; i++) + dpool_free(dpool, dpool->entry[i].index); +} + +int dpool_set_entry_data(struct dpool *dpool, + uint32_t index, + uint64_t entry_data) +{ + int start = (index - dpool->start_index); + + if (start < 0) + return -1; + + if (DP_IS_START(dpool->entry[start].flags)) { + dpool->entry[start].entry_data = entry_data; + return 0; + } + + return -1; +} diff --git a/drivers/net/bnxt/tf_core/dpool.h b/drivers/net/bnxt/tf_core/dpool.h new file mode 100644 index 0000000000..8b0a4182dc --- /dev/null +++ b/drivers/net/bnxt/tf_core/dpool.h @@ -0,0 +1,309 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2021 Broadcom + * All rights reserved. + */ + +#ifndef _DPOOL_H_ +#define _DPOOL_H_ + +#include +#include + +#define DP_MAX_FREE_SIZE 0x8000 /* 32K */ + +#define DP_INVALID_INDEX 0xffffffff + +#define DP_FLAGS_START 0x80000000 +#define DP_IS_START(flags) ((flags) & DP_FLAGS_START) + +#define DP_FLAGS_SIZE_SHIFT 0 +#define DP_FLAGS_SIZE_MASK 0x07 + +#define DP_FLAGS_SIZE(flags) (((flags) >> DP_FLAGS_SIZE_SHIFT) & DP_FLAGS_SIZE_MASK) + +#define DP_IS_FREE(flags) (((flags) & DP_FLAGS_SIZE_MASK) == 0) +#define DP_IS_USED(flags) ((flags) & DP_FLAGS_SIZE_MASK) + +#define DP_DEFRAG_NONE 0x0 +#define DP_DEFRAG_ALL 0x1 +#define DP_DEFRAG_TO_FIT 0x2 + +/** + * Free list entry + * + * Each entry includes an index in to the dpool entry array + * and the size of dpool array entry. + */ +struct dpool_free_list_entry { + /* + * Index in to dpool entry array + */ + uint32_t index; + /* + * The size of the entry in the dpool entry array + */ + uint32_t size; +}; + +/** + * Free list + * + * Used internally to record free entries in the dpool entry array. + * Each entry represents a single or multiple contiguous entries + * in the dpool entry array. + * + * Used only during the defrag operation. + */ +struct dpool_free_list { + /* + * Number of entries in the free list + */ + uint32_t size; + /* + * List of unused entries in the dpool entry array + */ + struct dpool_free_list_entry entry[DP_MAX_FREE_SIZE]; +}; + +/** + * Adjacent list entry + * + * Each entry includes and index in to the dpool entry array, + * the size of the entry and the counts of free entries to the + * right and left off that entry. + */ +struct dpool_adj_list_entry { + /* + * Index in to dpool entry array + */ + uint32_t index; + /* + * The size of the entry in the dpool entry array + */ + uint32_t size; + /* + * Number of free entries directly to the left of + * this entry + */ + uint32_t left; + /* + * Number of free entries directly to the right of + * this entry + */ + uint32_t right; +}; + +/** + * Adjacent list + * + * A list of references to entries in the dpool entry array that + * have free entries to the left and right. Since we pack to the + * left entries will always have a non zero left cout. + * + * Used only during the defrag operation. + */ +struct dpool_adj_list { + /* + * Number of entries in the adj list + */ + uint32_t size; + /* + * List of entries in the dpool entry array that have + * free entries directly to their left and right. + */ + struct dpool_adj_list_entry entry[DP_MAX_FREE_SIZE]; +}; + +/** + * Dpool entry + * + * Each entry includes flags and the FW index. + */ +struct dpool_entry { + uint32_t flags; + uint32_t index; + uint64_t entry_data; +}; + +/** + * Dpool + * + * Used to manage resource pool. Includes the start FW index, the + * size of the entry array and the entry array it's self. + */ +struct dpool { + uint32_t start_index; + uint32_t size; + uint8_t max_alloc_size; + void *user_data; + int (*move_callback)(void *user_data, + uint64_t entry_data, + uint32_t new_index); + struct dpool_entry *entry; +}; + +/** + * dpool_init + * + * Initialize the dpool + * + * [in] dpool + * Pointer to a dpool structure that includes an entry field + * that points to the entry array. The user is responsible for + * allocating memory for the dpool struct and the entry array. + * + * [in] start_index + * The base index to use. + * + * [in] size + * The number of entries + * + * [in] max_alloc_size + * The number of entries + * + * [in] user_data + * Pointer to user data. Will be passed in callbacks. + * + * [in] move_callback + * Pointer to move EM entry callback. + * + * Return + * - 0 on success + * - -1 on failure + * + */ +int dpool_init(struct dpool *dpool, + uint32_t start_index, + uint32_t size, + uint8_t max_alloc_size, + void *user_data, + int (*move_callback)(void *, uint64_t, uint32_t)); + +/** + * dpool_alloc + * + * Request a FW index of size and if necessary de-fragment the dpool + * array. + * + * [i] dpool + * The dpool + * + * [i] size + * The size of the requested allocation. + * + * [i] defrag + * Operation to apply when there is insufficient space: + * + * DP_DEFRAG_NONE (0x0) - Don't do anything. + * DP_DEFRAG_ALL (0x1) - Defrag until there is nothing left + * to defrag. + * DP_DEFRAG_TO_FIT (0x2) - Defrag until there is just enough space + * to insert the requested allocation. + * + * Return + * - FW index on success + * - DP_INVALID_INDEX on failure + * + */ +uint32_t dpool_alloc(struct dpool *dpool, + uint32_t size, + uint8_t defrag); + +/** + * dpool_set_entry_data + * + * Set the entry data field. This will be passed to callbacks. + * + * [i] dpool + * The dpool + * + * [i] index + * FW index + * + * [i] entry_data + * Entry data value + * + * Return + * - FW index on success + * - DP_INVALID_INDEX on failure + * + */ +int dpool_set_entry_data(struct dpool *dpool, + uint32_t index, + uint64_t entry_data); + +/** + * dpool_free + * + * Free allocated entry. The is responsible for the dpool and dpool + * entry array memory. + * + * [in] dpool + * The pool + * + * [in] index + * FW index to free up. + * + * Result + * - 0 on success + * - -1 on failure + * + */ +int dpool_free(struct dpool *dpool, + uint32_t index); + +/** + * dpool_free_all + * + * Free all entries. + * + * [in] dpool + * The pool + * + * Result + * - 0 on success + * - -1 on failure + * + */ +void dpool_free_all(struct dpool *dpool); + +/** + * dpool_dump + * + * Debug/util function to dump the dpool array. + * + * [in] dpool + * The pool + * + */ +void dpool_dump(struct dpool *dpool); + +/** + * dpool_defrag + * + * De-fragment the dpool array and apply the specified defrag stratagy. + * + * [in] dpool + * The dpool + * + * [in] entry_size + * If using the DP_DEFRAG_TO_FIT stratagy defrag will stop when there's + * at least entry_size space available. + * + * [i] defrag + * Defrag stratagy: + * + * DP_DEFRAG_ALL (0x1) - Defrag until there is nothing left + * to defrag. + * DP_DEFRAG_TO_FIT (0x2) - Defrag until there is just enough space + * to insert the requested allocation. + * + * Return + * < 0 - on failure + * > 0 - The size of the largest free space + */ +int dpool_defrag(struct dpool *dpool, + uint32_t entry_size, + uint8_t defrag); + +#endif /* _DPOOL_H_ */ diff --git a/drivers/net/bnxt/tf_core/meson.build b/drivers/net/bnxt/tf_core/meson.build index 2c02214d83..3a91f04bc0 100644 --- a/drivers/net/bnxt/tf_core/meson.build +++ b/drivers/net/bnxt/tf_core/meson.build @@ -10,6 +10,7 @@ sources += files( 'tf_core.c', 'bitalloc.c', 'tf_msg.c', + 'dpool.c', 'rand.c', 'stack.c', 'tf_em_common.c', diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 4440d60fe5..08a083077c 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -1953,6 +1953,48 @@ struct tf_delete_em_entry_parms { */ uint64_t flow_handle; }; +/** + * tf_move_em_entry parameter definition + */ +struct tf_move_em_entry_parms { + /** + * [in] receive or transmit direction + */ + enum tf_dir dir; + /** + * [in] internal or external + */ + enum tf_mem mem; + /** + * [in] ID of table scope to use (external only) + */ + uint32_t tbl_scope_id; + /** + * [in] ID of table interface to use (SR2 only) + */ + uint32_t tbl_if_id; + /** + * [in] epoch group IDs of entry to delete + * 2 element array with 2 ids. (SR2 only) + */ + uint16_t *epochs; + /** + * [out] The index of the entry + */ + uint16_t index; + /** + * [in] External memory channel type to use + */ + enum tf_ext_mem_chan_type chan_type; + /** + * [in] The index of the new EM record + */ + uint32_t new_index; + /** + * [in] structure containing flow delete handle information + */ + uint64_t flow_handle; +}; /** * tf_search_em_entry parameter definition */ diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index 16c2fe0f64..31806bb289 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -611,6 +611,22 @@ struct tf_dev_ops { int (*tf_dev_delete_int_em_entry)(struct tf *tfp, struct tf_delete_em_entry_parms *parms); + /** + * Move EM hash entry API + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to E/EM move parameters + * + * returns: + * 0 - Success + * -EINVAL - Error + */ + int (*tf_dev_move_int_em_entry)(struct tf *tfp, + struct tf_move_em_entry_parms *parms); + /** * Insert EEM hash entry API * @@ -661,6 +677,24 @@ struct tf_dev_ops { int (*tf_dev_get_em_resc_info)(struct tf *tfp, struct tf_em_resource_info *parms); + /** + * Move EEM hash entry API + * + * Pointer to E/EM move parameters + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to em info + * + * returns: + * 0 - Success + * -EINVAL - Error + */ + int (*tf_dev_move_ext_em_entry)(struct tf *tfp, + struct tf_move_em_entry_parms *parms); + /** * Allocate EEM table scope * diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 32d621e7da..50facce155 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -292,6 +292,11 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_get_tcam_resc_info = tf_tcam_get_resc_info, .tf_dev_insert_int_em_entry = tf_em_hash_insert_int_entry, .tf_dev_delete_int_em_entry = tf_em_hash_delete_int_entry, +#if (TF_EM_ALLOC == 1) + .tf_dev_move_int_em_entry = tf_em_move_int_entry, +#else + .tf_dev_move_int_em_entry = NULL, +#endif .tf_dev_insert_ext_em_entry = NULL, .tf_dev_delete_ext_em_entry = NULL, .tf_dev_get_em_resc_info = tf_em_get_resc_info, diff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h index 60d90e28de..9d168c3c7f 100644 --- a/drivers/net/bnxt/tf_core/tf_em.h +++ b/drivers/net/bnxt/tf_core/tf_em.h @@ -13,6 +13,16 @@ #include "hcapi_cfa_defs.h" +/** + * TF_EM_ALLOC + * + * 0: Use stack allocator with fixed sized entries + * (default). + * 1: Use dpool allocator with variable size + * entries. + */ +#define TF_EM_ALLOC 0 + #define TF_EM_MIN_ENTRIES (1 << 15) /* 32K */ #define TF_EM_MAX_ENTRIES (1 << 27) /* 128M */ @@ -243,6 +253,22 @@ int tf_em_hash_insert_int_entry(struct tf *tfp, int tf_em_hash_delete_int_entry(struct tf *tfp, struct tf_delete_em_entry_parms *parms); +/** + * Move record from internal EM table + * + * [in] tfp + * Pointer to TruFlow handle + * + * [in] parms + * Pointer to input parameters + * + * Returns: + * 0 - Success + * -EINVAL - Parameter error + */ +int tf_em_move_int_entry(struct tf *tfp, + struct tf_move_em_entry_parms *parms); + /** * Insert record in to external EEM table * diff --git a/drivers/net/bnxt/tf_core/tf_em_hash_internal.c b/drivers/net/bnxt/tf_core/tf_em_hash_internal.c index f6c9772b44..098e8af07e 100644 --- a/drivers/net/bnxt/tf_core/tf_em_hash_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_hash_internal.c @@ -22,7 +22,9 @@ /** * EM Pool */ -extern struct stack em_pool[TF_DIR_MAX]; +#if (TF_EM_ALLOC == 1) +#include "dpool.h" +#endif /** * Insert EM internal entry API @@ -39,7 +41,11 @@ tf_em_hash_insert_int_entry(struct tf *tfp, uint16_t rptr_index = 0; uint8_t rptr_entry = 0; uint8_t num_of_entries = 0; - struct stack *pool = &em_pool[parms->dir]; +#if (TF_EM_ALLOC == 1) + struct dpool *pool; +#else + struct stack *pool; +#endif uint32_t index; uint32_t key0_hash; uint32_t key1_hash; @@ -56,7 +62,20 @@ tf_em_hash_insert_int_entry(struct tf *tfp, rc = tf_session_get_device(tfs, &dev); if (rc) return rc; +#if (TF_EM_ALLOC == 1) + pool = (struct dpool *)tfs->em_pool[parms->dir]; + index = dpool_alloc(pool, + parms->em_record_sz_in_bits / 128, + DP_DEFRAG_TO_FIT); + if (index == DP_INVALID_INDEX) { + PMD_DRV_LOG(ERR, + "%s, EM entry index allocation failed\n", + tf_dir_2_str(parms->dir)); + return -1; + } +#else + pool = (struct stack *)tfs->em_pool[parms->dir]; rc = stack_pop(pool, &index); if (rc) { PMD_DRV_LOG(ERR, @@ -64,6 +83,7 @@ tf_em_hash_insert_int_entry(struct tf *tfp, tf_dir_2_str(parms->dir)); return rc; } +#endif if (dev->ops->tf_dev_cfa_key_hash == NULL) return -EINVAL; @@ -83,19 +103,14 @@ tf_em_hash_insert_int_entry(struct tf *tfp, &num_of_entries); if (rc) { /* Free the allocated index before returning */ +#if (TF_EM_ALLOC == 1) + dpool_free(pool, index); +#else stack_push(pool, index); +#endif return -1; } - PMD_DRV_LOG - (DEBUG, - "%s, Internal entry @ Index:%d rptr_index:0x%x rptr_entry:0x%x num_of_entries:%d\n", - tf_dir_2_str(parms->dir), - index, - rptr_index, - rptr_entry, - num_of_entries); - TF_SET_GFID(gfid, ((rptr_index << TF_EM_INTERNAL_INDEX_SHIFT) | rptr_entry), @@ -113,6 +128,9 @@ tf_em_hash_insert_int_entry(struct tf *tfp, rptr_index, rptr_entry, 0); +#if (TF_EM_ALLOC == 1) + dpool_set_entry_data(pool, index, parms->flow_handle); +#endif return 0; } @@ -127,13 +145,71 @@ tf_em_hash_delete_int_entry(struct tf *tfp, struct tf_delete_em_entry_parms *parms) { int rc = 0; - struct stack *pool = &em_pool[parms->dir]; + struct tf_session *tfs; +#if (TF_EM_ALLOC == 1) + struct dpool *pool; +#else + struct stack *pool; +#endif + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } rc = tf_msg_delete_em_entry(tfp, parms); /* Return resource to pool */ - if (rc == 0) + if (rc == 0) { +#if (TF_EM_ALLOC == 1) + pool = (struct dpool *)tfs->em_pool[parms->dir]; + dpool_free(pool, parms->index); +#else + pool = (struct stack *)tfs->em_pool[parms->dir]; stack_push(pool, parms->index); +#endif + } + + return rc; +} + +#if (TF_EM_ALLOC == 1) +/** Move EM internal entry API + * + * returns: + * 0 + * -EINVAL + */ +int +tf_em_move_int_entry(struct tf *tfp, + struct tf_move_em_entry_parms *parms) +{ + int rc = 0; + struct dpool *pool; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + rc = tf_msg_move_em_entry(tfp, parms); + + /* Return resource to pool */ + if (rc == 0) { + pool = (struct dpool *)tfs->em_pool[parms->dir]; + dpool_free(pool, parms->index); + } return rc; } +#endif diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index e373a9b029..eec15b89bc 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -15,7 +15,6 @@ #include "tf_msg.h" #include "tfp.h" #include "tf_ext_flow_handle.h" - #include "bnxt.h" #define TF_EM_DB_EM_REC 0 @@ -23,7 +22,9 @@ /** * EM Pool */ -struct stack em_pool[TF_DIR_MAX]; +#if (TF_EM_ALLOC == 1) +#include "dpool.h" +#else /** * Create EM Tbl pool of memory indexes. @@ -41,14 +42,35 @@ struct stack em_pool[TF_DIR_MAX]; * - Failure, entry not allocated, out of resources */ static int -tf_create_em_pool(enum tf_dir dir, +tf_create_em_pool(struct tf_session *tfs, + enum tf_dir dir, uint32_t num_entries, uint32_t start) { struct tfp_calloc_parms parms; uint32_t i, j; int rc = 0; - struct stack *pool = &em_pool[dir]; + struct stack *pool; + + /* + * Allocate stack pool + */ + parms.nitems = 1; + parms.size = sizeof(struct stack); + parms.alignment = 0; + + rc = tfp_calloc(&parms); + + if (rc) { + TFP_DRV_LOG(ERR, + "%s, EM stack allocation failure %s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + pool = (struct stack *)parms.mem_va; + tfs->em_pool[dir] = (void *)pool; /* Assumes that num_entries has been checked before we get here */ parms.nitems = num_entries / TF_SESSION_EM_ENTRY_SIZE; @@ -108,6 +130,8 @@ tf_create_em_pool(enum tf_dir dir, return 0; cleanup: tfp_free((void *)parms.mem_va); + tfp_free((void *)tfs->em_pool[dir]); + tfs->em_pool[dir] = NULL; return rc; } @@ -120,16 +144,23 @@ tf_create_em_pool(enum tf_dir dir, * Return: */ static void -tf_free_em_pool(enum tf_dir dir) +tf_free_em_pool(struct tf_session *tfs, + enum tf_dir dir) { - struct stack *pool = &em_pool[dir]; + struct stack *pool = (struct stack *)tfs->em_pool[dir]; uint32_t *ptr; - ptr = stack_items(pool); + if (pool != NULL) { + ptr = stack_items(pool); + + if (ptr != NULL) + tfp_free(ptr); - if (ptr != NULL) - tfp_free(ptr); + tfp_free(pool); + tfs->em_pool[dir] = NULL; + } } +#endif /* TF_EM_ALLOC != 1 */ /** * Insert EM internal entry API @@ -146,17 +177,44 @@ tf_em_insert_int_entry(struct tf *tfp, uint16_t rptr_index = 0; uint8_t rptr_entry = 0; uint8_t num_of_entries = 0; - struct stack *pool = &em_pool[parms->dir]; + struct tf_session *tfs; +#if (TF_EM_ALLOC == 1) + struct dpool *pool; +#else + struct stack *pool; +#endif uint32_t index; - rc = stack_pop(pool, &index); + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } +#if (TF_EM_ALLOC == 1) + pool = (struct dpool *)tfs->em_pool[parms->dir]; + index = dpool_alloc(pool, TF_SESSION_EM_ENTRY_SIZE, 0); + if (index == DP_INVALID_INDEX) { + PMD_DRV_LOG(ERR, + "%s, EM entry index allocation failed\n", + tf_dir_2_str(parms->dir)); + return -1; + } +#else + pool = (struct stack *)tfs->em_pool[parms->dir]; + rc = stack_pop(pool, &index); if (rc) { PMD_DRV_LOG(ERR, "%s, EM entry index allocation failed\n", tf_dir_2_str(parms->dir)); return rc; } +#endif + rptr_index = index; rc = tf_msg_insert_em_internal_entry(tfp, @@ -166,19 +224,13 @@ tf_em_insert_int_entry(struct tf *tfp, &num_of_entries); if (rc) { /* Free the allocated index before returning */ +#if (TF_EM_ALLOC == 1) + dpool_free(pool, index); +#else stack_push(pool, index); +#endif return -1; } - - PMD_DRV_LOG - (DEBUG, - "%s, Internal entry @ Index:%d rptr_index:0x%x rptr_entry:0x%x num_of_entries:%d\n", - tf_dir_2_str(parms->dir), - index, - rptr_index, - rptr_entry, - num_of_entries); - TF_SET_GFID(gfid, ((rptr_index << TF_EM_INTERNAL_INDEX_SHIFT) | rptr_entry), @@ -211,16 +263,86 @@ tf_em_delete_int_entry(struct tf *tfp, struct tf_delete_em_entry_parms *parms) { int rc = 0; - struct stack *pool = &em_pool[parms->dir]; + struct tf_session *tfs; +#if (TF_EM_ALLOC == 1) + struct dpool *pool; +#else + struct stack *pool; +#endif + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } rc = tf_msg_delete_em_entry(tfp, parms); /* Return resource to pool */ - if (rc == 0) + if (rc == 0) { +#if (TF_EM_ALLOC == 1) + pool = (struct dpool *)tfs->em_pool[parms->dir]; + dpool_free(pool, parms->index); +#else + pool = (struct stack *)tfs->em_pool[parms->dir]; stack_push(pool, parms->index); +#endif + } + + return rc; +} + +#if (TF_EM_ALLOC == 1) +static int +tf_em_move_callback(void *user_data, + uint64_t entry_data, + uint32_t new_index) +{ + int rc; + struct tf *tfp = (struct tf *)user_data; + struct tf_move_em_entry_parms parms; + struct tf_dev_info *dev; + struct tf_session *tfs; + + memset(&parms, 0, sizeof(parms)); + + parms.tbl_scope_id = 0; + parms.flow_handle = entry_data; + parms.new_index = new_index; + TF_GET_DIR_FROM_FLOW_ID(entry_data, parms.dir); + parms.mem = TF_MEM_INTERNAL; + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms.dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(parms.dir), + strerror(-rc)); + return rc; + } + + if (dev->ops->tf_dev_move_int_em_entry != NULL) + rc = dev->ops->tf_dev_move_int_em_entry(tfp, &parms); + else + rc = -EOPNOTSUPP; return rc; } +#endif int tf_em_int_bind(struct tf *tfp, @@ -311,14 +433,49 @@ tf_em_int_bind(struct tf *tfp, tf_dir_2_str(i)); return rc; } +#if (TF_EM_ALLOC == 1) + /* + * Allocate stack pool + */ + cparms.nitems = 1; + cparms.size = sizeof(struct dpool); + cparms.alignment = 0; + + rc = tfp_calloc(&cparms); - rc = tf_create_em_pool(i, - iparms.info->entry.stride, - iparms.info->entry.start); + if (rc) { + TFP_DRV_LOG(ERR, + "%s, EM stack allocation failure %s\n", + tf_dir_2_str(i), + strerror(-rc)); + return rc; + } + + tfs->em_pool[i] = (struct dpool *)cparms.mem_va; + + rc = dpool_init(tfs->em_pool[i], + iparms.info->entry.start, + iparms.info->entry.stride, + 7, + (void *)tfp, + tf_em_move_callback); +#else + rc = tf_create_em_pool(tfs, + i, + iparms.info->entry.stride, + iparms.info->entry.start); +#endif /* Logging handled in tf_create_em_pool */ if (rc) return rc; } + + if (rc) { + TFP_DRV_LOG(ERR, + "%s: EM pool init failed\n", + tf_dir_2_str(i)); + return rc; + } } return 0; @@ -343,7 +500,11 @@ tf_em_int_unbind(struct tf *tfp) if (!tf_session_is_shared_session(tfs)) { for (i = 0; i < TF_DIR_MAX; i++) - tf_free_em_pool(i); +#if (TF_EM_ALLOC == 1) + dpool_free_all(tfs->em_pool[i]); +#else + tf_free_em_pool(tfs, i); +#endif } rc = tf_session_get_db(tfp, TF_MODULE_TYPE_EM, &em_db_ptr); diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index 4a840f3473..2ee8a1e8a9 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -1004,6 +1004,75 @@ tf_msg_delete_em_entry(struct tf *tfp, return 0; } +int +tf_msg_move_em_entry(struct tf *tfp, + struct tf_move_em_entry_parms *em_parms) +{ + int rc; + struct tfp_send_msg_parms parms = { 0 }; + struct hwrm_tf_em_move_input req = { 0 }; + struct hwrm_tf_em_move_output resp = { 0 }; + uint16_t flags; + uint8_t fw_session_id; + struct tf_dev_info *dev; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + rc = tf_session_get_fw_session_id(tfp, &fw_session_id); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Unable to lookup FW id, rc:%s\n", + tf_dir_2_str(em_parms->dir), + strerror(-rc)); + return rc; + } + + /* Populate the request */ + req.fw_session_id = tfp_cpu_to_le_32(fw_session_id); + + flags = (em_parms->dir == TF_DIR_TX ? + HWRM_TF_EM_DELETE_INPUT_FLAGS_DIR_TX : + HWRM_TF_EM_DELETE_INPUT_FLAGS_DIR_RX); + req.flags = tfp_cpu_to_le_16(flags); + req.flow_handle = tfp_cpu_to_le_64(em_parms->flow_handle); + req.new_index = tfp_cpu_to_le_32(em_parms->new_index); + + parms.tf_type = HWRM_TF_EM_MOVE; + parms.req_data = (uint32_t *)&req; + parms.req_size = sizeof(req); + parms.resp_data = (uint32_t *)&resp; + parms.resp_size = sizeof(resp); + parms.mailbox = dev->ops->tf_dev_get_mailbox(); + + rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + &parms); + if (rc) + return rc; + + em_parms->index = tfp_le_to_cpu_16(resp.em_index); + + return 0; +} + int tf_msg_ext_em_ctxt_mem_alloc(struct tf *tfp, struct hcapi_cfa_em_table *tbl, uint64_t *dma_addr, diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h index 5ecaf9e7e7..e8662fef0e 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.h +++ b/drivers/net/bnxt/tf_core/tf_msg.h @@ -315,6 +315,21 @@ tf_msg_hash_insert_em_internal_entry(struct tf *tfp, int tf_msg_delete_em_entry(struct tf *tfp, struct tf_delete_em_entry_parms *em_parms); +/** + * Sends EM internal move request to Firmware + * + * [in] tfp + * Pointer to TF handle + * + * [in] em_parms + * Pointer to em move parameters + * + * Returns: + * 0 on Success else internal Truflow error + */ +int tf_msg_move_em_entry(struct tf *tfp, + struct tf_move_em_entry_parms *em_parms); + /** * Sends Ext EM mem allocation request to Firmware * diff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h index 0b8f63c374..e2cebd20a1 100644 --- a/drivers/net/bnxt/tf_core/tf_session.h +++ b/drivers/net/bnxt/tf_core/tf_session.h @@ -159,6 +159,11 @@ struct tf_session { * the pointer to the parent bp struct */ void *bp; + + /** + * EM allocator for session + */ + void *em_pool[TF_DIR_MAX]; }; /** From patchwork Sun Jun 13 00:06:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94111 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 264CFA0C41; Sun, 13 Jun 2021 02:09:34 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BFF1E41167; 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Sat, 12 Jun 2021 17:07:20 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.19 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:19 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Randy Schacher , Venkat Duvvuru , Farah Smith Date: Sat, 12 Jun 2021 17:06:10 -0700 Message-Id: <20210613000652.28191-17-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 16/58] net/bnxt: update shared session functionality X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding - Distinguish the shared session on host side using PCI address - One session could be shared by multiple interfaces. Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_core.c | 9 --- drivers/net/bnxt/tf_core/tf_core.h | 4 ++ drivers/net/bnxt/tf_core/tf_device.c | 28 +++++---- drivers/net/bnxt/tf_core/tf_device_p58.c | 7 ++- drivers/net/bnxt/tf_core/tf_em_internal.c | 23 ++++---- drivers/net/bnxt/tf_core/tf_identifier.c | 15 ++--- drivers/net/bnxt/tf_core/tf_msg.c | 69 +++++++++++++---------- drivers/net/bnxt/tf_core/tf_session.c | 13 ++++- drivers/net/bnxt/tf_core/tf_session.h | 9 +-- drivers/net/bnxt/tf_core/tf_tbl.c | 57 ++++++++++++++++--- drivers/net/bnxt/tf_core/tf_tcam.c | 15 ++--- drivers/net/bnxt/tf_core/tfp.c | 4 +- 12 files changed, 153 insertions(+), 100 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index 69f5c10293..945e54bfdd 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -27,8 +27,6 @@ tf_open_session(struct tf *tfp, int rc; unsigned int domain, bus, slot, device; struct tf_session_open_session_parms oparms; - int name_len; - char *name; TF_CHECK_PARMS2(tfp, parms); @@ -71,13 +69,6 @@ tf_open_session(struct tf *tfp, } } - name_len = strlen(parms->ctrl_chan_name); - name = &parms->ctrl_chan_name[name_len - strlen("tf_shared")]; - if (!strncmp(name, "tf_shared", strlen("tf_shared"))) { - memset(parms->ctrl_chan_name, 0, strlen(parms->ctrl_chan_name)); - strcpy(parms->ctrl_chan_name, "tf_share"); - } - parms->session_id.internal.domain = domain; parms->session_id.internal.bus = bus; parms->session_id.internal.device = device; diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 08a083077c..3d14dc5391 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -458,6 +458,10 @@ struct tf_session_info { */ struct tf { struct tf_session_info *session; + /** + * the pointer to the parent bp struct + */ + void *bp; }; /** diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index fed4156200..97ae73fa5a 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -44,7 +44,11 @@ tf_dev_reservation_check(uint16_t count, rm_num = (uint16_t *)reservations + i * count; for (j = 0; j < count; j++) { if ((cfg[j].cfg_type == TF_RM_ELEM_CFG_HCAPI || - cfg[j].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) && + cfg[j].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA || + cfg[j].cfg_type == + TF_RM_ELEM_CFG_HCAPI_BA_PARENT || + cfg[j].cfg_type == + TF_RM_ELEM_CFG_HCAPI_BA_CHILD) && rm_num[j] > 0) cnt++; } @@ -263,49 +267,49 @@ tf_dev_unbind_p4(struct tf *tfp) */ rc = tf_tcam_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, TCAM\n"); fail = true; } rc = tf_ident_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, Identifier\n"); fail = true; } rc = tf_tbl_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, Table Type\n"); fail = true; } rc = tf_em_ext_common_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, EEM\n"); fail = true; } rc = tf_em_int_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, EM\n"); fail = true; } rc = tf_if_tbl_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, IF Table Type\n"); fail = true; } rc = tf_global_cfg_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, Global Cfg Type\n"); fail = true; } @@ -515,28 +519,28 @@ tf_dev_unbind_p58(struct tf *tfp) */ rc = tf_tcam_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, TCAM\n"); fail = true; } rc = tf_ident_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, Identifier\n"); fail = true; } rc = tf_tbl_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, Table Type\n"); fail = true; } rc = tf_em_int_unbind(tfp); if (rc) { - TFP_DRV_LOG(ERR, + TFP_DRV_LOG(INFO, "Device unbind failed, EM\n"); fail = true; } diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 50facce155..a5b055bac7 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -190,8 +190,11 @@ static int tf_dev_p58_get_sram_tbl_info(struct tf *tfp __rte_unused, parms.hcapi_type = &hcapi_type; rc = tf_rm_get_hcapi_type(&parms); - if (rc) - return rc; + if (rc) { + *base = 0; + *shift = 0; + return 0; + } switch (hcapi_type) { case CFA_RESOURCE_TYPE_P58_SRAM_BANK_0: diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index eec15b89bc..3b1e4e385d 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -509,21 +509,21 @@ tf_em_int_unbind(struct tf *tfp) rc = tf_session_get_db(tfp, TF_MODULE_TYPE_EM, &em_db_ptr); if (rc) { - TFP_DRV_LOG(ERR, - "Failed to get em_ext_db from session, rc:%s\n", + TFP_DRV_LOG(INFO, + "Em_db is not initialized, rc:%s\n", strerror(-rc)); - return rc; + return 0; } em_db = (struct em_rm_db *)em_db_ptr; for (i = 0; i < TF_DIR_MAX; i++) { + if (em_db->em_db[i] == NULL) + continue; fparms.dir = i; fparms.rm_db = em_db->em_db[i]; - if (em_db->em_db[i] != NULL) { - rc = tf_rm_free_db(tfp, &fparms); - if (rc) - return rc; - } + rc = tf_rm_free_db(tfp, &fparms); + if (rc) + return rc; em_db->em_db[i] = NULL; } @@ -546,10 +546,9 @@ tf_em_get_resc_info(struct tf *tfp, rc = tf_session_get_db(tfp, TF_MODULE_TYPE_EM, &em_db_ptr); if (rc) { - TFP_DRV_LOG(ERR, - "Failed to get em_ext_db from session, rc:%s\n", - strerror(-rc)); - return rc; + TFP_DRV_LOG(INFO, + "No resource allocated for em from session\n"); + return 0; } em_db = (struct em_rm_db *)em_db_ptr; diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c index 4063f3ba17..ebb975562d 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.c +++ b/drivers/net/bnxt/tf_core/tf_identifier.c @@ -119,14 +119,16 @@ tf_ident_unbind(struct tf *tfp) rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); if (rc) { - TFP_DRV_LOG(ERR, - "Failed to get ident_db from session, rc:%s\n", + TFP_DRV_LOG(INFO, + "Ident_db is not initialized, rc:%s\n", strerror(-rc)); - return rc; + return 0; } ident_db = (struct ident_rm_db *)ident_db_ptr; for (i = 0; i < TF_DIR_MAX; i++) { + if (ident_db->ident_db[i] == NULL) + continue; fparms.rm_db = ident_db->ident_db[i]; fparms.dir = i; rc = tf_rm_free_db(tfp, &fparms); @@ -372,10 +374,9 @@ tf_ident_get_resc_info(struct tf *tfp, rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); if (rc) { - TFP_DRV_LOG(ERR, - "Failed to get ident_db from session, rc:%s\n", - strerror(-rc)); - return rc; + TFP_DRV_LOG(INFO, + "No resource allocated for ident from session\n"); + return 0; } ident_db = (struct ident_rm_db *)ident_db_ptr; diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index 2ee8a1e8a9..18eea8338a 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -125,9 +125,16 @@ tf_msg_session_open(struct bnxt *bp, struct hwrm_tf_session_open_input req = { 0 }; struct hwrm_tf_session_open_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; + int name_len; + char *name; /* Populate the request */ - tfp_memcpy(&req.session_name, ctrl_chan_name, TF_SESSION_NAME_MAX); + name_len = strnlen(ctrl_chan_name, TF_SESSION_NAME_MAX); + name = &ctrl_chan_name[name_len - strlen("tf_shared")]; + if (!strncmp(name, "tf_shared", strlen("tf_shared"))) + tfp_memcpy(&req.session_name, name, strlen("tf_share")); + else + tfp_memcpy(&req.session_name, ctrl_chan_name, TF_SESSION_NAME_MAX); parms.tf_type = HWRM_TF_SESSION_OPEN; parms.req_data = (uint32_t *)&req; @@ -201,7 +208,7 @@ tf_msg_session_client_register(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -252,7 +259,7 @@ tf_msg_session_client_unregister(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; @@ -296,7 +303,7 @@ tf_msg_session_close(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; } @@ -348,7 +355,7 @@ tf_msg_session_qcfg(struct tf *tfp) parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; } @@ -411,7 +418,7 @@ tf_msg_session_resc_qcaps(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) goto cleanup; @@ -521,7 +528,7 @@ tf_msg_session_resc_alloc(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) goto cleanup; @@ -628,7 +635,7 @@ tf_msg_session_resc_info(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) goto cleanup; @@ -735,7 +742,7 @@ tf_msg_session_resc_flush(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); tf_msg_free_dma_buf(&resv_buf); @@ -829,7 +836,7 @@ tf_msg_insert_em_internal_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -924,7 +931,7 @@ tf_msg_hash_insert_em_internal_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -994,7 +1001,7 @@ tf_msg_delete_em_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -1063,7 +1070,7 @@ tf_msg_move_em_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -1119,7 +1126,7 @@ int tf_msg_ext_em_ctxt_mem_alloc(struct tf *tfp, parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) { TFP_DRV_LOG(ERR, "Failed ext_em_alloc error rc:%s\n", strerror(-rc)); @@ -1179,7 +1186,7 @@ int tf_msg_ext_em_ctxt_mem_free(struct tf *tfp, parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; } @@ -1230,7 +1237,7 @@ tf_msg_em_mem_rgtr(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -1282,7 +1289,7 @@ tf_msg_em_mem_unrgtr(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; } @@ -1334,7 +1341,7 @@ tf_msg_em_qcaps(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -1409,7 +1416,7 @@ tf_msg_em_cfg(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; } @@ -1483,7 +1490,7 @@ tf_msg_ext_em_cfg(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; } @@ -1533,7 +1540,7 @@ tf_msg_em_op(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; } @@ -1611,7 +1618,7 @@ tf_msg_tcam_entry_set(struct tf *tfp, mparms.resp_size = sizeof(resp); mparms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &mparms); cleanup: @@ -1664,7 +1671,7 @@ tf_msg_tcam_entry_get(struct tf *tfp, mparms.resp_size = sizeof(resp); mparms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &mparms); if (rc != 0) @@ -1735,7 +1742,7 @@ tf_msg_tcam_entry_free(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); return rc; } @@ -1816,7 +1823,7 @@ tf_msg_set_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -1882,7 +1889,7 @@ tf_msg_get_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -1968,7 +1975,7 @@ tf_msg_get_global_cfg(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc != 0) return rc; @@ -2069,7 +2076,7 @@ tf_msg_set_global_cfg(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc != 0) return rc; @@ -2142,7 +2149,7 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc) return rc; @@ -2205,7 +2212,7 @@ tf_msg_get_if_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc != 0) return rc; @@ -2262,7 +2269,7 @@ tf_msg_set_if_tbl_entry(struct tf *tfp, parms.resp_size = sizeof(resp); parms.mailbox = dev->ops->tf_dev_get_mailbox(); - rc = tfp_send_msg_direct(tf_session_get_bp(tfs), &parms); + rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); if (rc != 0) return rc; diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index 391d8786ab..93876d8e5d 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -59,6 +59,8 @@ tf_session_create(struct tf *tfp, union tf_session_id *session_id; struct tf_dev_info dev; bool shared_session_creator; + int name_len; + char *name; TF_CHECK_PARMS2(tfp, parms); @@ -140,7 +142,6 @@ tf_session_create(struct tf *tfp, session_id->id = session->session_id.id; session->shadow_copy = parms->open_cfg->shadow_copy; - session->bp = parms->open_cfg->bp; /* Init session client list */ ll_init(&session->client_ll); @@ -179,7 +180,12 @@ tf_session_create(struct tf *tfp, /* Init session em_ext_db */ session->em_ext_db_handle = NULL; - if (!strcmp(parms->open_cfg->ctrl_chan_name, "tf_share")) + + /* Populate the request */ + name_len = strnlen(parms->open_cfg->ctrl_chan_name, + TF_SESSION_NAME_MAX); + name = &parms->open_cfg->ctrl_chan_name[name_len - strlen("tf_shared")]; + if (!strncmp(name, "tf_shared", strlen("tf_shared"))) session->shared_session = true; if (session->shared_session && shared_session_creator) { @@ -404,8 +410,9 @@ tf_session_open_session(struct tf *tfp, int rc; struct tf_session_client_create_parms scparms; - TF_CHECK_PARMS2(tfp, parms); + TF_CHECK_PARMS3(tfp, parms, parms->open_cfg->bp); + tfp->bp = parms->open_cfg->bp; /* Decide if we're creating a new session or session client */ if (tfp->session == NULL) { rc = tf_session_create(tfp, parms); diff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h index e2cebd20a1..034a2213a4 100644 --- a/drivers/net/bnxt/tf_core/tf_session.h +++ b/drivers/net/bnxt/tf_core/tf_session.h @@ -155,11 +155,6 @@ struct tf_session { */ void *em_db_handle; - /** - * the pointer to the parent bp struct - */ - void *bp; - /** * EM allocator for session */ @@ -567,8 +562,8 @@ tf_session_is_shared_session_creator(struct tf_session *tfs) * - the pointer to the parent bnxt struct */ static inline struct bnxt* -tf_session_get_bp(struct tf_session *tfs) +tf_session_get_bp(struct tf *tfp) { - return tfs->bp; + return tfp->bp; } #endif /* _TF_SESSION_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index 17fb550917..ca1aef8ebf 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -109,14 +109,16 @@ tf_tbl_unbind(struct tf *tfp) rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); if (rc) { - TFP_DRV_LOG(ERR, - "Failed to get em_ext_db from session, rc:%s\n", + TFP_DRV_LOG(INFO, + "Tbl_db is not initialized, rc:%s\n", strerror(-rc)); - return rc; + return 0; } tbl_db = (struct tbl_rm_db *)tbl_db_ptr; for (i = 0; i < TF_DIR_MAX; i++) { + if (tbl_db->tbl_db[i] == NULL) + continue; fparms.dir = i; fparms.rm_db = tbl_db->tbl_db[i]; rc = tf_rm_free_db(tfp, &fparms); @@ -621,23 +623,36 @@ tf_tbl_get_resc_info(struct tf *tfp, struct tf_tbl_resource_info *tbl) { int rc; - int d; + int d, i; struct tf_resource_info *dinfo; struct tf_rm_get_alloc_info_parms ainfo; void *tbl_db_ptr = NULL; struct tbl_rm_db *tbl_db; + uint16_t base = 0, shift = 0; + struct tf_dev_info *dev; + struct tf_session *tfs; TF_CHECK_PARMS2(tfp, tbl); + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); if (rc) { - TFP_DRV_LOG(ERR, - "Failed to get em_ext_db from session, rc:%s\n", - strerror(-rc)); - return rc; + TFP_DRV_LOG(INFO, + "No resource allocated for table from session\n"); + return 0; } tbl_db = (struct tbl_rm_db *)tbl_db_ptr; + /* check if reserved resource for WC is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { ainfo.rm_db = tbl_db->tbl_db[d]; @@ -648,7 +663,33 @@ tf_tbl_get_resc_info(struct tf *tfp, rc = tf_rm_get_all_info(&ainfo, TF_TBL_TYPE_MAX); if (rc) return rc; + + if (dev->ops->tf_dev_get_tbl_info) { + /* Adjust all */ + for (i = 0; i < TF_TBL_TYPE_MAX; i++) { + /* Only get table info if required for the device */ + rc = dev->ops->tf_dev_get_tbl_info(tfp, + tbl_db->tbl_db[d], + i, + &base, + &shift); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to get table info:%d\n", + tf_dir_2_str(d), + i); + return rc; + } + if (dinfo[i].stride) + TF_TBL_RM_TO_PTR(&dinfo[i].start, + dinfo[i].start, + base, + shift); + } + } } + + return 0; } diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index 70dc539f15..0f05af87f1 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -220,14 +220,16 @@ tf_tcam_unbind(struct tf *tfp) rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); if (rc) { - TFP_DRV_LOG(ERR, - "Failed to get em_ext_db from session, rc:%s\n", + TFP_DRV_LOG(INFO, + "Tcam_db is not initialized, rc:%s\n", strerror(-rc)); - return rc; + return 0; } tcam_db = (struct tcam_rm_db *)tcam_db_ptr; for (i = 0; i < TF_DIR_MAX; i++) { + if (tcam_db->tcam_db[i] == NULL) + continue; memset(&fparms, 0, sizeof(fparms)); fparms.dir = i; fparms.rm_db = tcam_db->tcam_db[i]; @@ -816,10 +818,9 @@ tf_tcam_get_resc_info(struct tf *tfp, rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); if (rc) { - TFP_DRV_LOG(ERR, - "Failed to get em_ext_db from session, rc:%s\n", - strerror(-rc)); - return rc; + TFP_DRV_LOG(INFO, + "No resource allocated for tcam from session\n"); + return 0; } tcam_db = (struct tcam_rm_db *)tcam_db_ptr; diff --git a/drivers/net/bnxt/tf_core/tfp.c b/drivers/net/bnxt/tf_core/tfp.c index 4d9b37f749..a4b0934610 100644 --- a/drivers/net/bnxt/tf_core/tfp.c +++ b/drivers/net/bnxt/tf_core/tfp.c @@ -134,7 +134,7 @@ tfp_get_fid(struct tf *tfp, uint16_t *fw_fid) if (tfp == NULL || fw_fid == NULL) return -EINVAL; - bp = container_of(tfp, struct bnxt, tfp); + bp = (struct bnxt *)tfp->bp; if (bp == NULL) return -EINVAL; @@ -151,7 +151,7 @@ tfp_get_pf(struct tf *tfp, uint16_t *pf) if (tfp == NULL || pf == NULL) return -EINVAL; - bp = container_of(tfp, struct bnxt, tfp); + bp = (struct bnxt *)tfp->bp; if (BNXT_VF(bp) && bp->parent) { *pf = bp->parent->fid - 1; return 0; From patchwork Sun Jun 13 00:06:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94112 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7948BA0C41; Sun, 13 Jun 2021 02:09:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DB1444119F; Sun, 13 Jun 2021 02:07:26 +0200 (CEST) Received: from mail-pg1-f173.google.com (mail-pg1-f173.google.com [209.85.215.173]) by mails.dpdk.org (Postfix) with ESMTP id 78EF34118B for ; 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Sat, 12 Jun 2021 17:07:21 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.20 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:20 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Randy Schacher , Venkat Duvvuru Date: Sat, 12 Jun 2021 17:06:11 -0700 Message-Id: <20210613000652.28191-18-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 17/58] net/bnxt: modify resource reservation strategy X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding Allow an application to only reserve resources for one direction. Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_core.c | 4 -- drivers/net/bnxt/tf_core/tf_em_common.c | 61 +++++++++++------------ drivers/net/bnxt/tf_core/tf_em_internal.c | 13 +++-- drivers/net/bnxt/tf_core/tf_identifier.c | 15 +++--- drivers/net/bnxt/tf_core/tf_tbl.c | 12 +++-- drivers/net/bnxt/tf_core/tf_tcam.c | 14 ++++-- 6 files changed, 65 insertions(+), 54 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index 945e54bfdd..de2a93646f 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -1636,7 +1636,6 @@ int tf_get_session_info(struct tf *tfp, TFP_DRV_LOG(ERR, "Ident get resc info failed, rc:%s\n", strerror(-rc)); - return rc; } if (dev->ops->tf_dev_get_tbl_resc_info == NULL) { @@ -1652,7 +1651,6 @@ int tf_get_session_info(struct tf *tfp, TFP_DRV_LOG(ERR, "Tbl get resc info failed, rc:%s\n", strerror(-rc)); - return rc; } if (dev->ops->tf_dev_get_tcam_resc_info == NULL) { @@ -1668,7 +1666,6 @@ int tf_get_session_info(struct tf *tfp, TFP_DRV_LOG(ERR, "TCAM get resc info failed, rc:%s\n", strerror(-rc)); - return rc; } if (dev->ops->tf_dev_get_em_resc_info == NULL) { @@ -1684,7 +1681,6 @@ int tf_get_session_info(struct tf *tfp, TFP_DRV_LOG(ERR, "EM get resc info failed, rc:%s\n", strerror(-rc)); - return rc; } return 0; diff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c index ed8f6db58c..812ccb0d29 100644 --- a/drivers/net/bnxt/tf_core/tf_em_common.c +++ b/drivers/net/bnxt/tf_core/tf_em_common.c @@ -301,6 +301,7 @@ tf_em_page_tbl_pgcnt(uint32_t num_pages, { return roundup(num_pages, MAX_PAGE_PTRS(page_size)) / MAX_PAGE_PTRS(page_size); + return 0; } /** @@ -722,10 +723,6 @@ tf_insert_eem_entry(struct tf_dev_info *dev, if (!mask) return -EINVAL; -#ifdef TF_EEM_DEBUG - dump_raw((uint8_t *)parms->key, TF_P4_HW_EM_KEY_MAX_SIZE + 4, "In Key"); -#endif - if (dev->ops->tf_dev_cfa_key_hash == NULL) return -EINVAL; @@ -737,10 +734,6 @@ tf_insert_eem_entry(struct tf_dev_info *dev, key0_index = key0_hash & mask; key1_index = key1_hash & mask; -#ifdef TF_EEM_DEBUG - TFP_DRV_LOG(DEBUG, "Key0 hash:0x%08x\n", key0_hash); - TFP_DRV_LOG(DEBUG, "Key1 hash:0x%08x\n", key1_hash); -#endif /* * Use the "result" arg to populate all of the key entry then * store the byte swapped "raw" entry in a local copy ready @@ -1010,35 +1003,41 @@ tf_em_ext_common_unbind(struct tf *tfp) } ext_db = (struct em_ext_db *)ext_ptr; - entry = ext_db->tbl_scope_ll.head; - while (entry != NULL) { - tbl_scope_cb = (struct tf_tbl_scope_cb *)entry; - entry = entry->next; - tparms.tbl_scope_id = tbl_scope_cb->tbl_scope_id; - - if (dev->ops->tf_dev_free_tbl_scope) { - dev->ops->tf_dev_free_tbl_scope(tfp, &tparms); - } else { - /* should not reach here */ - ll_delete(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry); - tfp_free(tbl_scope_cb); + if (ext_db != NULL) { + entry = ext_db->tbl_scope_ll.head; + while (entry != NULL) { + tbl_scope_cb = (struct tf_tbl_scope_cb *)entry; + entry = entry->next; + tparms.tbl_scope_id = + tbl_scope_cb->tbl_scope_id; + + if (dev->ops->tf_dev_free_tbl_scope) { + dev->ops->tf_dev_free_tbl_scope(tfp, + &tparms); + } else { + /* should not reach here */ + ll_delete(&ext_db->tbl_scope_ll, + &tbl_scope_cb->ll_entry); + tfp_free(tbl_scope_cb); + } } - } - for (i = 0; i < TF_DIR_MAX; i++) { - if (ext_db->eem_db[i] == NULL) - continue; + for (i = 0; i < TF_DIR_MAX; i++) { + if (ext_db->eem_db[i] == NULL) + continue; - fparms.dir = i; - fparms.rm_db = ext_db->eem_db[i]; - rc = tf_rm_free_db(tfp, &fparms); - if (rc) - return rc; + fparms.dir = i; + fparms.rm_db = ext_db->eem_db[i]; + rc = tf_rm_free_db(tfp, &fparms); + if (rc) + return rc; - ext_db->eem_db[i] = NULL; + ext_db->eem_db[i] = NULL; + } + + tfp_free(ext_db); } - tfp_free(ext_db); tf_session_set_em_ext_db(tfp, NULL); return 0; diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index 3b1e4e385d..93de513989 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -349,6 +349,7 @@ tf_em_int_bind(struct tf *tfp, struct tf_em_cfg_parms *parms) { int rc; + int db_rc[TF_DIR_MAX] = { 0 }; int i; struct tf_rm_create_db_parms db_cfg = { 0 }; struct tf_rm_get_alloc_info_parms iparms; @@ -408,18 +409,22 @@ tf_em_int_bind(struct tf *tfp, db_cfg.rm_db = (void *)&em_db->em_db[i]; if (tf_session_is_shared_session(tfs) && (!tf_session_is_shared_session_creator(tfs))) - rc = tf_rm_create_db_no_reservation(tfp, &db_cfg); + db_rc[i] = tf_rm_create_db_no_reservation(tfp, &db_cfg); else - rc = tf_rm_create_db(tfp, &db_cfg); - if (rc) { + db_rc[i] = tf_rm_create_db(tfp, &db_cfg); + if (db_rc[i]) { TFP_DRV_LOG(ERR, "%s: EM Int DB creation failed\n", tf_dir_2_str(i)); - return rc; } } + /* No db created */ + if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) + return db_rc[TF_DIR_RX]; + + if (!tf_session_is_shared_session(tfs)) { for (i = 0; i < TF_DIR_MAX; i++) { iparms.rm_db = em_db->em_db[i]; diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c index ebb975562d..3cc87de4ef 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.c +++ b/drivers/net/bnxt/tf_core/tf_identifier.c @@ -30,6 +30,7 @@ tf_ident_bind(struct tf *tfp, struct tf_ident_cfg_parms *parms) { int rc; + int db_rc[TF_DIR_MAX] = { 0 }; int i; struct tf_rm_create_db_parms db_cfg = { 0 }; struct tf_shadow_ident_cfg_parms shadow_cfg = { 0 }; @@ -70,15 +71,13 @@ tf_ident_bind(struct tf *tfp, db_cfg.alloc_cnt = parms->resources->ident_cnt[i].cnt; if (tf_session_is_shared_session(tfs) && (!tf_session_is_shared_session_creator(tfs))) - rc = tf_rm_create_db_no_reservation(tfp, &db_cfg); + db_rc[i] = tf_rm_create_db_no_reservation(tfp, &db_cfg); else - rc = tf_rm_create_db(tfp, &db_cfg); - if (rc) { - TFP_DRV_LOG(ERR, + db_rc[i] = tf_rm_create_db(tfp, &db_cfg); + if (db_rc[i]) { + TFP_DRV_LOG(INFO, "%s: Identifier DB creation failed\n", tf_dir_2_str(i)); - - return rc; } if (parms->shadow_copy) { @@ -99,6 +98,10 @@ tf_ident_bind(struct tf *tfp, } } + /* No db created */ + if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) + return db_rc[TF_DIR_RX]; + TFP_DRV_LOG(INFO, "Identifier - initialized\n"); diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index ca1aef8ebf..192115183b 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -41,6 +41,7 @@ tf_tbl_bind(struct tf *tfp, struct tf_tbl_cfg_parms *parms) { int rc, d, i; + int db_rc[TF_DIR_MAX] = { 0 }; struct tf_rm_create_db_parms db_cfg = { 0 }; struct tbl_rm_db *tbl_db; struct tfp_calloc_parms cparms; @@ -79,18 +80,21 @@ tf_tbl_bind(struct tf *tfp, db_cfg.rm_db = (void *)&tbl_db->tbl_db[d]; if (tf_session_is_shared_session(tfs) && (!tf_session_is_shared_session_creator(tfs))) - rc = tf_rm_create_db_no_reservation(tfp, &db_cfg); + db_rc[d] = tf_rm_create_db_no_reservation(tfp, &db_cfg); else - rc = tf_rm_create_db(tfp, &db_cfg); - if (rc) { + db_rc[d] = tf_rm_create_db(tfp, &db_cfg); + if (db_rc[d]) { TFP_DRV_LOG(ERR, "%s: Table DB creation failed\n", tf_dir_2_str(d)); - return rc; } } + /* No db created */ + if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) + return db_rc[TF_DIR_RX]; + TFP_DRV_LOG(INFO, "Table Type - initialized\n"); diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index 0f05af87f1..ce959e3923 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -33,6 +33,7 @@ tf_tcam_bind(struct tf *tfp, struct tf_tcam_cfg_parms *parms) { int rc; + int db_rc[TF_DIR_MAX] = { 0 }; int i, d; struct tf_rm_alloc_info info; struct tf_rm_free_db_parms fparms; @@ -109,17 +110,20 @@ tf_tcam_bind(struct tf *tfp, db_cfg.rm_db = (void *)&tcam_db->tcam_db[d]; if (tf_session_is_shared_session(tfs) && (!tf_session_is_shared_session_creator(tfs))) - rc = tf_rm_create_db_no_reservation(tfp, &db_cfg); + db_rc[d] = tf_rm_create_db_no_reservation(tfp, &db_cfg); else - rc = tf_rm_create_db(tfp, &db_cfg); - if (rc) { - TFP_DRV_LOG(ERR, + db_rc[d] = tf_rm_create_db(tfp, &db_cfg); + if (db_rc[d]) { + TFP_DRV_LOG(INFO, "%s: TCAM DB creation failed\n", tf_dir_2_str(d)); - return rc; } } + /* No db created */ + if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) + return db_rc[TF_DIR_RX]; + /* check if reserved resource for WC is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { memset(&info, 0, sizeof(info)); From patchwork Sun Jun 13 00:06:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94113 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9B18DA0C41; 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Sat, 12 Jun 2021 17:07:21 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Jay Ding , Randy Schacher , Venkat Duvvuru Date: Sat, 12 Jun 2021 17:06:12 -0700 Message-Id: <20210613000652.28191-19-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 18/58] net/bnxt: shared TCAM region support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith - switch to single slice management on Wh+ - Support of shared session WC_TCAM_HIGH and WC_TCAM_LOW regions - Enable/disable using TF_TCAM_SHARED flag in tf_core.h - Fix empty session module DBs in the case that none are allocated for a given module type Signed-off-by: Farah Smith Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/meson.build | 25 +- drivers/net/bnxt/tf_core/tf_core.h | 45 +- drivers/net/bnxt/tf_core/tf_device.c | 72 ++- drivers/net/bnxt/tf_core/tf_device.h | 4 +- drivers/net/bnxt/tf_core/tf_device_p4.c | 17 +- drivers/net/bnxt/tf_core/tf_device_p58.c | 13 +- drivers/net/bnxt/tf_core/tf_identifier.c | 2 +- drivers/net/bnxt/tf_core/tf_tbl.c | 5 +- drivers/net/bnxt/tf_core/tf_tcam.c | 5 +- drivers/net/bnxt/tf_core/tf_tcam_shared.c | 744 ++++++++++++++++++++++ drivers/net/bnxt/tf_core/tf_tcam_shared.h | 127 ++++ drivers/net/bnxt/tf_core/tf_util.c | 6 + 12 files changed, 1014 insertions(+), 51 deletions(-) create mode 100644 drivers/net/bnxt/tf_core/tf_tcam_shared.c create mode 100644 drivers/net/bnxt/tf_core/tf_tcam_shared.h diff --git a/drivers/net/bnxt/tf_core/meson.build b/drivers/net/bnxt/tf_core/meson.build index 3a91f04bc0..f28e77ec2e 100644 --- a/drivers/net/bnxt/tf_core/meson.build +++ b/drivers/net/bnxt/tf_core/meson.build @@ -10,26 +10,27 @@ sources += files( 'tf_core.c', 'bitalloc.c', 'tf_msg.c', - 'dpool.c', + 'll.c', + 'dpool.c', 'rand.c', 'stack.c', - 'tf_em_common.c', - 'tf_em_internal.c', 'tf_rm.c', 'tf_tbl.c', + 'tf_em_common.c', + 'tf_em_host.c', + 'tf_em_internal.c', + 'tf_em_hash_internal.c', 'tfp.c', - 'tf_session.c', + 'tf_util.c', 'tf_device.c', 'tf_device_p4.c', - 'tf_device_p58.c', + 'tf_global_cfg.c', 'tf_identifier.c', + 'tf_if_tbl.c', + 'tf_session.c', 'tf_shadow_tcam.c', 'tf_tcam.c', - 'tf_util.c', - 'tf_if_tbl.c', - 'll.c', - 'tf_global_cfg.c', - 'tf_em_host.c', - 'tf_em_hash_internal.c', + 'tf_tcam_shared.c', 'tf_shadow_identifier.c', - 'tf_hash.c') + 'tf_hash.c', + 'tf_device_p58.c') diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 3d14dc5391..39a498122b 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -21,7 +21,6 @@ /********** BEGIN Truflow Core DEFINITIONS **********/ - #define TF_KILOBYTE 1024 #define TF_MEGABYTE (1024 * 1024) @@ -77,7 +76,6 @@ enum tf_ext_mem_chan_type { #define TF_ACT_REC_OFFSET_2_PTR(offset) ((offset) >> 4) #define TF_ACT_REC_PTR_2_OFFSET(offset) ((offset) << 4) - /* * Helper Macros */ @@ -198,7 +196,6 @@ enum tf_module_type { TF_MODULE_TYPE_MAX }; - /** * Identifier resource types */ @@ -317,6 +314,41 @@ enum tf_tbl_type { TF_TBL_TYPE_MAX }; +/** Enable Shared TCAM Management + * + * This feature allows for management of high and low pools within + * the WC TCAM. These pools are only valid when this feature is enabled. + * + * For normal OVS-DPDK operation, this feature is not required and can + * be disabled by commenting out TF_TCAM_SHARED in this header file. + * + * Operation: + * + * When a shared session is created with WC TCAM entries allocated during + * tf_open_session(), the TF_TCAM_TBL_TYPE_WC_TCAM pool entries will be divided + * into 2 equal pools - TF_TCAM_TBL_TYPE_WC_TCAM_HIGH and + * TF_TCAM_TBL_TYPE_WC_TCAM_LOW. + * + * The user will allocate and free entries from either of these pools to obtain + * WC_TCAM entry offsets. For the WC_TCAM_HI/LO management, alloc/free is done + * using the tf_alloc_tcam_entry()/tf_free_tcam_entry() APIs for the shared + * session. + * + * The use case for this feature is so that applications can have a shared + * session and use the TF core to allocate/set/free entries within a given + * region of the WC_TCAM within the shared session. Application A only writes + * to the LOW region for example and Application B only writes to the HIGH + * region during normal operation. After Application A goes down, Application + * B may decide to overwrite the LOW region with the HIGH region's entries + * and switch to the low region. + * + * For other TCAM types in the shared session, no alloc/free operations are + * permitted. Only set should be used for other TCAM table types after getting + * the range as provided by the tf_get_resource_info() API. + * + */ +#define TF_TCAM_SHARED 1 + /** * TCAM table type */ @@ -335,6 +367,12 @@ enum tf_tcam_tbl_type { TF_TCAM_TBL_TYPE_CT_RULE_TCAM, /** Virtual Edge Bridge TCAM */ TF_TCAM_TBL_TYPE_VEB_TCAM, +#ifdef TF_TCAM_SHARED + /** Wildcard TCAM HI Priority */ + TF_TCAM_TBL_TYPE_WC_TCAM_HIGH, + /** Wildcard TCAM Low Priority */ + TF_TCAM_TBL_TYPE_WC_TCAM_LOW, +#endif /* TF_TCAM_SHARED */ TF_TCAM_TBL_TYPE_MAX }; @@ -1044,7 +1082,6 @@ int tf_search_identifier(struct tf *tfp, * Current thought is that memory is allocated within core. */ - /** * tf_alloc_tbl_scope_parms definition */ diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index 97ae73fa5a..55cf55886a 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -9,6 +9,9 @@ #include "tfp.h" #include "tf_em.h" #include "tf_rm.h" +#ifdef TF_TCAM_SHARED +#include "tf_tcam_shared.h" +#endif /* TF_TCAM_SHARED */ struct tf; @@ -92,6 +95,12 @@ tf_dev_bind_p4(struct tf *tfp, struct tf_em_cfg_parms em_cfg; struct tf_if_tbl_cfg_parms if_tbl_cfg; struct tf_global_cfg_cfg_parms global_cfg; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; /* Initial function initialization */ dev_handle->ops = &tf_dev_ops_p4_init; @@ -142,7 +151,11 @@ tf_dev_bind_p4(struct tf *tfp, tcam_cfg.cfg = tf_tcam_p4; tcam_cfg.shadow_copy = shadow_copy; tcam_cfg.resources = resources; +#ifdef TF_TCAM_SHARED + rc = tf_tcam_shared_bind(tfp, &tcam_cfg); +#else /* !TF_TCAM_SHARED */ rc = tf_tcam_bind(tfp, &tcam_cfg); +#endif if (rc) { TFP_DRV_LOG(ERR, "TCAM initialization failure\n"); @@ -203,31 +216,32 @@ tf_dev_bind_p4(struct tf *tfp, return -ENOMEM; } - /* - * IF_TBL - */ - if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; - if_tbl_cfg.cfg = tf_if_tbl_p4; - if_tbl_cfg.shadow_copy = shadow_copy; - rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "IF Table initialization failure\n"); - goto fail; - } + if (!tf_session_is_shared_session(tfs)) { + /* + * IF_TBL + */ + if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; + if_tbl_cfg.cfg = tf_if_tbl_p4; + if_tbl_cfg.shadow_copy = shadow_copy; + rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "IF Table initialization failure\n"); + goto fail; + } - /* - * GLOBAL_CFG - */ - global_cfg.num_elements = TF_GLOBAL_CFG_TYPE_MAX; - global_cfg.cfg = tf_global_cfg_p4; - rc = tf_global_cfg_bind(tfp, &global_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "Global Cfg initialization failure\n"); - goto fail; + /* + * GLOBAL_CFG + */ + global_cfg.num_elements = TF_GLOBAL_CFG_TYPE_MAX; + global_cfg.cfg = tf_global_cfg_p4; + rc = tf_global_cfg_bind(tfp, &global_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "Global Cfg initialization failure\n"); + goto fail; + } } - /* Final function initialization */ dev_handle->ops = &tf_dev_ops_p4; @@ -265,7 +279,11 @@ tf_dev_unbind_p4(struct tf *tfp) * In case of residuals TCAMs are cleaned up first as to * invalidate the pipeline in a clean manner. */ +#ifdef TF_TCAM_SHARED + rc = tf_tcam_shared_unbind(tfp); +#else /* !TF_TCAM_SHARED */ rc = tf_tcam_unbind(tfp); +#endif /* TF_TCAM_SHARED */ if (rc) { TFP_DRV_LOG(INFO, "Device unbind failed, TCAM\n"); @@ -407,7 +425,11 @@ tf_dev_bind_p58(struct tf *tfp, tcam_cfg.cfg = tf_tcam_p58; tcam_cfg.shadow_copy = shadow_copy; tcam_cfg.resources = resources; +#ifdef TF_TCAM_SHARED + rc = tf_tcam_shared_bind(tfp, &tcam_cfg); +#else /* !TF_TCAM_SHARED */ rc = tf_tcam_bind(tfp, &tcam_cfg); +#endif if (rc) { TFP_DRV_LOG(ERR, "TCAM initialization failure\n"); @@ -517,7 +539,11 @@ tf_dev_unbind_p58(struct tf *tfp) * In case of residuals TCAMs are cleaned up first as to * invalidate the pipeline in a clean manner. */ +#ifdef TF_TCAM_SHARED + rc = tf_tcam_shared_unbind(tfp); +#else /* !TF_TCAM_SHARED */ rc = tf_tcam_unbind(tfp); +#endif /* TF_TCAM_SHARED */ if (rc) { TFP_DRV_LOG(INFO, "Device unbind failed, TCAM\n"); diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index 31806bb289..ea4dcfb8e2 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -10,6 +10,9 @@ #include "tf_identifier.h" #include "tf_tbl.h" #include "tf_tcam.h" +#ifdef TF_TCAM_SHARED +#include "tf_tcam_shared.h" +#endif #include "tf_if_tbl.h" #include "tf_global_cfg.h" @@ -136,7 +139,6 @@ struct tf_dev_ops { uint16_t resource_id, const char **resource_str); - /** * Retrieves the WC TCAM slice information that the device * supports. diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index e74ba6cd8f..0d3c35ae3b 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -10,6 +10,9 @@ #include "tf_identifier.h" #include "tf_tbl.h" #include "tf_tcam.h" +#ifdef TF_TCAM_SHARED +#include "tf_tcam_shared.h" +#endif /* TF_TCAM_SHARED */ #include "tf_em.h" #include "tf_if_tbl.h" #include "tfp.h" @@ -137,7 +140,8 @@ tf_dev_p4_get_tcam_slice_info(struct tf *tfp __rte_unused, uint16_t key_sz, uint16_t *num_slices_per_row) { -#define CFA_P4_WC_TCAM_SLICES_PER_ROW 2 +/* Single slice support */ +#define CFA_P4_WC_TCAM_SLICES_PER_ROW 1 #define CFA_P4_WC_TCAM_SLICE_SIZE 12 if (type == TF_TCAM_TBL_TYPE_WC_TCAM) { @@ -263,11 +267,18 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_get_tbl = tf_tbl_get, .tf_dev_get_bulk_tbl = tf_tbl_bulk_get, .tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info, +#ifdef TF_TCAM_SHARED + .tf_dev_alloc_tcam = tf_tcam_shared_alloc, + .tf_dev_free_tcam = tf_tcam_shared_free, + .tf_dev_set_tcam = tf_tcam_shared_set, + .tf_dev_get_tcam = tf_tcam_shared_get, +#else /* !TF_TCAM_SHARED */ .tf_dev_alloc_tcam = tf_tcam_alloc, .tf_dev_free_tcam = tf_tcam_free, - .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, .tf_dev_set_tcam = tf_tcam_set, - .tf_dev_get_tcam = NULL, + .tf_dev_get_tcam = tf_tcam_get, +#endif + .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, .tf_dev_get_tcam_resc_info = tf_tcam_get_resc_info, .tf_dev_insert_int_em_entry = tf_em_insert_int_entry, .tf_dev_delete_int_em_entry = tf_em_delete_int_entry, diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index a5b055bac7..5bf52379a7 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -10,6 +10,9 @@ #include "tf_identifier.h" #include "tf_tbl.h" #include "tf_tcam.h" +#ifdef TF_TCAM_SHARED +#include "tf_tcam_shared.h" +#endif /* TF_TCAM_SHARED */ #include "tf_em.h" #include "tf_if_tbl.h" #include "tfp.h" @@ -148,7 +151,6 @@ static int tf_dev_p58_word_align(uint16_t size) return ((((size) + 63) >> 6) * 8); } - #define TF_DEV_P58_BANK_SZ_64B 2048 /** * Get SRAM table information. @@ -287,11 +289,18 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_get_tbl = tf_tbl_get, .tf_dev_get_bulk_tbl = tf_tbl_bulk_get, .tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info, +#ifdef TF_TCAM_SHARED + .tf_dev_alloc_tcam = tf_tcam_shared_alloc, + .tf_dev_free_tcam = tf_tcam_shared_free, + .tf_dev_set_tcam = tf_tcam_set, + .tf_dev_get_tcam = tf_tcam_get, +#else /* !TF_TCAM_SHARED */ .tf_dev_alloc_tcam = tf_tcam_alloc, .tf_dev_free_tcam = tf_tcam_free, - .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, .tf_dev_set_tcam = tf_tcam_set, .tf_dev_get_tcam = tf_tcam_get, +#endif + .tf_dev_alloc_search_tcam = tf_tcam_alloc_search, .tf_dev_get_tcam_resc_info = tf_tcam_get_resc_info, .tf_dev_insert_int_em_entry = tf_em_hash_insert_int_entry, .tf_dev_delete_int_em_entry = tf_em_hash_delete_int_entry, diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c index 3cc87de4ef..3575c3e1a0 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.c +++ b/drivers/net/bnxt/tf_core/tf_identifier.c @@ -76,7 +76,7 @@ tf_ident_bind(struct tf *tfp, db_rc[i] = tf_rm_create_db(tfp, &db_cfg); if (db_rc[i]) { TFP_DRV_LOG(INFO, - "%s: Identifier DB creation failed\n", + "%s: No Identifier DB required\n", tf_dir_2_str(i)); } diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index 192115183b..295204ac87 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -85,7 +85,7 @@ tf_tbl_bind(struct tf *tfp, db_rc[d] = tf_rm_create_db(tfp, &db_cfg); if (db_rc[d]) { TFP_DRV_LOG(ERR, - "%s: Table DB creation failed\n", + "%s: No Table DB creation required\n", tf_dir_2_str(d)); } @@ -656,7 +656,6 @@ tf_tbl_get_resc_info(struct tf *tfp, } tbl_db = (struct tbl_rm_db *)tbl_db_ptr; - /* check if reserved resource for WC is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { ainfo.rm_db = tbl_db->tbl_db[d]; @@ -693,7 +692,5 @@ tf_tbl_get_resc_info(struct tf *tfp, } } - - return 0; } diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index ce959e3923..5c018f7003 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -115,7 +115,7 @@ tf_tcam_bind(struct tf *tfp, db_rc[d] = tf_rm_create_db(tfp, &db_cfg); if (db_rc[d]) { TFP_DRV_LOG(INFO, - "%s: TCAM DB creation failed\n", + "%s: no TCAM DB required\n", tf_dir_2_str(d)); } } @@ -126,6 +126,9 @@ tf_tcam_bind(struct tf *tfp, /* check if reserved resource for WC is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { + if (!tcam_db->tcam_db[d]) + continue; + memset(&info, 0, sizeof(info)); ainfo.rm_db = tcam_db->tcam_db[d]; ainfo.subtype = TF_TCAM_TBL_TYPE_WC_TCAM; diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.c b/drivers/net/bnxt/tf_core/tf_tcam_shared.c new file mode 100644 index 0000000000..17d7fee7a8 --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.c @@ -0,0 +1,744 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2021 Broadcom + * All rights reserved. + */ + +#include +#include + +#include "tf_tcam_shared.h" +#include "tf_tcam.h" +#include "tf_common.h" +#include "tf_util.h" +#include "tf_rm.h" +#include "tf_device.h" +#include "tfp.h" +#include "tf_session.h" +#include "tf_msg.h" +#include "bitalloc.h" +#include "tf_core.h" +#include "tf_rm.h" + +struct tf; + +/** Shared WC TCAM pool identifiers + */ +enum tf_tcam_shared_wc_pool_id { + TF_TCAM_SHARED_WC_POOL_HI = 0, + TF_TCAM_SHARED_WC_POOL_LO = 1, + TF_TCAM_SHARED_WC_POOL_MAX = 2 +}; + +/** Get string representation of a WC TCAM shared pool id + */ +static const char * +tf_pool_2_str(enum tf_tcam_shared_wc_pool_id id) +{ + switch (id) { + case TF_TCAM_SHARED_WC_POOL_HI: + return "TCAM_SHARED_WC_POOL_HI"; + case TF_TCAM_SHARED_WC_POOL_LO: + return "TCAM_SHARED_WC_POOL_LO"; + default: + return "Invalid TCAM_SHARED_WC_POOL"; + } +} + +/** The WC TCAM shared pool datastructure + */ +struct tf_tcam_shared_wc_pool { + /** Start and stride data */ + struct tf_resource_info info; + /** bitalloc pool */ + struct bitalloc *pool; +}; + +/** The WC TCAM shared pool declarations + * TODO: add tcam_shared_wc_db + */ +struct tf_tcam_shared_wc_pool tcam_shared_wc[TF_DIR_MAX][TF_TCAM_SHARED_WC_POOL_MAX]; + +/** Create a WC TCAM shared pool + */ +static int +tf_tcam_shared_create_wc_pool(int dir, + enum tf_tcam_shared_wc_pool_id id, + int start, + int stride) +{ + int rc = 0; + bool free = true; + struct tfp_calloc_parms cparms; + uint32_t pool_size; + + /* Create pool */ + pool_size = (BITALLOC_SIZEOF(stride) / sizeof(struct bitalloc)); + cparms.nitems = pool_size; + cparms.alignment = 0; + cparms.size = sizeof(struct bitalloc); + rc = tfp_calloc(&cparms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: pool memory alloc failed %s:%s\n", + tf_dir_2_str(dir), tf_pool_2_str(id), + strerror(-rc)); + return rc; + } + tcam_shared_wc[dir][id].pool = (struct bitalloc *)cparms.mem_va; + + rc = ba_init(tcam_shared_wc[dir][id].pool, + stride, + free); + + if (rc) { + TFP_DRV_LOG(ERR, + "%s: pool bitalloc failed %s\n", + tf_dir_2_str(dir), tf_pool_2_str(id)); + return rc; + } + + tcam_shared_wc[dir][id].info.start = start; + tcam_shared_wc[dir][id].info.stride = stride; + return rc; +} +/** Free a WC TCAM shared pool + */ +static void +tf_tcam_shared_free_wc_pool(int dir, + enum tf_tcam_shared_wc_pool_id id) +{ + tcam_shared_wc[dir][id].info.start = 0; + tcam_shared_wc[dir][id].info.stride = 0; + + if (tcam_shared_wc[dir][id].pool) + tfp_free((void *)tcam_shared_wc[dir][id].pool); +} + +/** Get the number of WC TCAM slices allocated during 1 allocation/free + */ +static int +tf_tcam_shared_get_slices(struct tf *tfp, + struct tf_dev_info *dev, + uint16_t *num_slices) +{ + int rc; + + if (dev->ops->tf_dev_get_tcam_slice_info == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "Operation not supported, rc:%s\n", strerror(-rc)); + return rc; + } + rc = dev->ops->tf_dev_get_tcam_slice_info(tfp, + TF_TCAM_TBL_TYPE_WC_TCAM, + 0, + num_slices); + return rc; +} + +static bool +tf_tcam_shared_db_valid(struct tf *tfp, + enum tf_dir dir) +{ + struct tcam_rm_db *tcam_db; + void *tcam_db_ptr = NULL; + int rc; + + TF_CHECK_PARMS1(tfp); + + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); + if (rc) + return false; + + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; + + if (tcam_db->tcam_db[dir]) + return true; + + return false; +} + +static int +tf_tcam_shared_get_rm_info(struct tf *tfp, + enum tf_dir dir, + uint16_t *hcapi_type, + struct tf_rm_alloc_info *info) +{ + int rc; + struct tcam_rm_db *tcam_db; + void *tcam_db_ptr = NULL; + struct tf_rm_get_alloc_info_parms ainfo; + struct tf_rm_get_hcapi_parms hparms; + + TF_CHECK_PARMS3(tfp, hcapi_type, info); + + rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); + if (rc) { + TFP_DRV_LOG(INFO, + "Tcam_db is not initialized, rc:%s\n", + strerror(-rc)); + return 0; + } + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; + + /* Convert TF type to HCAPI RM type */ + memset(&hparms, 0, sizeof(hparms)); + hparms.rm_db = tcam_db->tcam_db[dir]; + hparms.subtype = TF_TCAM_TBL_TYPE_WC_TCAM; + hparms.hcapi_type = hcapi_type; + + rc = tf_rm_get_hcapi_type(&hparms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Get RM hcapi type failed %s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + + memset(info, 0, sizeof(struct tf_rm_alloc_info)); + ainfo.rm_db = tcam_db->tcam_db[dir]; + ainfo.subtype = TF_TCAM_TBL_TYPE_WC_TCAM; + ainfo.info = info; + + rc = tf_rm_get_info(&ainfo); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM rm info get failed %s\n", + tf_dir_2_str(dir), + strerror(-rc)); + return rc; + } + return rc; +} + +/** + * tf_tcam_shared_bind + */ +int +tf_tcam_shared_bind(struct tf *tfp, + struct tf_tcam_cfg_parms *parms) +{ + int rc, dir; + struct tf_session *tfs; + struct tf_dev_info *dev; + struct tf_rm_alloc_info info; + uint16_t start, stride; + uint16_t num_slices; + uint16_t hcapi_type; + + TF_CHECK_PARMS2(tfp, parms); + + /* Perform normal bind + */ + rc = tf_tcam_bind(tfp, parms); + if (rc) + return rc; + + /* After the normal TCAM bind, if this is a shared session + * create all required databases for the WC_HI and WC_LO pools + */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "Session access failure: %s\n", strerror(-rc)); + return rc; + } + if (tf_session_is_shared_session(tfs)) { + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + rc = tf_tcam_shared_get_slices(tfp, + dev, + &num_slices); + if (rc) + return rc; + + /* If there are WC TCAM entries, create 2 pools each with 1/2 + * the total number of entries + */ + for (dir = 0; dir < TF_DIR_MAX; dir++) { + if (!tf_tcam_shared_db_valid(tfp, dir)) + continue; + + rc = tf_tcam_shared_get_rm_info(tfp, + dir, + &hcapi_type, + &info); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM rm info get failed\n", + tf_dir_2_str(dir)); + goto done; + } + + start = info.entry.start; + stride = info.entry.stride / 2; + + tf_tcam_shared_create_wc_pool(dir, + TF_TCAM_SHARED_WC_POOL_HI, + start, + stride); + + start += stride; + tf_tcam_shared_create_wc_pool(dir, + TF_TCAM_SHARED_WC_POOL_LO, + start, + stride); + } + } +done: + return rc; +} +/** + * tf_tcam_shared_unbind + */ +int +tf_tcam_shared_unbind(struct tf *tfp) +{ + int rc, dir; + struct tf_session *tfs; + + TF_CHECK_PARMS1(tfp); + + /* Perform normal unbind, this will write all the + * allocated TCAM entries in the shared session. + */ + rc = tf_tcam_unbind(tfp); + if (rc) + return rc; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* If we are the shared session + */ + if (tf_session_is_shared_session(tfs)) { + /* If there are WC TCAM entries allocated, free them + */ + for (dir = 0; dir < TF_DIR_MAX; dir++) { + tf_tcam_shared_free_wc_pool(dir, + TF_TCAM_SHARED_WC_POOL_HI); + tf_tcam_shared_free_wc_pool(dir, + TF_TCAM_SHARED_WC_POOL_LO); + } + } + return 0; +} +/** + * tf_tcam_shared_alloc + */ +int +tf_tcam_shared_alloc(struct tf *tfp, + struct tf_tcam_alloc_parms *parms) +{ + int rc, i; + struct tf_session *tfs; + struct tf_dev_info *dev; + int log_idx; + struct bitalloc *pool; + enum tf_tcam_shared_wc_pool_id id; + uint16_t num_slices; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* If we aren't the shared session or the type is + * not one of the special WC TCAM types, call the normal + * allocation. + */ + if (!tf_session_is_shared_session(tfs) || + (parms->type != TF_TCAM_TBL_TYPE_WC_TCAM_HIGH && + parms->type != TF_TCAM_TBL_TYPE_WC_TCAM_LOW)) { + /* Perform normal alloc + */ + rc = tf_tcam_alloc(tfp, parms); + return rc; + } + + if (!tf_tcam_shared_db_valid(tfp, parms->dir)) { + TFP_DRV_LOG(ERR, + "%s: tcam shared pool doesn't exist\n", + tf_dir_2_str(parms->dir)); + return -ENOMEM; + } + + if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM_HIGH) + id = TF_TCAM_SHARED_WC_POOL_HI; + else + id = TF_TCAM_SHARED_WC_POOL_LO; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); + if (rc) + return rc; + + pool = tcam_shared_wc[parms->dir][id].pool; + + for (i = 0; i < num_slices; i++) { + /* + * priority 0: allocate from top of the tcam i.e. high + * priority !0: allocate index from bottom i.e lowest + */ + if (parms->priority) + log_idx = ba_alloc_reverse(pool); + else + log_idx = ba_alloc(pool); + if (log_idx == BA_FAIL) { + TFP_DRV_LOG(ERR, + "%s: Allocation failed, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(ENOMEM)); + return -ENOMEM; + } + /* return the index without the start of each row */ + if (i == 0) + parms->idx = log_idx; + } + return 0; +} + +int +tf_tcam_shared_free(struct tf *tfp, + struct tf_tcam_free_parms *parms) +{ + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + int allocated = 0; + int i; + uint16_t start; + int phy_idx; + struct bitalloc *pool; + enum tf_tcam_shared_wc_pool_id id; + struct tf_tcam_free_parms nparms; + uint16_t num_slices; + uint16_t hcapi_type; + struct tf_rm_alloc_info info; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* If we aren't the shared session or the type is + * not one of the special WC TCAM types, call the normal + * allocation. + */ + if (!tf_session_is_shared_session(tfs) || + (parms->type != TF_TCAM_TBL_TYPE_WC_TCAM_HIGH && + parms->type != TF_TCAM_TBL_TYPE_WC_TCAM_LOW)) { + /* Perform normal free + */ + rc = tf_tcam_free(tfp, parms); + return rc; + } + + if (!tf_tcam_shared_db_valid(tfp, parms->dir)) { + TFP_DRV_LOG(ERR, + "%s: tcam shared pool doesn't exist\n", + tf_dir_2_str(parms->dir)); + return -ENOMEM; + } + + if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM_HIGH) + id = TF_TCAM_SHARED_WC_POOL_HI; + else + id = TF_TCAM_SHARED_WC_POOL_LO; + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); + if (rc) + return rc; + + rc = tf_tcam_shared_get_rm_info(tfp, + parms->dir, + &hcapi_type, + &info); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM rm info get failed\n", + tf_dir_2_str(parms->dir)); + return rc; + } + + pool = tcam_shared_wc[parms->dir][id].pool; + start = tcam_shared_wc[parms->dir][id].info.start; + + if (parms->idx % num_slices) { + TFP_DRV_LOG(ERR, + "%s: TCAM reserved resource is not multiple of %d\n", + tf_dir_2_str(parms->dir), num_slices); + return -EINVAL; + } + + phy_idx = parms->idx + start; + allocated = ba_inuse(pool, parms->idx); + + if (allocated != TF_RM_ALLOCATED_ENTRY_IN_USE) { + TFP_DRV_LOG(ERR, + "%s: Entry already free, type:%d, idx:%d\n", + tf_dir_2_str(parms->dir), parms->type, parms->idx); + return -EINVAL; + } + + for (i = 0; i < num_slices; i++) { + rc = ba_free(pool, parms->idx + i); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Free failed, type:%s, idx:%d\n", + tf_dir_2_str(parms->dir), + tf_tcam_tbl_2_str(parms->type), + parms->idx); + return rc; + } + } + + /* Override HI/LO type with parent WC TCAM type */ + nparms = *parms; + nparms.type = TF_TCAM_TBL_TYPE_WC_TCAM; + nparms.hcapi_type = hcapi_type; + nparms.idx = phy_idx; + + rc = tf_msg_tcam_entry_free(tfp, dev, &nparms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: %s: log%d free failed, rc:%s\n", + tf_dir_2_str(nparms.dir), + tf_tcam_tbl_2_str(nparms.type), + phy_idx, + strerror(-rc)); + return rc; + } + return 0; +} + +int +tf_tcam_shared_set(struct tf *tfp __rte_unused, + struct tf_tcam_set_parms *parms __rte_unused) +{ + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + int allocated = 0; + int phy_idx, log_idx; + uint16_t num_slices; + struct tf_tcam_set_parms nparms; + struct bitalloc *pool; + uint16_t start; + enum tf_tcam_shared_wc_pool_id id; + uint16_t hcapi_type; + struct tf_rm_alloc_info info; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* If we aren't the shared session or one of our + * special types + */ + if (!tf_session_is_shared_session(tfs) || + (parms->type != TF_TCAM_TBL_TYPE_WC_TCAM_HIGH && + parms->type != TF_TCAM_TBL_TYPE_WC_TCAM_LOW)) { + /* Perform normal set and exit + */ + rc = tf_tcam_set(tfp, parms); + return rc; + } + + if (!tf_tcam_shared_db_valid(tfp, parms->dir)) { + TFP_DRV_LOG(ERR, + "%s: tcam shared pool doesn't exist\n", + tf_dir_2_str(parms->dir)); + return -ENOMEM; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM_HIGH) + id = TF_TCAM_SHARED_WC_POOL_HI; + else + id = TF_TCAM_SHARED_WC_POOL_LO; + + pool = tcam_shared_wc[parms->dir][id].pool; + start = tcam_shared_wc[parms->dir][id].info.start; + + log_idx = parms->idx; + phy_idx = parms->idx + start; + allocated = ba_inuse(pool, parms->idx); + + if (allocated != TF_RM_ALLOCATED_ENTRY_IN_USE) { + TFP_DRV_LOG(ERR, + "%s: Entry is not allocated, type:%d, logid:%d\n", + tf_dir_2_str(parms->dir), parms->type, log_idx); + return -EINVAL; + } + rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); + if (rc) + return rc; + + if (parms->idx % num_slices) { + TFP_DRV_LOG(ERR, + "%s: TCAM reserved resource is not multiple of %d\n", + tf_dir_2_str(parms->dir), num_slices); + return -EINVAL; + } + rc = tf_tcam_shared_get_rm_info(tfp, + parms->dir, + &hcapi_type, + &info); + if (rc) + return rc; + + /* Override HI/LO type with parent WC TCAM type */ + nparms.hcapi_type = hcapi_type; + nparms.dir = parms->dir; + nparms.type = TF_TCAM_TBL_TYPE_WC_TCAM; + nparms.idx = phy_idx; + nparms.key = parms->key; + nparms.mask = parms->mask; + nparms.key_size = parms->key_size; + nparms.result = parms->result; + nparms.result_size = parms->result_size; + + rc = tf_msg_tcam_entry_set(tfp, dev, &nparms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: %s: phy entry %d set failed, rc:%s", + tf_dir_2_str(parms->dir), + tf_tcam_tbl_2_str(nparms.type), + phy_idx, + strerror(-rc)); + return rc; + } + return 0; +} + +int +tf_tcam_shared_get(struct tf *tfp __rte_unused, + struct tf_tcam_get_parms *parms) +{ + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + int allocated = 0; + int phy_idx, log_idx; + uint16_t num_slices; + struct tf_tcam_get_parms nparms; + struct bitalloc *pool; + uint16_t start; + enum tf_tcam_shared_wc_pool_id id; + uint16_t hcapi_type; + struct tf_rm_alloc_info info; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* If we aren't the shared session or one of our + * special types + */ + if (!tf_session_is_shared_session(tfs) || + (parms->type != TF_TCAM_TBL_TYPE_WC_TCAM_HIGH && + parms->type != TF_TCAM_TBL_TYPE_WC_TCAM_LOW)) { + /* Perform normal get and exit + */ + rc = tf_tcam_get(tfp, parms); + return rc; + } + + if (!tf_tcam_shared_db_valid(tfp, parms->dir)) { + TFP_DRV_LOG(ERR, + "%s: tcam shared pool doesn't exist\n", + tf_dir_2_str(parms->dir)); + return -ENOMEM; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM_HIGH) + id = TF_TCAM_SHARED_WC_POOL_HI; + else + id = TF_TCAM_SHARED_WC_POOL_LO; + + pool = tcam_shared_wc[parms->dir][id].pool; + start = tcam_shared_wc[parms->dir][id].info.start; + + rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); + if (rc) + return rc; + + if (parms->idx % num_slices) { + TFP_DRV_LOG(ERR, + "%s: TCAM reserved resource is not multiple of %d\n", + tf_dir_2_str(parms->dir), num_slices); + return -EINVAL; + } + log_idx = parms->idx; + phy_idx = parms->idx + start; + allocated = ba_inuse(pool, parms->idx); + + if (allocated != TF_RM_ALLOCATED_ENTRY_IN_USE) { + TFP_DRV_LOG(ERR, + "%s: Entry is not allocated, type:%d, logid:%d\n", + tf_dir_2_str(parms->dir), parms->type, log_idx); + return -EINVAL; + } + + rc = tf_tcam_shared_get_rm_info(tfp, + parms->dir, + &hcapi_type, + &info); + if (rc) + return rc; + + /* Override HI/LO type with parent WC TCAM type */ + nparms = *parms; + nparms.type = TF_TCAM_TBL_TYPE_WC_TCAM; + nparms.hcapi_type = hcapi_type; + nparms.idx = phy_idx; + + rc = tf_msg_tcam_entry_get(tfp, dev, &nparms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: %s: Entry %d set failed, rc:%s", + tf_dir_2_str(nparms.dir), + tf_tcam_tbl_2_str(nparms.type), + nparms.idx, + strerror(-rc)); + return rc; + } + return 0; +} diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.h b/drivers/net/bnxt/tf_core/tf_tcam_shared.h new file mode 100644 index 0000000000..fad6e23b4c --- /dev/null +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.h @@ -0,0 +1,127 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2021 Broadcom + * All rights reserved. + */ + +#ifndef _TF_TCAM_SHARED_H_ +#define _TF_TCAM_SHARED_H_ + +#include "tf_core.h" +#include "tf_tcam.h" + +/** + * @page tcam_shared TCAM SHARED + * + * @ref tf_tcam_shared_bind + * + * @ref tf_tcam_shared_unbind + * + * @ref tf_tcam_shared_alloc + * + * @ref tf_tcam_shared_free + * + * @ref tf_tcam_shared_set + * + * @ref tf_tcam_shared_get + * + */ + +/** + * Initializes the TCAM shared module with the requested DBs. Must be + * invoked as the first thing before any of the access functions. + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_bind(struct tf *tfp, + struct tf_tcam_cfg_parms *parms); + +/** + * Cleans up the private DBs and releases all the data. + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_unbind(struct tf *tfp); + +/** + * Allocates the requested tcam type from the internal RM DB. + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_alloc(struct tf *tfp, + struct tf_tcam_alloc_parms *parms); + +/** + * Free's the requested table type and returns it to the DB. + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_free(struct tf *tfp, + struct tf_tcam_free_parms *parms); + +/** + * Configures the requested element by sending a firmware request which + * then installs it into the device internal structures. + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_set(struct tf *tfp, + struct tf_tcam_set_parms *parms); + +/** + * Retrieves the requested element by sending a firmware request to get + * the element. + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_get(struct tf *tfp, + struct tf_tcam_get_parms *parms); + +#endif /* _TF_TCAM_SHARED_H */ diff --git a/drivers/net/bnxt/tf_core/tf_util.c b/drivers/net/bnxt/tf_core/tf_util.c index 25f5c152d2..e712816209 100644 --- a/drivers/net/bnxt/tf_core/tf_util.c +++ b/drivers/net/bnxt/tf_core/tf_util.c @@ -59,6 +59,12 @@ tf_tcam_tbl_2_str(enum tf_tcam_tbl_type tcam_type) return "sp_tcam"; case TF_TCAM_TBL_TYPE_CT_RULE_TCAM: return "ct_rule_tcam"; +#ifdef TF_TCAM_SHARED + case TF_TCAM_TBL_TYPE_WC_TCAM_HIGH: + return "wc_tcam_hi"; + case TF_TCAM_TBL_TYPE_WC_TCAM_LOW: + return "wc_tcam_lo"; +#endif default: return "Invalid tcam table type"; } From patchwork Sun Jun 13 00:06:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94114 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5E015A0C41; Sun, 13 Jun 2021 02:10:01 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1EF5A411B7; Sun, 13 Jun 2021 02:07:30 +0200 (CEST) Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) by mails.dpdk.org (Postfix) with ESMTP id EAB9E410FF for ; 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Sat, 12 Jun 2021 17:07:23 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.22 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:23 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Jay Ding , Venkat Duvvuru , Randy Schacher , Peter Spreadborough Date: Sat, 12 Jun 2021 17:06:13 -0700 Message-Id: <20210613000652.28191-20-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 19/58] net/bnxt: cleanup logs in session handling paths X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith Cleanup some of the log messages in the session open and close paths. Signed-off-by: Farah Smith Signed-off-by: Jay Ding Signed-off-by: Venkat Duvvuru Reviewed-by: Randy Schacher Reviewed-by: Peter Spreadborough Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_device.c | 90 ++++++++++++----------- drivers/net/bnxt/tf_core/tf_em_internal.c | 13 +--- drivers/net/bnxt/tf_core/tf_identifier.c | 15 +--- drivers/net/bnxt/tf_core/tf_if_tbl.c | 18 +---- drivers/net/bnxt/tf_core/tf_session.c | 18 +++-- drivers/net/bnxt/tf_core/tf_tbl.c | 18 ++--- drivers/net/bnxt/tf_core/tf_tcam.c | 12 +-- 7 files changed, 77 insertions(+), 107 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c index 55cf55886a..498e668b16 100644 --- a/drivers/net/bnxt/tf_core/tf_device.c +++ b/drivers/net/bnxt/tf_core/tf_device.c @@ -216,20 +216,20 @@ tf_dev_bind_p4(struct tf *tfp, return -ENOMEM; } - if (!tf_session_is_shared_session(tfs)) { - /* - * IF_TBL - */ - if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; - if_tbl_cfg.cfg = tf_if_tbl_p4; - if_tbl_cfg.shadow_copy = shadow_copy; - rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "IF Table initialization failure\n"); - goto fail; - } + /* + * IF_TBL + */ + if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; + if_tbl_cfg.cfg = tf_if_tbl_p4; + if_tbl_cfg.shadow_copy = shadow_copy; + rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "IF Table initialization failure\n"); + goto fail; + } + if (!tf_session_is_shared_session(tfs)) { /* * GLOBAL_CFG */ @@ -271,6 +271,12 @@ tf_dev_unbind_p4(struct tf *tfp) { int rc = 0; bool fail = false; + struct tf_session *tfs; + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; /* Unbind all the support modules. As this is only done on * close we only report errors as everything has to be cleaned @@ -318,18 +324,20 @@ tf_dev_unbind_p4(struct tf *tfp) fail = true; } - rc = tf_if_tbl_unbind(tfp); - if (rc) { - TFP_DRV_LOG(INFO, - "Device unbind failed, IF Table Type\n"); - fail = true; - } + if (!tf_session_is_shared_session(tfs)) { + rc = tf_if_tbl_unbind(tfp); + if (rc) { + TFP_DRV_LOG(INFO, + "Device unbind failed, IF Table Type\n"); + fail = true; + } - rc = tf_global_cfg_unbind(tfp); - if (rc) { - TFP_DRV_LOG(INFO, - "Device unbind failed, Global Cfg Type\n"); - fail = true; + rc = tf_global_cfg_unbind(tfp); + if (rc) { + TFP_DRV_LOG(INFO, + "Device unbind failed, Global Cfg Type\n"); + fail = true; + } } if (fail) @@ -472,17 +480,17 @@ tf_dev_bind_p58(struct tf *tfp, /* * IF_TBL */ - if (!tf_session_is_shared_session(tfs)) { - if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; - if_tbl_cfg.cfg = tf_if_tbl_p58; - if_tbl_cfg.shadow_copy = shadow_copy; - rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); - if (rc) { - TFP_DRV_LOG(ERR, - "IF Table initialization failure\n"); - goto fail; - } + if_tbl_cfg.num_elements = TF_IF_TBL_TYPE_MAX; + if_tbl_cfg.cfg = tf_if_tbl_p58; + if_tbl_cfg.shadow_copy = shadow_copy; + rc = tf_if_tbl_bind(tfp, &if_tbl_cfg); + if (rc) { + TFP_DRV_LOG(ERR, + "IF Table initialization failure\n"); + goto fail; + } + if (!tf_session_is_shared_session(tfs)) { /* * GLOBAL_CFG */ @@ -571,14 +579,14 @@ tf_dev_unbind_p58(struct tf *tfp) fail = true; } - if (!tf_session_is_shared_session(tfs)) { - rc = tf_if_tbl_unbind(tfp); - if (rc) { - TFP_DRV_LOG(ERR, - "Device unbind failed, IF Table Type\n"); - fail = true; - } + rc = tf_if_tbl_unbind(tfp); + if (rc) { + TFP_DRV_LOG(ERR, + "Device unbind failed, IF Table Type\n"); + fail = true; + } + if (!tf_session_is_shared_session(tfs)) { rc = tf_global_cfg_unbind(tfp); if (rc) { TFP_DRV_LOG(ERR, diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index 93de513989..28ffbd5876 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -412,17 +412,13 @@ tf_em_int_bind(struct tf *tfp, db_rc[i] = tf_rm_create_db_no_reservation(tfp, &db_cfg); else db_rc[i] = tf_rm_create_db(tfp, &db_cfg); - if (db_rc[i]) { - TFP_DRV_LOG(ERR, - "%s: EM Int DB creation failed\n", - tf_dir_2_str(i)); - - } } /* No db created */ - if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) + if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) { + TFP_DRV_LOG(ERR, "EM Int DB creation failed\n"); return db_rc[TF_DIR_RX]; + } if (!tf_session_is_shared_session(tfs)) { @@ -514,9 +510,6 @@ tf_em_int_unbind(struct tf *tfp) rc = tf_session_get_db(tfp, TF_MODULE_TYPE_EM, &em_db_ptr); if (rc) { - TFP_DRV_LOG(INFO, - "Em_db is not initialized, rc:%s\n", - strerror(-rc)); return 0; } em_db = (struct em_rm_db *)em_db_ptr; diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c index 3575c3e1a0..9f27a41fcf 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.c +++ b/drivers/net/bnxt/tf_core/tf_identifier.c @@ -74,11 +74,6 @@ tf_ident_bind(struct tf *tfp, db_rc[i] = tf_rm_create_db_no_reservation(tfp, &db_cfg); else db_rc[i] = tf_rm_create_db(tfp, &db_cfg); - if (db_rc[i]) { - TFP_DRV_LOG(INFO, - "%s: No Identifier DB required\n", - tf_dir_2_str(i)); - } if (parms->shadow_copy) { shadow_cfg.alloc_cnt = @@ -99,8 +94,10 @@ tf_ident_bind(struct tf *tfp, } /* No db created */ - if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) + if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) { + TFP_DRV_LOG(ERR, "No Identifier DB created\n"); return db_rc[TF_DIR_RX]; + } TFP_DRV_LOG(INFO, "Identifier - initialized\n"); @@ -121,12 +118,8 @@ tf_ident_unbind(struct tf *tfp) TF_CHECK_PARMS1(tfp); rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); - if (rc) { - TFP_DRV_LOG(INFO, - "Ident_db is not initialized, rc:%s\n", - strerror(-rc)); + if (rc) return 0; - } ident_db = (struct ident_rm_db *)ident_db_ptr; for (i = 0; i < TF_DIR_MAX; i++) { diff --git a/drivers/net/bnxt/tf_core/tf_if_tbl.c b/drivers/net/bnxt/tf_core/tf_if_tbl.c index f58fa79b63..762dac0473 100644 --- a/drivers/net/bnxt/tf_core/tf_if_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_if_tbl.c @@ -16,24 +16,16 @@ struct tf; /** * IF Table DBs. + * TODO: Store this data in session db */ static void *if_tbl_db[TF_DIR_MAX]; -/** - * IF Table Shadow DBs - */ -/* static void *shadow_if_tbl_db[TF_DIR_MAX]; */ - /** * Init flag, set on bind and cleared on unbind + * TODO: Store this data in session db */ static uint8_t init; -/** - * Shadow init flag, set on bind and cleared on unbind - */ -/* static uint8_t shadow_init; */ - /** * Convert if_tbl_type to hwrm type. * @@ -70,12 +62,6 @@ tf_if_tbl_bind(struct tf *tfp __rte_unused, { TF_CHECK_PARMS2(tfp, parms); - if (init) { - TFP_DRV_LOG(ERR, - "IF TBL DB already initialized\n"); - return -EINVAL; - } - if_tbl_db[TF_DIR_RX] = parms->cfg; if_tbl_db[TF_DIR_TX] = parms->cfg; diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index 93876d8e5d..e6ab518121 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -425,9 +425,11 @@ tf_session_open_session(struct tf *tfp, } TFP_DRV_LOG(INFO, - "Session created, session_client_id:%d, session_id:%d\n", + "Session created, session_client_id:%d," + "session_id:0x%08x, fw_session_id:%d\n", parms->open_cfg->session_client_id.id, - parms->open_cfg->session_id.id); + parms->open_cfg->session_id.id, + parms->open_cfg->session_id.internal.fw_session_id); } else { scparms.ctrl_chan_name = parms->open_cfg->ctrl_chan_name; scparms.session_client_id = &parms->open_cfg->session_client_id; @@ -438,16 +440,16 @@ tf_session_open_session(struct tf *tfp, rc = tf_session_client_create(tfp, &scparms); if (rc) { TFP_DRV_LOG(ERR, - "Failed to create client on session %d, rc:%s\n", + "Failed to create client on session 0x%x, rc:%s\n", parms->open_cfg->session_id.id, strerror(-rc)); return rc; } TFP_DRV_LOG(INFO, - "Session Client:%d created on session:%d\n", - parms->open_cfg->session_client_id.id, - parms->open_cfg->session_id.id); + "Session Client:%d registered on session:0x%8x\n", + scparms.session_client_id->internal.fw_session_client_id, + tfp->session->session_id.id); } return 0; @@ -541,7 +543,7 @@ tf_session_close_session(struct tf *tfp, client->session_client_id.id); TFP_DRV_LOG(INFO, - "session_id:%d, ref_count:%d\n", + "session_id:0x%08x, ref_count:%d\n", tfs->session_id.id, tfs->ref_count); @@ -587,7 +589,7 @@ tf_session_close_session(struct tf *tfp, tfs->ref_count--; TFP_DRV_LOG(INFO, - "Closed session, session_id:%d, ref_count:%d\n", + "Closed session, session_id:0x%08x, ref_count:%d\n", tfs->session_id.id, tfs->ref_count); diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index 295204ac87..6842291adf 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -83,17 +83,15 @@ tf_tbl_bind(struct tf *tfp, db_rc[d] = tf_rm_create_db_no_reservation(tfp, &db_cfg); else db_rc[d] = tf_rm_create_db(tfp, &db_cfg); - if (db_rc[d]) { - TFP_DRV_LOG(ERR, - "%s: No Table DB creation required\n", - tf_dir_2_str(d)); - - } } /* No db created */ - if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) + if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) { + TFP_DRV_LOG(ERR, + "%s: No Table DB created\n", + tf_dir_2_str(d)); return db_rc[TF_DIR_RX]; + } TFP_DRV_LOG(INFO, "Table Type - initialized\n"); @@ -112,12 +110,8 @@ tf_tbl_unbind(struct tf *tfp) TF_CHECK_PARMS1(tfp); rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); - if (rc) { - TFP_DRV_LOG(INFO, - "Tbl_db is not initialized, rc:%s\n", - strerror(-rc)); + if (rc) return 0; - } tbl_db = (struct tbl_rm_db *)tbl_db_ptr; for (i = 0; i < TF_DIR_MAX; i++) { diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index 5c018f7003..7878f8727a 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -113,16 +113,13 @@ tf_tcam_bind(struct tf *tfp, db_rc[d] = tf_rm_create_db_no_reservation(tfp, &db_cfg); else db_rc[d] = tf_rm_create_db(tfp, &db_cfg); - if (db_rc[d]) { - TFP_DRV_LOG(INFO, - "%s: no TCAM DB required\n", - tf_dir_2_str(d)); - } } /* No db created */ - if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) + if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) { + TFP_DRV_LOG(ERR, "No TCAM DB created\n"); return db_rc[TF_DIR_RX]; + } /* check if reserved resource for WC is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { @@ -227,9 +224,6 @@ tf_tcam_unbind(struct tf *tfp) rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); if (rc) { - TFP_DRV_LOG(INFO, - "Tcam_db is not initialized, rc:%s\n", - strerror(-rc)); return 0; } tcam_db = (struct tcam_rm_db *)tcam_db_ptr; From patchwork Sun Jun 13 00:06:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94115 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5FBB7A0C41; Sun, 13 Jun 2021 02:10:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 47A2E41182; Sun, 13 Jun 2021 02:07:31 +0200 (CEST) Received: from mail-pg1-f180.google.com (mail-pg1-f180.google.com [209.85.215.180]) by mails.dpdk.org (Postfix) with ESMTP id 5BE024119F for ; Sun, 13 Jun 2021 02:07:26 +0200 (CEST) Received: by mail-pg1-f180.google.com with SMTP id y11so5603196pgp.11 for ; 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Sat, 12 Jun 2021 17:07:24 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.23 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:24 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Randy Schacher , Venkat Duvvuru Date: Sat, 12 Jun 2021 17:06:14 -0700 Message-Id: <20210613000652.28191-21-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 20/58] net/bnxt: add WC TCAM management support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith - Add new API to move WC TCAM regions from the hi pool to the low pool. - Enable shared TCAM get/set functions on Thor. Signed-off-by: Farah Smith Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_core.c | 53 +++ drivers/net/bnxt/tf_core/tf_core.h | 39 ++ drivers/net/bnxt/tf_core/tf_device.h | 18 + drivers/net/bnxt/tf_core/tf_device_p4.c | 1 + drivers/net/bnxt/tf_core/tf_device_p58.c | 5 +- drivers/net/bnxt/tf_core/tf_session.c | 41 ++ drivers/net/bnxt/tf_core/tf_session.h | 48 +++ drivers/net/bnxt/tf_core/tf_tcam.c | 2 +- drivers/net/bnxt/tf_core/tf_tcam_shared.c | 468 ++++++++++++++++++++-- drivers/net/bnxt/tf_core/tf_tcam_shared.h | 35 ++ 10 files changed, 673 insertions(+), 37 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index de2a93646f..73dbee2940 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -917,6 +917,59 @@ tf_free_tcam_entry(struct tf *tfp, return 0; } +#ifdef TF_TCAM_SHARED +int +tf_move_tcam_shared_entries(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms) +{ + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + if (dev->ops->tf_dev_move_tcam == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "%s: Operation not supported, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + rc = dev->ops->tf_dev_move_tcam(tfp, parms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM shared entries move failed, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + return 0; +} +#endif /* TF_TCAM_SHARED */ + int tf_alloc_tbl_entry(struct tf *tfp, struct tf_alloc_tbl_entry_parms *parms) diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 39a498122b..95cde2e8eb 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -1242,6 +1242,10 @@ int tf_free_tbl_scope(struct tf *tfp, * @ref tf_get_tcam_entry * * @ref tf_free_tcam_entry + * +#ifdef TF_TCAM_SHARED + * @ref tf_move_tcam_shared_entries +#endif */ /** @@ -1543,6 +1547,41 @@ struct tf_free_tcam_entry_parms { int tf_free_tcam_entry(struct tf *tfp, struct tf_free_tcam_entry_parms *parms); +#ifdef TF_TCAM_SHARED +/** + * tf_move_tcam_shared_entries parameter definition + */ +struct tf_move_tcam_shared_entries_parms { + /** + * [in] receive or transmit direction + */ + enum tf_dir dir; + /** + * [in] TCAM table type + */ + enum tf_tcam_tbl_type tcam_tbl_type; +}; + +/** + * Move TCAM entries + * + * This API only affects the following TCAM pools within a shared session: + * + * TF_TCAM_TBL_TYPE_WC_TCAM_HIGH + * TF_TCAM_TBL_TYPE_WC_TCAM_LOW + * + * When called, all allocated entries from the high pool will be moved to + * the low pool. Then the allocated entries in the high pool will be + * cleared and freed. + * + * This API is not supported on a non-shared session. + * + * Returns success or failure code. + */ +int tf_move_tcam_shared_entries(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms); + +#endif /* TF_TCAM_SHARED */ /** * @page table Table Access * diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index ea4dcfb8e2..48ab17d56b 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -563,6 +563,24 @@ struct tf_dev_ops { int (*tf_dev_get_tcam)(struct tf *tfp, struct tf_tcam_get_parms *parms); +#ifdef TF_TCAM_SHARED + /** + * Move TCAM shared entries + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to parameters + * + * returns: + * 0 - Success + * -EINVAL - Error + */ + int (*tf_dev_move_tcam)(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms); +#endif /* TF_TCAM_SHARED */ + /** * Retrieves the tcam resource info. * diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index 0d3c35ae3b..67ef765236 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -272,6 +272,7 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_free_tcam = tf_tcam_shared_free, .tf_dev_set_tcam = tf_tcam_shared_set, .tf_dev_get_tcam = tf_tcam_shared_get, + .tf_dev_move_tcam = tf_tcam_shared_move_p4, #else /* !TF_TCAM_SHARED */ .tf_dev_alloc_tcam = tf_tcam_alloc, .tf_dev_free_tcam = tf_tcam_free, diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 5bf52379a7..fd2703129f 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -292,8 +292,9 @@ const struct tf_dev_ops tf_dev_ops_p58 = { #ifdef TF_TCAM_SHARED .tf_dev_alloc_tcam = tf_tcam_shared_alloc, .tf_dev_free_tcam = tf_tcam_shared_free, - .tf_dev_set_tcam = tf_tcam_set, - .tf_dev_get_tcam = tf_tcam_get, + .tf_dev_set_tcam = tf_tcam_shared_set, + .tf_dev_get_tcam = tf_tcam_shared_get, + .tf_dev_move_tcam = tf_tcam_shared_move_p58, #else /* !TF_TCAM_SHARED */ .tf_dev_alloc_tcam = tf_tcam_alloc, .tf_dev_free_tcam = tf_tcam_free, diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index e6ab518121..70844edb50 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -945,3 +945,44 @@ tf_session_set_db(struct tf *tfp, return rc; } + +#ifdef TF_TCAM_SHARED + +int +tf_session_get_tcam_shared_db(struct tf *tfp, + void **tcam_shared_db_handle) +{ + struct tf_session *tfs = NULL; + int rc = 0; + + *tcam_shared_db_handle = NULL; + + if (tfp == NULL) + return (-EINVAL); + + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + *tcam_shared_db_handle = tfs->tcam_shared_db_handle; + return rc; +} + +int +tf_session_set_tcam_shared_db(struct tf *tfp, + void *tcam_shared_db_handle) +{ + struct tf_session *tfs = NULL; + int rc = 0; + + if (tfp == NULL) + return (-EINVAL); + + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + tfs->tcam_shared_db_handle = tcam_shared_db_handle; + return rc; +} +#endif /* TF_TCAM_SHARED */ diff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h index 034a2213a4..c2875f9fa1 100644 --- a/drivers/net/bnxt/tf_core/tf_session.h +++ b/drivers/net/bnxt/tf_core/tf_session.h @@ -159,6 +159,13 @@ struct tf_session { * EM allocator for session */ void *em_pool[TF_DIR_MAX]; + +#ifdef TF_TCAM_SHARED + /** + * tcam db reference for the session + */ + void *tcam_shared_db_handle; +#endif /* TF_TCAM_SHARED */ }; /** @@ -255,6 +262,22 @@ struct tf_session_close_session_parms { * @ref tf_session_get_fw_session_id * * @ref tf_session_get_session_id + * + * @ref tf_session_is_shared_session_creator + * + * @ref tf_session_get_db + * + * @ref tf_session_set_db + * + * @ref tf_session_get_bp + * + * @ref tf_session_is_shared_session + * + * #define TF_SHARED + * @ref tf_session_get_tcam_shared_db + * + * @ref tf_session_set_tcam_shared_db + * #endif */ /** @@ -566,4 +589,29 @@ tf_session_get_bp(struct tf *tfp) { return tfp->bp; } + +/** + * Set the pointer to the tcam shared database + * + * [in] session, pointer to the session + * + * Returns: + * - the pointer to the parent bnxt struct + */ +int +tf_session_set_tcam_shared_db(struct tf *tfp, + void *tcam_shared_db_handle); + +/** + * Get the pointer to the tcam shared database + * + * [in] session, pointer to the session + * + * Returns: + * - the pointer to the parent bnxt struct + */ +int +tf_session_get_tcam_shared_db(struct tf *tfp, + void **tcam_shared_db_handle); + #endif /* _TF_SESSION_H_ */ diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index 7878f8727a..d7e12e00ef 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -299,7 +299,7 @@ tf_tcam_alloc(struct tf *tfp, rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); if (rc) { TFP_DRV_LOG(ERR, - "Failed to get em_ext_db from session, rc:%s\n", + "Failed to get tcam_db from session, rc:%s\n", strerror(-rc)); return rc; } diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.c b/drivers/net/bnxt/tf_core/tf_tcam_shared.c index 17d7fee7a8..0e8cb78f8d 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam_shared.c +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.c @@ -53,10 +53,34 @@ struct tf_tcam_shared_wc_pool { struct bitalloc *pool; }; +struct tf_tcam_shared_wc_pools { + struct tf_tcam_shared_wc_pool db[TF_DIR_MAX][TF_TCAM_SHARED_WC_POOL_MAX]; +}; + /** The WC TCAM shared pool declarations - * TODO: add tcam_shared_wc_db */ -struct tf_tcam_shared_wc_pool tcam_shared_wc[TF_DIR_MAX][TF_TCAM_SHARED_WC_POOL_MAX]; +/* struct tf_tcam_shared_wc_pool tcam_shared_wc[TF_DIR_MAX][TF_TCAM_SHARED_WC_POOL_MAX]; */ + +static int +tf_tcam_shared_create_db(struct tf_tcam_shared_wc_pools **db) +{ + struct tfp_calloc_parms cparms; + int rc = 0; + + cparms.nitems = 1; + cparms.alignment = 0; + cparms.size = sizeof(struct tf_tcam_shared_wc_pools); + rc = tfp_calloc(&cparms); + if (rc) { + TFP_DRV_LOG(ERR, + "TCAM shared db allocation failed (%s)\n", + strerror(-rc)); + return rc; + } + *db = cparms.mem_va; + + return rc; +} /** Create a WC TCAM shared pool */ @@ -64,7 +88,8 @@ static int tf_tcam_shared_create_wc_pool(int dir, enum tf_tcam_shared_wc_pool_id id, int start, - int stride) + int stride, + struct tf_tcam_shared_wc_pools *tcam_shared_wc) { int rc = 0; bool free = true; @@ -84,9 +109,9 @@ tf_tcam_shared_create_wc_pool(int dir, strerror(-rc)); return rc; } - tcam_shared_wc[dir][id].pool = (struct bitalloc *)cparms.mem_va; + tcam_shared_wc->db[dir][id].pool = (struct bitalloc *)cparms.mem_va; - rc = ba_init(tcam_shared_wc[dir][id].pool, + rc = ba_init(tcam_shared_wc->db[dir][id].pool, stride, free); @@ -97,21 +122,27 @@ tf_tcam_shared_create_wc_pool(int dir, return rc; } - tcam_shared_wc[dir][id].info.start = start; - tcam_shared_wc[dir][id].info.stride = stride; + tcam_shared_wc->db[dir][id].info.start = start; + tcam_shared_wc->db[dir][id].info.stride = stride; + return rc; } /** Free a WC TCAM shared pool */ -static void +static int tf_tcam_shared_free_wc_pool(int dir, - enum tf_tcam_shared_wc_pool_id id) + enum tf_tcam_shared_wc_pool_id id, + struct tf_tcam_shared_wc_pools *tcam_shared_wc) { - tcam_shared_wc[dir][id].info.start = 0; - tcam_shared_wc[dir][id].info.stride = 0; + int rc = 0; + TF_CHECK_PARMS1(tcam_shared_wc); + + tcam_shared_wc->db[dir][id].info.start = 0; + tcam_shared_wc->db[dir][id].info.stride = 0; - if (tcam_shared_wc[dir][id].pool) - tfp_free((void *)tcam_shared_wc[dir][id].pool); + if (tcam_shared_wc->db[dir][id].pool) + tfp_free((void *)tcam_shared_wc->db[dir][id].pool); + return rc; } /** Get the number of WC TCAM slices allocated during 1 allocation/free @@ -137,7 +168,7 @@ tf_tcam_shared_get_slices(struct tf *tfp, } static bool -tf_tcam_shared_db_valid(struct tf *tfp, +tf_tcam_db_valid(struct tf *tfp, enum tf_dir dir) { struct tcam_rm_db *tcam_db; @@ -226,6 +257,7 @@ tf_tcam_shared_bind(struct tf *tfp, uint16_t start, stride; uint16_t num_slices; uint16_t hcapi_type; + struct tf_tcam_shared_wc_pools *tcam_shared_wc = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -256,11 +288,14 @@ tf_tcam_shared_bind(struct tf *tfp, if (rc) return rc; + tf_tcam_shared_create_db(&tcam_shared_wc); + + /* If there are WC TCAM entries, create 2 pools each with 1/2 * the total number of entries */ for (dir = 0; dir < TF_DIR_MAX; dir++) { - if (!tf_tcam_shared_db_valid(tfp, dir)) + if (!tf_tcam_db_valid(tfp, dir)) continue; rc = tf_tcam_shared_get_rm_info(tfp, @@ -278,15 +313,19 @@ tf_tcam_shared_bind(struct tf *tfp, stride = info.entry.stride / 2; tf_tcam_shared_create_wc_pool(dir, - TF_TCAM_SHARED_WC_POOL_HI, - start, - stride); + TF_TCAM_SHARED_WC_POOL_HI, + start, + stride, + tcam_shared_wc); start += stride; tf_tcam_shared_create_wc_pool(dir, - TF_TCAM_SHARED_WC_POOL_LO, - start, - stride); + TF_TCAM_SHARED_WC_POOL_LO, + start, + stride, + tcam_shared_wc); + + tf_session_set_tcam_shared_db(tfp, (void *)tcam_shared_wc); } } done: @@ -300,6 +339,8 @@ tf_tcam_shared_unbind(struct tf *tfp) { int rc, dir; struct tf_session *tfs; + void *tcam_shared_db_ptr = NULL; + struct tf_tcam_shared_wc_pools *tcam_shared_wc; TF_CHECK_PARMS1(tfp); @@ -315,6 +356,15 @@ tf_tcam_shared_unbind(struct tf *tfp) if (rc) return rc; + rc = tf_session_get_tcam_shared_db(tfp, (void *)&tcam_shared_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get tcam_shared_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_shared_wc = (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; + /* If we are the shared session */ if (tf_session_is_shared_session(tfs)) { @@ -322,9 +372,11 @@ tf_tcam_shared_unbind(struct tf *tfp) */ for (dir = 0; dir < TF_DIR_MAX; dir++) { tf_tcam_shared_free_wc_pool(dir, - TF_TCAM_SHARED_WC_POOL_HI); + TF_TCAM_SHARED_WC_POOL_HI, + tcam_shared_wc); tf_tcam_shared_free_wc_pool(dir, - TF_TCAM_SHARED_WC_POOL_LO); + TF_TCAM_SHARED_WC_POOL_LO, + tcam_shared_wc); } } return 0; @@ -343,6 +395,8 @@ tf_tcam_shared_alloc(struct tf *tfp, struct bitalloc *pool; enum tf_tcam_shared_wc_pool_id id; uint16_t num_slices; + struct tf_tcam_shared_wc_pools *tcam_shared_wc; + void *tcam_shared_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -364,13 +418,22 @@ tf_tcam_shared_alloc(struct tf *tfp, return rc; } - if (!tf_tcam_shared_db_valid(tfp, parms->dir)) { + if (!tf_tcam_db_valid(tfp, parms->dir)) { TFP_DRV_LOG(ERR, "%s: tcam shared pool doesn't exist\n", tf_dir_2_str(parms->dir)); return -ENOMEM; } + rc = tf_session_get_tcam_shared_db(tfp, (void *)&tcam_shared_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get tcam_shared_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_shared_wc = (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; + if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM_HIGH) id = TF_TCAM_SHARED_WC_POOL_HI; else @@ -385,7 +448,7 @@ tf_tcam_shared_alloc(struct tf *tfp, if (rc) return rc; - pool = tcam_shared_wc[parms->dir][id].pool; + pool = tcam_shared_wc->db[parms->dir][id].pool; for (i = 0; i < num_slices; i++) { /* @@ -427,6 +490,8 @@ tf_tcam_shared_free(struct tf *tfp, uint16_t num_slices; uint16_t hcapi_type; struct tf_rm_alloc_info info; + void *tcam_shared_db_ptr = NULL; + struct tf_tcam_shared_wc_pools *tcam_shared_wc; TF_CHECK_PARMS2(tfp, parms); @@ -448,13 +513,23 @@ tf_tcam_shared_free(struct tf *tfp, return rc; } - if (!tf_tcam_shared_db_valid(tfp, parms->dir)) { + if (!tf_tcam_db_valid(tfp, parms->dir)) { TFP_DRV_LOG(ERR, "%s: tcam shared pool doesn't exist\n", tf_dir_2_str(parms->dir)); return -ENOMEM; } + rc = tf_session_get_tcam_shared_db(tfp, (void *)&tcam_shared_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get tcam_shared_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_shared_wc = (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; + + if (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM_HIGH) id = TF_TCAM_SHARED_WC_POOL_HI; else @@ -480,8 +555,8 @@ tf_tcam_shared_free(struct tf *tfp, return rc; } - pool = tcam_shared_wc[parms->dir][id].pool; - start = tcam_shared_wc[parms->dir][id].info.start; + pool = tcam_shared_wc->db[parms->dir][id].pool; + start = tcam_shared_wc->db[parms->dir][id].info.start; if (parms->idx % num_slices) { TFP_DRV_LOG(ERR, @@ -548,6 +623,9 @@ tf_tcam_shared_set(struct tf *tfp __rte_unused, enum tf_tcam_shared_wc_pool_id id; uint16_t hcapi_type; struct tf_rm_alloc_info info; + struct tf_tcam_shared_wc_pools *tcam_shared_wc; + void *tcam_shared_db_ptr = NULL; + TF_CHECK_PARMS2(tfp, parms); @@ -568,7 +646,7 @@ tf_tcam_shared_set(struct tf *tfp __rte_unused, return rc; } - if (!tf_tcam_shared_db_valid(tfp, parms->dir)) { + if (!tf_tcam_db_valid(tfp, parms->dir)) { TFP_DRV_LOG(ERR, "%s: tcam shared pool doesn't exist\n", tf_dir_2_str(parms->dir)); @@ -585,8 +663,17 @@ tf_tcam_shared_set(struct tf *tfp __rte_unused, else id = TF_TCAM_SHARED_WC_POOL_LO; - pool = tcam_shared_wc[parms->dir][id].pool; - start = tcam_shared_wc[parms->dir][id].info.start; + rc = tf_session_get_tcam_shared_db(tfp, (void *)&tcam_shared_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get tcam_shared_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_shared_wc = (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; + + pool = tcam_shared_wc->db[parms->dir][id].pool; + start = tcam_shared_wc->db[parms->dir][id].info.start; log_idx = parms->idx; phy_idx = parms->idx + start; @@ -656,6 +743,8 @@ tf_tcam_shared_get(struct tf *tfp __rte_unused, enum tf_tcam_shared_wc_pool_id id; uint16_t hcapi_type; struct tf_rm_alloc_info info; + struct tf_tcam_shared_wc_pools *tcam_shared_wc; + void *tcam_shared_db_ptr = NULL; TF_CHECK_PARMS2(tfp, parms); @@ -676,7 +765,7 @@ tf_tcam_shared_get(struct tf *tfp __rte_unused, return rc; } - if (!tf_tcam_shared_db_valid(tfp, parms->dir)) { + if (!tf_tcam_db_valid(tfp, parms->dir)) { TFP_DRV_LOG(ERR, "%s: tcam shared pool doesn't exist\n", tf_dir_2_str(parms->dir)); @@ -692,8 +781,18 @@ tf_tcam_shared_get(struct tf *tfp __rte_unused, else id = TF_TCAM_SHARED_WC_POOL_LO; - pool = tcam_shared_wc[parms->dir][id].pool; - start = tcam_shared_wc[parms->dir][id].info.start; + + rc = tf_session_get_tcam_shared_db(tfp, (void *)&tcam_shared_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get tcam_shared_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_shared_wc = (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; + + pool = tcam_shared_wc->db[parms->dir][id].pool; + start = tcam_shared_wc->db[parms->dir][id].info.start; rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); if (rc) @@ -742,3 +841,304 @@ tf_tcam_shared_get(struct tf *tfp __rte_unused, } return 0; } + +/* Temporary builder defines pulled in here and renamed + */ +#define TF_TMP_MAX_FIELD_BITLEN 512 + +union tf_tmp_field_obj { + uint8_t bytes[(TF_TMP_MAX_FIELD_BITLEN + 7) / 8]; +}; + +#define TF_TMP_MAX_KEY_BITLEN 768 +#define TF_TMP_MAX_KEY_WORDLEN ((TF_TMP_MAX_KEY_BITLEN + 63) / 64) + +union tf_tmp_key { + uint32_t words[(TF_TMP_MAX_KEY_BITLEN + 31) / 32]; + uint8_t bytes[(TF_TMP_MAX_KEY_BITLEN + 7) / 8]; +}; + +/** Move a WC TCAM entry from the high offset to the same low offset + */ +static int +tf_tcam_shared_move_entry(struct tf *tfp, + struct tf_dev_info *dev, + uint16_t hcapi_type, + enum tf_dir dir, + int sphy_idx, + int dphy_idx, + int key_sz_bytes, + int remap_sz_bytes, + uint16_t num_slices) +{ + int rc = 0; + struct tf_tcam_get_parms gparms; + struct tf_tcam_set_parms sparms; + struct tf_tcam_free_parms fparms; + union tf_tmp_key tcam_key_obj; + union tf_tmp_key tcam_key_msk_obj; + union tf_tmp_field_obj tcam_remap_obj; + + memset(&tcam_key_obj, 0, sizeof(tcam_key_obj)); + memset(&tcam_key_msk_obj, 0, sizeof(tcam_key_msk_obj)); + memset(&tcam_remap_obj, 0, sizeof(tcam_remap_obj)); + memset(&gparms, 0, sizeof(gparms)); + + if (num_slices > 1) { + TFP_DRV_LOG(ERR, + "Only single slice supported"); + return -EOPNOTSUPP; + } + + gparms.hcapi_type = hcapi_type; + gparms.dir = dir; + gparms.type = TF_TCAM_TBL_TYPE_WC_TCAM; + gparms.idx = sphy_idx; + gparms.key = (uint8_t *)&tcam_key_obj; + gparms.key_size = key_sz_bytes; + gparms.mask = (uint8_t *)&tcam_key_msk_obj; + gparms.result = (uint8_t *)&tcam_remap_obj; + gparms.result_size = remap_sz_bytes; + + rc = tf_msg_tcam_entry_get(tfp, dev, &gparms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: WC_TCAM_HIGH: phyid(%d) get failed, rc:%s", + tf_dir_2_str(dir), + gparms.idx, + strerror(-rc)); + return rc; + } + + /* Override HI/LO type with parent WC TCAM type */ + sparms.hcapi_type = hcapi_type; + sparms.dir = dir; + sparms.type = TF_TCAM_TBL_TYPE_WC_TCAM; + sparms.idx = dphy_idx; + sparms.key = gparms.key; + sparms.mask = gparms.mask; + sparms.key_size = gparms.key_size; + sparms.result = gparms.result; + sparms.result_size = gparms.result_size; + + rc = tf_msg_tcam_entry_set(tfp, dev, &sparms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: WC_TCAM_LOW phyid(%d) set failed, rc:%s", + tf_dir_2_str(dir), + sparms.idx, + strerror(-rc)); + return rc; + } + + /* Override HI/LO type with parent WC TCAM type */ + fparms.dir = dir; + fparms.type = TF_TCAM_TBL_TYPE_WC_TCAM; + fparms.hcapi_type = hcapi_type; + fparms.idx = sphy_idx; + + rc = tf_msg_tcam_entry_free(tfp, dev, &fparms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: %s: phyid(%d) free failed, rc:%s\n", + tf_dir_2_str(dir), + tf_tcam_tbl_2_str(fparms.type), + sphy_idx, + strerror(-rc)); + return rc; + } + return rc; +} + +/** Move all shared WC TCAM entries from the high pool into the low pool + * and clear out the high pool entries. + */ +static +int tf_tcam_shared_move(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms, + int key_sz_bytes, + int remap_sz_bytes) +{ + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + int log_idx; + uint16_t num_slices; + struct bitalloc *hi_pool, *lo_pool; + uint16_t hi_start, lo_start; + enum tf_tcam_shared_wc_pool_id hi_id, lo_id; + uint16_t hcapi_type; + struct tf_rm_alloc_info info; + int hi_cnt, i, j; + struct tf_tcam_shared_wc_pools *tcam_shared_wc; + void *tcam_shared_db_ptr = NULL; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + /* If we aren't the shared session or one of our + * special types + */ + if (!tf_session_is_shared_session(tfs) || + (parms->tcam_tbl_type != TF_TCAM_TBL_TYPE_WC_TCAM_HIGH && + parms->tcam_tbl_type != TF_TCAM_TBL_TYPE_WC_TCAM_LOW)) { + TFP_DRV_LOG(ERR, + "%s: Session must be shared with HI/LO type\n", + tf_dir_2_str(parms->dir)); + return -EOPNOTSUPP; + } + + if (!tf_tcam_db_valid(tfp, parms->dir)) { + TFP_DRV_LOG(ERR, + "%s: tcam shared pool doesn't exist\n", + tf_dir_2_str(parms->dir)); + return -ENOMEM; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + /* TODO print amazing error */ + return rc; + } + rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); + if (rc) + return rc; + + rc = tf_tcam_shared_get_rm_info(tfp, + parms->dir, + &hcapi_type, + &info); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM rm info get failed\n", + tf_dir_2_str(parms->dir)); + return rc; + } + + rc = tf_session_get_tcam_shared_db(tfp, (void *)&tcam_shared_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get tcam_shared_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_shared_wc = (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; + + hi_id = TF_TCAM_SHARED_WC_POOL_HI; + hi_pool = tcam_shared_wc->db[parms->dir][hi_id].pool; + hi_start = tcam_shared_wc->db[parms->dir][hi_id].info.start; + + lo_id = TF_TCAM_SHARED_WC_POOL_LO; + lo_pool = tcam_shared_wc->db[parms->dir][lo_id].pool; + lo_start = tcam_shared_wc->db[parms->dir][lo_id].info.start; + + if (hi_pool == NULL || lo_pool == NULL) + return -ENOMEM; + + /* Get the total count of in use entries in the high pool + */ + hi_cnt = ba_inuse_count(hi_pool); + + /* Copy each valid entry to the same low pool logical offset + */ + for (i = 0; i < hi_cnt; i++) { + /* Go through all the slices + */ + for (j = 0; j < num_slices; j++) { + /* Find next free starting from where we left off + */ + log_idx = ba_find_next_inuse(hi_pool, i); + + if (log_idx < 0) { + TFP_DRV_LOG(ERR, + "Expected a found %s entry %d\n", + tf_pool_2_str(hi_id), + i); + goto done; + } + /* The user should have never allocated from the low + * pool because the move only happens when switching + * from the high to the low pool + */ + if (ba_alloc_index(lo_pool, log_idx) < 0) { + TFP_DRV_LOG(ERR, + "Cannot allocate %s index %d\n", + tf_pool_2_str(lo_id), + i); + goto done; + } + + if (j == 0) { + rc = tf_tcam_shared_move_entry(tfp, dev, + hcapi_type, + parms->dir, + hi_start + log_idx, + lo_start + log_idx, + key_sz_bytes, + remap_sz_bytes, + num_slices); + if (rc) { + TFP_DRV_LOG(ERR, + "Cannot allocate %s index %d\n", + tf_pool_2_str(hi_id), + i); + goto done; + } + ba_free(hi_pool, log_idx); + TFP_DRV_LOG(DEBUG, + "%s: TCAM shared move pool(%s) phyid(%d)\n", + tf_dir_2_str(parms->dir), + tf_pool_2_str(hi_id), + hi_start + log_idx); + TFP_DRV_LOG(DEBUG, + "to pool(%s) phyid(%d)\n", + tf_pool_2_str(lo_id), + lo_start + log_idx); + } + } + } +done: + return rc; +} + +/* Normally, device specific code wouldn't reside here, it belongs + * in a separate device specific function in tf_device_pxx.c. + * But this code is placed here as it is not a long term solution + * and we would like to have this code centrally located for easy + * removal + */ +#define TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P4 12 +#define TF_TCAM_SHARED_REMAP_SZ_BYTES_P4 4 + +int tf_tcam_shared_move_p4(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms) +{ + int rc = 0; + rc = tf_tcam_shared_move(tfp, + parms, + TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P4, + TF_TCAM_SHARED_REMAP_SZ_BYTES_P4); + return rc; +} + +#define TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P58 24 +#define TF_TCAM_SHARED_REMAP_SZ_BYTES_P58 8 + +int tf_tcam_shared_move_p58(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms) +{ + int rc = 0; + rc = tf_tcam_shared_move(tfp, + parms, + TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P58, + TF_TCAM_SHARED_REMAP_SZ_BYTES_P58); + return rc; +} diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.h b/drivers/net/bnxt/tf_core/tf_tcam_shared.h index fad6e23b4c..5588125470 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam_shared.h +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.h @@ -124,4 +124,39 @@ int tf_tcam_shared_set(struct tf *tfp, int tf_tcam_shared_get(struct tf *tfp, struct tf_tcam_get_parms *parms); + +/** + * Moves entries from the WC_TCAM_HI to the WC_TCAM_LO shared pools + * for the P4 device. + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_move_p4(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms); + +/** + * Moves entries from the WC_TCAM_HI to the WC_TCAM_LO shared pools + * for the P58 device. + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_move_p58(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms); + #endif /* _TF_TCAM_SHARED_H */ From patchwork Sun Jun 13 00:06:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94116 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EFA13A0C41; Sun, 13 Jun 2021 02:10:18 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B7DA9411C0; Sun, 13 Jun 2021 02:07:32 +0200 (CEST) Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) by mails.dpdk.org (Postfix) with ESMTP id 7A8B541124 for ; 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Sat, 12 Jun 2021 17:07:26 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.24 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:25 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Venkat Duvvuru , Randy Schacher Date: Sat, 12 Jun 2021 17:06:15 -0700 Message-Id: <20210613000652.28191-22-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 21/58] net/bnxt: add API to get shared table increments X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith Add TRUFLOW API to get the shared table increment value for a given TRUFLOW table type. The API is being added for Wh+ and Thor devices. Signed-off-by: Farah Smith Signed-off-by: Venkat Duvvuru Reviewed-by: Randy Schacher Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_core.c | 52 +++++++++++++++++++++++ drivers/net/bnxt/tf_core/tf_core.h | 34 ++++++++++++++- drivers/net/bnxt/tf_core/tf_device.h | 17 ++++++++ drivers/net/bnxt/tf_core/tf_device_p4.c | 25 +++++++++++ drivers/net/bnxt/tf_core/tf_device_p58.c | 44 +++++++++++++++++++ drivers/net/bnxt/tf_core/tf_tcam_shared.c | 22 +++++++--- 6 files changed, 188 insertions(+), 6 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index 73dbee2940..0fbbd40252 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -1415,6 +1415,58 @@ tf_bulk_get_tbl_entry(struct tf *tfp, return rc; } +int tf_get_shared_tbl_increment(struct tf *tfp, + struct tf_get_shared_tbl_increment_parms *parms) +{ + int rc = 0; + struct tf_session *tfs; + struct tf_dev_info *dev; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + /* Internal table type processing */ + + if (dev->ops->tf_dev_get_shared_tbl_increment == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "%s: Operation not supported, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return -EOPNOTSUPP; + } + + rc = dev->ops->tf_dev_get_shared_tbl_increment(tfp, parms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Get table increment not supported, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + return rc; +} + int tf_alloc_tbl_scope(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms) diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 95cde2e8eb..44c30fa904 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -848,7 +848,6 @@ struct tf_get_session_info_parms { */ int tf_get_session_info(struct tf *tfp, struct tf_get_session_info_parms *parms); - /** * Experimental * @@ -1594,6 +1593,8 @@ int tf_move_tcam_shared_entries(struct tf *tfp, * @ref tf_get_tbl_entry * * @ref tf_bulk_get_tbl_entry + * + * @ref tf_get_shared_tbl_increment */ /** @@ -1844,6 +1845,37 @@ struct tf_set_tbl_entry_parms { int tf_set_tbl_entry(struct tf *tfp, struct tf_set_tbl_entry_parms *parms); +/** + * tf_get_shared_tbl_increment parameter definition + */ +struct tf_get_shared_tbl_increment_parms { + /** + * [in] Receive or transmit direction + */ + enum tf_dir dir; + /** + * [in] Type of object to set + */ + enum tf_tbl_type type; + /** + * [out] Value to increment by for resource type + */ + uint32_t increment_cnt; +}; + +/** + * tf_get_shared_tbl_increment + * + * This API is currently only required for use in the shared + * session for Thor (p58) actions. An increment count is returned per + * type to indicate how much to increment the start by for each + * entry (see tf_resource_info) + * + * Returns success or failure code. + */ +int tf_get_shared_tbl_increment(struct tf *tfp, + struct tf_get_shared_tbl_increment_parms *parms); + /** * tf_get_tbl_entry parameter definition */ diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index 48ab17d56b..1893f630e7 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -446,6 +446,23 @@ struct tf_dev_ops { int (*tf_dev_get_bulk_tbl)(struct tf *tfp, struct tf_tbl_get_bulk_parms *parms); + /** + * Gets the increment value to add to the shared session resource + * start offset by for each count in the "stride" + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to get shared tbl increment parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ + int (*tf_dev_get_shared_tbl_increment)(struct tf *tfp, + struct tf_get_shared_tbl_increment_parms *parms); + /** * Retrieves the table resource info. * diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index 67ef765236..239784897d 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -190,6 +190,26 @@ tf_dev_p4_map_parif(struct tf *tfp __rte_unused, return 0; } +/** + * Device specific function that retrieves the increment + * required for certain table types in a shared session + * + * [in] tfp + * tf handle + * + * [in/out] parms + * pointer to parms structure + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +static int tf_dev_p4_get_shared_tbl_increment(struct tf *tfp __rte_unused, + struct tf_get_shared_tbl_increment_parms *parms) +{ + parms->increment_cnt = 1; + return 0; +} static int tf_dev_p4_get_mailbox(void) { return TF_KONG_MB; @@ -221,12 +241,16 @@ const struct tf_dev_ops tf_dev_ops_p4_init = { .tf_dev_set_ext_tbl = NULL, .tf_dev_get_tbl = NULL, .tf_dev_get_bulk_tbl = NULL, + .tf_dev_get_shared_tbl_increment = tf_dev_p4_get_shared_tbl_increment, .tf_dev_get_tbl_resc_info = NULL, .tf_dev_alloc_tcam = NULL, .tf_dev_free_tcam = NULL, .tf_dev_alloc_search_tcam = NULL, .tf_dev_set_tcam = NULL, .tf_dev_get_tcam = NULL, +#ifdef TF_TCAM_SHARED + .tf_dev_move_tcam = NULL, +#endif /* TF_TCAM_SHARED */ .tf_dev_get_tcam_resc_info = NULL, .tf_dev_insert_int_em_entry = NULL, .tf_dev_delete_int_em_entry = NULL, @@ -266,6 +290,7 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_set_ext_tbl = tf_tbl_ext_common_set, .tf_dev_get_tbl = tf_tbl_get, .tf_dev_get_bulk_tbl = tf_tbl_bulk_get, + .tf_dev_get_shared_tbl_increment = tf_dev_p4_get_shared_tbl_increment, .tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info, #ifdef TF_TCAM_SHARED .tf_dev_alloc_tcam = tf_tcam_shared_alloc, diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index fd2703129f..483f771999 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -151,6 +151,48 @@ static int tf_dev_p58_word_align(uint16_t size) return ((((size) + 63) >> 6) * 8); } +/** + * Device specific function that retrieves the increment + * required for certain table types in a shared session + * + * [in] tfp + * tf handle + * + * [in/out] parms + * pointer to parms structure + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +static int tf_dev_p58_get_shared_tbl_increment(struct tf *tfp __rte_unused, + struct tf_get_shared_tbl_increment_parms *parms) +{ + switch (parms->type) { + case TF_TBL_TYPE_FULL_ACT_RECORD: + case TF_TBL_TYPE_COMPACT_ACT_RECORD: + case TF_TBL_TYPE_ACT_ENCAP_8B: + case TF_TBL_TYPE_ACT_ENCAP_16B: + case TF_TBL_TYPE_ACT_ENCAP_32B: + case TF_TBL_TYPE_ACT_ENCAP_64B: + case TF_TBL_TYPE_ACT_SP_SMAC: + case TF_TBL_TYPE_ACT_SP_SMAC_IPV4: + case TF_TBL_TYPE_ACT_SP_SMAC_IPV6: + case TF_TBL_TYPE_ACT_STATS_64: + case TF_TBL_TYPE_ACT_MODIFY_IPV4: + case TF_TBL_TYPE_ACT_MODIFY_8B: + case TF_TBL_TYPE_ACT_MODIFY_16B: + case TF_TBL_TYPE_ACT_MODIFY_32B: + case TF_TBL_TYPE_ACT_MODIFY_64B: + parms->increment_cnt = 8; + break; + default: + parms->increment_cnt = 1; + break; + } + return 0; +} + #define TF_DEV_P58_BANK_SZ_64B 2048 /** * Get SRAM table information. @@ -243,6 +285,7 @@ const struct tf_dev_ops tf_dev_ops_p58_init = { .tf_dev_set_ext_tbl = NULL, .tf_dev_get_tbl = NULL, .tf_dev_get_bulk_tbl = NULL, + .tf_dev_get_shared_tbl_increment = tf_dev_p58_get_shared_tbl_increment, .tf_dev_get_tbl_resc_info = NULL, .tf_dev_alloc_tcam = NULL, .tf_dev_free_tcam = NULL, @@ -288,6 +331,7 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_set_ext_tbl = tf_tbl_ext_common_set, .tf_dev_get_tbl = tf_tbl_get, .tf_dev_get_bulk_tbl = tf_tbl_bulk_get, + .tf_dev_get_shared_tbl_increment = tf_dev_p58_get_shared_tbl_increment, .tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info, #ifdef TF_TCAM_SHARED .tf_dev_alloc_tcam = tf_tcam_shared_alloc, diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.c b/drivers/net/bnxt/tf_core/tf_tcam_shared.c index 0e8cb78f8d..f0727cea80 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam_shared.c +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.c @@ -858,6 +858,10 @@ union tf_tmp_key { uint8_t bytes[(TF_TMP_MAX_KEY_BITLEN + 7) / 8]; }; +/** p58 has an enable bit, p4 does not + */ +#define TF_TCAM_SHARED_ENTRY_ENABLE 0x8 + /** Move a WC TCAM entry from the high offset to the same low offset */ static int @@ -869,7 +873,8 @@ tf_tcam_shared_move_entry(struct tf *tfp, int dphy_idx, int key_sz_bytes, int remap_sz_bytes, - uint16_t num_slices) + uint16_t num_slices, + bool set_enable_bit) { int rc = 0; struct tf_tcam_get_parms gparms; @@ -911,6 +916,9 @@ tf_tcam_shared_move_entry(struct tf *tfp, return rc; } + if (set_enable_bit) + tcam_key_obj.bytes[0] |= TF_TCAM_SHARED_ENTRY_ENABLE; + /* Override HI/LO type with parent WC TCAM type */ sparms.hcapi_type = hcapi_type; sparms.dir = dir; @@ -960,7 +968,8 @@ static int tf_tcam_shared_move(struct tf *tfp, struct tf_move_tcam_shared_entries_parms *parms, int key_sz_bytes, - int remap_sz_bytes) + int remap_sz_bytes, + bool set_enable_bit) { int rc; struct tf_session *tfs; @@ -1084,7 +1093,8 @@ int tf_tcam_shared_move(struct tf *tfp, lo_start + log_idx, key_sz_bytes, remap_sz_bytes, - num_slices); + num_slices, + set_enable_bit); if (rc) { TFP_DRV_LOG(ERR, "Cannot allocate %s index %d\n", @@ -1125,7 +1135,8 @@ int tf_tcam_shared_move_p4(struct tf *tfp, rc = tf_tcam_shared_move(tfp, parms, TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P4, - TF_TCAM_SHARED_REMAP_SZ_BYTES_P4); + TF_TCAM_SHARED_REMAP_SZ_BYTES_P4, + false); /* no enable bit */ return rc; } @@ -1139,6 +1150,7 @@ int tf_tcam_shared_move_p58(struct tf *tfp, rc = tf_tcam_shared_move(tfp, parms, TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P58, - TF_TCAM_SHARED_REMAP_SZ_BYTES_P58); + TF_TCAM_SHARED_REMAP_SZ_BYTES_P58, + true); /* set enable bit */ return rc; } From patchwork Sun Jun 13 00:06:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94117 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CAB87A0C41; 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Sat, 12 Jun 2021 17:07:26 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Farah Smith , Venkat Duvvuru , Randy Schacher Date: Sat, 12 Jun 2021 17:06:16 -0700 Message-Id: <20210613000652.28191-23-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 22/58] net/bnxt: refactor host session failure cleanup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding - Close FW session if session open fails after Fw session open. - Additional WC TCAM debug info to help in future debug - Reduce key/mask buffer sizes for performance - When a 64b counter is freed, clear the entry Signed-off-by: Jay Ding Signed-off-by: Farah Smith Signed-off-by: Venkat Duvvuru Reviewed-by: Randy Schacher Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_em_internal.c | 15 +++--- drivers/net/bnxt/tf_core/tf_identifier.c | 14 ++++-- drivers/net/bnxt/tf_core/tf_msg.c | 24 ++------- drivers/net/bnxt/tf_core/tf_msg.h | 9 +++- drivers/net/bnxt/tf_core/tf_rm.c | 59 +++-------------------- drivers/net/bnxt/tf_core/tf_session.c | 32 ++++++++++-- drivers/net/bnxt/tf_core/tf_tbl.c | 51 ++++++++++++++++++-- drivers/net/bnxt/tf_core/tf_tcam.c | 14 ++++-- drivers/net/bnxt/tf_core/tf_tcam_shared.c | 41 ++++++++-------- 9 files changed, 138 insertions(+), 121 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c index 28ffbd5876..0720bb905d 100644 --- a/drivers/net/bnxt/tf_core/tf_em_internal.c +++ b/drivers/net/bnxt/tf_core/tf_em_internal.c @@ -543,18 +543,21 @@ tf_em_get_resc_info(struct tf *tfp, TF_CHECK_PARMS2(tfp, em); rc = tf_session_get_db(tfp, TF_MODULE_TYPE_EM, &em_db_ptr); - if (rc) { - TFP_DRV_LOG(INFO, - "No resource allocated for em from session\n"); - return 0; - } + if (rc == -ENOMEM) + return 0; /* db does not exist */ + else if (rc) + return rc; /* db error */ + em_db = (struct em_rm_db *)em_db_ptr; - /* check if reserved resource for WC is multiple of num_slices */ + /* check if reserved resource for EM is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { ainfo.rm_db = em_db->em_db[d]; dinfo = em[d].info; + if (!ainfo.rm_db) + continue; + ainfo.info = (struct tf_rm_alloc_info *)dinfo; ainfo.subtype = 0; rc = tf_rm_get_all_info(&ainfo, TF_EM_TBL_TYPE_MAX); diff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c index 9f27a41fcf..c491f77a2b 100644 --- a/drivers/net/bnxt/tf_core/tf_identifier.c +++ b/drivers/net/bnxt/tf_core/tf_identifier.c @@ -369,16 +369,20 @@ tf_ident_get_resc_info(struct tf *tfp, TF_CHECK_PARMS2(tfp, ident); rc = tf_session_get_db(tfp, TF_MODULE_TYPE_IDENTIFIER, &ident_db_ptr); - if (rc) { - TFP_DRV_LOG(INFO, - "No resource allocated for ident from session\n"); - return 0; - } + if (rc == -ENOMEM) + return 0; /* db doesn't exist */ + else if (rc) + return rc; /* error getting db */ + ident_db = (struct ident_rm_db *)ident_db_ptr; /* check if reserved resource for WC is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { ainfo.rm_db = ident_db->ident_db[d]; + + if (!ainfo.rm_db) + continue; + dinfo = ident[d].info; ainfo.info = (struct tf_rm_alloc_info *)dinfo; diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index 18eea8338a..fbd4b1d910 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -267,31 +267,13 @@ tf_msg_session_client_unregister(struct tf *tfp, int tf_msg_session_close(struct tf *tfp, - struct tf_session *tfs) + uint8_t fw_session_id, + int mailbox) { int rc; struct hwrm_tf_session_close_input req = { 0 }; struct hwrm_tf_session_close_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; - uint8_t fw_session_id; - struct tf_dev_info *dev; - - /* Retrieve the device information */ - rc = tf_session_get_device(tfs, &dev); - if (rc) { - TFP_DRV_LOG(ERR, - "Failed to lookup device, rc:%s\n", - strerror(-rc)); - return rc; - } - - rc = tf_session_get_fw_session_id(tfp, &fw_session_id); - if (rc) { - TFP_DRV_LOG(ERR, - "Unable to lookup FW id, rc:%s\n", - strerror(-rc)); - return rc; - } /* Populate the request */ req.fw_session_id = tfp_cpu_to_le_32(fw_session_id); @@ -301,7 +283,7 @@ tf_msg_session_close(struct tf *tfp, parms.req_size = sizeof(req); parms.resp_data = (uint32_t *)&resp; parms.resp_size = sizeof(resp); - parms.mailbox = dev->ops->tf_dev_get_mailbox(); + parms.mailbox = mailbox; rc = tfp_send_msg_direct(tf_session_get_bp(tfp), &parms); diff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h index e8662fef0e..b26b15bfa3 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.h +++ b/drivers/net/bnxt/tf_core/tf_msg.h @@ -115,11 +115,18 @@ int tf_msg_session_client_unregister(struct tf *tfp, * [in] session * Pointer to session handle * + * [in] fw_session_id + * fw session id + * + * [in] mailbox + * mailbox + * * Returns: * 0 on Success else internal Truflow error */ int tf_msg_session_close(struct tf *tfp, - struct tf_session *tfs); + uint8_t fw_session_id, + int mailbox); /** * Sends session query config request to TF Firmware diff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c index f44b5b1ab6..dcfba24b2c 100644 --- a/drivers/net/bnxt/tf_core/tf_rm.c +++ b/drivers/net/bnxt/tf_core/tf_rm.c @@ -18,9 +18,6 @@ #include "tfp.h" #include "tf_msg.h" -/* Logging defines */ -#define TF_RM_DEBUG 0 - /** * Generic RM Element data type that an RM DB is build upon. */ @@ -204,44 +201,6 @@ tf_rm_adjust_index(struct tf_rm_element *db, return rc; } -/** - * Logs an array of found residual entries to the console. - * - * [in] dir - * Receive or transmit direction - * - * [in] module - * Type of Device Module - * - * [in] count - * Number of entries in the residual array - * - * [in] residuals - * Pointer to an array of residual entries. Array is index same as - * the DB in which this function is used. Each entry holds residual - * value for that entry. - */ -static void -tf_rm_log_residuals(enum tf_dir dir, - enum tf_module_type module, - uint16_t count, - uint16_t *residuals) -{ - int i; - - /* Walk the residual array and log the types that wasn't - * cleaned up to the console. - */ - for (i = 0; i < count; i++) { - if (residuals[i] != 0) - TFP_DRV_LOG(ERR, - "%s, %s was not cleaned up, %d outstanding\n", - tf_dir_2_str(dir), - tf_module_subtype_2_str(module, i), - residuals[i]); - } -} - /** * Performs a check of the passed in DB for any lingering elements. If * a resource type was found to not have been cleaned up by the caller @@ -357,11 +316,6 @@ tf_rm_check_residuals(struct tf_rm_new_db *rm_db, *resv_size = found; } - tf_rm_log_residuals(rm_db->dir, - rm_db->module, - rm_db->num_entries, - residuals); - tfp_free((void *)residuals); *resv = local_resv; @@ -544,11 +498,6 @@ tf_rm_create_db(struct tf *tfp, &hcapi_items); if (hcapi_items == 0) { - TFP_DRV_LOG(ERR, - "%s: module:%s Empty RM DB create request\n", - tf_dir_2_str(parms->dir), - tf_module_2_str(parms->module)); - parms->rm_db = NULL; return -ENOMEM; } @@ -1296,7 +1245,13 @@ tf_rm_get_all_info(struct tf_rm_get_alloc_info_parms *parms, int size) struct tf_rm_alloc_info *info = parms->info; int i; - TF_CHECK_PARMS2(parms, parms->rm_db); + TF_CHECK_PARMS1(parms); + + /* No rm info available for this module type + */ + if (!parms->rm_db) + return -ENOMEM; + rm_db = (struct tf_rm_new_db *)parms->rm_db; TF_CHECK_PARMS1(rm_db->db); diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index 70844edb50..71ccb2e3e7 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -215,6 +215,16 @@ tf_session_create(struct tf *tfp, return 0; cleanup: + rc = tf_msg_session_close(tfp, + fw_session_id, + dev.ops->tf_dev_get_mailbox()); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "FW Session close failed, rc:%s\n", + strerror(-rc)); + } + tfp_free(tfp->session->core_data); tfp_free(tfp->session); tfp->session = NULL; @@ -479,6 +489,8 @@ tf_session_close_session(struct tf *tfp, struct tf_dev_info *tfd = NULL; struct tf_session_client_destroy_parms scdparms; uint16_t fid; + uint8_t fw_session_id = 1; + int mailbox = 0; TF_CHECK_PARMS2(tfp, parms); @@ -563,6 +575,16 @@ tf_session_close_session(struct tf *tfp, return rc; } + mailbox = tfd->ops->tf_dev_get_mailbox(); + + rc = tf_session_get_fw_session_id(tfp, &fw_session_id); + if (rc) { + TFP_DRV_LOG(ERR, + "Unable to lookup FW id, rc:%s\n", + strerror(-rc)); + return rc; + } + /* Unbind the device */ rc = tf_dev_unbind(tfp, tfd); if (rc) { @@ -572,7 +594,7 @@ tf_session_close_session(struct tf *tfp, strerror(-rc)); } - rc = tf_msg_session_close(tfp, tfs); + rc = tf_msg_session_close(tfp, fw_session_id, mailbox); if (rc) { /* Log error */ TFP_DRV_LOG(ERR, @@ -881,26 +903,26 @@ tf_session_get_db(struct tf *tfp, if (tfs->id_db_handle) *db_handle = tfs->id_db_handle; else - rc = -EINVAL; + rc = -ENOMEM; break; case TF_MODULE_TYPE_TABLE: if (tfs->tbl_db_handle) *db_handle = tfs->tbl_db_handle; else - rc = -EINVAL; + rc = -ENOMEM; break; case TF_MODULE_TYPE_TCAM: if (tfs->tcam_db_handle) *db_handle = tfs->tcam_db_handle; else - rc = -EINVAL; + rc = -ENOMEM; break; case TF_MODULE_TYPE_EM: if (tfs->em_db_handle) *db_handle = tfs->em_db_handle; else - rc = -EINVAL; + rc = -ENOMEM; break; default: rc = -EINVAL; diff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c index 6842291adf..ced59130b2 100644 --- a/drivers/net/bnxt/tf_core/tf_tbl.c +++ b/drivers/net/bnxt/tf_core/tf_tbl.c @@ -270,6 +270,44 @@ tf_tbl_free(struct tf *tfp __rte_unused, parms->idx); return -EINVAL; } + + /* If this is counter table, clear the entry on free */ + if (parms->type == TF_TBL_TYPE_ACT_STATS_64) { + uint8_t data[8] = { 0 }; + uint16_t hcapi_type = 0; + struct tf_rm_get_hcapi_parms hparms = { 0 }; + + /* Get the hcapi type */ + hparms.rm_db = tbl_db->tbl_db[parms->dir]; + hparms.subtype = parms->type; + hparms.hcapi_type = &hcapi_type; + rc = tf_rm_get_hcapi_type(&hparms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s, Failed type lookup, type:%d, rc:%s\n", + tf_dir_2_str(parms->dir), + parms->type, + strerror(-rc)); + return rc; + } + /* Clear the counter + */ + rc = tf_msg_set_tbl_entry(tfp, + parms->dir, + hcapi_type, + sizeof(data), + data, + parms->idx); + if (rc) { + TFP_DRV_LOG(ERR, + "%s, Set failed, type:%d, rc:%s\n", + tf_dir_2_str(parms->dir), + parms->type, + strerror(-rc)); + return rc; + } + } + /* Free requested element */ fparms.rm_db = tbl_db->tbl_db[parms->dir]; fparms.subtype = parms->type; @@ -643,11 +681,11 @@ tf_tbl_get_resc_info(struct tf *tfp, return rc; rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TABLE, &tbl_db_ptr); - if (rc) { - TFP_DRV_LOG(INFO, - "No resource allocated for table from session\n"); - return 0; - } + if (rc == -ENOMEM) + return 0; /* db doesn't exist */ + else if (rc) + return rc; /* error getting db */ + tbl_db = (struct tbl_rm_db *)tbl_db_ptr; /* check if reserved resource for WC is multiple of num_slices */ @@ -655,6 +693,9 @@ tf_tbl_get_resc_info(struct tf *tfp, ainfo.rm_db = tbl_db->tbl_db[d]; dinfo = tbl[d].info; + if (!ainfo.rm_db) + continue; + ainfo.info = (struct tf_rm_alloc_info *)dinfo; ainfo.subtype = 0; rc = tf_rm_get_all_info(&ainfo, TF_TBL_TYPE_MAX); diff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c index d7e12e00ef..45206c5992 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam.c +++ b/drivers/net/bnxt/tf_core/tf_tcam.c @@ -818,16 +818,20 @@ tf_tcam_get_resc_info(struct tf *tfp, TF_CHECK_PARMS2(tfp, tcam); rc = tf_session_get_db(tfp, TF_MODULE_TYPE_TCAM, &tcam_db_ptr); - if (rc) { - TFP_DRV_LOG(INFO, - "No resource allocated for tcam from session\n"); - return 0; - } + if (rc == -ENOMEM) + return 0; /* db doesn't exist */ + else if (rc) + return rc; /* error getting db */ + tcam_db = (struct tcam_rm_db *)tcam_db_ptr; /* check if reserved resource for WC is multiple of num_slices */ for (d = 0; d < TF_DIR_MAX; d++) { ainfo.rm_db = tcam_db->tcam_db[d]; + + if (!ainfo.rm_db) + continue; + dinfo = tcam[d].info; ainfo.info = (struct tf_rm_alloc_info *)dinfo; diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.c b/drivers/net/bnxt/tf_core/tf_tcam_shared.c index f0727cea80..5139b28537 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam_shared.c +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.c @@ -842,20 +842,28 @@ tf_tcam_shared_get(struct tf *tfp __rte_unused, return 0; } -/* Temporary builder defines pulled in here and renamed +/* Normally, device specific code wouldn't reside here, it belongs + * in a separate device specific function in tf_device_pxx.c. + * But this code is placed here as it is not a long term solution + * and we would like to have this code centrally located for easy + * removal */ -#define TF_TMP_MAX_FIELD_BITLEN 512 +#define TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P4 12 +#define TF_TCAM_SHARED_REMAP_SZ_BYTES_P4 4 +#define TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P58 24 +#define TF_TCAM_SHARED_REMAP_SZ_BYTES_P58 8 +/* Temporary builder defines pulled in here and adjusted + * for max WC TCAM values + */ union tf_tmp_field_obj { - uint8_t bytes[(TF_TMP_MAX_FIELD_BITLEN + 7) / 8]; + uint32_t words[(TF_TCAM_SHARED_REMAP_SZ_BYTES_P58 + 3) / 4]; + uint8_t bytes[TF_TCAM_SHARED_REMAP_SZ_BYTES_P58]; }; -#define TF_TMP_MAX_KEY_BITLEN 768 -#define TF_TMP_MAX_KEY_WORDLEN ((TF_TMP_MAX_KEY_BITLEN + 63) / 64) - union tf_tmp_key { - uint32_t words[(TF_TMP_MAX_KEY_BITLEN + 31) / 32]; - uint8_t bytes[(TF_TMP_MAX_KEY_BITLEN + 7) / 8]; + uint32_t words[(TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P58 + 3) / 4]; + uint8_t bytes[TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P58]; }; /** p58 has an enable bit, p4 does not @@ -934,9 +942,10 @@ tf_tcam_shared_move_entry(struct tf *tfp, if (rc) { /* Log error */ TFP_DRV_LOG(ERR, - "%s: WC_TCAM_LOW phyid(%d) set failed, rc:%s", + "%s: WC_TCAM_LOW phyid(%d/0x%x) set failed, rc:%s", tf_dir_2_str(dir), sparms.idx, + sparms.idx, strerror(-rc)); return rc; } @@ -951,10 +960,11 @@ tf_tcam_shared_move_entry(struct tf *tfp, if (rc) { /* Log error */ TFP_DRV_LOG(ERR, - "%s: %s: phyid(%d) free failed, rc:%s\n", + "%s: %s: phyid(%d/0x%x) free failed, rc:%s\n", tf_dir_2_str(dir), tf_tcam_tbl_2_str(fparms.type), sphy_idx, + sphy_idx, strerror(-rc)); return rc; } @@ -1119,15 +1129,6 @@ int tf_tcam_shared_move(struct tf *tfp, return rc; } -/* Normally, device specific code wouldn't reside here, it belongs - * in a separate device specific function in tf_device_pxx.c. - * But this code is placed here as it is not a long term solution - * and we would like to have this code centrally located for easy - * removal - */ -#define TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P4 12 -#define TF_TCAM_SHARED_REMAP_SZ_BYTES_P4 4 - int tf_tcam_shared_move_p4(struct tf *tfp, struct tf_move_tcam_shared_entries_parms *parms) { @@ -1140,8 +1141,6 @@ int tf_tcam_shared_move_p4(struct tf *tfp, return rc; } -#define TF_TCAM_SHARED_KEY_SLICE_SZ_BYTES_P58 24 -#define TF_TCAM_SHARED_REMAP_SZ_BYTES_P58 8 int tf_tcam_shared_move_p58(struct tf *tfp, struct tf_move_tcam_shared_entries_parms *parms) From patchwork Sun Jun 13 00:06:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94118 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E2206A0C41; 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Sat, 12 Jun 2021 17:07:28 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Venkat Duvvuru , Randy Schacher Date: Sat, 12 Jun 2021 17:06:17 -0700 Message-Id: <20210613000652.28191-24-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 23/58] net/bnxt: cleanup WC TCAM shared pool X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith Clean up all allocated hi or lo pool TCAM regions on close. Along with message cleanup and remove unnecessary multi-slice options Also make sure that find next free entry should start from 0 first time. Signed-off-by: Farah Smith Signed-off-by: Venkat Duvvuru Reviewed-by: Randy Schacher Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_tcam_shared.c | 333 ++++++++++++---------- 1 file changed, 179 insertions(+), 154 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.c b/drivers/net/bnxt/tf_core/tf_tcam_shared.c index 5139b28537..b96d9ca9dd 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam_shared.c +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.c @@ -19,8 +19,6 @@ #include "tf_core.h" #include "tf_rm.h" -struct tf; - /** Shared WC TCAM pool identifiers */ enum tf_tcam_shared_wc_pool_id { @@ -288,6 +286,12 @@ tf_tcam_shared_bind(struct tf *tfp, if (rc) return rc; + if (num_slices > 1) { + TFP_DRV_LOG(ERR, + "Only single slice supported\n"); + return -EOPNOTSUPP; + } + tf_tcam_shared_create_db(&tcam_shared_wc); @@ -338,49 +342,135 @@ int tf_tcam_shared_unbind(struct tf *tfp) { int rc, dir; + struct tf_dev_info *dev; struct tf_session *tfs; void *tcam_shared_db_ptr = NULL; struct tf_tcam_shared_wc_pools *tcam_shared_wc; + enum tf_tcam_shared_wc_pool_id pool_id; + struct tf_tcam_free_parms parms; + struct bitalloc *pool; + uint16_t start; + int log_idx, phy_idx; + uint16_t hcapi_type; + struct tf_rm_alloc_info info; + int i, pool_cnt; TF_CHECK_PARMS1(tfp); - /* Perform normal unbind, this will write all the - * allocated TCAM entries in the shared session. - */ - rc = tf_tcam_unbind(tfp); - if (rc) - return rc; - /* Retrieve the session information */ rc = tf_session_get_session_internal(tfp, &tfs); if (rc) return rc; - rc = tf_session_get_tcam_shared_db(tfp, (void *)&tcam_shared_db_ptr); + /* If not the shared session, call the normal + * tcam unbind and exit + */ + if (!tf_session_is_shared_session(tfs)) { + rc = tf_tcam_unbind(tfp); + return rc; + } + + /* We must be a shared session, get the database + */ + rc = tf_session_get_tcam_shared_db(tfp, + (void *)&tcam_shared_db_ptr); if (rc) { TFP_DRV_LOG(ERR, - "Failed to get tcam_shared_db from session, rc:%s\n", + "Failed to get tcam_shared_db, rc:%s\n", strerror(-rc)); return rc; } - tcam_shared_wc = (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; - /* If we are the shared session + tcam_shared_wc = + (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; + + + /* Get the device */ - if (tf_session_is_shared_session(tfs)) { - /* If there are WC TCAM entries allocated, free them + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + + /* If there are WC TCAM entries allocated, free them + */ + for (dir = 0; dir < TF_DIR_MAX; dir++) { + /* If the database is invalid, skip */ - for (dir = 0; dir < TF_DIR_MAX; dir++) { - tf_tcam_shared_free_wc_pool(dir, - TF_TCAM_SHARED_WC_POOL_HI, - tcam_shared_wc); + if (!tf_tcam_db_valid(tfp, dir)) + continue; + + rc = tf_tcam_shared_get_rm_info(tfp, + dir, + &hcapi_type, + &info); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM shared rm info get failed\n", + tf_dir_2_str(dir)); + return rc; + } + + for (pool_id = TF_TCAM_SHARED_WC_POOL_HI; + pool_id < TF_TCAM_SHARED_WC_POOL_MAX; + pool_id++) { + pool = tcam_shared_wc->db[dir][pool_id].pool; + start = tcam_shared_wc->db[dir][pool_id].info.start; + pool_cnt = ba_inuse_count(pool); + + if (pool_cnt) { + TFP_DRV_LOG(INFO, + "%s: %s: %d residuals found, freeing\n", + tf_dir_2_str(dir), + tf_pool_2_str(pool_id), + pool_cnt); + } + + log_idx = 0; + + for (i = 0; i < pool_cnt; i++) { + log_idx = ba_find_next_inuse(pool, log_idx); + + if (log_idx < 0) { + TFP_DRV_LOG(ERR, + "Expected a found %s entry %d\n", + tf_pool_2_str(pool_id), + i); + /* attempt normal unbind + */ + goto done; + } + phy_idx = start + log_idx; + + parms.type = TF_TCAM_TBL_TYPE_WC_TCAM; + parms.hcapi_type = hcapi_type; + parms.idx = phy_idx; + parms.dir = dir; + rc = tf_msg_tcam_entry_free(tfp, dev, &parms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: %s: %d free failed, rc:%s\n", + tf_dir_2_str(parms.dir), + tf_tcam_tbl_2_str(parms.type), + phy_idx, + strerror(-rc)); + return rc; + } + } + /* Free the pool once all the entries + * have been cleared + */ tf_tcam_shared_free_wc_pool(dir, - TF_TCAM_SHARED_WC_POOL_LO, + pool_id, tcam_shared_wc); } } - return 0; +done: + rc = tf_tcam_unbind(tfp); + return rc; } + /** * tf_tcam_shared_alloc */ @@ -388,13 +478,12 @@ int tf_tcam_shared_alloc(struct tf *tfp, struct tf_tcam_alloc_parms *parms) { - int rc, i; + int rc; struct tf_session *tfs; struct tf_dev_info *dev; int log_idx; struct bitalloc *pool; enum tf_tcam_shared_wc_pool_id id; - uint16_t num_slices; struct tf_tcam_shared_wc_pools *tcam_shared_wc; void *tcam_shared_db_ptr = NULL; @@ -444,32 +533,24 @@ tf_tcam_shared_alloc(struct tf *tfp, if (rc) return rc; - rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); - if (rc) - return rc; - pool = tcam_shared_wc->db[parms->dir][id].pool; - for (i = 0; i < num_slices; i++) { - /* - * priority 0: allocate from top of the tcam i.e. high - * priority !0: allocate index from bottom i.e lowest - */ - if (parms->priority) - log_idx = ba_alloc_reverse(pool); - else - log_idx = ba_alloc(pool); - if (log_idx == BA_FAIL) { - TFP_DRV_LOG(ERR, - "%s: Allocation failed, rc:%s\n", - tf_dir_2_str(parms->dir), - strerror(ENOMEM)); - return -ENOMEM; - } - /* return the index without the start of each row */ - if (i == 0) - parms->idx = log_idx; + /* + * priority 0: allocate from top of the tcam i.e. high + * priority !0: allocate index from bottom i.e lowest + */ + if (parms->priority) + log_idx = ba_alloc_reverse(pool); + else + log_idx = ba_alloc(pool); + if (log_idx == BA_FAIL) { + TFP_DRV_LOG(ERR, + "%s: Allocation failed, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(ENOMEM)); + return -ENOMEM; } + parms->idx = log_idx; return 0; } @@ -481,13 +562,11 @@ tf_tcam_shared_free(struct tf *tfp, struct tf_session *tfs; struct tf_dev_info *dev; int allocated = 0; - int i; uint16_t start; int phy_idx; struct bitalloc *pool; enum tf_tcam_shared_wc_pool_id id; struct tf_tcam_free_parms nparms; - uint16_t num_slices; uint16_t hcapi_type; struct tf_rm_alloc_info info; void *tcam_shared_db_ptr = NULL; @@ -540,10 +619,6 @@ tf_tcam_shared_free(struct tf *tfp, if (rc) return rc; - rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); - if (rc) - return rc; - rc = tf_tcam_shared_get_rm_info(tfp, parms->dir, &hcapi_type, @@ -558,13 +633,6 @@ tf_tcam_shared_free(struct tf *tfp, pool = tcam_shared_wc->db[parms->dir][id].pool; start = tcam_shared_wc->db[parms->dir][id].info.start; - if (parms->idx % num_slices) { - TFP_DRV_LOG(ERR, - "%s: TCAM reserved resource is not multiple of %d\n", - tf_dir_2_str(parms->dir), num_slices); - return -EINVAL; - } - phy_idx = parms->idx + start; allocated = ba_inuse(pool, parms->idx); @@ -575,16 +643,14 @@ tf_tcam_shared_free(struct tf *tfp, return -EINVAL; } - for (i = 0; i < num_slices; i++) { - rc = ba_free(pool, parms->idx + i); - if (rc) { - TFP_DRV_LOG(ERR, - "%s: Free failed, type:%s, idx:%d\n", - tf_dir_2_str(parms->dir), - tf_tcam_tbl_2_str(parms->type), - parms->idx); - return rc; - } + rc = ba_free(pool, parms->idx); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Free failed, type:%s, idx:%d\n", + tf_dir_2_str(parms->dir), + tf_tcam_tbl_2_str(parms->type), + parms->idx); + return rc; } /* Override HI/LO type with parent WC TCAM type */ @@ -616,7 +682,6 @@ tf_tcam_shared_set(struct tf *tfp __rte_unused, struct tf_dev_info *dev; int allocated = 0; int phy_idx, log_idx; - uint16_t num_slices; struct tf_tcam_set_parms nparms; struct bitalloc *pool; uint16_t start; @@ -685,16 +750,7 @@ tf_tcam_shared_set(struct tf *tfp __rte_unused, tf_dir_2_str(parms->dir), parms->type, log_idx); return -EINVAL; } - rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); - if (rc) - return rc; - if (parms->idx % num_slices) { - TFP_DRV_LOG(ERR, - "%s: TCAM reserved resource is not multiple of %d\n", - tf_dir_2_str(parms->dir), num_slices); - return -EINVAL; - } rc = tf_tcam_shared_get_rm_info(tfp, parms->dir, &hcapi_type, @@ -736,7 +792,6 @@ tf_tcam_shared_get(struct tf *tfp __rte_unused, struct tf_dev_info *dev; int allocated = 0; int phy_idx, log_idx; - uint16_t num_slices; struct tf_tcam_get_parms nparms; struct bitalloc *pool; uint16_t start; @@ -794,16 +849,6 @@ tf_tcam_shared_get(struct tf *tfp __rte_unused, pool = tcam_shared_wc->db[parms->dir][id].pool; start = tcam_shared_wc->db[parms->dir][id].info.start; - rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); - if (rc) - return rc; - - if (parms->idx % num_slices) { - TFP_DRV_LOG(ERR, - "%s: TCAM reserved resource is not multiple of %d\n", - tf_dir_2_str(parms->dir), num_slices); - return -EINVAL; - } log_idx = parms->idx; phy_idx = parms->idx + start; allocated = ba_inuse(pool, parms->idx); @@ -881,7 +926,6 @@ tf_tcam_shared_move_entry(struct tf *tfp, int dphy_idx, int key_sz_bytes, int remap_sz_bytes, - uint16_t num_slices, bool set_enable_bit) { int rc = 0; @@ -897,12 +941,6 @@ tf_tcam_shared_move_entry(struct tf *tfp, memset(&tcam_remap_obj, 0, sizeof(tcam_remap_obj)); memset(&gparms, 0, sizeof(gparms)); - if (num_slices > 1) { - TFP_DRV_LOG(ERR, - "Only single slice supported"); - return -EOPNOTSUPP; - } - gparms.hcapi_type = hcapi_type; gparms.dir = dir; gparms.type = TF_TCAM_TBL_TYPE_WC_TCAM; @@ -917,7 +955,8 @@ tf_tcam_shared_move_entry(struct tf *tfp, if (rc) { /* Log error */ TFP_DRV_LOG(ERR, - "%s: WC_TCAM_HIGH: phyid(%d) get failed, rc:%s", + "%s: %s: phyid(%d) get failed, rc:%s\n", + tf_tcam_tbl_2_str(gparms.type), tf_dir_2_str(dir), gparms.idx, strerror(-rc)); @@ -942,7 +981,8 @@ tf_tcam_shared_move_entry(struct tf *tfp, if (rc) { /* Log error */ TFP_DRV_LOG(ERR, - "%s: WC_TCAM_LOW phyid(%d/0x%x) set failed, rc:%s", + "%s: %s phyid(%d/0x%x) set failed, rc:%s\n", + tf_tcam_tbl_2_str(sparms.type), tf_dir_2_str(dir), sparms.idx, sparms.idx, @@ -985,13 +1025,12 @@ int tf_tcam_shared_move(struct tf *tfp, struct tf_session *tfs; struct tf_dev_info *dev; int log_idx; - uint16_t num_slices; struct bitalloc *hi_pool, *lo_pool; uint16_t hi_start, lo_start; enum tf_tcam_shared_wc_pool_id hi_id, lo_id; uint16_t hcapi_type; struct tf_rm_alloc_info info; - int hi_cnt, i, j; + int hi_cnt, i; struct tf_tcam_shared_wc_pools *tcam_shared_wc; void *tcam_shared_db_ptr = NULL; @@ -1027,9 +1066,6 @@ int tf_tcam_shared_move(struct tf *tfp, /* TODO print amazing error */ return rc; } - rc = tf_tcam_shared_get_slices(tfp, dev, &num_slices); - if (rc) - return rc; rc = tf_tcam_shared_get_rm_info(tfp, parms->dir, @@ -1068,62 +1104,51 @@ int tf_tcam_shared_move(struct tf *tfp, /* Copy each valid entry to the same low pool logical offset */ + log_idx = 0; + for (i = 0; i < hi_cnt; i++) { - /* Go through all the slices + /* Find next free index starting from where we left off */ - for (j = 0; j < num_slices; j++) { - /* Find next free starting from where we left off - */ - log_idx = ba_find_next_inuse(hi_pool, i); + log_idx = ba_find_next_inuse(hi_pool, log_idx); + if (log_idx < 0) { + TFP_DRV_LOG(ERR, + "Expected a found %s entry %d\n", + tf_pool_2_str(hi_id), + i); + goto done; + } + /* The user should have never allocated from the low + * pool because the move only happens when switching + * from the high to the low pool + */ + if (ba_alloc_index(lo_pool, log_idx) < 0) { + TFP_DRV_LOG(ERR, + "Warning %s index %d already allocated\n", + tf_pool_2_str(lo_id), + i); - if (log_idx < 0) { - TFP_DRV_LOG(ERR, - "Expected a found %s entry %d\n", - tf_pool_2_str(hi_id), - i); - goto done; - } - /* The user should have never allocated from the low - * pool because the move only happens when switching - * from the high to the low pool + /* Since already allocated, continue with move */ - if (ba_alloc_index(lo_pool, log_idx) < 0) { - TFP_DRV_LOG(ERR, - "Cannot allocate %s index %d\n", - tf_pool_2_str(lo_id), - i); - goto done; - } + } - if (j == 0) { - rc = tf_tcam_shared_move_entry(tfp, dev, - hcapi_type, - parms->dir, - hi_start + log_idx, - lo_start + log_idx, - key_sz_bytes, - remap_sz_bytes, - num_slices, - set_enable_bit); - if (rc) { - TFP_DRV_LOG(ERR, - "Cannot allocate %s index %d\n", - tf_pool_2_str(hi_id), - i); - goto done; - } - ba_free(hi_pool, log_idx); - TFP_DRV_LOG(DEBUG, - "%s: TCAM shared move pool(%s) phyid(%d)\n", - tf_dir_2_str(parms->dir), - tf_pool_2_str(hi_id), - hi_start + log_idx); - TFP_DRV_LOG(DEBUG, - "to pool(%s) phyid(%d)\n", - tf_pool_2_str(lo_id), - lo_start + log_idx); - } + rc = tf_tcam_shared_move_entry(tfp, dev, + hcapi_type, + parms->dir, + hi_start + log_idx, + lo_start + log_idx, + key_sz_bytes, + remap_sz_bytes, + set_enable_bit); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Move error %s to %s index %d\n", + tf_dir_2_str(parms->dir), + tf_pool_2_str(hi_id), + tf_pool_2_str(lo_id), + i); + goto done; } + ba_free(hi_pool, log_idx); } done: return rc; From patchwork Sun Jun 13 00:06:18 2021 Content-Type: text/plain; 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Sat, 12 Jun 2021 17:07:30 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.29 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:29 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Jay Ding , Randy Schacher , Venkat Duvvuru , Mike Baucom , Farah Smith Date: Sat, 12 Jun 2021 17:06:18 -0700 Message-Id: <20210613000652.28191-25-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 24/58] net/bnxt: add support for WC TCAM shared session X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jay Ding If the session shares WC TCAM entries with others, specify it in the session name by attach "-wc_tcam". Firmware will flush the shared WC TCAM entries if the last shared session using them is closed. Signed-off-by: Jay Ding Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Mike Baucom Reviewed-by: Farah Smith Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_msg.c | 46 +++++++++++++++++++++++---- drivers/net/bnxt/tf_core/tf_session.c | 5 +++ 2 files changed, 44 insertions(+), 7 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c index fbd4b1d910..6717710dbd 100644 --- a/drivers/net/bnxt/tf_core/tf_msg.c +++ b/drivers/net/bnxt/tf_core/tf_msg.c @@ -58,6 +58,16 @@ static_assert(sizeof(struct hwrm_tf_tbl_type_set_input) == */ #define TF_PCI_BUF_SIZE_MAX 88 +/** + * This is the length of shared session name "tf_share" + */ +#define TF_SHARED_SESSION_NAME_LEN 8 + +/** + * This is the length of tcam shared session name "tf_shared-wc_tcam" + */ +#define TF_TCAM_SHARED_SESSION_NAME_LEN 17 + /** * If data bigger than TF_PCI_BUF_SIZE_MAX then use DMA method */ @@ -126,13 +136,17 @@ tf_msg_session_open(struct bnxt *bp, struct hwrm_tf_session_open_output resp = { 0 }; struct tfp_send_msg_parms parms = { 0 }; int name_len; - char *name; + char *session_name; + char *tcam_session_name; /* Populate the request */ name_len = strnlen(ctrl_chan_name, TF_SESSION_NAME_MAX); - name = &ctrl_chan_name[name_len - strlen("tf_shared")]; - if (!strncmp(name, "tf_shared", strlen("tf_shared"))) - tfp_memcpy(&req.session_name, name, strlen("tf_share")); + session_name = &ctrl_chan_name[name_len - strlen("tf_shared")]; + tcam_session_name = &ctrl_chan_name[name_len - strlen("tf_shared-wc_tcam")]; + if (!strncmp(tcam_session_name, "tf_shared-wc_tcam", strlen("tf_shared-wc_tcam"))) + tfp_memcpy(&req.session_name, tcam_session_name, TF_TCAM_SHARED_SESSION_NAME_LEN); + else if (!strncmp(session_name, "tf_shared", strlen("tf_shared"))) + tfp_memcpy(&req.session_name, session_name, TF_SHARED_SESSION_NAME_LEN); else tfp_memcpy(&req.session_name, ctrl_chan_name, TF_SESSION_NAME_MAX); @@ -177,6 +191,9 @@ tf_msg_session_client_register(struct tf *tfp, struct tfp_send_msg_parms parms = { 0 }; uint8_t fw_session_id; struct tf_dev_info *dev; + int name_len; + char *session_name; + char *tcam_session_name; /* Retrieve the device information */ rc = tf_session_get_device(tfs, &dev); @@ -197,9 +214,24 @@ tf_msg_session_client_register(struct tf *tfp, /* Populate the request */ req.fw_session_id = tfp_cpu_to_le_32(fw_session_id); - tfp_memcpy(&req.session_client_name, - ctrl_channel_name, - TF_SESSION_NAME_MAX); + name_len = strnlen(ctrl_channel_name, TF_SESSION_NAME_MAX); + session_name = &ctrl_channel_name[name_len - strlen("tf_shared")]; + tcam_session_name = &ctrl_channel_name[name_len - + strlen("tf_shared-wc_tcam")]; + if (!strncmp(tcam_session_name, + "tf_shared-wc_tcam", + strlen("tf_shared-wc_tcam"))) + tfp_memcpy(&req.session_client_name, + tcam_session_name, + TF_TCAM_SHARED_SESSION_NAME_LEN); + else if (!strncmp(session_name, "tf_shared", strlen("tf_shared"))) + tfp_memcpy(&req.session_client_name, + session_name, + TF_SHARED_SESSION_NAME_LEN); + else + tfp_memcpy(&req.session_client_name, + ctrl_channel_name, + TF_SESSION_NAME_MAX); parms.tf_type = HWRM_TF_SESSION_REGISTER; parms.req_data = (uint32_t *)&req; diff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c index 71ccb2e3e7..90b65c59e6 100644 --- a/drivers/net/bnxt/tf_core/tf_session.c +++ b/drivers/net/bnxt/tf_core/tf_session.c @@ -188,6 +188,11 @@ tf_session_create(struct tf *tfp, if (!strncmp(name, "tf_shared", strlen("tf_shared"))) session->shared_session = true; + name = &parms->open_cfg->ctrl_chan_name[name_len - + strlen("tf_shared-wc_tcam")]; + if (!strncmp(name, "tf_shared-wc_tcam", strlen("tf_shared-wc_tcam"))) + session->shared_session = true; + if (session->shared_session && shared_session_creator) { session->shared_session_creator = true; parms->open_cfg->shared_session_creator = true; From patchwork Sun Jun 13 00:06:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94120 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C1CE9A0C41; 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Sat, 12 Jun 2021 17:07:31 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Farah Smith , Randy Schacher , Venkat Duvvuru , Jay Ding , Peter Spreadborough Date: Sat, 12 Jun 2021 17:06:19 -0700 Message-Id: <20210613000652.28191-26-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 25/58] net/bnxt: add API to clear TCAM regions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Farah Smith Add TRUFLOW API to clear either the hi or the low regions in WildCard TCAM for ungraceful exit cleanup. Signed-off-by: Farah Smith Signed-off-by: Randy Schacher Signed-off-by: Venkat Duvvuru Reviewed-by: Jay Ding Reviewed-by: Peter Spreadborough Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_core/tf_core.c | 51 ++++++++++ drivers/net/bnxt/tf_core/tf_core.h | 39 +++++++- drivers/net/bnxt/tf_core/tf_device.h | 19 +++- drivers/net/bnxt/tf_core/tf_device_p4.c | 4 +- drivers/net/bnxt/tf_core/tf_device_p58.c | 1 + drivers/net/bnxt/tf_core/tf_tcam_shared.c | 111 +++++++++++++++++++++- drivers/net/bnxt/tf_core/tf_tcam_shared.h | 21 ++++ drivers/net/bnxt/tf_core/tf_util.h | 1 - 8 files changed, 235 insertions(+), 12 deletions(-) diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c index 0fbbd40252..97e6165e92 100644 --- a/drivers/net/bnxt/tf_core/tf_core.c +++ b/drivers/net/bnxt/tf_core/tf_core.c @@ -968,6 +968,57 @@ tf_move_tcam_shared_entries(struct tf *tfp, return 0; } + +int +tf_clear_tcam_shared_entries(struct tf *tfp, + struct tf_clear_tcam_shared_entries_parms *parms) +{ + int rc; + struct tf_session *tfs; + struct tf_dev_info *dev; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session(tfp, &tfs); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup session, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: Failed to lookup device, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + if (dev->ops->tf_dev_clear_tcam == NULL) { + rc = -EOPNOTSUPP; + TFP_DRV_LOG(ERR, + "%s: Operation not supported, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + rc = dev->ops->tf_dev_clear_tcam(tfp, parms); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM shared entries clear failed, rc:%s\n", + tf_dir_2_str(parms->dir), + strerror(-rc)); + return rc; + } + + return 0; +} #endif /* TF_TCAM_SHARED */ int diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h index 44c30fa904..0b06bb2bb5 100644 --- a/drivers/net/bnxt/tf_core/tf_core.h +++ b/drivers/net/bnxt/tf_core/tf_core.h @@ -233,7 +233,7 @@ enum tf_identifier_type { */ TF_IDENT_TYPE_EM_PROF, /** - * TH + * (Future) * The L2 func is included in the ILT result and from recycling to * enable virtualization of further lookups. */ @@ -1244,6 +1244,8 @@ int tf_free_tbl_scope(struct tf *tfp, * #ifdef TF_TCAM_SHARED * @ref tf_move_tcam_shared_entries + * + * @ref tf_clear_tcam_shared_entries #endif */ @@ -1580,6 +1582,37 @@ struct tf_move_tcam_shared_entries_parms { int tf_move_tcam_shared_entries(struct tf *tfp, struct tf_move_tcam_shared_entries_parms *parms); +/** + * tf_clear_tcam_shared_entries parameter definition + */ +struct tf_clear_tcam_shared_entries_parms { + /** + * [in] receive or transmit direction + */ + enum tf_dir dir; + /** + * [in] TCAM table type + */ + enum tf_tcam_tbl_type tcam_tbl_type; +}; + +/** + * Clear TCAM shared entries pool + * + * This API only affects the following TCAM pools within a shared session: + * + * TF_TCAM_TBL_TYPE_WC_TCAM_HIGH + * TF_TCAM_TBL_TYPE_WC_TCAM_LOW + * + * When called, the indicated WC TCAM high or low pool will be cleared. + * + * This API is not supported on a non-shared session. + * + * Returns success or failure code. + */ +int tf_clear_tcam_shared_entries(struct tf *tfp, + struct tf_clear_tcam_shared_entries_parms *parms); + #endif /* TF_TCAM_SHARED */ /** * @page table Table Access @@ -2108,7 +2141,7 @@ struct tf_move_em_entry_parms { uint64_t flow_handle; }; /** - * tf_search_em_entry parameter definition + * tf_search_em_entry parameter definition (Future) */ struct tf_search_em_entry_parms { /** @@ -2211,7 +2244,7 @@ int tf_delete_em_entry(struct tf *tfp, struct tf_delete_em_entry_parms *parms); /** - * search em hash entry table memory + * search em hash entry table memory (Future) * * Internal: diff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h index 1893f630e7..da3f541685 100644 --- a/drivers/net/bnxt/tf_core/tf_device.h +++ b/drivers/net/bnxt/tf_core/tf_device.h @@ -595,7 +595,24 @@ struct tf_dev_ops { * -EINVAL - Error */ int (*tf_dev_move_tcam)(struct tf *tfp, - struct tf_move_tcam_shared_entries_parms *parms); + struct tf_move_tcam_shared_entries_parms *parms); + + /** + * Move TCAM shared entries + * + * [in] tfp + * Pointer to TF handle + * + * [in] parms + * Pointer to parameters + * + * returns: + * 0 - Success + * -EINVAL - Error + */ + int (*tf_dev_clear_tcam)(struct tf *tfp, + struct tf_clear_tcam_shared_entries_parms *parms); + #endif /* TF_TCAM_SHARED */ /** diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c index 239784897d..971fab7bda 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p4.c +++ b/drivers/net/bnxt/tf_core/tf_device_p4.c @@ -248,9 +248,6 @@ const struct tf_dev_ops tf_dev_ops_p4_init = { .tf_dev_alloc_search_tcam = NULL, .tf_dev_set_tcam = NULL, .tf_dev_get_tcam = NULL, -#ifdef TF_TCAM_SHARED - .tf_dev_move_tcam = NULL, -#endif /* TF_TCAM_SHARED */ .tf_dev_get_tcam_resc_info = NULL, .tf_dev_insert_int_em_entry = NULL, .tf_dev_delete_int_em_entry = NULL, @@ -298,6 +295,7 @@ const struct tf_dev_ops tf_dev_ops_p4 = { .tf_dev_set_tcam = tf_tcam_shared_set, .tf_dev_get_tcam = tf_tcam_shared_get, .tf_dev_move_tcam = tf_tcam_shared_move_p4, + .tf_dev_clear_tcam = tf_tcam_shared_clear, #else /* !TF_TCAM_SHARED */ .tf_dev_alloc_tcam = tf_tcam_alloc, .tf_dev_free_tcam = tf_tcam_free, diff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c index 483f771999..6bbc5e21e9 100644 --- a/drivers/net/bnxt/tf_core/tf_device_p58.c +++ b/drivers/net/bnxt/tf_core/tf_device_p58.c @@ -339,6 +339,7 @@ const struct tf_dev_ops tf_dev_ops_p58 = { .tf_dev_set_tcam = tf_tcam_shared_set, .tf_dev_get_tcam = tf_tcam_shared_get, .tf_dev_move_tcam = tf_tcam_shared_move_p58, + .tf_dev_clear_tcam = tf_tcam_shared_clear, #else /* !TF_TCAM_SHARED */ .tf_dev_alloc_tcam = tf_tcam_alloc, .tf_dev_free_tcam = tf_tcam_free, diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.c b/drivers/net/bnxt/tf_core/tf_tcam_shared.c index b96d9ca9dd..c1c94829d7 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam_shared.c +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.c @@ -1154,8 +1154,9 @@ int tf_tcam_shared_move(struct tf *tfp, return rc; } -int tf_tcam_shared_move_p4(struct tf *tfp, - struct tf_move_tcam_shared_entries_parms *parms) +int +tf_tcam_shared_move_p4(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms) { int rc = 0; rc = tf_tcam_shared_move(tfp, @@ -1167,8 +1168,9 @@ int tf_tcam_shared_move_p4(struct tf *tfp, } -int tf_tcam_shared_move_p58(struct tf *tfp, - struct tf_move_tcam_shared_entries_parms *parms) +int +tf_tcam_shared_move_p58(struct tf *tfp, + struct tf_move_tcam_shared_entries_parms *parms) { int rc = 0; rc = tf_tcam_shared_move(tfp, @@ -1178,3 +1180,104 @@ int tf_tcam_shared_move_p58(struct tf *tfp, true); /* set enable bit */ return rc; } + +int +tf_tcam_shared_clear(struct tf *tfp, + struct tf_clear_tcam_shared_entries_parms *parms) +{ + int rc = 0; + struct tf_session *tfs; + struct tf_dev_info *dev; + uint16_t start; + int phy_idx; + enum tf_tcam_shared_wc_pool_id id; + struct tf_tcam_free_parms nparms; + uint16_t hcapi_type; + struct tf_rm_alloc_info info; + void *tcam_shared_db_ptr = NULL; + struct tf_tcam_shared_wc_pools *tcam_shared_wc; + int i, cnt; + + TF_CHECK_PARMS2(tfp, parms); + + /* Retrieve the session information */ + rc = tf_session_get_session_internal(tfp, &tfs); + if (rc) + return rc; + + if (!tf_session_is_shared_session(tfs) || + (parms->tcam_tbl_type != TF_TCAM_TBL_TYPE_WC_TCAM_HIGH && + parms->tcam_tbl_type != TF_TCAM_TBL_TYPE_WC_TCAM_LOW)) + return -EOPNOTSUPP; + + if (!tf_tcam_db_valid(tfp, parms->dir)) { + TFP_DRV_LOG(ERR, + "%s: tcam shared pool doesn't exist\n", + tf_dir_2_str(parms->dir)); + return -ENOMEM; + } + + rc = tf_session_get_tcam_shared_db(tfp, (void *)&tcam_shared_db_ptr); + if (rc) { + TFP_DRV_LOG(ERR, + "Failed to get tcam_shared_db from session, rc:%s\n", + strerror(-rc)); + return rc; + } + tcam_shared_wc = (struct tf_tcam_shared_wc_pools *)tcam_shared_db_ptr; + + + if (parms->tcam_tbl_type == TF_TCAM_TBL_TYPE_WC_TCAM_HIGH) + id = TF_TCAM_SHARED_WC_POOL_HI; + else + id = TF_TCAM_SHARED_WC_POOL_LO; + + + /* Retrieve the device information */ + rc = tf_session_get_device(tfs, &dev); + if (rc) + return rc; + + rc = tf_tcam_shared_get_rm_info(tfp, + parms->dir, + &hcapi_type, + &info); + if (rc) { + TFP_DRV_LOG(ERR, + "%s: TCAM rm info get failed\n", + tf_dir_2_str(parms->dir)); + return rc; + } + + start = tcam_shared_wc->db[parms->dir][id].info.start; + cnt = tcam_shared_wc->db[parms->dir][id].info.stride; + + /* Override HI/LO type with parent WC TCAM type */ + nparms.dir = parms->dir; + nparms.type = TF_TCAM_TBL_TYPE_WC_TCAM; + nparms.hcapi_type = hcapi_type; + + for (i = 0; i < cnt; i++) { + phy_idx = start + i; + nparms.idx = phy_idx; + + /* Clear entry */ + rc = tf_msg_tcam_entry_free(tfp, dev, &nparms); + if (rc) { + /* Log error */ + TFP_DRV_LOG(ERR, + "%s: %s: log%d free failed, rc:%s\n", + tf_dir_2_str(nparms.dir), + tf_tcam_tbl_2_str(nparms.type), + phy_idx, + strerror(-rc)); + return rc; + } + } + + TFP_DRV_LOG(DEBUG, + "%s: TCAM shared clear pool(%s)\n", + tf_dir_2_str(nparms.dir), + tf_pool_2_str(id)); + return 0; +} diff --git a/drivers/net/bnxt/tf_core/tf_tcam_shared.h b/drivers/net/bnxt/tf_core/tf_tcam_shared.h index 5588125470..020763af6b 100644 --- a/drivers/net/bnxt/tf_core/tf_tcam_shared.h +++ b/drivers/net/bnxt/tf_core/tf_tcam_shared.h @@ -24,6 +24,11 @@ * * @ref tf_tcam_shared_get * + * @ref tf_tcam_shared_move_p4 + * + * @ref tf_tcam_shared_move_p58 + * + * @ref tf_tcam_shared_clear */ /** @@ -159,4 +164,20 @@ int tf_tcam_shared_move_p4(struct tf *tfp, int tf_tcam_shared_move_p58(struct tf *tfp, struct tf_move_tcam_shared_entries_parms *parms); +/** + * Allocates and clears the entire WC_TCAM_HI or WC_TCAM_LO shared pools + * + * [in] tfp + * Pointer to the truflow handle + * + * [in] parms + * Pointer to parameters + * + * Returns + * - (0) if successful. + * - (-EINVAL) on failure. + */ +int tf_tcam_shared_clear(struct tf *tfp, + struct tf_clear_tcam_shared_entries_parms *parms); + #endif /* _TF_TCAM_SHARED_H */ diff --git a/drivers/net/bnxt/tf_core/tf_util.h b/drivers/net/bnxt/tf_core/tf_util.h index 4caf50349d..854c51931a 100644 --- a/drivers/net/bnxt/tf_core/tf_util.h +++ b/drivers/net/bnxt/tf_core/tf_util.h @@ -7,7 +7,6 @@ #define _TF_UTIL_H_ #include "tf_core.h" -#include "tf_device.h" #define TF_BITS2BYTES(x) (((x) + 7) >> 3) #define TF_BITS2BYTES_WORD_ALIGN(x) ((((x) + 31) >> 5) * 4) From patchwork Sun Jun 13 00:06:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94121 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9B726A0C41; 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Sat, 12 Jun 2021 17:07:32 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Venkat Duvvuru , Kalesh AP , Somnath Kotur Date: Sat, 12 Jun 2021 17:06:20 -0700 Message-Id: <20210613000652.28191-27-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 26/58] net/bnxt: check FW capability to support TRUFLOW X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Venkat Duvvuru Currently, a devarg (host-based-truflow) is passed while launching the app to enable TRUFLOW feature. However, this mechanism adds an extra step in enabling TRUFLOW. This doesn't give a seamless experience when flow offloads has to work with FW that doesn't/does support TRUFLOW feature. Also, it's likely that customers may not want to use devarg to enable flow offloads. This patch fixes it by checking for TRUFLOW feature support in device's capabilities and configurations field of the hwrm_ver_get. Signed-off-by: Venkat Duvvuru Reviewed-by: Kalesh AP Reviewed-by: Somnath Kotur --- doc/guides/nics/bnxt.rst | 3 +- drivers/net/bnxt/bnxt.h | 10 +++--- drivers/net/bnxt/bnxt_ethdev.c | 56 ---------------------------------- drivers/net/bnxt/bnxt_hwrm.c | 7 ++++- 4 files changed, 12 insertions(+), 64 deletions(-) diff --git a/doc/guides/nics/bnxt.rst b/doc/guides/nics/bnxt.rst index feb0c6a765..e75f4fa9e3 100644 --- a/doc/guides/nics/bnxt.rst +++ b/doc/guides/nics/bnxt.rst @@ -658,8 +658,7 @@ which currently supports basic packet classification in the receive path. The feature uses a newly implemented control-plane firmware interface which optimizes flow insertions and deletions. -This is a tech preview feature, and is disabled by default. It can be enabled -using bnxt devargs. For ex: "-a 0000:0d:00.0,host-based-truflow=1”. +This is a tech preview feature. This feature is currently supported on Whitney+ and Stingray devices. diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index e93a7eb933..532755467f 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -688,10 +688,9 @@ struct bnxt { #define BNXT_FLAG_RX_VECTOR_PKT_MODE BIT(24) #define BNXT_FLAG_FLOW_XSTATS_EN BIT(25) #define BNXT_FLAG_DFLT_MAC_SET BIT(26) -#define BNXT_FLAG_TRUFLOW_EN BIT(27) -#define BNXT_FLAG_GFID_ENABLE BIT(28) -#define BNXT_FLAG_RFS_NEEDS_VNIC BIT(29) -#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(30) +#define BNXT_FLAG_GFID_ENABLE BIT(27) +#define BNXT_FLAG_RFS_NEEDS_VNIC BIT(28) +#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(29) #define BNXT_RFS_NEEDS_VNIC(bp) ((bp)->flags & BNXT_FLAG_RFS_NEEDS_VNIC) #define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF)) #define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF) @@ -707,7 +706,6 @@ struct bnxt { #define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_P5(bp)) #define BNXT_FLOW_XSTATS_EN(bp) ((bp)->flags & BNXT_FLAG_FLOW_XSTATS_EN) #define BNXT_HAS_DFLT_MAC_SET(bp) ((bp)->flags & BNXT_FLAG_DFLT_MAC_SET) -#define BNXT_TRUFLOW_EN(bp) ((bp)->flags & BNXT_FLAG_TRUFLOW_EN) #define BNXT_GFID_ENABLED(bp) ((bp)->flags & BNXT_FLAG_GFID_ENABLE) uint32_t flags2; @@ -729,6 +727,8 @@ struct bnxt { #define BNXT_FW_CAP_ADV_FLOW_MGMT BIT(5) #define BNXT_FW_CAP_ADV_FLOW_COUNTERS BIT(6) #define BNXT_FW_CAP_LINK_ADMIN BIT(7) +#define BNXT_FW_CAP_TRUFLOW_EN BIT(8) +#define BNXT_TRUFLOW_EN(bp) ((bp)->fw_cap & BNXT_FW_CAP_TRUFLOW_EN) pthread_mutex_t flow_lock; diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index c9536f7926..b77f12bbb4 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -87,7 +87,6 @@ static const struct rte_pci_id bnxt_pci_id_map[] = { { .vendor_id = 0, /* sentinel */ }, }; -#define BNXT_DEVARG_TRUFLOW "host-based-truflow" #define BNXT_DEVARG_FLOW_XSTAT "flow-xstat" #define BNXT_DEVARG_MAX_NUM_KFLOWS "max-num-kflows" #define BNXT_DEVARG_REPRESENTOR "representor" @@ -100,7 +99,6 @@ static const struct rte_pci_id bnxt_pci_id_map[] = { static const char *const bnxt_dev_args[] = { BNXT_DEVARG_REPRESENTOR, - BNXT_DEVARG_TRUFLOW, BNXT_DEVARG_FLOW_XSTAT, BNXT_DEVARG_MAX_NUM_KFLOWS, BNXT_DEVARG_REP_BASED_PF, @@ -112,12 +110,6 @@ static const char *const bnxt_dev_args[] = { NULL }; -/* - * truflow == false to disable the feature - * truflow == true to enable the feature - */ -#define BNXT_DEVARG_TRUFLOW_INVALID(truflow) ((truflow) > 1) - /* * flow_xstat == false to disable the feature * flow_xstat == true to enable the feature @@ -5261,45 +5253,6 @@ static int bnxt_init_resources(struct bnxt *bp, bool reconfig_dev) return 0; } -static int -bnxt_parse_devarg_truflow(__rte_unused const char *key, - const char *value, void *opaque_arg) -{ - struct bnxt *bp = opaque_arg; - unsigned long truflow; - char *end = NULL; - - if (!value || !opaque_arg) { - PMD_DRV_LOG(ERR, - "Invalid parameter passed to truflow devargs.\n"); - return -EINVAL; - } - - truflow = strtoul(value, &end, 10); - if (end == NULL || *end != '\0' || - (truflow == ULONG_MAX && errno == ERANGE)) { - PMD_DRV_LOG(ERR, - "Invalid parameter passed to truflow devargs.\n"); - return -EINVAL; - } - - if (BNXT_DEVARG_TRUFLOW_INVALID(truflow)) { - PMD_DRV_LOG(ERR, - "Invalid value passed to truflow devargs.\n"); - return -EINVAL; - } - - if (truflow) { - bp->flags |= BNXT_FLAG_TRUFLOW_EN; - PMD_DRV_LOG(INFO, "Host-based truflow feature enabled.\n"); - } else { - bp->flags &= ~BNXT_FLAG_TRUFLOW_EN; - PMD_DRV_LOG(INFO, "Host-based truflow feature disabled.\n"); - } - - return 0; -} - static int bnxt_parse_devarg_flow_xstat(__rte_unused const char *key, const char *value, void *opaque_arg) @@ -5607,15 +5560,6 @@ bnxt_parse_dev_args(struct bnxt *bp, struct rte_devargs *devargs) if (kvlist == NULL) return -EINVAL; - /* - * Handler for "truflow" devarg. - * Invoked as for ex: "-a 0000:00:0d.0,host-based-truflow=1" - */ - ret = rte_kvargs_process(kvlist, BNXT_DEVARG_TRUFLOW, - bnxt_parse_devarg_truflow, bp); - if (ret) - goto err; - /* * Handler for "flow_xstat" devarg. * Invoked as for ex: "-a 0000:00:0d.0,flow_xstat=1" diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index a65ac6c0ec..6eab2342f6 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -1349,6 +1349,12 @@ int bnxt_hwrm_ver_get(struct bnxt *bp, uint32_t timeout) bp->fw_cap |= BNXT_FW_CAP_ADV_FLOW_COUNTERS; } + if (dev_caps_cfg & + HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_TRUFLOW_SUPPORTED) { + PMD_DRV_LOG(DEBUG, "Host-based truflow feature enabled.\n"); + bp->fw_cap |= BNXT_FW_CAP_TRUFLOW_EN; + } + error: HWRM_UNLOCK(); return rc; @@ -4660,7 +4666,6 @@ int bnxt_hwrm_erase_nvram_directory(struct bnxt *bp, uint8_t index) return rc; } - int bnxt_hwrm_flash_nvram(struct bnxt *bp, uint16_t dir_type, uint16_t dir_ordinal, uint16_t dir_ext, uint16_t dir_attr, const uint8_t *data, From patchwork Sun Jun 13 00:06:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94169 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 50481A0C44; Mon, 14 Jun 2021 16:37:14 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 322024068E; 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Sat, 12 Jun 2021 17:07:38 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.33 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:36 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Kishore Padmanabha , Venkat Duvvuru , Mike Baucom Date: Sat, 12 Jun 2021 17:06:21 -0700 Message-Id: <20210613000652.28191-28-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 14 Jun 2021 16:37:12 +0200 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 27/58] net/bnxt: add support for generic table processing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kishore Padmanabha Added support for generic table processing, this feature shall enable support for shared resource like mirror and TCAM cache tables. Signed-off-by: Kishore Padmanabha Signed-off-by: Venkat Duvvuru Reviewed-by: Mike Baucom Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/meson.build | 1 + drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c | 311 ++ drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h | 142 + drivers/net/bnxt/tf_ulp/ulp_mapper.c | 637 ++- drivers/net/bnxt/tf_ulp/ulp_mapper.h | 15 +- .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 65 +- .../tf_ulp/ulp_template_db_stingray_class.c | 3509 ++++++++++++++++- drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c | 43 +- .../tf_ulp/ulp_template_db_wh_plus_class.c | 3509 ++++++++++++++++- drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 14 + drivers/net/bnxt/tf_ulp/ulp_utils.c | 112 +- drivers/net/bnxt/tf_ulp/ulp_utils.h | 68 + 12 files changed, 7666 insertions(+), 760 deletions(-) create mode 100644 drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c create mode 100644 drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h diff --git a/drivers/net/bnxt/tf_ulp/meson.build b/drivers/net/bnxt/tf_ulp/meson.build index 98cbdf3177..611d7ab58e 100644 --- a/drivers/net/bnxt/tf_ulp/meson.build +++ b/drivers/net/bnxt/tf_ulp/meson.build @@ -22,6 +22,7 @@ sources += files( 'ulp_def_rules.c', 'ulp_fc_mgr.c', 'ulp_tun.c', + 'ulp_gen_tbl.c', 'ulp_template_db_wh_plus_act.c', 'ulp_template_db_wh_plus_class.c', 'ulp_template_db_stingray_act.c', diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c new file mode 100644 index 0000000000..0a15789c4e --- /dev/null +++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c @@ -0,0 +1,311 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2014-2021 Broadcom + * All rights reserved. + */ + +#include +#include +#include "ulp_mapper.h" +#include "ulp_flow_db.h" + +/* Retrieve the generic table initialization parameters for the tbl_idx */ +static struct bnxt_ulp_generic_tbl_params* +ulp_mapper_gen_tbl_params_get(uint32_t tbl_idx) +{ + if (tbl_idx >= BNXT_ULP_GEN_TBL_MAX_SZ) + return NULL; + + return &ulp_generic_tbl_params[tbl_idx]; +} + +/* + * Initialize the generic table list + * + * mapper_data [in] Pointer to the mapper data and the generic table is + * part of it + * + * returns 0 on success + */ +int32_t +ulp_mapper_generic_tbl_list_init(struct bnxt_ulp_mapper_data *mapper_data) +{ + struct bnxt_ulp_generic_tbl_params *tbl; + struct ulp_mapper_gen_tbl_list *entry; + uint32_t idx, size; + + /* Allocate the generic tables. */ + for (idx = 0; idx < BNXT_ULP_GEN_TBL_MAX_SZ; idx++) { + tbl = ulp_mapper_gen_tbl_params_get(idx); + if (!tbl) { + BNXT_TF_DBG(ERR, "Failed to get gen table parms %d\n", + idx); + return -EINVAL; + } + entry = &mapper_data->gen_tbl_list[idx]; + if (tbl->result_num_entries != 0) { + /* add 4 bytes for reference count */ + entry->mem_data_size = (tbl->result_num_entries + 1) * + (tbl->result_byte_size + sizeof(uint32_t)); + + /* allocate the big chunk of memory */ + entry->mem_data = rte_zmalloc("ulp mapper gen tbl", + entry->mem_data_size, 0); + if (!entry->mem_data) { + BNXT_TF_DBG(ERR, + "Failed to allocate gen table %d\n", + idx); + return -ENOMEM; + } + /* Populate the generic table container */ + entry->container.num_elem = tbl->result_num_entries; + entry->container.byte_data_size = tbl->result_byte_size; + entry->container.ref_count = + (uint32_t *)entry->mem_data; + size = sizeof(uint32_t) * (tbl->result_num_entries + 1); + entry->container.byte_data = &entry->mem_data[size]; + entry->container.byte_order = tbl->result_byte_order; + } + } + /* success */ + return 0; +} + +/* + * Free the generic table list + * + * mapper_data [in] Pointer to the mapper data and the generic table is + * part of it + * + * returns 0 on success + */ +int32_t +ulp_mapper_generic_tbl_list_deinit(struct bnxt_ulp_mapper_data *mapper_data) +{ + struct ulp_mapper_gen_tbl_list *tbl_list; + uint32_t idx; + + /* iterate the generic table. */ + for (idx = 0; idx < BNXT_ULP_GEN_TBL_MAX_SZ; idx++) { + tbl_list = &mapper_data->gen_tbl_list[idx]; + if (tbl_list->mem_data) { + rte_free(tbl_list->mem_data); + tbl_list->mem_data = NULL; + } + } + /* success */ + return 0; +} + +/* + * Get the generic table list entry + * + * ulp_ctxt [in] - Ptr to ulp_context + * tbl_idx [in] - Table index to the generic table list + * key [in] - Key index to the table + * entry [out] - output will include the entry if found + * + * returns 0 on success. + */ +int32_t +ulp_mapper_gen_tbl_entry_get(struct bnxt_ulp_context *ulp, + uint32_t tbl_idx, + uint32_t key, + struct ulp_mapper_gen_tbl_entry *entry) +{ + struct bnxt_ulp_mapper_data *mapper_data; + struct ulp_mapper_gen_tbl_list *tbl_list; + + mapper_data = bnxt_ulp_cntxt_ptr2_mapper_data_get(ulp); + if (!mapper_data || tbl_idx >= BNXT_ULP_GEN_TBL_MAX_SZ || + !entry) { + BNXT_TF_DBG(ERR, "invalid arguments %x:%x\n", tbl_idx, key); + return -EINVAL; + } + /* populate the output and return the values */ + tbl_list = &mapper_data->gen_tbl_list[tbl_idx]; + if (key > tbl_list->container.num_elem) { + BNXT_TF_DBG(ERR, "invalid key %x:%x\n", key, + tbl_list->container.num_elem); + return -EINVAL; + } + entry->ref_count = &tbl_list->container.ref_count[key]; + entry->byte_data_size = tbl_list->container.byte_data_size; + entry->byte_data = &tbl_list->container.byte_data[key * + entry->byte_data_size]; + entry->byte_order = tbl_list->container.byte_order; + return 0; +} + +/* + * utility function to calculate the table idx + * + * res_sub_type [in] - Resource sub type + * dir [in] - Direction + * + * returns None + */ +int32_t +ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir) +{ + int32_t tbl_idx; + + /* Validate for direction */ + if (dir >= TF_DIR_MAX) { + BNXT_TF_DBG(ERR, "invalid argument %x\n", dir); + return -EINVAL; + } + tbl_idx = (res_sub_type << 1) | (dir & 0x1); + if (tbl_idx >= BNXT_ULP_GEN_TBL_MAX_SZ) { + BNXT_TF_DBG(ERR, "invalid table index %x\n", tbl_idx); + return -EINVAL; + } + return tbl_idx; +} + +/* + * Set the data in the generic table entry + * + * entry [in] - generic table entry + * offset [in] - The offset in bits where the data has to be set + * len [in] - The length of the data in bits to be set + * data [in] - pointer to the data to be used for setting the value. + * + * returns 0 on success + */ +int32_t +ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, + uint32_t offset, uint32_t len, uint8_t *data) +{ + /* validate the null arguments */ + if (!entry || !data) { + BNXT_TF_DBG(ERR, "invalid argument\n"); + return -EINVAL; + } + + /* check the size of the buffer for validation */ + if ((offset + len) > ULP_BYTE_2_BITS(entry->byte_data_size)) { + BNXT_TF_DBG(ERR, "invalid offset or length %x:%x:%x\n", + offset, len, entry->byte_data_size); + return -EINVAL; + } + + if (entry->byte_order == BNXT_ULP_BYTE_ORDER_LE) { + if (ulp_bs_push_lsb(entry->byte_data, offset, len, data) != + len) { + BNXT_TF_DBG(ERR, "write failed offset = %x, len =%x\n", + offset, len); + return -EIO; + } + } else { + if (ulp_bs_push_msb(entry->byte_data, offset, len, data) != + len) { + BNXT_TF_DBG(ERR, "write failed offset = %x, len =%x\n", + offset, len); + return -EIO; + } + } + return 0; +} + +/* + * Get the data in the generic table entry + * + * entry [in] - generic table entry + * offset [in] - The offset in bits where the data has to get + * len [in] - The length of the data in bits to be get + * data [out] - pointer to the data to be used for setting the value. + * data_size [in] - The size of data in bytes + * + * returns 0 on success + */ +int32_t +ulp_mapper_gen_tbl_entry_data_get(struct ulp_mapper_gen_tbl_entry *entry, + uint32_t offset, uint32_t len, uint8_t *data, + uint32_t data_size) +{ + /* validate the null arguments */ + if (!entry || !data) { + BNXT_TF_DBG(ERR, "invalid argument\n"); + return -EINVAL; + } + + /* check the size of the buffer for validation */ + if ((offset + len) > ULP_BYTE_2_BITS(entry->byte_data_size) || + len > ULP_BYTE_2_BITS(data_size)) { + BNXT_TF_DBG(ERR, "invalid offset or length %x:%x:%x\n", + offset, len, entry->byte_data_size); + return -EINVAL; + } + if (entry->byte_order == BNXT_ULP_BYTE_ORDER_LE) + ulp_bs_pull_lsb(entry->byte_data, data, data_size, offset, len); + else + ulp_bs_pull_msb(entry->byte_data, data, offset, len); + + return 0; +} + +/* + * Free the generic table list entry + * + * ulp_ctx [in] - Pointer to the ulp context + * res [in] - Pointer to flow db resource entry + * + * returns 0 on success + */ +int32_t +ulp_mapper_gen_tbl_res_free(struct bnxt_ulp_context *ulp_ctx, + struct ulp_flow_db_res_params *res) +{ + struct ulp_mapper_gen_tbl_entry entry; + int32_t tbl_idx; + uint32_t fid; + + /* Extract the resource sub type and direction */ + tbl_idx = ulp_mapper_gen_tbl_idx_calculate(res->resource_sub_type, + res->direction); + if (tbl_idx < 0) { + BNXT_TF_DBG(ERR, "invalid argument %x:%x\n", + res->resource_sub_type, res->direction); + return -EINVAL; + } + + /* Get the generic table entry*/ + if (ulp_mapper_gen_tbl_entry_get(ulp_ctx, tbl_idx, res->resource_hndl, + &entry)) { + BNXT_TF_DBG(ERR, "Gen tbl entry get failed %x:%" PRIX64 "\n", + tbl_idx, res->resource_hndl); + return -EINVAL; + } + + /* Decrement the reference count */ + if (!ULP_GEN_TBL_REF_CNT(&entry)) { + BNXT_TF_DBG(ERR, "generic table corrupt %x:%" PRIX64 "\n", + tbl_idx, res->resource_hndl); + return -EINVAL; + } + ULP_GEN_TBL_REF_CNT_DEC(&entry); + + /* retain the details since there are other users */ + if (ULP_GEN_TBL_REF_CNT(&entry)) + return 0; + + /* Delete the generic table entry. First extract the fid */ + if (ulp_mapper_gen_tbl_entry_data_get(&entry, ULP_GEN_TBL_FID_OFFSET, + ULP_GEN_TBL_FID_SIZE_BITS, + (uint8_t *)&fid, + sizeof(fid))) { + BNXT_TF_DBG(ERR, "Unable to get fid %x:%" PRIX64 "\n", + tbl_idx, res->resource_hndl); + return -EINVAL; + } + + /* Destroy the flow associated with the shared flow id */ + if (ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR, + fid)) + BNXT_TF_DBG(ERR, "Error in deleting shared flow id %x\n", fid); + + /* clear the byte data of the generic table entry */ + memset(entry.byte_data, 0, entry.byte_data_size); + + return 0; +} diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h new file mode 100644 index 0000000000..c8a1112af4 --- /dev/null +++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h @@ -0,0 +1,142 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2014-2021 Broadcom + * All rights reserved. + */ + +#ifndef _ULP_GEN_TBL_H_ +#define _ULP_GEN_TBL_H_ + +/* Macros for reference count manipulation */ +#define ULP_GEN_TBL_REF_CNT_INC(entry) {*(entry)->ref_count += 1; } +#define ULP_GEN_TBL_REF_CNT_DEC(entry) {*(entry)->ref_count -= 1; } +#define ULP_GEN_TBL_REF_CNT(entry) (*(entry)->ref_count) + +#define ULP_GEN_TBL_FID_OFFSET 0 +#define ULP_GEN_TBL_FID_SIZE_BITS 32 + +/* Structure to pass the generic table values across APIs */ +struct ulp_mapper_gen_tbl_entry { + uint32_t *ref_count; + uint32_t byte_data_size; + uint8_t *byte_data; + enum bnxt_ulp_byte_order byte_order; +}; + +/* + * Structure to store the generic tbl container + * The ref count and byte data contain list of "num_elem" elements. + * The size of each entry in byte_data is of size byte_data_size. + */ +struct ulp_mapper_gen_tbl_cont { + uint32_t num_elem; + uint32_t byte_data_size; + enum bnxt_ulp_byte_order byte_order; + /* Reference count to track number of users*/ + uint32_t *ref_count; + /* First 4 bytes is either tcam_idx or fid and rest are identities */ + uint8_t *byte_data; +}; + +/* Structure to store the generic tbl container */ +struct ulp_mapper_gen_tbl_list { + struct ulp_mapper_gen_tbl_cont container; + uint32_t mem_data_size; + uint8_t *mem_data; +}; + +/* Forward declaration */ +struct bnxt_ulp_mapper_data; +struct ulp_flow_db_res_params; + +/* + * Initialize the generic table list + * + * mapper_data [in] Pointer to the mapper data and the generic table is + * part of it + * + * returns 0 on success + */ +int32_t +ulp_mapper_generic_tbl_list_init(struct bnxt_ulp_mapper_data *mapper_data); + +/* + * Free the generic table list + * + * mapper_data [in] Pointer to the mapper data and the generic table is + * part of it + * + * returns 0 on success + */ +int32_t +ulp_mapper_generic_tbl_list_deinit(struct bnxt_ulp_mapper_data *mapper_data); + +/* + * Get the generic table list entry + * + * ulp_ctxt [in] - Ptr to ulp_context + * tbl_idx [in] - Table index to the generic table list + * key [in] - Key index to the table + * entry [out] - output will include the entry if found + * + * returns 0 on success. + */ +int32_t +ulp_mapper_gen_tbl_entry_get(struct bnxt_ulp_context *ulp, + uint32_t tbl_idx, + uint32_t key, + struct ulp_mapper_gen_tbl_entry *entry); + +/* + * utility function to calculate the table idx + * + * res_sub_type [in] - Resource sub type + * dir [in] - direction + * + * returns None + */ +int32_t +ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir); + +/* + * Set the data in the generic table entry + * + * entry [in] - generic table entry + * offset [in] - The offset in bits where the data has to be set + * len [in] - The length of the data in bits to be set + * data [in] - pointer to the data to be used for setting the value. + * + * returns 0 on success + */ +int32_t +ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, + uint32_t offset, uint32_t len, uint8_t *data); + +/* + * Get the data in the generic table entry + * + * entry [in] - generic table entry + * offset [in] - The offset in bits where the data has to get + * len [in] - The length of the data in bits to be get + * data [out] - pointer to the data to be used for setting the value. + * data_size [in] - The size of data in bytes + * + * returns 0 on success + */ +int32_t +ulp_mapper_gen_tbl_entry_data_get(struct ulp_mapper_gen_tbl_entry *entry, + uint32_t offset, uint32_t len, uint8_t *data, + uint32_t data_size); + +/* + * Free the generic table list entry + * + * ulp_ctx [in] - Pointer to the ulp context + * res [in] - Pointer to flow db resource entry + * + * returns 0 on success + */ +int32_t +ulp_mapper_gen_tbl_res_free(struct bnxt_ulp_context *ulp_ctx, + struct ulp_flow_db_res_params *res); + +#endif /* _ULP_EN_TBL_H_ */ diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index 4e06ae9ca1..7037297922 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -102,7 +102,7 @@ ulp_mapper_resource_ident_allocate(struct bnxt_ulp_context *ulp_ctx, rc = tf_alloc_identifier(tfp, &iparms); if (rc) { BNXT_TF_DBG(ERR, "Failed to alloc identifier [%s][%d]\n", - (iparms.dir == TF_DIR_RX) ? "RX" : "TX", + tf_dir_2_str(iparms.dir), iparms.ident_type); return rc; } @@ -160,8 +160,7 @@ ulp_mapper_resource_index_tbl_alloc(struct bnxt_ulp_context *ulp_ctx, rc = tf_alloc_tbl_entry(tfp, &aparms); if (rc) { BNXT_TF_DBG(ERR, "Failed to alloc identifier [%s][%d]\n", - (aparms.dir == TF_DIR_RX) ? "RX" : "TX", - aparms.type); + tf_dir_2_str(aparms.dir), aparms.type); return rc; } @@ -181,16 +180,6 @@ ulp_mapper_resource_index_tbl_alloc(struct bnxt_ulp_context *ulp_ctx, return rc; } -/* Retrieve the cache initialization parameters for the tbl_idx */ -static struct bnxt_ulp_cache_tbl_params * -ulp_mapper_cache_tbl_params_get(uint32_t tbl_idx) -{ - if (tbl_idx >= BNXT_ULP_CACHE_TBL_MAX_SZ) - return NULL; - - return &ulp_cache_tbl_params[tbl_idx]; -} - /* Retrieve the global template table */ static uint32_t * ulp_mapper_glb_template_table_get(uint32_t *num_entries) @@ -341,121 +330,6 @@ ulp_mapper_ident_fields_get(struct bnxt_ulp_mapper_parms *mparms, return &dev_tbls->ident_list[idx]; } -static struct bnxt_ulp_mapper_cache_entry * -ulp_mapper_cache_entry_get(struct bnxt_ulp_context *ulp, - uint32_t id, - uint16_t key) -{ - struct bnxt_ulp_mapper_data *mapper_data; - - mapper_data = bnxt_ulp_cntxt_ptr2_mapper_data_get(ulp); - if (!mapper_data || id >= BNXT_ULP_CACHE_TBL_MAX_SZ || - !mapper_data->cache_tbl[id]) { - BNXT_TF_DBG(ERR, "Unable to acquire the cache tbl (%d)\n", id); - return NULL; - } - - return &mapper_data->cache_tbl[id][key]; -} - -/* - * Concatenates the tbl_type and tbl_id into a 32bit value for storing in the - * resource_type. This is done to conserve memory since both the tbl_type and - * tbl_id are 16bit. - */ -static inline void -ulp_mapper_cache_res_type_set(struct ulp_flow_db_res_params *res, - uint16_t tbl_type, - uint16_t tbl_id) -{ - res->resource_type = tbl_type; - res->resource_sub_type = tbl_id; -} - -/* Extracts the tbl_type and tbl_id from the 32bit resource type. */ -static inline void -ulp_mapper_cache_res_type_get(struct ulp_flow_db_res_params *res, - uint16_t *tbl_type, - uint16_t *tbl_id) -{ - *tbl_type = res->resource_type; - *tbl_id = res->resource_sub_type; -} - -static int32_t -ulp_mapper_cache_entry_free(struct bnxt_ulp_context *ulp, - struct tf *tfp, - struct ulp_flow_db_res_params *res) -{ - struct bnxt_ulp_mapper_cache_entry *cache_entry; - struct tf_free_identifier_parms ident_parms; - struct tf_free_tcam_entry_parms tcam_parms; - uint16_t table_id, table_type; - int32_t rc, trc, i; - - /* - * The table id, used for cache, and table_type, used for tcam, are - * both encoded within the resource. We must first extract them to - * formulate the args for tf calls. - */ - ulp_mapper_cache_res_type_get(res, &table_type, &table_id); - cache_entry = ulp_mapper_cache_entry_get(ulp, table_id, - (uint16_t)res->resource_hndl); - if (!cache_entry || !cache_entry->ref_count) { - BNXT_TF_DBG(ERR, "Cache entry (%d:%d) not valid on free.\n", - table_id, (uint16_t)res->resource_hndl); - return -EINVAL; - } - - /* - * See if we need to delete the entry. The tcam and identifiers are all - * tracked by the cached entries reference count. All are deleted when - * the reference count hit zero. - */ - cache_entry->ref_count--; - if (cache_entry->ref_count) - return 0; - - /* - * Need to delete the tcam entry and the allocated identifiers. - * In the event of a failure, need to try to delete the remaining - * resources before returning error. - */ - tcam_parms.dir = res->direction; - tcam_parms.tcam_tbl_type = table_type; - tcam_parms.idx = cache_entry->tcam_idx; - rc = tf_free_tcam_entry(tfp, &tcam_parms); - if (rc) - BNXT_TF_DBG(ERR, "Failed to free tcam [%d][%s][0x%04x] rc=%d\n", - table_type, - (res->direction == TF_DIR_RX) ? "RX" : "TX", - tcam_parms.idx, rc); - - /* - * Free the identifiers associated with the tcam entry. Entries with - * negative one are considered uninitialized. - */ - for (i = 0; i < BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM; i++) { - if (cache_entry->idents[i] == ULP_IDENTS_INVALID) - continue; - - ident_parms.dir = res->direction; - ident_parms.ident_type = cache_entry->ident_types[i]; - ident_parms.id = cache_entry->idents[i]; - trc = tf_free_identifier(tfp, &ident_parms); - if (trc) { - BNXT_TF_DBG(ERR, "Failed to free identifier " - "[%d][%s][0x%04x] rc=%d\n", - ident_parms.ident_type, - (res->direction == TF_DIR_RX) ? "RX" : "TX", - ident_parms.id, trc); - rc = trc; - } - } - - return rc; -} - static inline int32_t ulp_mapper_tcam_entry_free(struct bnxt_ulp_context *ulp __rte_unused, struct tf *tfp, @@ -537,7 +411,6 @@ ulp_mapper_mark_free(struct bnxt_ulp_context *ulp, res->resource_hndl); } - static inline int32_t ulp_mapper_parent_flow_free(struct bnxt_ulp_context *ulp, uint32_t parent_fid, @@ -628,9 +501,9 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms, rc = tf_alloc_identifier(tfp, &iparms); if (rc) { - BNXT_TF_DBG(ERR, "Alloc ident %s:%d failed.\n", - (iparms.dir == TF_DIR_RX) ? "RX" : "TX", - iparms.ident_type); + BNXT_TF_DBG(ERR, "Alloc ident %s:%s failed.\n", + tf_dir_2_str(iparms.dir), + tf_ident_2_str(iparms.ident_type)); return rc; } @@ -664,7 +537,6 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms, } else { *val = iparms.id; } - return 0; error: @@ -677,7 +549,7 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms, BNXT_TF_DBG(ERR, "Ident process failed for %s:%s\n", ident->description, - (tbl->direction == TF_DIR_RX) ? "RX" : "TX"); + tf_dir_2_str(tbl->direction)); return rc; } @@ -723,14 +595,12 @@ ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms, /* Search identifier also increase the reference count */ rc = tf_search_identifier(tfp, &sparms); if (rc) { - BNXT_TF_DBG(ERR, "Search ident %s:%x failed.\n", + BNXT_TF_DBG(ERR, "Search ident %s:%s:%x failed.\n", tf_dir_2_str(sparms.dir), + tf_ident_2_str(sparms.ident_type), sparms.search_id); return rc; } - BNXT_TF_DBG(INFO, "Search ident %s:%x.success.\n", - tf_dir_2_str(sparms.dir), - sparms.search_id); /* Write it to the regfile */ id = (uint64_t)tfp_cpu_to_be_64(sparms.search_id); @@ -782,6 +652,7 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, { uint16_t idx, size_idx; uint8_t *val = NULL; + uint16_t write_idx = blob->write_idx; uint64_t regval; uint32_t val_size = 0, field_size = 0; uint64_t act_bit; @@ -1057,8 +928,8 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, } break; default: - BNXT_TF_DBG(ERR, "invalid result mapper opcode 0x%x\n", - fld->result_opcode); + BNXT_TF_DBG(ERR, "invalid result mapper opcode 0x%x at %d\n", + fld->result_opcode, write_idx); return -EINVAL; } return 0; @@ -1193,9 +1064,7 @@ ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms, BNXT_TF_DBG(ERR, "invalid keymask mapper opcode 0x%x\n", opcode); return -EINVAL; - break; } - return 0; } @@ -1204,15 +1073,15 @@ ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl, uint64_t flow_id) { - enum bnxt_ulp_mark_db_opcode mark_op = tbl->mark_db_opcode; struct ulp_flow_db_res_params fid_parms; uint32_t mark, gfid, mark_flag; + enum bnxt_ulp_mark_db_opcode mark_op = tbl->mark_db_opcode; int32_t rc = 0; if (mark_op == BNXT_ULP_MARK_DB_OPCODE_NOP || !(mark_op == BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION && - ULP_BITMAP_ISSET(parms->act_bitmap->bits, - BNXT_ULP_ACTION_BIT_MARK))) + ULP_BITMAP_ISSET(parms->act_bitmap->bits, + BNXT_ULP_ACTION_BIT_MARK))) return rc; /* no need to perform gfid process */ /* Get the mark id details from action property */ @@ -1222,6 +1091,7 @@ ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms, TF_GET_GFID_FROM_FLOW_ID(flow_id, gfid); mark_flag = BNXT_ULP_MARK_GLOBAL_HW_FID; + rc = ulp_mark_db_mark_add(parms->ulp_ctx, mark_flag, gfid, mark); if (rc) { @@ -1246,16 +1116,16 @@ static int32_t ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) { - enum bnxt_ulp_mark_db_opcode mark_op = tbl->mark_db_opcode; struct ulp_flow_db_res_params fid_parms; uint32_t act_idx, mark, mark_flag; uint64_t val64; + enum bnxt_ulp_mark_db_opcode mark_op = tbl->mark_db_opcode; int32_t rc = 0; if (mark_op == BNXT_ULP_MARK_DB_OPCODE_NOP || !(mark_op == BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION && - ULP_BITMAP_ISSET(parms->act_bitmap->bits, - BNXT_ULP_ACTION_BIT_MARK))) + ULP_BITMAP_ISSET(parms->act_bitmap->bits, + BNXT_ULP_ACTION_BIT_MARK))) return rc; /* no need to perform mark action process */ /* Get the mark id details from action property */ @@ -1473,19 +1343,6 @@ ulp_mapper_tcam_tbl_entry_write(struct bnxt_ulp_mapper_parms *parms, tf_dir_2_str(sparms.dir), sparms.idx); return -EIO; } - BNXT_TF_DBG(INFO, "tcam[%s][%s][%x] write success.\n", - tf_tcam_tbl_2_str(sparms.tcam_tbl_type), - tf_dir_2_str(sparms.dir), sparms.idx); - - /* Update cache with TCAM index if the was cache allocated. */ - if (parms->tcam_tbl_opc == - BNXT_ULP_MAPPER_TCAM_TBL_OPC_CACHE_ALLOC) { - if (!parms->cache_ptr) { - BNXT_TF_DBG(ERR, "Unable to update cache"); - return -EINVAL; - } - parms->cache_ptr->tcam_idx = idx; - } /* Mark action */ rc = ulp_mapper_mark_act_ptr_process(parms, tbl); @@ -1713,7 +1570,6 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, } if (rc) goto error; - /* * Only link the entry to the flow db in the event that cache was not * used. @@ -1741,7 +1597,6 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, * entry does not use cache. */ parms->tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL; - parms->cache_ptr = NULL; } return 0; @@ -1837,7 +1692,6 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, return rc; } } - /* do the transpose for the internal EM keys */ if (tbl->resource_func == BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE) ulp_blob_perform_byte_reverse(&key); @@ -1964,7 +1818,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, for (i = 0; i < (num_flds + encap_flds); i++) { /* set the swap index if encap swap bit is enabled */ if (parms->device_params->encap_byte_swap && encap_flds && - (i == num_flds)) + i == num_flds) ulp_blob_encap_swap_idx_set(&data); /* Process the result fields */ @@ -2011,11 +1865,10 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, rc = tf_set_tbl_entry(tfp, &sparms); if (rc) { BNXT_TF_DBG(ERR, - "Glbl Set table[%d][%s][%d] failed rc=%d\n", - sparms.type, - (sparms.dir == TF_DIR_RX) ? "RX" : "TX", - sparms.idx, - rc); + "Glbl Index table[%s][%s][%x] failed rc=%d\n", + tf_tbl_type_2_str(sparms.type), + tf_dir_2_str(sparms.dir), + sparms.idx, rc); return rc; } return 0; /* success */ @@ -2065,6 +1918,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, } index = aparms.idx; } + /* * calculate the idx for the result record, for external EM the offset * needs to be shifted accordingly. If external non-inline table types @@ -2097,11 +1951,10 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, rc = tf_set_tbl_entry(tfp, &sparms); if (rc) { - BNXT_TF_DBG(ERR, "Set table[%d][%s][%d] failed rc=%d\n", - sparms.type, - (sparms.dir == TF_DIR_RX) ? "RX" : "TX", - sparms.idx, - rc); + BNXT_TF_DBG(ERR, "Set table[%s][%s][%x] failed rc=%d\n", + tf_tbl_type_2_str(sparms.type), + tf_dir_2_str(sparms.dir), + sparms.idx, rc); goto error; } } @@ -2149,162 +2002,6 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, return rc; } -static int32_t -ulp_mapper_cache_tbl_process(struct bnxt_ulp_mapper_parms *parms, - struct bnxt_ulp_mapper_tbl_info *tbl) -{ - struct bnxt_ulp_mapper_key_field_info *kflds; - struct bnxt_ulp_mapper_cache_entry *cache_entry; - struct bnxt_ulp_mapper_ident_info *idents; - uint32_t i, num_kflds = 0, num_idents = 0; - struct ulp_flow_db_res_params fid_parms; - struct tf_free_identifier_parms fparms; - uint16_t tmplen, tmp_ident; - struct ulp_blob key; - uint8_t *cache_key; - uint64_t regval; - uint16_t *ckey; - int32_t rc; - - /* Get the key fields list and build the key. */ - kflds = ulp_mapper_key_fields_get(parms, tbl, &num_kflds); - if (!kflds || !num_kflds) { - BNXT_TF_DBG(ERR, "Failed to get key fields\n"); - return -EINVAL; - } - if (!ulp_blob_init(&key, tbl->key_bit_size, - parms->device_params->byte_order)) { - BNXT_TF_DBG(ERR, "Failed to alloc blob\n"); - return -EINVAL; - } - for (i = 0; i < num_kflds; i++) { - /* Setup the key */ - rc = ulp_mapper_keymask_field_process(parms, tbl->direction, - &kflds[i], - &key, 1, "Cache Key"); - if (rc) { - BNXT_TF_DBG(ERR, - "Failed to create key for Cache rc=%d\n", - rc); - return -EINVAL; - } - } - - /* - * Perform the lookup in the cache table with constructed key. The - * cache_key is a byte array of tmplen, it needs to be converted to a - * index for the cache table. - */ - cache_key = ulp_blob_data_get(&key, &tmplen); - ckey = (uint16_t *)cache_key; - - /* - * The id computed based on resource sub type and direction where - * dir is the bit0 and rest of the bits come from resource - * sub type. - */ - cache_entry = ulp_mapper_cache_entry_get(parms->ulp_ctx, - (tbl->resource_sub_type << 1 | - (tbl->direction & 0x1)), - *ckey); - - /* - * Get the identifier list for processing by both the hit and miss - * processing. - */ - idents = ulp_mapper_ident_fields_get(parms, tbl, &num_idents); - - if (!cache_entry->ref_count) { - /* Initialize the cache entry */ - cache_entry->tcam_idx = 0; - cache_entry->ref_count = 0; - for (i = 0; i < BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM; i++) - cache_entry->idents[i] = ULP_IDENTS_INVALID; - - /* Need to allocate identifiers for storing in the cache. */ - for (i = 0; i < num_idents; i++) { - /* - * Since we are using the cache, the identifier does not - * get added to the flow db. Pass in the pointer to the - * tmp_ident. - */ - rc = ulp_mapper_ident_process(parms, tbl, - &idents[i], &tmp_ident); - if (rc) - goto error; - - cache_entry->ident_types[i] = idents[i].ident_type; - cache_entry->idents[i] = tmp_ident; - } - - /* Tell the TCAM processor to alloc an entry */ - parms->tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_CACHE_ALLOC; - /* Store the cache key for use by the tcam process code */ - parms->cache_ptr = cache_entry; - } else { - /* Cache hit, get values from result. */ - for (i = 0; i < num_idents; i++) { - regval = (uint64_t)cache_entry->idents[i]; - if (!ulp_regfile_write(parms->regfile, - idents[i].regfile_idx, - tfp_cpu_to_be_64(regval))) { - BNXT_TF_DBG(ERR, - "Failed to write to regfile\n"); - return -EINVAL; - } - } - /* - * The cached entry is being used, so let the tcam processing - * know not to process this table. - */ - parms->tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_CACHE_SKIP; - } - - /* Made through the cache processing, increment the reference count. */ - cache_entry->ref_count++; - - /* Link the cache to the flow db. */ - memset(&fid_parms, 0, sizeof(fid_parms)); - fid_parms.direction = tbl->direction; - fid_parms.resource_func = tbl->resource_func; - - /* - * Cache resource type is composed of table_type, resource - * sub type and direction, it needs to set appropriately via setter. - */ - ulp_mapper_cache_res_type_set(&fid_parms, - tbl->resource_type, - (tbl->resource_sub_type << 1 | - (tbl->direction & 0x1))); - fid_parms.resource_hndl = (uint64_t)*ckey; - fid_parms.critical_resource = tbl->critical_resource; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); - if (rc) - BNXT_TF_DBG(ERR, "Failed to add cache to flow db.\n"); - - return rc; -error: - /* - * This error handling only gets called when the idents are being - * allocated for the cache on misses. Using the num_idents that was - * previously set. - */ - for (i = 0; i < num_idents; i++) { - if (cache_entry->idents[i] == ULP_IDENTS_INVALID) - continue; - - fparms.dir = tbl->direction; - fparms.ident_type = idents[i].ident_type; - fparms.id = cache_entry->idents[i]; - tf_free_identifier(parms->tfp, &fparms); - } - - return rc; -} - static int32_t ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) @@ -2367,11 +2064,10 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms, rc = tf_set_if_tbl_entry(tfp, &iftbl_params); if (rc) { - BNXT_TF_DBG(ERR, "Set table[%d][%s][%d] failed rc=%d\n", - iftbl_params.type, - (iftbl_params.dir == TF_DIR_RX) ? "RX" : "TX", - iftbl_params.idx, - rc); + BNXT_TF_DBG(ERR, "Set table[%d][%s][%x] failed rc=%d\n", + iftbl_params.type,/* TBD: add tf_if_tbl_2_str */ + tf_dir_2_str(iftbl_params.dir), + iftbl_params.idx, rc); return rc; } @@ -2382,6 +2078,218 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms, return rc; } +/* + * Process the identifier list in the generic table. + * Extract the ident from the generic table entry and + * write it to the reg file. + */ +static int32_t +ulp_mapper_gen_tbl_ident_scan(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl, + struct ulp_mapper_gen_tbl_entry *gen_tbl_ent) +{ + struct bnxt_ulp_mapper_ident_info *idents; + uint32_t i, idx, num_idents = 0; + int32_t rc = 0; + + /* Get the ident list */ + idents = ulp_mapper_ident_fields_get(parms, tbl, &num_idents); + + for (i = 0; i < num_idents; i++) { + /* Extract the index from the result byte data array */ + rc = ulp_mapper_gen_tbl_entry_data_get(gen_tbl_ent, + idents[i].ident_bit_pos, + idents[i].ident_bit_size, + (uint8_t *)&idx, + sizeof(idx)); + + /* validate the extraction */ + if (rc) { + BNXT_TF_DBG(ERR, "failed to read %s:%x:%x\n", + idents[i].description, + idents[i].ident_bit_pos, + idents[i].ident_bit_size); + return -EINVAL; + } + + /* Write it to the regfile */ + if (!ulp_regfile_write(parms->regfile, + idents[i].regfile_idx, idx)) { + BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", + idents[i].regfile_idx); + return -EINVAL; + } + } + return 0; +} + +/* + * Process the identifier list in the generic table. + * Write the ident to the generic table entry + */ +static int32_t +ulp_mapper_gen_tbl_ident_write(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl, + struct ulp_mapper_gen_tbl_entry *gen_tbl_ent) +{ + struct bnxt_ulp_mapper_ident_info *idents; + uint32_t i, num_idents = 0; + uint64_t idx; + + /* Get the ident list */ + idents = ulp_mapper_ident_fields_get(parms, tbl, &num_idents); + + for (i = 0; i < num_idents; i++) { + /* read from the regfile */ + if (!ulp_regfile_read(parms->regfile, idents[i].regfile_idx, + &idx)) { + BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", + idents[i].regfile_idx); + return -EINVAL; + } + + /* Update the gen tbl entry with the new data */ + ulp_mapper_gen_tbl_entry_data_set(gen_tbl_ent, + idents[i].ident_bit_pos, + idents[i].ident_bit_size, + (uint8_t *)&idx); + } + return 0; +} + +static int32_t +ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl) +{ + struct bnxt_ulp_mapper_key_field_info *kflds; + struct ulp_flow_db_res_params fid_parms; + struct ulp_mapper_gen_tbl_entry gen_tbl_ent; + uint16_t tmplen; + struct ulp_blob key; + uint8_t *cache_key; + int32_t tbl_idx; + uint32_t i, ckey, num_kflds = 0; + uint32_t gen_tbl_hit = 0, fdb_write = 0; + int32_t rc = 0; + + /* Get the key fields list and build the key. */ + kflds = ulp_mapper_key_fields_get(parms, tbl, &num_kflds); + if (!kflds || !num_kflds) { + BNXT_TF_DBG(ERR, "Failed to get key fields\n"); + return -EINVAL; + } + if (!ulp_blob_init(&key, tbl->key_bit_size, + parms->device_params->byte_order)) { + BNXT_TF_DBG(ERR, "Failed to alloc blob\n"); + return -EINVAL; + } + for (i = 0; i < num_kflds; i++) { + /* Setup the key */ + rc = ulp_mapper_keymask_field_process(parms, tbl->direction, + &kflds[i], + &key, 1, "Gen Tbl Key"); + if (rc) { + BNXT_TF_DBG(ERR, + "Failed to create key for Gen tbl rc=%d\n", + rc); + return -EINVAL; + } + } + + /* Calculate the table index for the generic table*/ + tbl_idx = ulp_mapper_gen_tbl_idx_calculate(tbl->resource_sub_type, + tbl->direction); + if (tbl_idx < 0) { + BNXT_TF_DBG(ERR, "Invalid table index %x:%x\n", + tbl->resource_sub_type, tbl->direction); + return -EINVAL; + } + + /* The_key is a byte array convert it to a search index */ + cache_key = ulp_blob_data_get(&key, &tmplen); + memcpy(&ckey, cache_key, sizeof(ckey)); + /* Get the generic table entry */ + rc = ulp_mapper_gen_tbl_entry_get(parms->ulp_ctx, + tbl_idx, ckey, &gen_tbl_ent); + if (rc) { + BNXT_TF_DBG(ERR, + "Failed to create key for Gen tbl rc=%d\n", rc); + return -EINVAL; + } + switch (tbl->tbl_opcode) { + case BNXT_ULP_GENERIC_TBL_OPC_READ: + /* check the reference count */ + if (ULP_GEN_TBL_REF_CNT(&gen_tbl_ent)) { + /* Scan ident list and create the result blob*/ + rc = ulp_mapper_gen_tbl_ident_scan(parms, tbl, + &gen_tbl_ent); + if (rc) { + BNXT_TF_DBG(ERR, + "Failed to scan ident list\n"); + return -EINVAL; + } + /* increment the reference count */ + ULP_GEN_TBL_REF_CNT_INC(&gen_tbl_ent); + + /* it is a hit */ + gen_tbl_hit = 1; + fdb_write = 1; + } + break; + case BNXT_ULP_GENERIC_TBL_OPC_WRITE: + /* check the reference count */ + if (ULP_GEN_TBL_REF_CNT(&gen_tbl_ent)) { + /* a hit then error */ + BNXT_TF_DBG(ERR, "generic entry already present %x\n", + ckey); + return -EINVAL; /* success */ + } + + /* Create the result blob from the ident list */ + rc = ulp_mapper_gen_tbl_ident_write(parms, tbl, &gen_tbl_ent); + if (rc) { + BNXT_TF_DBG(ERR, + "Failed to write ident list\n"); + return -EINVAL; + } + + /* increment the reference count */ + ULP_GEN_TBL_REF_CNT_INC(&gen_tbl_ent); + fdb_write = 1; + break; + default: + BNXT_TF_DBG(ERR, "Invalid table opcode %x\n", tbl->tbl_opcode); + return -EINVAL; + } + + /* Set the generic entry hit */ + rc = ulp_regfile_write(parms->regfile, + BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT, + gen_tbl_hit); + if (!rc) { + BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", + tbl->index_operand); + return -EIO; + } + + /* add the entry to the flow database */ + if (fdb_write) { + memset(&fid_parms, 0, sizeof(fid_parms)); + fid_parms.direction = tbl->direction; + fid_parms.resource_func = tbl->resource_func; + fid_parms.resource_sub_type = tbl->resource_sub_type; + fid_parms.resource_hndl = ckey; + fid_parms.critical_resource = tbl->critical_resource; + rc = ulp_flow_db_resource_add(parms->ulp_ctx, + parms->flow_type, + parms->fid, + &fid_parms); + if (rc) + BNXT_TF_DBG(ERR, "Fail to add gen ent flowdb %d\n", rc); + } + return rc; +} + static int32_t ulp_mapper_glb_resource_info_init(struct bnxt_ulp_context *ulp_ctx, struct bnxt_ulp_mapper_data *mapper_data) @@ -2522,7 +2430,7 @@ ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) tbls = ulp_mapper_tbl_list_get(parms, tid, &num_tbls); if (!tbls || !num_tbls) { BNXT_TF_DBG(ERR, "No %s tables for %d:%d\n", - (parms->tmpl_type == BNXT_ULP_TEMPLATE_TYPE_CLASS) ? + (parms->tmpl_type = BNXT_ULP_TEMPLATE_TYPE_CLASS) ? "class" : "action", parms->dev_id, tid); return -EINVAL; } @@ -2546,12 +2454,15 @@ ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) case BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE: rc = ulp_mapper_index_tbl_process(parms, tbl); break; - case BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE: - rc = ulp_mapper_cache_tbl_process(parms, tbl); - break; case BNXT_ULP_RESOURCE_FUNC_IF_TABLE: rc = ulp_mapper_if_tbl_process(parms, tbl); break; + case BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE: + rc = ulp_mapper_gen_tbl_process(parms, tbl); + break; + case BNXT_ULP_RESOURCE_FUNC_INVALID: + rc = 0; + break; default: BNXT_TF_DBG(ERR, "Unexpected mapper resource %d\n", tbl->resource_func); @@ -2569,7 +2480,7 @@ ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) return rc; error: BNXT_TF_DBG(ERR, "%s tables failed creation for %d:%d\n", - (parms->tmpl_type == BNXT_ULP_TEMPLATE_TYPE_CLASS) ? + (parms->tmpl_type = BNXT_ULP_TEMPLATE_TYPE_CLASS) ? "class" : "action", parms->dev_id, tid); return rc; } @@ -2594,9 +2505,6 @@ ulp_mapper_resource_free(struct bnxt_ulp_context *ulp, } switch (res->resource_func) { - case BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE: - rc = ulp_mapper_cache_entry_free(ulp, tfp, res); - break; case BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE: rc = ulp_mapper_tcam_entry_free(ulp, tfp, res); break; @@ -2619,6 +2527,9 @@ ulp_mapper_resource_free(struct bnxt_ulp_context *ulp, case BNXT_ULP_RESOURCE_FUNC_CHILD_FLOW: rc = ulp_mapper_child_flow_free(ulp, fid, res); break; + case BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE: + rc = ulp_mapper_gen_tbl_res_free(ulp, res); + break; default: break; } @@ -2902,11 +2813,9 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx, int32_t ulp_mapper_init(struct bnxt_ulp_context *ulp_ctx) { - struct bnxt_ulp_cache_tbl_params *tbl; struct bnxt_ulp_mapper_data *data; - uint32_t i; struct tf *tfp; - int32_t rc, csize; + int32_t rc; if (!ulp_ctx) return -EINVAL; @@ -2936,28 +2845,14 @@ ulp_mapper_init(struct bnxt_ulp_context *ulp_ctx) goto error; } - /* Allocate the ulp cache tables. */ - for (i = 0; i < BNXT_ULP_CACHE_TBL_MAX_SZ; i++) { - tbl = ulp_mapper_cache_tbl_params_get(i); - if (!tbl) { - BNXT_TF_DBG(ERR, "Failed to get cache table parms (%d)", - i); - goto error; - } - if (tbl->num_entries != 0) { - csize = sizeof(struct bnxt_ulp_mapper_cache_entry) * - tbl->num_entries; - data->cache_tbl[i] = rte_zmalloc("ulp mapper cache tbl", - csize, 0); - if (!data->cache_tbl[i]) { - BNXT_TF_DBG(ERR, "Failed to allocate Cache " - "table %d.\n", i); - rc = -ENOMEM; - goto error; - } - } + /* Allocate the generic table list */ + rc = ulp_mapper_generic_tbl_list_init(data); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to initialize generic tbl list\n"); + goto error; } + /* Allocate global template table entries */ rc = ulp_mapper_glb_template_table_init(ulp_ctx); if (rc) { BNXT_TF_DBG(ERR, "Failed to initialize global templates\n"); @@ -2975,7 +2870,6 @@ void ulp_mapper_deinit(struct bnxt_ulp_context *ulp_ctx) { struct bnxt_ulp_mapper_data *data; - uint32_t i; struct tf *tfp; if (!ulp_ctx) { @@ -3004,11 +2898,8 @@ ulp_mapper_deinit(struct bnxt_ulp_context *ulp_ctx) ulp_mapper_glb_resource_info_deinit(ulp_ctx, data); free_mapper_data: - /* Free the ulp cache tables */ - for (i = 0; i < BNXT_ULP_CACHE_TBL_MAX_SZ; i++) { - rte_free(data->cache_tbl[i]); - data->cache_tbl[i] = NULL; - } + /* Free the generic table */ + (void)ulp_mapper_generic_tbl_list_deinit(data); rte_free(data); /* Reset the data pointer within the ulp_ctx. */ diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h index 4ce19cc88d..8422f44026 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h @@ -14,6 +14,7 @@ #include "ulp_template_struct.h" #include "bnxt_ulp.h" #include "ulp_utils.h" +#include "ulp_gen_tbl.h" #define ULP_IDENTS_INVALID ((uint16_t)0xffff) @@ -31,13 +32,6 @@ enum bnxt_ulp_cache_table_opc { BNXT_ULP_MAPPER_TCAM_TBL_OPC_CACHE_ALLOC }; -struct bnxt_ulp_mapper_cache_entry { - uint32_t ref_count; - uint16_t tcam_idx; - uint16_t idents[BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM]; - uint8_t ident_types[BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM]; -}; - struct bnxt_ulp_mapper_glb_resource_entry { enum bnxt_ulp_resource_func resource_func; uint32_t resource_type; /* TF_ enum type */ @@ -47,8 +41,7 @@ struct bnxt_ulp_mapper_glb_resource_entry { struct bnxt_ulp_mapper_data { struct bnxt_ulp_mapper_glb_resource_entry glb_res_tbl[TF_DIR_MAX][BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ]; - struct bnxt_ulp_mapper_cache_entry - *cache_tbl[BNXT_ULP_CACHE_TBL_MAX_SZ]; + struct ulp_mapper_gen_tbl_list gen_tbl_list[BNXT_ULP_GEN_TBL_MAX_SZ]; }; /* Internal Structure for passing the arguments around */ @@ -69,13 +62,11 @@ struct bnxt_ulp_mapper_parms { struct ulp_regfile *regfile; struct tf *tfp; struct bnxt_ulp_context *ulp_ctx; - uint8_t encap_byte_swap; uint32_t fid; enum bnxt_ulp_fdb_type flow_type; struct bnxt_ulp_mapper_data *mapper_data; enum bnxt_ulp_cache_table_opc tcam_tbl_opc; - struct bnxt_ulp_mapper_cache_entry *cache_ptr; - struct bnxt_ulp_device_params *device_params; + struct bnxt_ulp_device_params *device_params; uint32_t parent_fid; uint32_t parent_flow; uint8_t tun_idx; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index 5deb7b9236..2a9a290eea 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -9,7 +9,7 @@ #define BNXT_ULP_REGFILE_MAX_SZ 19 #define BNXT_ULP_MAX_NUM_DEVICES 4 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2 -#define BNXT_ULP_CACHE_TBL_MAX_SZ 4 +#define BNXT_ULP_GEN_TBL_MAX_SZ 4 #define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 2048 #define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 217 #define BNXT_ULP_CLASS_HID_LOW_PRIME 7919 @@ -53,7 +53,10 @@ enum bnxt_ulp_action_bit { BNXT_ULP_ACTION_BIT_SET_TP_DST = 0x0000000000200000, BNXT_ULP_ACTION_BIT_VXLAN_ENCAP = 0x0000000000400000, BNXT_ULP_ACTION_BIT_JUMP = 0x0000000000800000, - BNXT_ULP_ACTION_BIT_LAST = 0x0000000001000000 + BNXT_ULP_ACTION_BIT_SHARED = 0x0000000001000000, + BNXT_ULP_ACTION_BIT_SAMPLE = 0x0000000002000000, + BNXT_ULP_ACTION_BIT_SHARED_SAMPLE = 0x0000000004000000, + BNXT_ULP_ACTION_BIT_LAST = 0x0000000008000000 }; enum bnxt_ulp_hdr_bit { @@ -183,6 +186,13 @@ enum bnxt_ulp_flow_mem_type { BNXT_ULP_FLOW_MEM_TYPE_LAST = 3 }; +enum bnxt_ulp_generic_tbl_opc { + BNXT_ULP_GENERIC_TBL_OPC_NOT_USED = 0, + BNXT_ULP_GENERIC_TBL_OPC_READ = 1, + BNXT_ULP_GENERIC_TBL_OPC_WRITE = 2, + BNXT_ULP_GENERIC_TBL_OPC_LAST = 3 +}; + enum bnxt_ulp_glb_regfile_index { BNXT_ULP_GLB_REGFILE_INDEX_NOT_USED = 0, BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 1, @@ -261,25 +271,36 @@ enum bnxt_ulp_priority { enum bnxt_ulp_regfile_index { BNXT_ULP_REGFILE_INDEX_NOT_USED = 0, - BNXT_ULP_REGFILE_INDEX_CLASS_TID = 1, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 2, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 3, - BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 4, - BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 5, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 6, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 7, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 8, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 9, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 10, - BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 11, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 12, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 13, - BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 14, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 15, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR = 16, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 = 17, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 = 18, - BNXT_ULP_REGFILE_INDEX_LAST = 19 + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 1, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 2, + BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 3, + BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 4, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 5, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 6, + BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 7, + BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 8, + BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 9, + BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 10, + BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11, + BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12, + BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13, + BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 14, + BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR = 15, + BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 = 16, + BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 = 17, + BNXT_ULP_REGFILE_INDEX_ACTION_REC_SIZE = 18, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0 = 19, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_1 = 20, + BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0 = 21, + BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_1 = 22, + BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_0 = 23, + BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_1 = 24, + BNXT_ULP_REGFILE_INDEX_SRC_PROPERTY_PTR = 25, + BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT = 26, + BNXT_ULP_REGFILE_INDEX_MIRROR_PTR_0 = 27, + BNXT_ULP_REGFILE_INDEX_CLASS_TID = 28, + BNXT_ULP_REGFILE_INDEX_FID = 29, + BNXT_ULP_REGFILE_INDEX_LAST = 30 }; enum bnxt_ulp_search_before_alloc { @@ -322,7 +343,7 @@ enum bnxt_ulp_resource_func { BNXT_ULP_RESOURCE_FUNC_RSVD2 = 0x60, BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE = 0x80, BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE = 0x81, - BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE = 0x82, + BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE = 0x82, BNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 0x83, BNXT_ULP_RESOURCE_FUNC_IF_TABLE = 0x84, BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c index 3c868fdf00..a8f26e8c51 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c @@ -3,132 +3,185 @@ * All rights reserved. */ +/* date: Thu Oct 15 17:28:37 2020 */ + #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" #include "ulp_rte_parser.h" +/* Mapper templates for header class list */ struct bnxt_ulp_mapper_tbl_list_info ulp_stingray_class_tmpl_list[] = { + /* default-vfr-[port_to_vs]:1 */ + /* class_tid: 1, stingray, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 0 }, + /* default-vfr-[vs_to_port]:2 */ + /* class_tid: 2, stingray, egress */ [2] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 7, .start_tbl_idx = 6 }, + /* default-vfr-[vfrep_to_vf]:3 */ + /* class_tid: 3, stingray, egress */ [3] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 7, .start_tbl_idx = 13 }, + /* default-vfr-[vf_to_vfrep]:4 */ + /* class_tid: 4, stingray, egress */ [4] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 7, .start_tbl_idx = 20 }, + /* default-egr-[loopback_action_rec]:5 */ + /* class_tid: 5, stingray, egress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 1, .start_tbl_idx = 27 }, + /* class-ing-em-[eth, (vlan), ipv4]-[smac, dmac, (vid)]:6 */ + /* class_tid: 6, stingray, ingress */ [6] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 28 }, + /* class-ing-em-[eth, (vlan), ipv6]-[smac, dmac, (vid)]:7 */ + /* class_tid: 7, stingray, ingress */ [7] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 33 }, + /* class-ing-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:8 */ + /* class_tid: 8, stingray, ingress */ [8] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 38 }, + /* class-ing-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:9 */ + /* class_tid: 9, stingray, ingress */ [9] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 44 }, + /* class-ing-em-[eth,ipv6, udp]-[sip, dip, sp, dp]:10 */ + /* class_tid: 10, stingray, ingress */ [10] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 50 }, + /* class-ing-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:11 */ + /* class_tid: 11, stingray, ingress */ [11] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 56 }, + /* class-ing-em-[eth, (vlan), ipv4, udp]-[dmac, (vid), sip, dip, sp, dp]:12 */ + /* class_tid: 12, stingray, ingress */ [12] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 62 }, + /* class-ing-em-[eth, (vlan), ipv4, tcp]-[dmac, (vid), sip, dip, sp, dp]:13 */ + /* class_tid: 13, stingray, ingress */ [13] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 67 }, + /* class-ing-em-[eth, (vlan), ipv6, udp]-[dmac, (vid), sip, dip, sp, dp]:14 */ + /* class_tid: 14, stingray, ingress */ [14] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 72 }, + /* class-ing-em-[eth, (vlan), ipv6, tcp]-[dmac, (vid), sip, dip, sp, dp]:15 */ + /* class_tid: 15, stingray, ingress */ [15] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 77 }, + /* class-ing-em-[eth, (vlan), ipv4, udp, vxlan]-[dmac, (vid), dip, dp]:16 */ + /* class_tid: 16, stingray, ingress */ [16] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 82 }, + /* class-ing-em-[eth, (vlan), ipv6, udp, vxlan]-[t_dmac, (vid), t_dip, t_dp]:17 */ + /* class_tid: 17, stingray, ingress */ [17] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 87 }, + /* class-ing-em-f1-[eth, ipv4, udp, vxlan]-[t_dmac]:18 */ + /* class_tid: 18, stingray, ingress */ [18] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 92 }, + /* class-ing-em-f2-[ipv4, udp, vxlan]-[vni, i_dmac]:19 */ + /* class_tid: 19, stingray, ingress */ [19] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 97 }, + /* class-egr-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:20 */ + /* class_tid: 20, stingray, egress */ [20] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 102 }, + /* class-egr-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:21 */ + /* class_tid: 21, stingray, egress */ [21] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 108 }, + /* class-egr-em-[eth-ipv6-udp]-[sip-dip-sp-dp]:22 */ + /* class_tid: 22, stingray, egress */ [22] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 114 }, + /* class-egr-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:23 */ + /* class_tid: 23, stingray, egress */ [23] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 120 }, + /* class-egr-em-[eth, (vlan), ipv4]-[smac, dmac, type]:24 */ + /* class_tid: 24, stingray, egress */ [24] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, .start_tbl_idx = 126 }, + /* class-egr-em-[eth, (vlan), ipv6]-[smac, dmac, type]:25 */ + /* class_tid: 25, stingray, egress */ [25] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, @@ -137,7 +190,7 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_stingray_class_tmpl_list[] = { }; struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { - { + { /* class_tid: 1, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -152,8 +205,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -169,7 +222,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 0, .ident_nums = 1 }, - { + { /* class_tid: 1, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -188,7 +241,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 1, stingray, table: parif_def_lkup_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_RX, @@ -199,7 +252,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, - { + { /* class_tid: 1, stingray, table: parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_RX, @@ -210,7 +263,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, - { + { /* class_tid: 1, stingray, table: parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_RX, @@ -221,7 +274,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, - { + { /* class_tid: 2, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -236,7 +289,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, @@ -257,8 +310,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -276,7 +329,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 1, .ident_nums = 1 }, - { + { /* class_tid: 2, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET, @@ -297,7 +350,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 2, stingray, table: parif_def_lkup_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -308,7 +361,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, - { + { /* class_tid: 2, stingray, table: parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -319,7 +372,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, - { + { /* class_tid: 2, stingray, table: parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -330,7 +383,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, - { + { /* class_tid: 3, stingray, table: egr_int_vtag_encap_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .resource_sub_type = @@ -345,7 +398,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, - { + { /* class_tid: 3, stingray, table: egr_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -360,8 +413,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 3, stingray, table: egr_l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -377,7 +430,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 2, .ident_nums = 0 }, - { + { /* class_tid: 3, stingray, table: egr_l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -396,7 +449,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 3, stingray, table: ing_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -411,7 +464,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* class_tid: 3, stingray, table: ing_l2_cntxt_dtagged_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -430,7 +483,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 3, stingray, table: ing_l2_cntxt_stagged_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -449,8 +502,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -466,7 +519,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 2, .ident_nums = 1 }, - { + { /* class_tid: 4, stingray, table: egr_l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -485,7 +538,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 4, stingray, table: egr_parif_def_lkup_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -496,7 +549,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, - { + { /* class_tid: 4, stingray, table: egr_parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -507,7 +560,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, - { + { /* class_tid: 4, stingray, table: egr_parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -518,7 +571,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, - { + { /* class_tid: 4, stingray, table: ing_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -533,7 +586,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* class_tid: 4, stingray, table: ing_l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -552,7 +605,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 5, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -567,7 +620,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL, .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR }, - { + { /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -586,8 +639,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -603,7 +656,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 4, .ident_nums = 1 }, - { + { /* class_tid: 6, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -622,7 +675,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 6, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -640,7 +693,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 6, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -658,7 +711,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -677,8 +730,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -694,7 +747,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 6, .ident_nums = 1 }, - { + { /* class_tid: 7, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -713,7 +766,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 7, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -731,7 +784,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 7, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -749,8 +802,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -766,7 +819,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 7, .ident_nums = 1 }, - { + { /* class_tid: 8, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -785,8 +838,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -802,7 +855,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 8, .ident_nums = 1 }, - { + { /* class_tid: 8, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -821,7 +874,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 8, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -839,7 +892,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 8, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -857,8 +910,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -874,7 +927,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 9, .ident_nums = 1 }, - { + { /* class_tid: 9, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -893,8 +946,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -910,7 +963,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 10, .ident_nums = 1 }, - { + { /* class_tid: 9, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -929,7 +982,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 9, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -947,7 +1000,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 9, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -965,8 +1018,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -982,7 +1035,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 11, .ident_nums = 1 }, - { + { /* class_tid: 10, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -1001,8 +1054,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1018,7 +1071,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 12, .ident_nums = 1 }, - { + { /* class_tid: 10, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1037,7 +1090,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 10, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1055,7 +1108,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 10, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1073,8 +1126,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -1090,7 +1143,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 13, .ident_nums = 1 }, - { + { /* class_tid: 11, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -1109,8 +1162,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1126,7 +1179,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 14, .ident_nums = 1 }, - { + { /* class_tid: 11, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1145,7 +1198,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 11, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1163,7 +1216,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 11, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1181,7 +1234,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1200,8 +1253,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1217,7 +1270,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 16, .ident_nums = 1 }, - { + { /* class_tid: 12, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1236,7 +1289,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 12, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1254,7 +1307,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 12, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1272,7 +1325,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1291,8 +1344,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1308,7 +1361,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 18, .ident_nums = 1 }, - { + { /* class_tid: 13, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1327,7 +1380,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 13, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1345,7 +1398,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 13, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1363,7 +1416,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1382,8 +1435,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1399,7 +1452,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 20, .ident_nums = 1 }, - { + { /* class_tid: 14, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1418,7 +1471,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 14, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1436,7 +1489,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 14, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1454,7 +1507,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1473,8 +1526,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1490,7 +1543,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 22, .ident_nums = 1 }, - { + { /* class_tid: 15, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1509,7 +1562,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 15, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1527,7 +1580,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 15, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1545,7 +1598,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1564,8 +1617,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1581,7 +1634,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 24, .ident_nums = 1 }, - { + { /* class_tid: 16, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1600,7 +1653,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 16, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1618,7 +1671,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 16, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1636,7 +1689,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1655,8 +1708,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1672,7 +1725,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 26, .ident_nums = 1 }, - { + { /* class_tid: 17, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1691,7 +1744,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 17, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1709,7 +1762,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 17, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1727,7 +1780,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 18, stingray, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = @@ -1744,7 +1797,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1763,8 +1816,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1780,7 +1833,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 28, .ident_nums = 2 }, - { + { /* class_tid: 18, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1799,7 +1852,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 18, stingray, table: wm_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, .direction = TF_DIR_RX, @@ -1818,7 +1871,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1837,8 +1890,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1854,7 +1907,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 31, .ident_nums = 2 }, - { + { /* class_tid: 19, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1873,7 +1926,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 19, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1891,7 +1944,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 19, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1909,8 +1962,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -1926,7 +1979,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 33, .ident_nums = 1 }, - { + { /* class_tid: 20, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -1945,8 +1998,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1962,7 +2015,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 34, .ident_nums = 1 }, - { + { /* class_tid: 20, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -1981,7 +2034,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 20, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1999,7 +2052,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 20, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2017,8 +2070,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -2034,7 +2087,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 35, .ident_nums = 1 }, - { + { /* class_tid: 21, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -2053,8 +2106,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2070,7 +2123,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 36, .ident_nums = 1 }, - { + { /* class_tid: 21, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2089,7 +2142,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 21, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2107,7 +2160,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 21, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2125,8 +2178,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -2142,7 +2195,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 37, .ident_nums = 1 }, - { + { /* class_tid: 22, stingray, table: l2_cntxt_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -2161,8 +2214,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2178,7 +2231,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 38, .ident_nums = 1 }, - { + { /* class_tid: 22, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2197,7 +2250,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 22, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2215,7 +2268,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 22, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2233,8 +2286,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -2250,7 +2303,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 39, .ident_nums = 1 }, - { + { /* class_tid: 23, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -2269,8 +2322,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2286,7 +2339,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 40, .ident_nums = 1 }, - { + { /* class_tid: 23, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2305,7 +2358,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 23, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2323,7 +2376,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 23, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2341,7 +2394,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_TX, @@ -2360,8 +2413,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2377,7 +2430,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 42, .ident_nums = 1 }, - { + { /* class_tid: 24, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2396,7 +2449,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 24, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2414,7 +2467,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 24, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2432,7 +2485,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_TX, @@ -2451,8 +2504,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2468,7 +2521,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .ident_start_idx = 44, .ident_nums = 1 }, - { + { /* class_tid: 25, stingray, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2487,7 +2540,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 25, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2505,7 +2558,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 25, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2526,7 +2579,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { }; struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { + /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, @@ -2536,22 +2591,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 1, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2564,46 +2624,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2612,22 +2681,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2640,46 +2714,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2688,7 +2771,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, @@ -2698,22 +2783,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2726,46 +2816,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2774,7 +2873,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, stingray, table: egr_l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, @@ -2784,22 +2885,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, stingray, table: egr_l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2812,46 +2918,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2860,12 +2975,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, stingray, table: ing_l2_cntxt_dtagged_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2878,11 +2996,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2895,21 +3015,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2919,11 +3043,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2935,16 +3061,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2953,7 +3082,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, stingray, table: ing_l2_cntxt_stagged_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2966,16 +3097,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2988,21 +3122,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3012,11 +3150,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3028,16 +3168,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3046,7 +3189,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, @@ -3056,22 +3201,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: egr_l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3084,46 +3234,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3132,22 +3291,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: ing_l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3160,46 +3324,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3208,7 +3381,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3224,11 +3399,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3244,6 +3421,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3259,21 +3437,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3286,16 +3468,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3303,11 +3488,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3316,12 +3503,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -3332,6 +3522,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3341,42 +3532,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3384,6 +3584,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3391,6 +3592,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3402,16 +3604,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3419,6 +3624,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3426,6 +3632,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3433,6 +3640,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3444,21 +3652,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3466,21 +3678,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3488,31 +3704,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3520,26 +3742,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3547,16 +3774,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3569,11 +3799,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3581,11 +3813,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3593,6 +3827,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3601,42 +3836,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -3647,11 +3891,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3662,6 +3908,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3671,42 +3918,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -3717,11 +3973,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3732,6 +3990,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3741,7 +4000,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3757,11 +4018,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3777,6 +4040,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3792,21 +4056,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3819,16 +4087,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3836,11 +4107,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3849,12 +4122,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -3865,6 +4141,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3874,42 +4151,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3921,6 +4207,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3928,6 +4215,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3939,16 +4227,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3956,6 +4247,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3963,6 +4255,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3970,6 +4263,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3981,21 +4275,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4003,21 +4301,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4025,31 +4327,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4057,26 +4365,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4084,16 +4397,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4106,11 +4422,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4118,11 +4436,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4130,6 +4450,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4138,42 +4459,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4184,11 +4514,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4199,6 +4531,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4208,42 +4541,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4254,11 +4596,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4269,6 +4613,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4278,7 +4623,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4288,22 +4635,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -4319,46 +4671,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4367,12 +4728,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -4383,6 +4747,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4392,12 +4757,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4409,6 +4777,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4416,6 +4785,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4427,21 +4797,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4449,6 +4823,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4456,6 +4831,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4467,16 +4843,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4484,6 +4863,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4491,6 +4871,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4498,6 +4879,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4509,21 +4891,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4531,21 +4917,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4553,31 +4943,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4585,26 +4981,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4612,16 +5013,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4634,11 +5038,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4646,11 +5052,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4658,6 +5066,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4666,17 +5075,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4687,6 +5100,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4697,6 +5111,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -4706,6 +5121,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4716,6 +5132,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4726,16 +5143,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4746,6 +5166,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4755,17 +5176,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4776,6 +5201,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4786,6 +5212,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -4795,6 +5222,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4805,6 +5233,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4815,16 +5244,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4835,6 +5267,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4844,7 +5277,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4854,22 +5289,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -4885,46 +5325,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4933,12 +5382,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -4949,6 +5401,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4958,12 +5411,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4971,6 +5427,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4978,6 +5435,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4989,21 +5447,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5011,6 +5473,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5018,6 +5481,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5029,16 +5493,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5046,6 +5513,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5053,6 +5521,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5060,6 +5529,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5071,21 +5541,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5093,21 +5567,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5115,31 +5593,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5147,26 +5631,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5174,16 +5663,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5196,11 +5688,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5208,11 +5702,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5220,6 +5716,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5228,17 +5725,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5249,6 +5750,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5259,6 +5761,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -5268,6 +5771,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5278,6 +5782,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5288,16 +5793,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5308,6 +5816,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5317,17 +5826,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5338,6 +5851,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5348,6 +5862,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -5357,6 +5872,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5367,6 +5883,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5377,16 +5894,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5397,6 +5917,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5406,7 +5927,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5416,22 +5939,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -5447,46 +5975,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5495,12 +6032,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -5511,6 +6051,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5520,12 +6061,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5537,6 +6081,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5544,6 +6089,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5555,21 +6101,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5581,6 +6131,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5588,6 +6139,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5599,16 +6151,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5616,6 +6171,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5623,6 +6179,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5630,6 +6187,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5641,21 +6199,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5663,21 +6225,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5685,31 +6251,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5717,26 +6289,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5744,16 +6321,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5766,11 +6346,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5778,11 +6360,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5790,6 +6374,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5798,17 +6383,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5819,6 +6408,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5829,6 +6419,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -5838,6 +6429,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5848,6 +6440,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5858,16 +6451,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5878,6 +6474,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5887,17 +6484,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5908,6 +6509,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5918,6 +6520,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -5927,6 +6530,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5937,6 +6541,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5947,16 +6552,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5967,6 +6575,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5976,7 +6585,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5986,22 +6597,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -6017,46 +6633,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6065,12 +6690,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -6081,6 +6709,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6090,12 +6719,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6103,6 +6735,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6110,6 +6743,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6121,21 +6755,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6147,6 +6785,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6154,6 +6793,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6165,16 +6805,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6182,6 +6825,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6189,6 +6833,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6196,6 +6841,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6207,21 +6853,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6229,21 +6879,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6251,31 +6905,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6283,26 +6943,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6310,16 +6975,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6332,11 +7000,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6344,11 +7014,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6356,6 +7028,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6364,17 +7037,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6385,6 +7062,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6395,6 +7073,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -6404,6 +7083,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6414,6 +7094,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6424,16 +7105,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6444,6 +7128,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6453,17 +7138,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6474,6 +7163,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6484,6 +7174,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -6493,6 +7184,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6503,6 +7195,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6513,16 +7206,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6533,6 +7229,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6542,7 +7239,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -6558,11 +7257,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -6578,6 +7279,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -6593,21 +7295,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6620,16 +7326,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6637,11 +7346,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6650,12 +7361,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -6666,6 +7380,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6675,12 +7390,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6692,6 +7410,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6699,6 +7418,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6710,21 +7430,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6732,6 +7456,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6739,6 +7464,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6750,16 +7476,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6767,6 +7496,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6774,6 +7504,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6781,6 +7512,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6792,21 +7524,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6814,21 +7550,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6836,31 +7576,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6868,26 +7614,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6895,16 +7646,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6917,11 +7671,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6929,11 +7685,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6941,6 +7699,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6949,17 +7708,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6970,6 +7733,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6980,6 +7744,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -6989,6 +7754,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6999,6 +7765,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7009,16 +7776,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7029,6 +7799,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7038,17 +7809,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7059,6 +7834,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7069,6 +7845,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -7078,6 +7855,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7088,6 +7866,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7098,16 +7877,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7118,6 +7900,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7127,7 +7910,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7143,11 +7928,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7163,6 +7950,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7178,21 +7966,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7205,16 +7997,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7222,11 +8017,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7235,12 +8032,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -7251,6 +8051,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7260,12 +8061,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7273,6 +8077,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7280,6 +8085,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7291,21 +8097,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7313,6 +8123,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7320,6 +8131,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7331,16 +8143,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7348,6 +8163,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7355,6 +8171,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7362,6 +8179,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7373,21 +8191,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7395,21 +8217,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7417,31 +8243,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7449,26 +8281,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7476,16 +8313,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7498,11 +8338,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7510,11 +8352,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7522,6 +8366,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7530,17 +8375,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7551,6 +8400,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7561,6 +8411,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -7570,6 +8421,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7580,6 +8432,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7590,16 +8443,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7610,6 +8466,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7619,17 +8476,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7640,6 +8501,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7650,6 +8512,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -7659,6 +8522,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7669,6 +8533,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7679,16 +8544,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7699,6 +8567,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7708,7 +8577,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7724,11 +8595,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7744,6 +8617,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7759,21 +8633,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7786,16 +8664,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7803,11 +8684,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7816,12 +8699,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -7832,6 +8718,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7841,12 +8728,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7858,6 +8748,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7865,6 +8756,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7876,21 +8768,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7902,6 +8798,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7909,6 +8806,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7920,16 +8818,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7937,6 +8838,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7944,6 +8846,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7951,6 +8854,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7962,21 +8866,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7984,21 +8892,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8006,31 +8918,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8038,26 +8956,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8065,16 +8988,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8087,11 +9013,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8099,11 +9027,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8111,6 +9041,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8119,17 +9050,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8140,6 +9075,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8150,6 +9086,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -8159,6 +9096,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8169,6 +9107,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8179,16 +9118,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8199,6 +9141,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8208,17 +9151,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8229,6 +9176,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8239,6 +9187,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -8248,6 +9197,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8258,6 +9208,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8268,16 +9219,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8288,6 +9242,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8297,7 +9252,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8313,11 +9270,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8333,6 +9292,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8348,21 +9308,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8375,16 +9339,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8392,11 +9359,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8405,12 +9374,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -8421,6 +9393,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8430,12 +9403,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8443,6 +9419,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8450,6 +9427,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8461,21 +9439,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8487,6 +9469,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8494,6 +9477,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8505,16 +9489,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8522,6 +9509,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8529,6 +9517,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8536,6 +9525,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8547,21 +9537,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8569,21 +9563,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8591,31 +9589,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8623,26 +9627,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8650,16 +9659,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8672,11 +9684,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8684,11 +9698,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8696,6 +9712,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8704,17 +9721,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8725,6 +9746,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8735,6 +9757,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -8744,6 +9767,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8754,6 +9778,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8764,16 +9789,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8784,6 +9812,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8793,17 +9822,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8814,6 +9847,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8824,6 +9858,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -8833,6 +9868,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8843,6 +9879,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8853,16 +9890,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8873,6 +9913,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8882,17 +9923,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8905,6 +9950,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8920,6 +9966,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8935,21 +9982,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8962,6 +10013,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8969,16 +10021,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8987,12 +10042,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -9003,6 +10061,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9012,92 +10071,111 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9105,6 +10183,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9112,6 +10191,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9123,11 +10203,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9139,6 +10221,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9146,6 +10229,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9157,21 +10241,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9179,6 +10267,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9186,6 +10275,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9197,16 +10287,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9214,6 +10307,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9221,6 +10315,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9232,16 +10327,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9254,11 +10352,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9266,11 +10366,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9278,6 +10380,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9286,27 +10389,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -9316,6 +10425,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "t_ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -9326,21 +10436,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "t_ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9351,6 +10465,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9360,27 +10475,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -9390,6 +10511,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "t_ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -9400,21 +10522,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "t_ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9425,6 +10551,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9434,17 +10561,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9457,6 +10588,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -9472,6 +10604,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -9487,21 +10620,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9514,6 +10651,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9521,16 +10659,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9539,12 +10680,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -9555,6 +10699,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9564,92 +10709,111 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9657,6 +10821,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9664,6 +10829,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9675,11 +10841,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9691,6 +10859,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9698,6 +10867,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9709,21 +10879,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9735,6 +10909,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9742,6 +10917,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9753,16 +10929,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9770,6 +10949,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9777,6 +10957,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9788,16 +10969,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9810,11 +10994,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9822,11 +11008,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9834,6 +11022,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9842,27 +11031,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -9872,6 +11067,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -9882,21 +11078,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9907,6 +11107,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9916,27 +11117,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -9946,6 +11153,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -9956,21 +11164,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9981,6 +11193,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9990,17 +11203,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10013,6 +11230,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -10028,26 +11246,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10055,6 +11278,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10062,16 +11286,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10080,12 +11307,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -10096,96 +11326,116 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 18, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10193,6 +11443,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10200,6 +11451,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10211,11 +11463,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10227,6 +11481,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10234,6 +11489,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10245,21 +11501,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10267,6 +11527,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10274,6 +11535,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10285,16 +11547,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10302,6 +11567,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10309,6 +11575,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10320,16 +11587,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10342,11 +11612,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10354,11 +11626,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10366,6 +11640,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10374,7 +11649,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, stingray, table: wm_0 */ { + .description = "wc_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10387,11 +11664,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "spare", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10404,6 +11683,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10411,21 +11691,26 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "others", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10438,6 +11723,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -10453,31 +11739,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10485,6 +11777,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10492,11 +11785,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10505,12 +11800,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -10521,96 +11819,116 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 19, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10618,6 +11936,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10625,6 +11944,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10636,11 +11956,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10652,6 +11974,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10659,6 +11982,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10670,21 +11994,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10692,6 +12020,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10699,6 +12028,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10710,16 +12040,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10727,6 +12060,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10734,6 +12068,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10745,16 +12080,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10767,11 +12105,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10779,11 +12119,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10791,6 +12133,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10799,17 +12142,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dst_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10820,6 +12167,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10830,16 +12178,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -10850,6 +12201,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -10859,17 +12211,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 339, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dst_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10880,6 +12236,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10890,16 +12247,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -10910,6 +12270,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -10919,7 +12280,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10929,22 +12292,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -10960,31 +12328,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10996,16 +12370,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11014,12 +12391,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -11030,6 +12410,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11039,12 +12420,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11056,6 +12440,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11063,6 +12448,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11074,21 +12460,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11096,6 +12486,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11103,6 +12494,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11114,21 +12506,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11136,6 +12532,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11143,6 +12540,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11154,111 +12552,133 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11271,11 +12691,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11283,11 +12705,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11295,6 +12719,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11303,17 +12728,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11324,6 +12753,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11334,6 +12764,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -11343,6 +12774,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11353,6 +12785,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11363,16 +12796,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11383,6 +12819,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11392,17 +12829,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11413,6 +12854,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11423,6 +12865,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -11432,6 +12875,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11442,6 +12886,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11452,16 +12897,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11472,6 +12920,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11481,7 +12930,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11491,22 +12942,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -11522,31 +12978,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11558,16 +13020,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11576,12 +13041,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -11592,6 +13060,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11601,12 +13070,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11614,6 +13086,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11621,6 +13094,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11632,21 +13106,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11654,6 +13132,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11661,6 +13140,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11672,21 +13152,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11694,6 +13178,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11701,6 +13186,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11712,111 +13198,133 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11829,11 +13337,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11841,11 +13351,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11853,6 +13365,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11861,17 +13374,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11882,6 +13399,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11892,6 +13410,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -11901,6 +13420,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11911,6 +13431,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11921,16 +13442,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11941,6 +13465,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11950,17 +13475,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11971,6 +13500,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11981,6 +13511,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -11990,6 +13521,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12000,6 +13532,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12010,16 +13543,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12030,6 +13566,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12039,7 +13576,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12049,22 +13588,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: l2_cntxt_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -12080,31 +13624,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12116,16 +13666,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12134,12 +13687,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -12150,6 +13706,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12159,12 +13716,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12176,6 +13736,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12183,6 +13744,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12194,21 +13756,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12220,6 +13786,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12227,6 +13794,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12238,21 +13806,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12260,6 +13832,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12267,6 +13840,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12278,111 +13852,133 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12395,11 +13991,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12407,11 +14005,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12419,6 +14019,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12427,17 +14028,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12448,6 +14053,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12458,6 +14064,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -12467,6 +14074,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12477,6 +14085,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12487,16 +14096,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12507,6 +14119,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12516,17 +14129,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12537,6 +14154,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12547,6 +14165,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -12556,6 +14175,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12566,6 +14186,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12576,16 +14197,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12596,6 +14220,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12605,7 +14230,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12615,22 +14242,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -12646,31 +14278,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12682,16 +14320,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12700,12 +14341,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -12716,6 +14360,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12725,12 +14370,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12738,6 +14386,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12745,6 +14394,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12756,21 +14406,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12782,6 +14436,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12789,6 +14444,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12800,21 +14456,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12822,6 +14482,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12829,6 +14490,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12840,111 +14502,133 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12957,11 +14641,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12969,11 +14655,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12981,6 +14669,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12989,17 +14678,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13010,6 +14703,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13020,6 +14714,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -13029,6 +14724,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13039,6 +14735,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13049,16 +14746,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13069,6 +14769,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13078,17 +14779,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13099,6 +14804,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13109,6 +14815,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -13118,6 +14825,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13128,6 +14836,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13138,16 +14847,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13158,6 +14870,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13167,7 +14880,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13183,11 +14898,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13203,6 +14920,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13218,21 +14936,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13245,11 +14967,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13261,6 +14985,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13270,11 +14995,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13283,12 +15010,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -13299,6 +15029,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13308,42 +15039,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13351,6 +15091,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13358,6 +15099,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13369,16 +15111,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13386,6 +15131,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13393,6 +15139,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13400,6 +15147,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13411,21 +15159,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13433,21 +15185,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13455,31 +15211,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13487,26 +15249,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13514,16 +15281,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13536,11 +15306,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13548,11 +15320,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13560,6 +15334,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13568,27 +15343,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 351, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_eth_type", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dmac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13599,6 +15380,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13609,6 +15391,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13618,27 +15401,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_eth_type", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dmac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13649,6 +15438,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13659,6 +15449,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13668,7 +15459,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13684,11 +15477,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13704,6 +15499,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13719,21 +15515,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13746,11 +15546,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13762,6 +15564,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13771,11 +15574,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13784,12 +15589,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -13800,6 +15608,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13809,42 +15618,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, stingray, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13856,6 +15674,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13863,6 +15682,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13874,16 +15694,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13891,6 +15714,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13898,6 +15722,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13905,6 +15730,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13916,21 +15742,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13938,21 +15768,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13960,31 +15794,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13992,26 +15832,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14019,16 +15864,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14041,11 +15889,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14053,11 +15903,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14065,6 +15917,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14073,27 +15926,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, stingray, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 351, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_eth_type", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dmac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -14104,6 +15963,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -14114,6 +15974,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -14123,27 +15984,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, stingray, table: int_em_0 */ { + .description = "spare", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_eth_type", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dmac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -14154,6 +16021,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -14164,6 +16032,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -14176,83 +16045,104 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { }; struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] = { + /* class_tid: 1, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14262,30 +16152,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14294,7 +16192,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 1, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14304,6 +16204,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -14313,10 +16214,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14326,44 +16229,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 1, stingray, table: parif_def_lkup_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14372,7 +16286,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 1, stingray, table: parif_def_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14381,7 +16297,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 1, stingray, table: parif_def_err_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14390,83 +16308,104 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14476,44 +16415,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14523,46 +16473,57 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14571,7 +16532,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14581,6 +16544,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -14590,10 +16554,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14603,44 +16569,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 2, stingray, table: parif_def_lkup_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14649,7 +16626,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, stingray, table: parif_def_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14658,7 +16637,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, stingray, table: parif_def_err_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14667,23 +16648,29 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, stingray, table: egr_int_vtag_encap_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -14692,21 +16679,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x81, 0x00} }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14716,50 +16707,63 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "spare", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, stingray, table: egr_int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14769,46 +16773,57 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -14818,164 +16833,206 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, stingray, table: egr_l2_cntxt_cache_0 */ + /* class_tid: 3, stingray, table: egr_l2_cntxt_tcam_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, stingray, table: ing_int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14985,32 +17042,40 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, stingray, table: ing_l2_cntxt_dtagged_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15020,58 +17085,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, stingray, table: ing_l2_cntxt_stagged_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15081,58 +17160,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15141,7 +17234,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: egr_l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15151,6 +17246,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15160,10 +17256,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15172,44 +17270,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 4, stingray, table: egr_parif_def_lkup_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15218,7 +17327,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: egr_parif_def_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15227,7 +17338,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: egr_parif_def_err_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15236,83 +17349,104 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: ing_int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -15322,30 +17456,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 4, stingray, table: ing_l2_cntxt_tcam_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15355,134 +17497,167 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 5, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15492,30 +17667,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15525,6 +17708,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15534,10 +17718,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -15547,44 +17733,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15593,19 +17790,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15615,12 +17817,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15630,16 +17834,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 6, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15649,22 +17857,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15674,26 +17886,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15703,22 +17921,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15728,26 +17950,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15757,6 +17985,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15766,10 +17995,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -15779,44 +18010,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15825,19 +18067,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15847,12 +18094,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15862,16 +18111,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 7, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15881,22 +18134,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15906,26 +18163,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15935,22 +18198,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15960,26 +18227,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15988,7 +18261,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15998,6 +18273,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16007,10 +18283,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16020,44 +18298,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16066,19 +18355,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16088,12 +18382,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16103,16 +18399,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 8, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16122,22 +18422,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16147,26 +18451,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16176,22 +18486,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16201,26 +18515,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16229,7 +18549,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16239,6 +18561,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16248,10 +18571,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16261,44 +18586,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16307,19 +18643,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16329,12 +18670,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16344,16 +18687,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 9, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16363,22 +18710,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16388,26 +18739,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16417,22 +18774,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16442,26 +18803,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16470,7 +18837,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16480,6 +18849,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16489,10 +18859,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16502,44 +18874,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16548,19 +18931,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16570,12 +18958,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16585,16 +18975,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 10, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16604,22 +18998,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16629,26 +19027,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16658,22 +19062,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16683,26 +19091,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16711,7 +19125,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16721,6 +19137,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16730,10 +19147,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16743,44 +19162,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16789,19 +19219,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16811,12 +19246,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16826,16 +19263,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 11, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16845,22 +19286,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16870,26 +19315,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16899,22 +19350,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16924,26 +19379,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16953,6 +19414,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16962,10 +19424,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16975,44 +19439,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17021,19 +19496,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17043,12 +19523,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17058,16 +19540,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 12, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17077,22 +19563,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17102,26 +19592,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17131,22 +19627,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17156,26 +19656,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17185,6 +19691,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -17194,10 +19701,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -17207,44 +19716,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17253,19 +19773,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17275,12 +19800,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17290,16 +19817,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 13, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17309,22 +19840,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17334,26 +19869,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17363,22 +19904,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17388,26 +19933,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17417,6 +19968,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -17426,10 +19978,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -17439,44 +19993,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17485,19 +20050,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17507,12 +20077,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17522,16 +20094,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 14, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17541,22 +20117,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17566,26 +20146,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17595,22 +20181,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17620,26 +20210,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17649,6 +20245,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -17658,10 +20255,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -17671,44 +20270,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17717,19 +20327,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17739,12 +20354,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17754,16 +20371,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 15, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17773,22 +20394,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17798,26 +20423,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17827,22 +20458,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17852,26 +20487,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17881,6 +20522,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -17890,10 +20532,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -17903,44 +20547,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17949,19 +20604,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17971,12 +20631,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17986,16 +20648,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 16, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18005,22 +20671,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18030,26 +20700,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18059,22 +20735,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18084,26 +20764,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18113,6 +20799,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -18122,10 +20809,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -18135,44 +20824,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18181,19 +20881,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18203,12 +20908,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18218,16 +20925,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 17, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18237,22 +20948,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18262,26 +20977,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18291,22 +21012,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18316,30 +21041,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, stingray, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18349,6 +21082,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -18358,10 +21092,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -18371,44 +21107,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18418,6 +21165,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "wc_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18426,11 +21174,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18440,12 +21191,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18455,12 +21208,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18470,22 +21225,27 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 18, stingray, table: wm_0 */ { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18495,12 +21255,15 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18510,6 +21273,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -18519,10 +21283,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -18532,44 +21298,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18579,6 +21356,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "wc_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18587,39 +21365,50 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 19, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18629,22 +21418,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18654,26 +21447,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18683,22 +21482,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18708,26 +21511,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18736,7 +21545,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18746,6 +21557,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -18755,10 +21567,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -18778,26 +21592,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18807,20 +21627,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18829,19 +21654,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18851,12 +21681,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18866,16 +21698,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 20, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18885,22 +21721,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18910,26 +21750,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18939,22 +21785,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18964,26 +21814,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18992,7 +21848,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19002,6 +21860,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -19011,10 +21870,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -19034,26 +21895,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19063,20 +21930,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19085,19 +21957,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19107,12 +21984,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19122,16 +22001,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 21, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19141,22 +22024,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19166,26 +22053,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19195,22 +22088,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19220,26 +22117,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19248,7 +22151,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: l2_cntxt_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19258,6 +22163,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -19267,10 +22173,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -19290,26 +22198,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19319,20 +22233,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19341,19 +22260,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19363,12 +22287,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19378,16 +22304,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 22, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19397,22 +22327,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19422,26 +22356,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19451,22 +22391,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19476,26 +22420,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19504,7 +22454,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19514,6 +22466,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -19523,10 +22476,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -19546,26 +22501,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19575,20 +22536,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19597,19 +22563,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19619,12 +22590,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19634,16 +22607,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 23, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19653,22 +22630,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19678,26 +22659,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19707,22 +22694,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19732,26 +22723,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19761,6 +22758,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -19770,10 +22768,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -19793,26 +22793,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19822,20 +22828,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19844,19 +22855,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19866,12 +22882,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19881,16 +22899,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 24, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19900,22 +22922,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19925,26 +22951,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19954,22 +22986,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19979,26 +23015,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20008,6 +23050,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -20017,10 +23060,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -20040,26 +23085,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20069,20 +23120,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20091,19 +23147,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, stingray, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -20113,12 +23174,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20128,16 +23191,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 25, stingray, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20147,22 +23214,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -20172,26 +23243,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, stingray, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20201,22 +23278,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -20226,20 +23307,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -20248,203 +23333,261 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] }; struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[] = { + /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, @@ -20452,20 +23595,25 @@ struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[] = { .ident_bit_pos = 0 }, { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, @@ -20473,90 +23621,115 @@ struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[] = { .ident_bit_pos = 0 }, { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c index c65b6dc159..3a66d59b5d 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c @@ -3,6 +3,8 @@ * All rights reserved. */ +/* date: Thu Oct 15 17:28:37 2020 */ + #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" @@ -96,6 +98,11 @@ uint32_t ulp_act_prop_map_table[] = { BNXT_ULP_ACT_PROP_SZ_LAST }; +/* + * This structure has to be indexed based on the rte_flow_action_type that is + * part of DPDK. The below array is list of parsing functions for each of the + * flow actions that are supported. + */ struct bnxt_ulp_rte_act_info ulp_act_info[] = { [RTE_FLOW_ACTION_TYPE_END] = { .act_type = BNXT_ULP_ACT_TYPE_END, @@ -295,25 +302,36 @@ struct bnxt_ulp_rte_act_info ulp_act_info[] = { } }; -struct bnxt_ulp_cache_tbl_params ulp_cache_tbl_params[] = { +/* Specifies parameters for the generic tables */ +struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM << 1 | TF_DIR_RX] = { - .num_entries = 16384 + .result_num_entries = 16384, + .result_byte_size = 6, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM << 1 | TF_DIR_TX] = { - .num_entries = 16384 + .result_num_entries = 16384, + .result_byte_size = 6, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM << 1 | TF_DIR_RX] = { - .num_entries = 16384 + .result_num_entries = 16384, + .result_byte_size = 6, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM << 1 | TF_DIR_TX] = { - .num_entries = 16384 + .result_num_entries = 16384, + .result_byte_size = 6, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE } }; +/* device tables */ const struct ulp_template_device_tbls ulp_template_stingray_tbls[] = { [BNXT_ULP_TEMPLATE_TYPE_CLASS] = { .tmpl_list = ulp_stingray_class_tmpl_list, @@ -329,6 +347,7 @@ const struct ulp_template_device_tbls ulp_template_stingray_tbls[] = { } }; +/* device tables */ const struct ulp_template_device_tbls ulp_template_wh_plus_tbls[] = { [BNXT_ULP_TEMPLATE_TYPE_CLASS] = { .tmpl_list = ulp_wh_plus_class_tmpl_list, @@ -344,8 +363,10 @@ const struct ulp_template_device_tbls ulp_template_wh_plus_tbls[] = { } }; +/* List of device specific parameters */ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = { [BNXT_ULP_DEVICE_ID_WH_PLUS] = { + .description = "Whitney_Plus", .byte_order = BNXT_ULP_BYTE_ORDER_LE, .encap_byte_swap = 1, .int_flow_db_num_entries = 16384, @@ -364,6 +385,7 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = { .dev_tbls = ulp_template_wh_plus_tbls }, [BNXT_ULP_DEVICE_ID_STINGRAY] = { + .description = "Stingray", .byte_order = BNXT_ULP_BYTE_ORDER_LE, .encap_byte_swap = 1, .int_flow_db_num_entries = 16384, @@ -383,6 +405,7 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = { } }; +/* List of device specific parameters */ struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = { [0] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, @@ -434,6 +457,11 @@ struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = { } }; +/* + * This table has to be indexed based on the rte_flow_item_type that is part of + * DPDK. The below array is list of parsing functions for each of the flow items + * that are supported. + */ struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = { [RTE_FLOW_ITEM_TYPE_END] = { .hdr_type = BNXT_ULP_HDR_TYPE_END, @@ -629,12 +657,17 @@ struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = { } }; +/* + * The parser uses this table to map vtags_num to CFA encapsulation VTAG + * encoding. It then takes the result and stores it in act_prop[encap_vtag_type] + */ uint32_t bnxt_ulp_encap_vtag_map[] = { BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP, BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI }; +/* Lists global action records */ uint32_t ulp_glb_template_tbl[] = { BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c index d9266abd3a..1abc8ecdd4 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c @@ -3,132 +3,185 @@ * All rights reserved. */ +/* date: Thu Oct 15 17:28:37 2020 */ + #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" #include "ulp_rte_parser.h" +/* Mapper templates for header class list */ struct bnxt_ulp_mapper_tbl_list_info ulp_wh_plus_class_tmpl_list[] = { + /* default-vfr-[port_to_vs]:1 */ + /* class_tid: 1, wh_plus, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 0 }, + /* default-vfr-[vs_to_port]:2 */ + /* class_tid: 2, wh_plus, egress */ [2] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 7, .start_tbl_idx = 6 }, + /* default-vfr-[vfrep_to_vf]:3 */ + /* class_tid: 3, wh_plus, egress */ [3] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 7, .start_tbl_idx = 13 }, + /* default-vfr-[vf_to_vfrep]:4 */ + /* class_tid: 4, wh_plus, egress */ [4] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 7, .start_tbl_idx = 20 }, + /* default-egr-[loopback_action_rec]:5 */ + /* class_tid: 5, wh_plus, egress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 1, .start_tbl_idx = 27 }, + /* class-ing-em-[eth, (vlan), ipv4]-[smac, dmac, (vid)]:6 */ + /* class_tid: 6, wh_plus, ingress */ [6] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 28 }, + /* class-ing-em-[eth, (vlan), ipv6]-[smac, dmac, (vid)]:7 */ + /* class_tid: 7, wh_plus, ingress */ [7] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 33 }, + /* class-ing-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:8 */ + /* class_tid: 8, wh_plus, ingress */ [8] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 38 }, + /* class-ing-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:9 */ + /* class_tid: 9, wh_plus, ingress */ [9] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 44 }, + /* class-ing-em-[eth,ipv6, udp]-[sip, dip, sp, dp]:10 */ + /* class_tid: 10, wh_plus, ingress */ [10] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 50 }, + /* class-ing-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:11 */ + /* class_tid: 11, wh_plus, ingress */ [11] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 56 }, + /* class-ing-em-[eth, (vlan), ipv4, udp]-[dmac, (vid), sip, dip, sp, dp]:12 */ + /* class_tid: 12, wh_plus, ingress */ [12] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 62 }, + /* class-ing-em-[eth, (vlan), ipv4, tcp]-[dmac, (vid), sip, dip, sp, dp]:13 */ + /* class_tid: 13, wh_plus, ingress */ [13] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 67 }, + /* class-ing-em-[eth, (vlan), ipv6, udp]-[dmac, (vid), sip, dip, sp, dp]:14 */ + /* class_tid: 14, wh_plus, ingress */ [14] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 72 }, + /* class-ing-em-[eth, (vlan), ipv6, tcp]-[dmac, (vid), sip, dip, sp, dp]:15 */ + /* class_tid: 15, wh_plus, ingress */ [15] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 77 }, + /* class-ing-em-[eth, (vlan), ipv4, udp, vxlan]-[dmac, (vid), dip, dp]:16 */ + /* class_tid: 16, wh_plus, ingress */ [16] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 82 }, + /* class-ing-em-[eth, (vlan), ipv6, udp, vxlan]-[t_dmac, (vid), t_dip, t_dp]:17 */ + /* class_tid: 17, wh_plus, ingress */ [17] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 87 }, + /* class-ing-em-f1-[eth, ipv4, udp, vxlan]-[t_dmac]:18 */ + /* class_tid: 18, wh_plus, ingress */ [18] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 92 }, + /* class-ing-em-f2-[ipv4, udp, vxlan]-[vni, i_dmac]:19 */ + /* class_tid: 19, wh_plus, ingress */ [19] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 97 }, + /* class-egr-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:20 */ + /* class_tid: 20, wh_plus, egress */ [20] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 102 }, + /* class-egr-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:21 */ + /* class_tid: 21, wh_plus, egress */ [21] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 108 }, + /* class-egr-em-[eth-ipv6-udp]-[sip-dip-sp-dp]:22 */ + /* class_tid: 22, wh_plus, egress */ [22] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 114 }, + /* class-egr-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:23 */ + /* class_tid: 23, wh_plus, egress */ [23] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 120 }, + /* class-egr-em-[eth, (vlan), ipv4]-[smac, dmac, type]:24 */ + /* class_tid: 24, wh_plus, egress */ [24] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, .start_tbl_idx = 126 }, + /* class-egr-em-[eth, (vlan), ipv6]-[smac, dmac, type]:25 */ + /* class_tid: 25, wh_plus, egress */ [25] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, @@ -137,7 +190,7 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_wh_plus_class_tmpl_list[] = { }; struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { - { + { /* class_tid: 1, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -152,8 +205,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 1, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -169,7 +222,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 0, .ident_nums = 1 }, - { + { /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -188,7 +241,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 1, wh_plus, table: parif_def_lkup_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_RX, @@ -199,7 +252,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, - { + { /* class_tid: 1, wh_plus, table: parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_RX, @@ -210,7 +263,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, - { + { /* class_tid: 1, wh_plus, table: parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_RX, @@ -221,7 +274,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, - { + { /* class_tid: 2, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -236,7 +289,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_vfr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, @@ -257,8 +310,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 2, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -276,7 +329,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 1, .ident_nums = 1 }, - { + { /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET, @@ -297,7 +350,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 2, wh_plus, table: parif_def_lkup_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -308,7 +361,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, - { + { /* class_tid: 2, wh_plus, table: parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -319,7 +372,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, - { + { /* class_tid: 2, wh_plus, table: parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -330,7 +383,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, - { + { /* class_tid: 3, wh_plus, table: egr_int_vtag_encap_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .resource_sub_type = @@ -345,7 +398,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, - { + { /* class_tid: 3, wh_plus, table: egr_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -360,8 +413,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 3, wh_plus, table: egr_l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -377,7 +430,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 2, .ident_nums = 0 }, - { + { /* class_tid: 3, wh_plus, table: egr_l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -396,7 +449,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 3, wh_plus, table: ing_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -411,7 +464,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* class_tid: 3, wh_plus, table: ing_l2_cntxt_dtagged_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -430,7 +483,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 3, wh_plus, table: ing_l2_cntxt_stagged_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -449,8 +502,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 4, wh_plus, table: egr_l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -466,7 +519,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 2, .ident_nums = 1 }, - { + { /* class_tid: 4, wh_plus, table: egr_l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -485,7 +538,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 4, wh_plus, table: egr_parif_def_lkup_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -496,7 +549,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, - { + { /* class_tid: 4, wh_plus, table: egr_parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -507,7 +560,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, - { + { /* class_tid: 4, wh_plus, table: egr_parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_TX, @@ -518,7 +571,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, - { + { /* class_tid: 4, wh_plus, table: ing_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -533,7 +586,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* class_tid: 4, wh_plus, table: ing_l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -552,7 +605,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 5, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = @@ -567,7 +620,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL, .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR }, - { + { /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -586,8 +639,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 6, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -603,7 +656,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 4, .ident_nums = 1 }, - { + { /* class_tid: 6, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -622,7 +675,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 6, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -640,7 +693,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 6, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -658,7 +711,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 7, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -677,8 +730,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 7, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -694,7 +747,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 6, .ident_nums = 1 }, - { + { /* class_tid: 7, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -713,7 +766,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 7, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -731,7 +784,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 7, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -749,8 +802,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 8, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -766,7 +819,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 7, .ident_nums = 1 }, - { + { /* class_tid: 8, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -785,8 +838,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 8, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -802,7 +855,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 8, .ident_nums = 1 }, - { + { /* class_tid: 8, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -821,7 +874,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 8, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -839,7 +892,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 8, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -857,8 +910,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 9, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -874,7 +927,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 9, .ident_nums = 1 }, - { + { /* class_tid: 9, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -893,8 +946,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 9, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -910,7 +963,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 10, .ident_nums = 1 }, - { + { /* class_tid: 9, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -929,7 +982,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 9, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -947,7 +1000,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 9, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -965,8 +1018,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 10, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -982,7 +1035,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 11, .ident_nums = 1 }, - { + { /* class_tid: 10, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -1001,8 +1054,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 10, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1018,7 +1071,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 12, .ident_nums = 1 }, - { + { /* class_tid: 10, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1037,7 +1090,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 10, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1055,7 +1108,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 10, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1073,8 +1126,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 11, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -1090,7 +1143,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 13, .ident_nums = 1 }, - { + { /* class_tid: 11, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, @@ -1109,8 +1162,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 11, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1126,7 +1179,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 14, .ident_nums = 1 }, - { + { /* class_tid: 11, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1145,7 +1198,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 11, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1163,7 +1216,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 11, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1181,7 +1234,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 12, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1200,8 +1253,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 12, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1217,7 +1270,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 16, .ident_nums = 1 }, - { + { /* class_tid: 12, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1236,7 +1289,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 12, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1254,7 +1307,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 12, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1272,7 +1325,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 13, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1291,8 +1344,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 13, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1308,7 +1361,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 18, .ident_nums = 1 }, - { + { /* class_tid: 13, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1327,7 +1380,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 13, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1345,7 +1398,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 13, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1363,7 +1416,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 14, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1382,8 +1435,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 14, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1399,7 +1452,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 20, .ident_nums = 1 }, - { + { /* class_tid: 14, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1418,7 +1471,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 14, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1436,7 +1489,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 14, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1454,7 +1507,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 15, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1473,8 +1526,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 15, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1490,7 +1543,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 22, .ident_nums = 1 }, - { + { /* class_tid: 15, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1509,7 +1562,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 15, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1527,7 +1580,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 15, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1545,7 +1598,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 16, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1564,8 +1617,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 16, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1581,7 +1634,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 24, .ident_nums = 1 }, - { + { /* class_tid: 16, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1600,7 +1653,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 16, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1618,7 +1671,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 16, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1636,7 +1689,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 17, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1655,8 +1708,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 17, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1672,7 +1725,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 26, .ident_nums = 1 }, - { + { /* class_tid: 17, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1691,7 +1744,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 17, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1709,7 +1762,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 17, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1727,7 +1780,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 18, wh_plus, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = @@ -1744,7 +1797,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* class_tid: 18, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1763,8 +1816,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 18, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1780,7 +1833,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 28, .ident_nums = 2 }, - { + { /* class_tid: 18, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1799,7 +1852,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 18, wh_plus, table: wm_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, .direction = TF_DIR_RX, @@ -1818,7 +1871,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 19, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, @@ -1837,8 +1890,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 19, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1854,7 +1907,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 31, .ident_nums = 2 }, - { + { /* class_tid: 19, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, @@ -1873,7 +1926,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 19, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -1891,7 +1944,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 19, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1909,8 +1962,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 20, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -1926,7 +1979,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 33, .ident_nums = 1 }, - { + { /* class_tid: 20, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -1945,8 +1998,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 20, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -1962,7 +2015,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 34, .ident_nums = 1 }, - { + { /* class_tid: 20, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -1981,7 +2034,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 20, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -1999,7 +2052,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 20, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2017,8 +2070,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 21, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -2034,7 +2087,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 35, .ident_nums = 1 }, - { + { /* class_tid: 21, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -2053,8 +2106,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 21, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2070,7 +2123,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 36, .ident_nums = 1 }, - { + { /* class_tid: 21, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2089,7 +2142,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 21, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2107,7 +2160,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 21, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2125,8 +2178,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 22, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -2142,7 +2195,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 37, .ident_nums = 1 }, - { + { /* class_tid: 22, wh_plus, table: l2_cntxt_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -2161,8 +2214,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 22, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2178,7 +2231,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 38, .ident_nums = 1 }, - { + { /* class_tid: 22, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2197,7 +2250,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 22, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2215,7 +2268,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 22, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2233,8 +2286,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 23, wh_plus, table: l2_cntxt_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, @@ -2250,7 +2303,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 39, .ident_nums = 1 }, - { + { /* class_tid: 23, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, @@ -2269,8 +2322,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 23, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2286,7 +2339,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 40, .ident_nums = 1 }, - { + { /* class_tid: 23, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2305,7 +2358,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 23, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2323,7 +2376,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 23, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2341,7 +2394,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 24, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_TX, @@ -2360,8 +2413,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 24, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2377,7 +2430,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 42, .ident_nums = 1 }, - { + { /* class_tid: 24, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2396,7 +2449,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 24, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2414,7 +2467,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 24, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2432,7 +2485,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 25, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_TX, @@ -2451,8 +2504,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { - .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE, + { /* class_tid: 25, wh_plus, table: profile_tcam_cache_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, @@ -2468,7 +2521,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .ident_start_idx = 44, .ident_nums = 1 }, - { + { /* class_tid: 25, wh_plus, table: profile_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, @@ -2487,7 +2540,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, - { + { /* class_tid: 25, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, @@ -2505,7 +2558,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, - { + { /* class_tid: 25, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, @@ -2526,7 +2579,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { }; struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { + /* class_tid: 1, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, @@ -2536,22 +2591,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2564,46 +2624,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2612,22 +2681,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_vfr_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2640,46 +2714,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2688,7 +2771,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, @@ -2698,22 +2783,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2726,46 +2816,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2774,7 +2873,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, wh_plus, table: egr_l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, @@ -2784,22 +2885,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, wh_plus, table: egr_l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2812,46 +2918,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2860,12 +2975,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, wh_plus, table: ing_l2_cntxt_dtagged_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2878,11 +2996,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2895,26 +3015,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2924,11 +3049,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2940,11 +3067,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2953,7 +3082,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, wh_plus, table: ing_l2_cntxt_stagged_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2966,16 +3097,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -2988,26 +3122,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3017,11 +3156,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3033,11 +3174,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3046,7 +3189,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, wh_plus, table: egr_l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, @@ -3056,22 +3201,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, wh_plus, table: egr_l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3084,46 +3234,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3132,22 +3291,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, wh_plus, table: ing_l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3160,46 +3324,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3208,7 +3381,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3224,11 +3399,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3244,6 +3421,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3259,26 +3437,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3291,16 +3474,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3308,6 +3494,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3316,12 +3503,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -3332,6 +3522,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3341,42 +3532,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3384,6 +3584,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3391,6 +3592,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3402,16 +3604,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3419,6 +3624,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3426,6 +3632,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3433,6 +3640,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3444,21 +3652,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3466,21 +3678,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3488,31 +3704,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3520,26 +3742,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3547,16 +3774,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3569,11 +3799,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3581,11 +3813,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3593,6 +3827,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3601,42 +3836,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -3647,11 +3891,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3662,6 +3908,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3671,42 +3918,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -3717,11 +3973,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3732,6 +3990,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3741,7 +4000,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3757,11 +4018,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3777,6 +4040,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -3792,26 +4056,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3824,16 +4093,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3841,6 +4113,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3849,12 +4122,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -3865,6 +4141,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -3874,42 +4151,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3921,6 +4207,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3928,6 +4215,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3939,16 +4227,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3956,6 +4247,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3963,6 +4255,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3970,6 +4263,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -3981,21 +4275,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4003,21 +4301,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4025,31 +4327,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4057,26 +4365,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4084,16 +4397,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4106,11 +4422,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4118,11 +4436,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4130,6 +4450,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4138,42 +4459,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4184,11 +4514,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4199,6 +4531,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4208,42 +4541,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4254,11 +4596,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4269,6 +4613,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4278,7 +4623,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4288,22 +4635,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -4319,46 +4671,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4367,12 +4728,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -4383,6 +4747,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4392,12 +4757,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4409,6 +4777,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4416,6 +4785,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4427,21 +4797,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4449,6 +4823,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4456,6 +4831,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4467,16 +4843,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4484,6 +4863,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4491,6 +4871,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4498,6 +4879,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4509,21 +4891,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4531,21 +4917,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4553,31 +4943,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4585,26 +4981,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4612,16 +5013,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4634,11 +5038,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4646,11 +5052,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4658,6 +5066,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4666,17 +5075,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4687,6 +5100,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4697,6 +5111,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -4706,6 +5121,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4716,6 +5132,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4726,16 +5143,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4746,6 +5166,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4755,17 +5176,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4776,6 +5201,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4786,6 +5212,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -4795,6 +5222,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4805,6 +5233,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4815,16 +5244,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4835,6 +5267,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4844,7 +5277,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -4854,22 +5289,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -4885,46 +5325,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4933,12 +5382,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -4949,6 +5401,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -4958,12 +5411,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4971,6 +5427,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4978,6 +5435,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -4989,21 +5447,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5011,6 +5473,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5018,6 +5481,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5029,16 +5493,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5046,6 +5513,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5053,6 +5521,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5060,6 +5529,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5071,21 +5541,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5093,21 +5567,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5115,31 +5593,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5147,26 +5631,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5174,16 +5663,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5196,11 +5688,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5208,11 +5702,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5220,6 +5716,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5228,17 +5725,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5249,6 +5750,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5259,6 +5761,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -5268,6 +5771,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5278,6 +5782,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5288,16 +5793,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5308,6 +5816,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5317,17 +5826,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5338,6 +5851,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5348,6 +5862,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -5357,6 +5872,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5367,6 +5883,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5377,16 +5894,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5397,6 +5917,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5406,7 +5927,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5416,22 +5939,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -5447,46 +5975,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5495,12 +6032,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -5511,6 +6051,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5520,12 +6061,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5537,6 +6081,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5544,6 +6089,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5555,21 +6101,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5581,6 +6131,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5588,6 +6139,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5599,16 +6151,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5616,6 +6171,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5623,6 +6179,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5630,6 +6187,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5641,21 +6199,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5663,21 +6225,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5685,31 +6251,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5717,26 +6289,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5744,16 +6321,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5766,11 +6346,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5778,11 +6360,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5790,6 +6374,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -5798,17 +6383,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5819,6 +6408,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5829,6 +6419,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -5838,6 +6429,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5848,6 +6440,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5858,16 +6451,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5878,6 +6474,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5887,17 +6484,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5908,6 +6509,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5918,6 +6520,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -5927,6 +6530,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5937,6 +6541,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5947,16 +6552,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5967,6 +6575,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -5976,7 +6585,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -5986,22 +6597,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -6017,46 +6633,55 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6065,12 +6690,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -6081,6 +6709,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6090,12 +6719,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6103,6 +6735,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6110,6 +6743,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6121,21 +6755,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6147,6 +6785,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6154,6 +6793,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6165,16 +6805,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6182,6 +6825,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6189,6 +6833,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6196,6 +6841,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6207,21 +6853,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6229,21 +6879,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6251,31 +6905,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6283,26 +6943,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6310,16 +6975,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6332,11 +7000,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6344,11 +7014,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6356,6 +7028,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6364,17 +7037,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6385,6 +7062,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6395,6 +7073,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -6404,6 +7083,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6414,6 +7094,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6424,16 +7105,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6444,6 +7128,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6453,17 +7138,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6474,6 +7163,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6484,6 +7174,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -6493,6 +7184,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6503,6 +7195,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6513,16 +7206,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6533,6 +7229,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6542,7 +7239,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -6558,11 +7257,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -6578,6 +7279,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -6593,26 +7295,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6625,16 +7332,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6642,6 +7352,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6650,12 +7361,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -6666,6 +7380,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -6675,12 +7390,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6692,6 +7410,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6699,6 +7418,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6710,21 +7430,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6732,6 +7456,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6739,6 +7464,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6750,16 +7476,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6767,6 +7496,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6774,6 +7504,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6781,6 +7512,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6792,21 +7524,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6814,21 +7550,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6836,31 +7576,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6868,26 +7614,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6895,16 +7646,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6917,11 +7671,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6929,11 +7685,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6941,6 +7699,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -6949,17 +7708,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6970,6 +7733,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6980,6 +7744,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -6989,6 +7754,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -6999,6 +7765,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7009,16 +7776,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7029,6 +7799,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7038,17 +7809,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7059,6 +7834,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7069,6 +7845,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -7078,6 +7855,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7088,6 +7866,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7098,16 +7877,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7118,6 +7900,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7127,7 +7910,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7143,11 +7928,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7163,6 +7950,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7178,26 +7966,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7210,16 +8003,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7227,6 +8023,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7235,12 +8032,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -7251,6 +8051,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7260,12 +8061,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7273,6 +8077,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7280,6 +8085,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7291,21 +8097,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7313,6 +8123,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7320,6 +8131,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7331,16 +8143,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7348,6 +8163,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7355,6 +8171,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7362,6 +8179,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7373,21 +8191,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7395,21 +8217,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7417,31 +8243,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7449,26 +8281,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7476,16 +8313,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7498,11 +8338,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7510,11 +8352,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7522,6 +8366,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7530,17 +8375,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7551,6 +8400,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7561,6 +8411,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -7570,6 +8421,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7580,6 +8432,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7590,16 +8443,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7610,6 +8466,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7619,17 +8476,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7640,6 +8501,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7650,6 +8512,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -7659,6 +8522,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7669,6 +8533,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -7679,16 +8544,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7699,6 +8567,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7708,7 +8577,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7724,11 +8595,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7744,6 +8617,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -7759,26 +8633,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7791,16 +8670,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7808,6 +8690,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7816,12 +8699,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -7832,6 +8718,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -7841,12 +8728,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7858,6 +8748,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7865,6 +8756,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7876,21 +8768,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7902,6 +8798,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7909,6 +8806,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7920,16 +8818,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7937,6 +8838,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7944,6 +8846,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7951,6 +8854,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7962,21 +8866,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -7984,21 +8892,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8006,31 +8918,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8038,26 +8956,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8065,16 +8988,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8087,11 +9013,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8099,11 +9027,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8111,6 +9041,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8119,17 +9050,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8140,6 +9075,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8150,6 +9086,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -8159,6 +9096,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8169,6 +9107,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8179,16 +9118,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8199,6 +9141,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8208,17 +9151,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8229,6 +9176,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8239,6 +9187,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -8248,6 +9197,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8258,6 +9208,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8268,16 +9219,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8288,6 +9242,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8297,7 +9252,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8313,11 +9270,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8333,6 +9292,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8348,26 +9308,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8380,16 +9345,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8397,6 +9365,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8405,12 +9374,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -8421,6 +9393,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8430,12 +9403,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8443,6 +9419,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8450,6 +9427,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8461,21 +9439,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8487,6 +9469,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8494,6 +9477,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8505,16 +9489,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8522,6 +9509,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8529,6 +9517,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8536,6 +9525,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8547,21 +9537,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8569,21 +9563,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8591,31 +9589,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8623,26 +9627,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8650,16 +9659,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8672,11 +9684,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8684,11 +9698,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8696,6 +9712,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8704,17 +9721,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8725,6 +9746,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8735,6 +9757,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -8744,6 +9767,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8754,6 +9778,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8764,16 +9789,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8784,6 +9812,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8793,17 +9822,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8814,6 +9847,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8824,6 +9858,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -8833,6 +9868,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8843,6 +9879,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -8853,16 +9890,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8873,6 +9913,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -8882,17 +9923,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8905,6 +9950,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8920,11 +9966,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -8940,21 +9988,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8967,6 +10019,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8974,11 +10027,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -8987,12 +10042,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -9003,6 +10061,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9012,92 +10071,111 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9105,6 +10183,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9112,6 +10191,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9123,11 +10203,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9139,6 +10221,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9146,6 +10229,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9157,21 +10241,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9179,6 +10267,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9186,6 +10275,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9197,16 +10287,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9214,6 +10307,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9221,6 +10315,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9232,16 +10327,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9254,11 +10352,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9266,11 +10366,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9278,6 +10380,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9286,27 +10389,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -9316,6 +10425,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "t_ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -9326,21 +10436,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "t_ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9351,6 +10465,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9360,27 +10475,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -9390,6 +10511,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "t_ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -9400,21 +10522,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "t_ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "t_l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9425,6 +10551,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9434,17 +10561,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9457,6 +10588,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -9472,11 +10604,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -9492,21 +10626,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9519,6 +10657,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9526,11 +10665,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9539,12 +10680,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -9555,6 +10699,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9564,92 +10709,111 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9657,6 +10821,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9664,6 +10829,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9675,11 +10841,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9691,6 +10859,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9698,6 +10867,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9709,21 +10879,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9735,6 +10909,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9742,6 +10917,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9753,16 +10929,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9770,6 +10949,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9777,6 +10957,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9788,16 +10969,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9810,11 +10994,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9822,11 +11008,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9834,6 +11022,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -9842,27 +11031,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -9872,6 +11067,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -9882,21 +11078,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9907,6 +11107,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9916,27 +11117,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -9946,6 +11153,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -9956,21 +11164,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9981,6 +11193,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -9990,17 +11203,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10013,6 +11230,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -10028,31 +11246,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10060,6 +11284,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10067,11 +11292,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10080,12 +11307,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -10096,96 +11326,116 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 18, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10193,6 +11443,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10200,6 +11451,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10211,11 +11463,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10227,6 +11481,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10234,6 +11489,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10245,21 +11501,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10267,6 +11527,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10274,6 +11535,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10285,16 +11547,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10302,6 +11567,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10309,6 +11575,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10320,16 +11587,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10342,11 +11612,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10354,11 +11626,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10366,6 +11640,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10374,7 +11649,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, wh_plus, table: wm_0 */ { + .description = "wc_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10387,11 +11664,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "spare", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10404,6 +11683,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10411,21 +11691,26 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "others", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 19, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10438,6 +11723,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -10453,31 +11739,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10485,6 +11777,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10492,11 +11785,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10505,12 +11800,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -10521,96 +11819,116 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 19, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10618,6 +11936,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10625,6 +11944,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10636,11 +11956,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10652,6 +11974,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10659,6 +11982,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10670,21 +11994,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10692,6 +12020,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10699,6 +12028,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10710,16 +12040,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10727,6 +12060,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10734,6 +12068,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10745,16 +12080,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10767,11 +12105,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10779,11 +12119,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10791,6 +12133,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -10799,17 +12142,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dst_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10820,6 +12167,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10830,16 +12178,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -10850,6 +12201,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -10859,17 +12211,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 339, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dst_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10880,6 +12236,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10890,16 +12247,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -10910,6 +12270,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -10919,7 +12280,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -10929,22 +12292,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -10960,36 +12328,43 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11001,11 +12376,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11014,12 +12391,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -11030,6 +12410,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11039,12 +12420,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11056,6 +12440,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11063,6 +12448,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11074,21 +12460,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11096,6 +12486,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11103,6 +12494,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11114,21 +12506,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11136,6 +12532,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11143,6 +12540,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11154,111 +12552,133 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11271,11 +12691,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11283,11 +12705,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11295,6 +12719,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11303,17 +12728,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11324,6 +12753,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11334,6 +12764,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -11343,6 +12774,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11353,6 +12785,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11363,16 +12796,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11383,6 +12819,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11392,17 +12829,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11413,6 +12854,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11423,6 +12865,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -11432,6 +12875,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11442,6 +12886,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11452,16 +12897,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11472,6 +12920,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11481,7 +12930,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11491,22 +12942,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -11522,36 +12978,43 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11563,11 +13026,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11576,12 +13041,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -11592,6 +13060,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11601,12 +13070,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11614,6 +13086,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11621,6 +13094,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11632,21 +13106,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11654,6 +13132,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11661,6 +13140,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11672,21 +13152,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11694,6 +13178,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11701,6 +13186,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11712,111 +13198,133 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11829,11 +13337,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11841,11 +13351,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11853,6 +13365,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -11861,17 +13374,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 251, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11882,6 +13399,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11892,6 +13410,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -11901,6 +13420,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11911,6 +13431,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11921,16 +13442,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11941,6 +13465,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -11950,17 +13475,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11971,6 +13500,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -11981,6 +13511,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -11990,6 +13521,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_dst_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12000,6 +13532,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12010,16 +13543,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12030,6 +13566,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12039,7 +13576,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12049,22 +13588,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: l2_cntxt_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -12080,36 +13624,43 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12121,11 +13672,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12134,12 +13687,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -12150,6 +13706,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12159,12 +13716,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12176,6 +13736,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12183,6 +13744,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12194,21 +13756,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12220,6 +13786,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12227,6 +13794,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12238,21 +13806,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12260,6 +13832,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12267,6 +13840,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12278,111 +13852,133 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12395,11 +13991,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12407,11 +14005,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12419,6 +14019,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12427,17 +14028,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12448,6 +14053,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12458,6 +14064,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -12467,6 +14074,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12477,6 +14085,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12487,16 +14096,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12507,6 +14119,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12516,17 +14129,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12537,6 +14154,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12547,6 +14165,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -12556,6 +14175,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12566,6 +14186,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12576,16 +14197,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12596,6 +14220,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12605,7 +14230,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -12615,22 +14242,27 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -12646,36 +14278,43 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_tl2_dst", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12687,11 +14326,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12700,12 +14341,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -12716,6 +14360,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -12725,12 +14370,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12738,6 +14386,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12745,6 +14394,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12756,21 +14406,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12782,6 +14436,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12789,6 +14444,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12800,21 +14456,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12822,6 +14482,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12829,6 +14490,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12840,111 +14502,133 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12957,11 +14641,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12969,11 +14655,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12981,6 +14669,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -12989,17 +14678,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 59, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13010,6 +14703,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13020,6 +14714,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -13029,6 +14724,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13039,6 +14735,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13049,16 +14746,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13069,6 +14769,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13078,17 +14779,21 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_dst_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13099,6 +14804,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l4_src_port", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13109,6 +14815,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ip_proto", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, @@ -13118,6 +14825,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_dst_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13128,6 +14836,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13138,16 +14847,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_src_mac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_id", .field_bit_size = 24, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13158,6 +14870,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13167,7 +14880,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13183,11 +14898,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13203,6 +14920,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13218,26 +14936,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13250,11 +14973,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13266,6 +14991,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13275,6 +15001,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13283,12 +15010,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -13299,6 +15029,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13308,42 +15039,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13351,6 +15091,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13358,6 +15099,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13369,16 +15111,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13386,6 +15131,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13393,6 +15139,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13400,6 +15147,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13411,21 +15159,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13433,21 +15185,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13455,31 +15211,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13487,26 +15249,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13514,16 +15281,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13536,11 +15306,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13548,11 +15320,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13560,6 +15334,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13568,27 +15343,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 351, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_eth_type", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dmac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13599,6 +15380,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13609,6 +15391,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13618,27 +15401,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_eth_type", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dmac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -13649,6 +15438,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13659,6 +15449,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13668,7 +15459,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13684,11 +15477,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac0_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13704,6 +15499,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "svif", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, .mask_operand = { @@ -13719,26 +15515,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sparif", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ivlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_ovlan_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mac1_l2_addr", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13751,11 +15552,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl2_num_vtags", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13767,6 +15570,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13776,6 +15580,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13784,12 +15589,15 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, wh_plus, table: profile_tcam_cache_0 */ { + .description = "recycle", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, @@ -13800,6 +15608,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "class_tid", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -13809,42 +15618,51 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, wh_plus, table: profile_tcam_0 */ { + .description = "l4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13856,6 +15674,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13863,6 +15682,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13874,16 +15694,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13891,6 +15714,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13898,6 +15722,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13905,6 +15730,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13916,21 +15742,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tun_hdr_flags", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tun_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13938,21 +15768,25 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_is_udp_tcp", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl4_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13960,31 +15794,37 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_dst", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ipv6_cmp_src", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_isIP", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_type", .field_bit_size = 4, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -13992,26 +15832,31 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_two_vtags", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_vtag_present", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_uc_mc_bc", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_type", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl2_hdr_valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14019,16 +15864,19 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hrec_next", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 9, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "prof_func_id", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14041,11 +15889,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "agg_error", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "recycle_cnt", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14053,11 +15903,13 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_0", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pkt_type_1", .field_bit_size = 2, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14065,6 +15917,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -14073,27 +15926,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, wh_plus, table: ext_em_0 */ { + .description = "spare", .field_bit_size = 351, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_eth_type", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dmac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -14104,6 +15963,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -14114,6 +15974,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -14123,27 +15984,33 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, wh_plus, table: int_em_0 */ { + .description = "spare", .field_bit_size = 7, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "local_cos", .field_bit_size = 3, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_eth_type", .field_bit_size = 16, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_inner_vid", .field_bit_size = 12, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_dmac", .field_bit_size = 48, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, @@ -14154,6 +16021,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_cntxt_id", .field_bit_size = 10, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -14164,6 +16032,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, @@ -14176,83 +16045,104 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { }; struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = { + /* class_tid: 1, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14262,30 +16152,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 1, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14294,7 +16192,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14304,6 +16204,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -14313,10 +16214,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14326,44 +16229,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 1, wh_plus, table: parif_def_lkup_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14372,7 +16286,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 1, wh_plus, table: parif_def_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14381,7 +16297,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 1, wh_plus, table: parif_def_err_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14390,83 +16308,104 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14476,44 +16415,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_vfr_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14523,46 +16473,57 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 2, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14571,7 +16532,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14581,6 +16544,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -14590,10 +16554,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14603,44 +16569,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 2, wh_plus, table: parif_def_lkup_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14649,7 +16626,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, wh_plus, table: parif_def_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14658,7 +16637,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 2, wh_plus, table: parif_def_err_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14667,23 +16648,29 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 3, wh_plus, table: egr_int_vtag_encap_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -14692,21 +16679,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x81, 0x00} }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14716,50 +16707,63 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "spare", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, wh_plus, table: egr_int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -14769,46 +16773,57 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -14818,164 +16833,206 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, wh_plus, table: egr_l2_cntxt_cache_0 */ + /* class_tid: 3, wh_plus, table: egr_l2_cntxt_tcam_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, wh_plus, table: ing_int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -14985,32 +17042,40 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, wh_plus, table: ing_l2_cntxt_dtagged_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15020,58 +17085,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 3, wh_plus, table: ing_l2_cntxt_stagged_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15081,58 +17160,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 4, wh_plus, table: egr_l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15141,7 +17234,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, wh_plus, table: egr_l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15151,6 +17246,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15160,10 +17256,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15172,44 +17270,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 4, wh_plus, table: egr_parif_def_lkup_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15218,7 +17327,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, wh_plus, table: egr_parif_def_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15227,7 +17338,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, wh_plus, table: egr_parif_def_err_arec_ptr_0 */ { + .description = "act_rec_ptr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15236,83 +17349,104 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, wh_plus, table: ing_int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -15322,30 +17456,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 4, wh_plus, table: ing_l2_cntxt_tcam_0 */ { + .description = "act_record_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15355,134 +17497,167 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 5, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15492,30 +17667,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15525,6 +17708,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15534,10 +17718,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -15547,44 +17733,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 6, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15593,19 +17790,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15615,12 +17817,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15630,16 +17834,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 6, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15649,22 +17857,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15674,26 +17886,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15703,22 +17921,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15728,26 +17950,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15757,6 +17985,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -15766,10 +17995,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -15779,44 +18010,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 7, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15825,19 +18067,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15847,12 +18094,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15862,16 +18111,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 7, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15881,22 +18134,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15906,26 +18163,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 7, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15935,22 +18198,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -15960,26 +18227,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15988,7 +18261,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -15998,6 +18273,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16007,10 +18283,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16020,44 +18298,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 8, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16066,19 +18355,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16088,12 +18382,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16103,16 +18399,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 8, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16122,22 +18422,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16147,26 +18451,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 8, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16176,22 +18486,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16201,26 +18515,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16229,7 +18549,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16239,6 +18561,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16248,10 +18571,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16261,44 +18586,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 9, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16307,19 +18643,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16329,12 +18670,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16344,16 +18687,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 9, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16363,22 +18710,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16388,26 +18739,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 9, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16417,22 +18774,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16442,26 +18803,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16470,7 +18837,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16480,6 +18849,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16489,10 +18859,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16502,44 +18874,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 10, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16548,19 +18931,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16570,12 +18958,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16585,16 +18975,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 10, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16604,22 +18998,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16629,26 +19027,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 10, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16658,22 +19062,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16683,26 +19091,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16711,7 +19125,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16721,6 +19137,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16730,10 +19147,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16743,44 +19162,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 11, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16789,19 +19219,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16811,12 +19246,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16826,16 +19263,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 11, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16845,22 +19286,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16870,26 +19315,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 11, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16899,22 +19350,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -16924,26 +19379,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -16953,6 +19414,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -16962,10 +19424,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -16975,44 +19439,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 12, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17021,19 +19496,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17043,12 +19523,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17058,16 +19540,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 12, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17077,22 +19563,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17102,26 +19592,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 12, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17131,22 +19627,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17156,26 +19656,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17185,6 +19691,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -17194,10 +19701,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -17207,44 +19716,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 13, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17253,19 +19773,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17275,12 +19800,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17290,16 +19817,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 13, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17309,22 +19840,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17334,26 +19869,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 13, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17363,22 +19904,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17388,26 +19933,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17417,6 +19968,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -17426,10 +19978,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -17439,44 +19993,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 14, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17485,19 +20050,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17507,12 +20077,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17522,16 +20094,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 14, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17541,22 +20117,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17566,26 +20146,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 14, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17595,22 +20181,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17620,26 +20210,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17649,6 +20245,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -17658,10 +20255,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -17671,44 +20270,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 15, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17717,19 +20327,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17739,12 +20354,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17754,16 +20371,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 15, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17773,22 +20394,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17798,26 +20423,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 15, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17827,22 +20458,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17852,26 +20487,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17881,6 +20522,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -17890,10 +20532,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -17903,44 +20547,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 16, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17949,19 +20604,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -17971,12 +20631,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -17986,16 +20648,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 16, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18005,22 +20671,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18030,26 +20700,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 16, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18059,22 +20735,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18084,26 +20764,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18113,6 +20799,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -18122,10 +20809,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -18135,44 +20824,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 17, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18181,19 +20881,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18203,12 +20908,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18218,16 +20925,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 17, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18237,22 +20948,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18262,26 +20977,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 17, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18291,22 +21012,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18316,30 +21041,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, wh_plus, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 18, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18349,6 +21082,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -18358,10 +21092,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -18371,44 +21107,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 18, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18418,6 +21165,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "wc_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18426,11 +21174,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 18, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18440,12 +21191,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18455,12 +21208,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18470,22 +21225,27 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 18, wh_plus, table: wm_0 */ { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18495,12 +21255,15 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18510,6 +21273,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -18519,10 +21283,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -18532,44 +21298,55 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 19, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18579,6 +21356,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "wc_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18587,39 +21365,50 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 19, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18629,22 +21418,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18654,26 +21447,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 19, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18683,22 +21482,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18708,26 +21511,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18736,7 +21545,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18746,6 +21557,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -18755,10 +21567,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -18778,26 +21592,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18807,20 +21627,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 20, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18829,19 +21654,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18851,12 +21681,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18866,16 +21698,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 20, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18885,22 +21721,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18910,26 +21750,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 20, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18939,22 +21785,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -18964,26 +21814,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -18992,7 +21848,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19002,6 +21860,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -19011,10 +21870,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -19034,26 +21895,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19063,20 +21930,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 21, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19085,19 +21957,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19107,12 +21984,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19122,16 +22001,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 21, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19141,22 +22024,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19166,26 +22053,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 21, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19195,22 +22088,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19220,26 +22117,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19248,7 +22151,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: l2_cntxt_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19258,6 +22163,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -19267,10 +22173,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -19290,26 +22198,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19319,20 +22233,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 22, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19341,19 +22260,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19363,12 +22287,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19378,16 +22304,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 22, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19397,22 +22327,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19422,26 +22356,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 22, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19451,22 +22391,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19476,26 +22420,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19504,7 +22454,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19514,6 +22466,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -19523,10 +22476,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -19546,26 +22501,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19575,20 +22536,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 23, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19597,19 +22563,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19619,12 +22590,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19634,16 +22607,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 23, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19653,22 +22630,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19678,26 +22659,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 23, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19707,22 +22694,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19732,26 +22723,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19761,6 +22758,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -19770,10 +22768,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -19793,26 +22793,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19822,20 +22828,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 24, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19844,19 +22855,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19866,12 +22882,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19881,16 +22899,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 24, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19900,22 +22922,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19925,26 +22951,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 24, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -19954,22 +22986,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -19979,26 +23015,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20008,6 +23050,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "prof_func_id", .field_bit_size = 7, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -20017,10 +23060,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l2_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "parif", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { @@ -20040,26 +23085,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "allowed_pri", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_pri", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "allowed_tpid", .field_bit_size = 6, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "default_tpid", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "bd_act_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "sp_rec_ptr", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20069,20 +23120,25 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "byp_sp_lkup", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pri_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 25, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20091,19 +23147,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, wh_plus, table: profile_tcam_0 */ { + .description = "wc_key_id", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "wc_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "em_key_mask", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -20113,12 +23174,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_key_id", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_profile_id", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20128,16 +23191,20 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "em_search_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pl_byp_lkup_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* class_tid: 25, wh_plus, table: ext_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20147,22 +23214,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -20172,26 +23243,32 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 25, wh_plus, table: int_em_0 */ { + .description = "act_rec_ptr", .field_bit_size = 33, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -20201,22 +23278,26 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ext_flow_ctr", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "act_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "act_rec_size", .field_bit_size = 5, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "key_size", .field_bit_size = 9, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -20226,20 +23307,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "strength", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "l1_cacheable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -20248,203 +23333,261 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = }; struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = { + /* class_tid: 1, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 2, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 4, wh_plus, table: egr_l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 6, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 7, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 7, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 8, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 8, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 9, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 9, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 10, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 10, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 11, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 11, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 12, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 12, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 13, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 13, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 14, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 14, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 15, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 15, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 16, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 16, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 17, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 17, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 18, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 18, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, @@ -20452,20 +23595,25 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = { .ident_bit_pos = 0 }, { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 19, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 19, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, @@ -20473,90 +23621,115 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = { .ident_bit_pos = 0 }, { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 20, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 20, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 21, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 21, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 22, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 22, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 23, wh_plus, table: l2_cntxt_cache_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 23, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 24, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 24, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 25, wh_plus, table: l2_cntxt_tcam_0 */ { + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, + /* class_tid: 25, wh_plus, table: profile_tcam_cache_0 */ { + .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h index a539ec0c84..67308f1cf1 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h @@ -217,6 +217,9 @@ struct bnxt_ulp_mapper_tbl_info { enum bnxt_ulp_mark_db_opcode mark_db_opcode; enum bnxt_ulp_index_opcode index_opcode; uint32_t index_operand; + + /* Table opcode for table operations */ + uint32_t tbl_opcode; }; struct bnxt_ulp_mapper_key_field_info { @@ -258,6 +261,12 @@ struct bnxt_ulp_cache_tbl_params { uint16_t num_entries; }; +struct bnxt_ulp_generic_tbl_params { + uint16_t result_num_entries; + uint16_t result_byte_size; + enum bnxt_ulp_byte_order result_byte_order; +}; + /* * Flow Mapper Static Data Externs: * Access to the below static data should be done through access functions and @@ -288,6 +297,11 @@ extern struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[]; */ extern struct bnxt_ulp_cache_tbl_params ulp_cache_tbl_params[]; +/* + * The ulp_generic_tbl_parms table provides the sizes of the generic tables the + * mapper must dynamically allocate during initialization. + */ +extern struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[]; /* * The ulp_global template table is used to initialize default entries * that could be reused by other templates. diff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.c b/drivers/net/bnxt/tf_ulp/ulp_utils.c index 7214e9c889..ff8eabd3f3 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_utils.c +++ b/drivers/net/bnxt/tf_ulp/ulp_utils.c @@ -146,8 +146,20 @@ ulp_bs_put_lsb(uint8_t *bs, uint16_t bitpos, uint8_t bitlen, uint8_t val) } } -/* Assuming that val is in Big-Endian Format */ -static uint32_t +/* + * Add data to the byte array in Little endian format. + * + * bs [in] The byte array where data is pushed + * + * pos [in] The offset where data is pushed + * + * len [in] The number of bits to be added to the data array. + * + * val [in] The data to be added to the data array. + * + * returns the number of bits pushed. + */ +uint32_t ulp_bs_push_lsb(uint8_t *bs, uint16_t pos, uint8_t len, uint8_t *val) { int i; @@ -169,8 +181,20 @@ ulp_bs_push_lsb(uint8_t *bs, uint16_t pos, uint8_t len, uint8_t *val) return len; } -/* Assuming that val is in Big-Endian Format */ -static uint32_t +/* + * Add data to the byte array in Big endian format. + * + * bs [in] The byte array where data is pushed + * + * pos [in] The offset where data is pushed + * + * len [in] The number of bits to be added to the data array. + * + * val [in] The data to be added to the data array. + * + * returns the number of bits pushed. + */ +uint32_t ulp_bs_push_msb(uint8_t *bs, uint16_t pos, uint8_t len, uint8_t *val) { int i; @@ -474,7 +498,7 @@ ulp_blob_pad_push(struct ulp_blob *blob, { if (datalen > (uint32_t)(blob->bitlen - blob->write_idx)) { BNXT_TF_DBG(ERR, "Pad too large for blob\n"); - return 0; + return -1; } blob->write_idx += datalen; @@ -504,8 +528,22 @@ ulp_bs_get_lsb(uint8_t *src, uint16_t bitpos, uint8_t bitlen, uint8_t *dst) } } -/* Assuming that src is in little-Endian Format */ -static void +/* + * Get data from the byte array in Little endian format. + * + * src [in] The byte array where data is extracted from + * + * dst [out] The byte array where data is pulled into + * + * size [in] The size of dst array in bytes + * + * offset [in] The offset where data is pulled + * + * len [in] The number of bits to be extracted from the data array + * + * returns None. + */ +void ulp_bs_pull_lsb(uint8_t *src, uint8_t *dst, uint32_t size, uint32_t offset, uint32_t len) { @@ -525,6 +563,57 @@ ulp_bs_pull_lsb(uint8_t *src, uint8_t *dst, uint32_t size, ulp_bs_get_lsb(src, offset, len, &dst[size - 1 - idx]); } +/* Get data from src and put into dst using big-endian format */ +static void +ulp_bs_get_msb(uint8_t *src, uint16_t bitpos, uint8_t bitlen, uint8_t *dst) +{ + uint8_t bitoffs = bitpos % ULP_BLOB_BYTE; + uint16_t index = ULP_BITS_2_BYTE_NR(bitpos); + uint8_t mask; + int32_t shift; + + shift = ULP_BLOB_BYTE - bitoffs - bitlen; + if (shift >= 0) { + mask = 0xFF >> -bitlen; + *dst = (src[index] >> shift) & mask; + } else { + *dst = (src[index] & (0xFF >> bitoffs)) << -shift; + *dst |= src[index + 1] >> -shift; + } +} + +/* + * Get data from the byte array in Big endian format. + * + * src [in] The byte array where data is extracted from + * + * dst [out] The byte array where data is pulled into + * + * offset [in] The offset where data is pulled + * + * len [in] The number of bits to be extracted from the data array + * + * returns None. + */ +void +ulp_bs_pull_msb(uint8_t *src, uint8_t *dst, + uint32_t offset, uint32_t len) +{ + uint32_t idx; + uint32_t cnt = ULP_BITS_2_BYTE_NR(len); + + /* iterate bytewise to get data */ + for (idx = 0; idx < cnt; idx++) { + ulp_bs_get_msb(src, offset, ULP_BLOB_BYTE, &dst[idx]); + offset += ULP_BLOB_BYTE; + len -= ULP_BLOB_BYTE; + } + + /* Extract the last reminder data that is not 8 byte boundary */ + if (len) + ulp_bs_get_msb(src, offset, len, &dst[idx]); +} + /* * Extract data from the binary blob using given offset. * @@ -549,11 +638,10 @@ ulp_blob_pull(struct ulp_blob *blob, uint8_t *data, uint32_t data_size, return -1; /* failure */ } - if (blob->byte_order == BNXT_ULP_BYTE_ORDER_BE) { - BNXT_TF_DBG(ERR, "Big endian pull not implemented\n"); - return -1; /* failure */ - } - ulp_bs_pull_lsb(blob->data, data, data_size, offset, len); + if (blob->byte_order == BNXT_ULP_BYTE_ORDER_BE) + ulp_bs_pull_msb(blob->data, data, offset, len); + else + ulp_bs_pull_lsb(blob->data, data, data_size, offset, len); return 0; } diff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.h b/drivers/net/bnxt/tf_ulp/ulp_utils.h index d3f0da049b..bbd8c16407 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_utils.h +++ b/drivers/net/bnxt/tf_ulp/ulp_utils.h @@ -135,6 +135,38 @@ ulp_regfile_write(struct ulp_regfile *regfile, enum bnxt_ulp_regfile_index field, uint64_t data); +/* + * Add data to the byte array in Little endian format. + * + * bs [in] The byte array where data is pushed + * + * pos [in] The offset where data is pushed + * + * len [in] The number of bits to be added to the data array. + * + * val [in] The data to be added to the data array. + * + * returns the number of bits pushed. + */ +uint32_t +ulp_bs_push_lsb(uint8_t *bs, uint16_t pos, uint8_t len, uint8_t *val); + +/* + * Add data to the byte array in Big endian format. + * + * bs [in] The byte array where data is pushed + * + * pos [in] The offset where data is pushed + * + * len [in] The number of bits to be added to the data array. + * + * val [in] The data to be added to the data array. + * + * returns the number of bits pushed. + */ +uint32_t +ulp_bs_push_msb(uint8_t *bs, uint16_t pos, uint8_t len, uint8_t *val); + /* * Initializes the blob structure for creating binary blob * @@ -257,6 +289,42 @@ uint8_t * ulp_blob_data_get(struct ulp_blob *blob, uint16_t *datalen); +/* + * Get data from the byte array in Little endian format. + * + * src [in] The byte array where data is extracted from + * + * dst [out] The byte array where data is pulled into + * + * size [in] The size of dst array in bytes + * + * offset [in] The offset where data is pulled + * + * len [in] The number of bits to be extracted from the data array + * + * returns None. + */ +void +ulp_bs_pull_lsb(uint8_t *src, uint8_t *dst, uint32_t size, + uint32_t offset, uint32_t len); + +/* + * Get data from the byte array in Big endian format. + * + * src [in] The byte array where data is extracted from + * + * dst [out] The byte array where data is pulled into + * + * offset [in] The offset where data is pulled + * + * len [in] The number of bits to be extracted from the data array + * + * returns None. + */ +void +ulp_bs_pull_msb(uint8_t *src, uint8_t *dst, + uint32_t offset, uint32_t len); + /* * Extract data from the binary blob using given offset. * From patchwork Sun Jun 13 00:06:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94122 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 65830A0C41; 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localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.38 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:39 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Kishore Padmanabha , Venkat Duvvuru , Mike Baucom Date: Sat, 12 Jun 2021 17:06:22 -0700 Message-Id: <20210613000652.28191-29-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 28/58] net/bnxt: add support for mapper flow database opcodes X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kishore Padmanabha Added support for mapper flow database opcode to enable shared resources like mirror action. This allows mapper to conditionally populate flow database based on template content. Signed-off-by: Kishore Padmanabha Signed-off-by: Venkat Duvvuru Reviewed-by: Mike Baucom Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/ulp_mapper.c | 119 ++++++++++++------ .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 8 ++ drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 4 + 3 files changed, 95 insertions(+), 36 deletions(-) diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index 7037297922..c8ae924cf0 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -469,6 +469,80 @@ ulp_mapper_child_flow_free(struct bnxt_ulp_context *ulp, return 0; } +/* + * Process the flow database opcode action. + * returns 0 on success. + */ +static int32_t +ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl, + struct ulp_flow_db_res_params *fid_parms) +{ + uint32_t push_fid, fid = 0; + uint64_t val64; + int32_t rc = 0; + + switch (tbl->fdb_opcode) { + case BNXT_ULP_FDB_OPC_PUSH: + push_fid = parms->fid; + break; + case BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE: + /* allocate a new fid */ + rc = ulp_flow_db_fid_alloc(parms->ulp_ctx, + BNXT_ULP_FDB_TYPE_REGULAR, + tbl->resource_func, &fid); + if (rc) { + BNXT_TF_DBG(ERR, + "Unable to allocate flow table entry\n"); + return rc; + } + /* Store the allocated fid in regfile*/ + val64 = fid; + rc = ulp_regfile_write(parms->regfile, tbl->flow_db_operand, + val64); + if (!rc) { + BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", + tbl->flow_db_operand); + rc = -EINVAL; + goto error; + } + /* Use the allocated fid to update the flow resource */ + push_fid = fid; + break; + case BNXT_ULP_FDB_OPC_PUSH_REGFILE: + /* get the fid from the regfile */ + rc = ulp_regfile_read(parms->regfile, tbl->flow_db_operand, + &val64); + if (!rc) { + BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", + tbl->flow_db_operand); + return -EINVAL; + } + /* Use the extracted fid to update the flow resource */ + push_fid = (uint32_t)val64; + break; + default: + return rc; /* Nothing to be done */ + } + + /* Add the resource to the flow database */ + rc = ulp_flow_db_resource_add(parms->ulp_ctx, parms->flow_type, + push_fid, fid_parms); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to add res to flow %x rc = %d\n", + push_fid, rc); + goto error; + } + return rc; + +error: + /* free the allocated fid */ + if (fid) + ulp_flow_db_fid_free(parms->ulp_ctx, + BNXT_ULP_FDB_TYPE_REGULAR, fid); + return rc; +} + /* * Process the identifier instruction and either store it in the flow database * or return it in the val (if not NULL) on success. If val is NULL, the @@ -524,10 +598,7 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_hndl = iparms.id; fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { BNXT_TF_DBG(ERR, "Failed to link res to flow rc = %d\n", rc); @@ -618,10 +689,7 @@ ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_type = ident->ident_type; fid_parms.resource_hndl = sparms.search_id; fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { BNXT_TF_DBG(ERR, "Failed to link res to flow rc = %d\n", rc); @@ -1103,10 +1171,7 @@ ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = gfid; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) BNXT_TF_DBG(ERR, "Fail to link res to flow rc = %d\n", rc); return rc; @@ -1152,10 +1217,7 @@ ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = act_idx; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) BNXT_TF_DBG(ERR, "Fail to link res to flow rc = %d\n", rc); return rc; @@ -1201,10 +1263,7 @@ ulp_mapper_mark_vfr_idx_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = act_idx; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) BNXT_TF_DBG(ERR, "Fail to link res to flow rc = %d\n", rc); return rc; @@ -1580,10 +1639,7 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_type = tbl->resource_type; fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_hndl = idx; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { BNXT_TF_DBG(ERR, "Failed to link resource to flow rc = %d\n", @@ -1741,10 +1797,7 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_hndl = iparms.flow_handle; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { BNXT_TF_DBG(ERR, "Fail to link res to flow rc = %d\n", rc); @@ -1968,10 +2021,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_hndl = index; fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { BNXT_TF_DBG(ERR, "Failed to link resource to flow rc = %d\n", rc); @@ -2280,10 +2330,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_sub_type = tbl->resource_sub_type; fid_parms.resource_hndl = ckey; fid_parms.critical_resource = tbl->critical_resource; - rc = ulp_flow_db_resource_add(parms->ulp_ctx, - parms->flow_type, - parms->fid, - &fid_parms); + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) BNXT_TF_DBG(ERR, "Fail to add gen ent flowdb %d\n", rc); } diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index 2a9a290eea..f16651a821 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -179,6 +179,14 @@ enum bnxt_ulp_direction { BNXT_ULP_DIRECTION_LAST = 2 }; +enum bnxt_ulp_fdb_opc { + BNXT_ULP_FDB_OPC_PUSH = 0, + BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE = 1, + BNXT_ULP_FDB_OPC_PUSH_REGFILE = 2, + BNXT_ULP_FDB_OPC_NOP = 3, + BNXT_ULP_FDB_OPC_LAST = 4 +}; + enum bnxt_ulp_flow_mem_type { BNXT_ULP_FLOW_MEM_TYPE_INT = 0, BNXT_ULP_FLOW_MEM_TYPE_EXT = 1, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h index 67308f1cf1..167116a2f4 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h @@ -220,6 +220,10 @@ struct bnxt_ulp_mapper_tbl_info { /* Table opcode for table operations */ uint32_t tbl_opcode; + + /* FDB table opcode */ + enum bnxt_ulp_fdb_opc fdb_opcode; + uint32_t flow_db_operand; }; struct bnxt_ulp_mapper_key_field_info { From patchwork Sun Jun 13 00:06:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94123 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BC28CA0C41; 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Sat, 12 Jun 2021 17:07:43 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Mike Baucom , Venkat Duvvuru , Kishore Padmanabha Date: Sat, 12 Jun 2021 17:06:23 -0700 Message-Id: <20210613000652.28191-30-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 29/58] net/bnxt: add conditional processing of templates X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Mike Baucom Conditional execution and rejection processing added for templates and tables. This allows the mapper to skip tables and reject templates based on the content without having to hard code rules. Signed-off-by: Mike Baucom Signed-off-by: Venkat Duvvuru Reviewed-by: Kishore Padmanabha Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c | 1 + drivers/net/bnxt/tf_ulp/ulp_mapper.c | 330 ++++++++++++++---- drivers/net/bnxt/tf_ulp/ulp_mapper.h | 2 + .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 30 +- .../tf_ulp/ulp_template_db_stingray_act.c | 30 +- .../tf_ulp/ulp_template_db_stingray_class.c | 8 +- drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c | 243 +++++++++++++ drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h | 2 + .../bnxt/tf_ulp/ulp_template_db_wh_plus_act.c | 30 +- .../tf_ulp/ulp_template_db_wh_plus_class.c | 8 +- drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 18 +- 11 files changed, 593 insertions(+), 109 deletions(-) diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c index 777a6badd9..ddf38ed931 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c @@ -93,6 +93,7 @@ bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms, mapper_cparms->flow_id = params->fid; mapper_cparms->parent_flow = params->parent_flow; mapper_cparms->parent_fid = params->parent_fid; + mapper_cparms->fld_bitmap = ¶ms->fld_bitmap; } /* Function to create the rte flow. */ diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index c8ae924cf0..c70e1c5215 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -17,6 +17,7 @@ #include "ulp_mapper.h" #include "ulp_flow_db.h" #include "tf_util.h" +#include "ulp_template_db_tbl.h" static struct bnxt_ulp_glb_resource_info * ulp_mapper_glb_resource_info_list_get(uint32_t *num_entries) @@ -190,6 +191,12 @@ ulp_mapper_glb_template_table_get(uint32_t *num_entries) return ulp_glb_template_tbl; } +static uint8_t * +ulp_mapper_glb_field_tbl_get(uint32_t idx) +{ + return &ulp_glb_field_tbl[idx]; +} + /* * Get the size of the action property for a given index. * @@ -205,6 +212,40 @@ ulp_mapper_act_prop_size_get(uint32_t idx) return ulp_act_prop_map_table[idx]; } +static struct bnxt_ulp_mapper_cond_info * +ulp_mapper_tmpl_reject_list_get(struct bnxt_ulp_mapper_parms *mparms, + uint32_t tid, + uint32_t *num_tbls, + enum bnxt_ulp_cond_list_opc *opc) +{ + uint32_t idx; + const struct ulp_template_device_tbls *dev_tbls; + + dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; + *num_tbls = dev_tbls->tmpl_list[tid].reject_info.cond_nums; + *opc = dev_tbls->tmpl_list[tid].reject_info.cond_list_opcode; + idx = dev_tbls->tmpl_list[tid].reject_info.cond_start_idx; + + return &dev_tbls->cond_list[idx]; +} + +static struct bnxt_ulp_mapper_cond_info * +ulp_mapper_tbl_execute_list_get(struct bnxt_ulp_mapper_parms *mparms, + struct bnxt_ulp_mapper_tbl_info *tbl, + uint32_t *num_tbls, + enum bnxt_ulp_cond_list_opc *opc) +{ + uint32_t idx; + const struct ulp_template_device_tbls *dev_tbls; + + dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; + *num_tbls = tbl->execute_info.cond_nums; + *opc = tbl->execute_info.cond_list_opcode; + idx = tbl->execute_info.cond_start_idx; + + return &dev_tbls->cond_list[idx]; +} + /* * Get a list of classifier tables that implement the flow * Gets a device dependent list of tables that implement the class template id @@ -2376,61 +2417,6 @@ ulp_mapper_glb_resource_info_init(struct bnxt_ulp_context *ulp_ctx, return rc; } -/* - * Function to process the conditional opcode of the mapper table. - * returns 1 to skip the table. - * return 0 to continue processing the table. - * - * defaults to skip - */ -static int32_t -ulp_mapper_tbl_cond_opcode_process(struct bnxt_ulp_mapper_parms *parms, - struct bnxt_ulp_mapper_tbl_info *tbl) -{ - int32_t rc = 1; - - switch (tbl->cond_opcode) { - case BNXT_ULP_COND_OPCODE_NOP: - rc = 0; - break; - case BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET: - if (tbl->cond_operand < BNXT_ULP_CF_IDX_LAST && - ULP_COMP_FLD_IDX_RD(parms, tbl->cond_operand)) - rc = 0; - break; - case BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET: - if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, - tbl->cond_operand)) - rc = 0; - break; - case BNXT_ULP_COND_OPCODE_HDR_BIT_IS_SET: - if (ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, - tbl->cond_operand)) - rc = 0; - break; - case BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET: - if (tbl->cond_operand < BNXT_ULP_CF_IDX_LAST && - !ULP_COMP_FLD_IDX_RD(parms, tbl->cond_operand)) - rc = 0; - break; - case BNXT_ULP_COND_OPCODE_ACTION_BIT_NOT_SET: - if (!ULP_BITMAP_ISSET(parms->act_bitmap->bits, - tbl->cond_operand)) - rc = 0; - break; - case BNXT_ULP_COND_OPCODE_HDR_BIT_NOT_SET: - if (!ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, - tbl->cond_operand)) - rc = 0; - break; - default: - BNXT_TF_DBG(ERR, - "Invalid arg in mapper tbl for cond opcode\n"); - break; - } - return rc; -} - /* * Function to process the memtype opcode of the mapper table. * returns 1 to skip the table. @@ -2467,27 +2453,251 @@ ulp_mapper_tbl_memtype_opcode_process(struct bnxt_ulp_mapper_parms *parms, return rc; } +/* + * Common conditional opcode process routine that is used for both the template + * rejection and table conditional execution. + */ +static int32_t +ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms, + enum bnxt_ulp_cond_opc opc, + uint32_t operand, + int32_t *res) +{ + int32_t rc = 0; + uint8_t *bit; + uint32_t idx; + uint64_t regval; + + switch (opc) { + case BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET: + if (operand < BNXT_ULP_CF_IDX_LAST) { + *res = ULP_COMP_FLD_IDX_RD(parms, operand); + } else { + BNXT_TF_DBG(ERR, "comp field out of bounds %d\n", + operand); + rc = -EINVAL; + } + break; + case BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET: + if (operand < BNXT_ULP_CF_IDX_LAST) { + *res = !ULP_COMP_FLD_IDX_RD(parms, operand); + } else { + BNXT_TF_DBG(ERR, "comp field out of bounds %d\n", + operand); + rc = -EINVAL; + } + break; + case BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET: + if (operand < BNXT_ULP_ACTION_BIT_LAST) { + *res = ULP_BITMAP_ISSET(parms->act_bitmap->bits, + operand); + } else { + BNXT_TF_DBG(ERR, "action bit out of bounds %d\n", + operand); + rc = -EINVAL; + } + break; + case BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET: + if (operand < BNXT_ULP_ACTION_BIT_LAST) { + *res = !ULP_BITMAP_ISSET(parms->act_bitmap->bits, + operand); + } else { + BNXT_TF_DBG(ERR, "action bit out of bounds %d\n", + operand); + rc = -EINVAL; + } + break; + case BNXT_ULP_COND_OPC_HDR_BIT_IS_SET: + if (operand < BNXT_ULP_HDR_BIT_LAST) { + *res = ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, + operand); + } else { + BNXT_TF_DBG(ERR, "header bit out of bounds %d\n", + operand); + rc = -EINVAL; + } + break; + case BNXT_ULP_COND_OPC_HDR_BIT_NOT_SET: + if (operand < BNXT_ULP_HDR_BIT_LAST) { + *res = !ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, + operand); + } else { + BNXT_TF_DBG(ERR, "header bit out of bounds %d\n", + operand); + rc = -EINVAL; + } + break; + case BNXT_ULP_COND_OPC_FIELD_BIT_IS_SET: + idx = (parms->class_tid << BNXT_ULP_GLB_FIELD_TBL_SHIFT) | + operand; + bit = ulp_mapper_glb_field_tbl_get(idx); + if (!bit) { + BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n", + idx); + return -EINVAL; + } + *res = ULP_BITMAP_ISSET(parms->fld_bitmap->bits, (1 << *bit)); + break; + case BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET: + idx = (parms->class_tid << BNXT_ULP_GLB_FIELD_TBL_SHIFT) | + operand; + bit = ulp_mapper_glb_field_tbl_get(idx); + if (!bit) { + BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n", + idx); + return -EINVAL; + } + *res = !ULP_BITMAP_ISSET(parms->fld_bitmap->bits, (1 << *bit)); + break; + case BNXT_ULP_COND_OPC_REGFILE_IS_SET: + if (!ulp_regfile_read(parms->regfile, operand, ®val)) { + BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", operand); + return -EINVAL; + } + *res = regval != 0; + break; + case BNXT_ULP_COND_OPC_REGFILE_NOT_SET: + if (!ulp_regfile_read(parms->regfile, operand, ®val)) { + BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", operand); + return -EINVAL; + } + *res = regval == 0; + break; + default: + BNXT_TF_DBG(ERR, "Invalid conditional opcode %d\n", opc); + rc = -EINVAL; + break; + } + return (rc); +} + +/* + * Processes a list of conditions and returns both a status and result of the + * list. The status must be checked prior to verifying the result. + * + * returns 0 for success, negative on failure + * returns res = 1 for true, res = 0 for false. + */ +static int32_t +ulp_mapper_cond_opc_list_process(struct bnxt_ulp_mapper_parms *parms, + enum bnxt_ulp_cond_list_opc list_opc, + struct bnxt_ulp_mapper_cond_info *list, + uint32_t num, + int32_t *res) +{ + uint32_t i; + int32_t rc = 0, trc; + + switch (list_opc) { + case BNXT_ULP_COND_LIST_OPC_AND: + /* AND Defaults to true. */ + *res = 1; + break; + case BNXT_ULP_COND_LIST_OPC_OR: + /* OR Defaults to false. */ + *res = 0; + break; + case BNXT_ULP_COND_LIST_OPC_TRUE: + *res = 1; + return rc; + case BNXT_ULP_COND_LIST_OPC_FALSE: + *res = 0; + return rc; + default: + BNXT_TF_DBG(ERR, "Invalid conditional list opcode %d\n", + list_opc); + return -EINVAL; + } + + for (i = 0; i < num; i++) { + rc = ulp_mapper_cond_opc_process(parms, + list[i].cond_opcode, + list[i].cond_operand, + &trc); + if (rc) + return rc; + + if (list_opc == BNXT_ULP_COND_LIST_OPC_AND) { + /* early return if result is ever zero */ + if (!trc) { + *res = trc; + return rc; + } + } else { + /* early return if result is ever non-zero */ + if (trc) { + *res = trc; + return rc; + } + } + } + + return rc; +} + static int32_t ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) { + struct bnxt_ulp_mapper_cond_info *cond_tbls = NULL; + enum bnxt_ulp_cond_list_opc cond_opc; struct bnxt_ulp_mapper_tbl_info *tbls; - uint32_t num_tbls, i; - int32_t rc = -EINVAL; + struct bnxt_ulp_mapper_tbl_info *tbl; + uint32_t num_tbls, i, num_cond_tbls; + int32_t rc = -EINVAL, cond_rc = 0; + + cond_tbls = ulp_mapper_tmpl_reject_list_get(parms, tid, + &num_cond_tbls, + &cond_opc); + /* + * Process the reject list if exists, otherwise assume that the + * template is allowed. + */ + if (cond_tbls && num_cond_tbls) { + rc = ulp_mapper_cond_opc_list_process(parms, + cond_opc, + cond_tbls, + num_cond_tbls, + &cond_rc); + if (rc) + return rc; + + /* Reject the template if True */ + if (cond_rc) { + BNXT_TF_DBG(ERR, "%s Template %d rejected.\n", + (parms->tmpl_type == + BNXT_ULP_TEMPLATE_TYPE_CLASS) ? + "class" : "action", tid); + return -EINVAL; + } + } tbls = ulp_mapper_tbl_list_get(parms, tid, &num_tbls); if (!tbls || !num_tbls) { BNXT_TF_DBG(ERR, "No %s tables for %d:%d\n", - (parms->tmpl_type = BNXT_ULP_TEMPLATE_TYPE_CLASS) ? + (parms->tmpl_type == BNXT_ULP_TEMPLATE_TYPE_CLASS) ? "class" : "action", parms->dev_id, tid); return -EINVAL; } for (i = 0; i < num_tbls; i++) { - struct bnxt_ulp_mapper_tbl_info *tbl = &tbls[i]; + tbl = &tbls[i]; + /* Handle the table level opcodes to determine if required. */ if (ulp_mapper_tbl_memtype_opcode_process(parms, tbl)) continue; - if (ulp_mapper_tbl_cond_opcode_process(parms, tbl)) + cond_tbls = ulp_mapper_tbl_execute_list_get(parms, tbl, + &num_cond_tbls, + &cond_opc); + rc = ulp_mapper_cond_opc_list_process(parms, cond_opc, + cond_tbls, num_cond_tbls, + &cond_rc); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to process cond opc list " + "(%d)\n", rc); + return rc; + } + /* Skip the table if False */ + if (!cond_rc) continue; switch (tbl->resource_func) { diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h index 8422f44026..8bc6cdbdd5 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h @@ -58,6 +58,7 @@ struct bnxt_ulp_mapper_parms { struct ulp_rte_act_bitmap *act_bitmap; struct ulp_rte_hdr_bitmap *hdr_bitmap; struct ulp_rte_hdr_field *hdr_field; + struct ulp_rte_field_bitmap *fld_bitmap; uint32_t *comp_fld; struct ulp_regfile *regfile; struct tf *tfp; @@ -79,6 +80,7 @@ struct bnxt_ulp_mapper_create_parms { uint32_t *comp_fld; struct ulp_rte_act_bitmap *act; struct ulp_rte_act_prop *act_prop; + struct ulp_rte_field_bitmap *fld_bitmap; uint32_t class_tid; uint32_t act_tid; uint16_t func_id; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index f16651a821..e4b8c56472 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -27,6 +27,7 @@ #define BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM 2 #define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 8 #define BNXT_ULP_GLB_TEMPLATE_TBL_MAX_SZ 1 +#define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7 enum bnxt_ulp_action_bit { BNXT_ULP_ACTION_BIT_MARK = 0x0000000000000001, @@ -143,15 +144,26 @@ enum bnxt_ulp_cf_idx { BNXT_ULP_CF_IDX_LAST = 46 }; -enum bnxt_ulp_cond_opcode { - BNXT_ULP_COND_OPCODE_NOP = 0, - BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET = 1, - BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET = 2, - BNXT_ULP_COND_OPCODE_HDR_BIT_IS_SET = 3, - BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET = 4, - BNXT_ULP_COND_OPCODE_ACTION_BIT_NOT_SET = 5, - BNXT_ULP_COND_OPCODE_HDR_BIT_NOT_SET = 6, - BNXT_ULP_COND_OPCODE_LAST = 7 +enum bnxt_ulp_cond_list_opc { + BNXT_ULP_COND_LIST_OPC_TRUE = 0, + BNXT_ULP_COND_LIST_OPC_FALSE = 1, + BNXT_ULP_COND_LIST_OPC_OR = 2, + BNXT_ULP_COND_LIST_OPC_AND = 3, + BNXT_ULP_COND_LIST_OPC_LAST = 4 +}; + +enum bnxt_ulp_cond_opc { + BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET = 0, + BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET = 1, + BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET = 2, + BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET = 3, + BNXT_ULP_COND_OPC_HDR_BIT_IS_SET = 4, + BNXT_ULP_COND_OPC_HDR_BIT_NOT_SET = 5, + BNXT_ULP_COND_OPC_FIELD_BIT_IS_SET = 6, + BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET = 7, + BNXT_ULP_COND_OPC_REGFILE_IS_SET = 8, + BNXT_ULP_COND_OPC_REGFILE_NOT_SET = 9, + BNXT_ULP_COND_OPC_LAST = 10 }; enum bnxt_ulp_critical_resource { diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c index b370da22f7..6ad6263183 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c @@ -47,7 +47,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -64,7 +64,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -81,7 +81,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -146,7 +146,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -195,7 +195,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -244,7 +244,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -261,7 +261,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, @@ -278,7 +278,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, @@ -342,7 +342,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -359,7 +359,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -376,7 +376,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -441,7 +441,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -459,7 +459,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -493,7 +493,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_NOT_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -511,7 +511,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c index a8f26e8c51..c11d1ad96d 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c @@ -292,7 +292,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { { /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -315,7 +315,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, .key_start_idx = 27, @@ -332,7 +332,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { { /* class_tid: 2, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -1785,7 +1785,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c index 3a66d59b5d..4fe90d8bb9 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c @@ -98,6 +98,249 @@ uint32_t ulp_act_prop_map_table[] = { BNXT_ULP_ACT_PROP_SZ_LAST }; +uint8_t ulp_glb_field_tbl[211] = { + [0] = 0, + [1] = 0, + [2] = 0, + [3] = 0, + [4] = 0, + [5] = 0, + [6] = 0, + [7] = 0, + [8] = 0, + [9] = 0, + [10] = 0, + [11] = 0, + [12] = 0, + [13] = 0, + [14] = 0, + [15] = 0, + [16] = 0, + [17] = 0, + [18] = 0, + [19] = 0, + [20] = 0, + [21] = 0, + [22] = 0, + [23] = 0, + [24] = 0, + [25] = 0, + [26] = 0, + [27] = 0, + [28] = 0, + [29] = 0, + [30] = 0, + [31] = 0, + [32] = 0, + [33] = 0, + [34] = 0, + [35] = 0, + [36] = 0, + [37] = 0, + [38] = 0, + [39] = 0, + [40] = 0, + [41] = 0, + [42] = 0, + [43] = 0, + [44] = 0, + [45] = 0, + [46] = 0, + [47] = 0, + [48] = 0, + [49] = 0, + [50] = 0, + [51] = 0, + [52] = 0, + [53] = 0, + [54] = 0, + [55] = 0, + [56] = 0, + [57] = 0, + [58] = 0, + [59] = 0, + [60] = 0, + [61] = 0, + [62] = 0, + [63] = 0, + [64] = 0, + [65] = 0, + [66] = 0, + [67] = 0, + [68] = 0, + [69] = 0, + [70] = 0, + [71] = 0, + [72] = 0, + [73] = 0, + [74] = 0, + [75] = 0, + [76] = 0, + [77] = 0, + [78] = 0, + [79] = 0, + [80] = 0, + [81] = 0, + [82] = 0, + [83] = 0, + [84] = 0, + [85] = 0, + [86] = 0, + [87] = 0, + [88] = 0, + [89] = 0, + [90] = 0, + [91] = 0, + [92] = 0, + [93] = 0, + [94] = 0, + [95] = 0, + [96] = 0, + [97] = 0, + [98] = 0, + [99] = 0, + [100] = 0, + [101] = 0, + [102] = 0, + [103] = 0, + [104] = 0, + [105] = 0, + [106] = 0, + [107] = 0, + [108] = 0, + [109] = 0, + [110] = 0, + [111] = 0, + [112] = 0, + [113] = 0, + [114] = 0, + [115] = 0, + [116] = 0, + [117] = 0, + [118] = 0, + [119] = 0, + [120] = 0, + [121] = 0, + [122] = 0, + [123] = 0, + [124] = 0, + [125] = 0, + [126] = 0, + [127] = 0, + /* svif.index */ + [128] = 1, + /* o_eth.dmac */ + [129] = 2, + [130] = 0, + /* o_eth.smac */ + [131] = 3, + [132] = 0, + /* o_eth.type */ + [133] = 4, + [134] = 0, + /* o_ipv4.ver */ + [135] = 11, + [136] = 0, + /* o_ipv4.tos */ + [137] = 12, + [138] = 0, + /* o_ipv4.len */ + [139] = 13, + [140] = 0, + /* o_ipv4.frag_id */ + [141] = 14, + [142] = 0, + /* o_ipv4.frag_off */ + [143] = 15, + [144] = 0, + /* o_ipv4.ttl */ + [145] = 16, + [146] = 0, + /* o_ipv4.proto_id */ + [147] = 17, + [148] = 0, + /* o_ipv4.csum */ + [149] = 18, + [150] = 0, + /* o_ipv4.src_addr */ + [151] = 19, + [152] = 0, + /* o_ipv4.dst_addr */ + [153] = 20, + [154] = 0, + [155] = 0, + [156] = 0, + [157] = 0, + [158] = 0, + [159] = 0, + [160] = 0, + [161] = 0, + [162] = 0, + [163] = 0, + [164] = 0, + [165] = 0, + [166] = 0, + [167] = 0, + [168] = 0, + [169] = 0, + [170] = 0, + [171] = 0, + [172] = 0, + [173] = 0, + [174] = 0, + /* o_tcp.src_port */ + [175] = 21, + [176] = 0, + /* o_tcp.dst_port */ + [177] = 22, + [178] = 0, + /* o_tcp.sent_seq */ + [179] = 23, + [180] = 0, + /* o_tcp.recv_ack */ + [181] = 24, + [182] = 0, + /* o_tcp.data_off */ + [183] = 25, + [184] = 0, + /* o_tcp.tcp_flags */ + [185] = 26, + [186] = 0, + /* o_tcp.rx_win */ + [187] = 27, + [188] = 0, + /* o_tcp.csum */ + [189] = 28, + [190] = 0, + /* o_tcp.urp */ + [191] = 29, + [192] = 0, + [193] = 0, + [194] = 0, + [195] = 0, + [196] = 0, + [197] = 0, + [198] = 0, + [199] = 0, + [200] = 0, + /* oo_vlan.cfi_pri */ + [201] = 5, + /* oi_vlan.cfi_pri */ + [202] = 8, + [203] = 0, + [204] = 0, + /* oo_vlan.vid */ + [205] = 6, + /* oi_vlan.vid */ + [206] = 9, + [207] = 0, + [208] = 0, + /* oo_vlan.type */ + [209] = 7, + /* oi_vlan.type */ + [210] = 10 +}; + /* * This structure has to be indexed based on the rte_flow_action_type that is * part of DPDK. The below array is list of parsing functions for each of the diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h index 684e93f557..a656f3da52 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h @@ -45,4 +45,6 @@ extern struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[]; extern struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[]; + +extern uint8_t ulp_glb_field_tbl[]; #endif diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c index 26eba56516..be6149b9ce 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c @@ -47,7 +47,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -64,7 +64,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -81,7 +81,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -145,7 +145,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -194,7 +194,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -243,7 +243,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -260,7 +260,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, @@ -277,7 +277,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, @@ -341,7 +341,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -358,7 +358,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -375,7 +375,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -440,7 +440,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -458,7 +458,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -492,7 +492,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_NOT_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -510,7 +510,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c index 1abc8ecdd4..ddf82c4abe 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c @@ -292,7 +292,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { { /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_vfr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -315,7 +315,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, .key_start_idx = 27, @@ -332,7 +332,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { { /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET, + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, @@ -1785,7 +1785,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC, - .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET, + .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h index 167116a2f4..9a15968ea8 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h @@ -149,12 +149,24 @@ extern uint16_t ulp_act_sig_tbl[]; extern struct bnxt_ulp_act_match_info ulp_act_match_list[]; /* Device Specific Tables for mapper */ +struct bnxt_ulp_mapper_cond_info { + enum bnxt_ulp_cond_opc cond_opcode; + uint32_t cond_operand; +}; + +struct bnxt_ulp_mapper_cond_list_info { + enum bnxt_ulp_cond_list_opc cond_list_opcode; + uint32_t cond_start_idx; + uint32_t cond_nums; +}; + struct ulp_template_device_tbls { struct bnxt_ulp_mapper_tbl_list_info *tmpl_list; struct bnxt_ulp_mapper_tbl_info *tbl_list; struct bnxt_ulp_mapper_key_field_info *key_field_list; struct bnxt_ulp_mapper_result_field_info *result_field_list; struct bnxt_ulp_mapper_ident_info *ident_list; + struct bnxt_ulp_mapper_cond_info *cond_list; }; /* Device specific parameters */ @@ -183,14 +195,16 @@ struct bnxt_ulp_mapper_tbl_list_info { uint32_t device_name; uint32_t start_tbl_idx; uint32_t num_tbls; + struct bnxt_ulp_mapper_cond_list_info reject_info; }; struct bnxt_ulp_mapper_tbl_info { enum bnxt_ulp_resource_func resource_func; uint32_t resource_type; /* TF_ enum type */ enum bnxt_ulp_resource_sub_type resource_sub_type; - enum bnxt_ulp_cond_opcode cond_opcode; - uint32_t cond_operand; + struct bnxt_ulp_mapper_cond_list_info execute_info; + enum bnxt_ulp_cond_opc cond_opcode; + uint32_t cond_operand; enum bnxt_ulp_mem_type_opcode mem_type_opcode; uint8_t direction; uint32_t priority; From patchwork Sun Jun 13 00:06:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94124 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 287B6A0C41; Sun, 13 Jun 2021 02:11:27 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D57E6411E7; Sun, 13 Jun 2021 02:07:48 +0200 (CEST) Received: from mail-pf1-f179.google.com (mail-pf1-f179.google.com [209.85.210.179]) by mails.dpdk.org (Postfix) with ESMTP id 936F0411A3 for ; Sun, 13 Jun 2021 02:07:46 +0200 (CEST) Received: by mail-pf1-f179.google.com with SMTP id u18so7595252pfk.11 for ; Sat, 12 Jun 2021 17:07:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=JVaFgqvb9BEsLi/OIjuQsmrqGjUmDSPPY8bHwPOGD90=; b=BcCjkYjYpT1xKTzPZ3yj25ZlpYlMXqzB/5YCbvfUQzDW68Luq9SMvW+7jPoPYDaQu9 FWohvbRoNXfiw6YW8MayCKl7N1Mlgml8oeWFuQo4x463s5hFxb2toLu/TQ6dYuXrNth4 QEO93x180nsI3OnkbmzuaZRaKcN33Tv72g1gA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=JVaFgqvb9BEsLi/OIjuQsmrqGjUmDSPPY8bHwPOGD90=; b=KCnRPZinC5XB6k0sfoBMxVtIueujv4ePncS1N6Lncd4lCWbA46FXJ0Vv1mo7znLcDK evJh940yoSopDIj5nVApHTPq8wg+SPKH7RCsL9/FJHyjsDAh9H0HNiIfTm5C10JuzIKv /+iRdFM64kU5g6ODOL+V3ljBejhr1KG7h2ZWhPHujHvc16R4SCCIpmhKjs1GilAi0JGy r+Ly3fJRZpabyBlLHRXmdCkEEcQh4lc8BitzJwLWjgS7OPCaA/sPzwwoSCm1NiEKKjsd dy+kAOdkKU1gOZyKZneNnu0V7ScTrP6cbg8vdBtsh1yGhZP4P2/v5Dba4376eZv9/sNI LD3Q== X-Gm-Message-State: AOAM532df39xsOjQKkLIuniY/RPp/BDjJnyaXXNZca0Txq00KaknelFN y6tBdNnwpaGaP2fjz3IbJqvLYWrrGWG5HHkDJSCkqytKBJ6rMMRz3RtD2il4m5jfWVlrL1+Gn35 D2D1Sc1xswRmWmoAcGWNK0zvJfsuvpKBc+Xxevr6jnXHm4E6B420/SKXoQuATmqw= X-Google-Smtp-Source: ABdhPJwqqMcDJ2zJd3SaN6La11UyYpVHGAv4zKKgQ23EJQ9gH1lTuitbfBjFtQJgsrYYSs1n3nYgxw== X-Received: by 2002:a63:4b59:: with SMTP id k25mr10400219pgl.252.1623542865142; Sat, 12 Jun 2021 17:07:45 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.43 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:44 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Kishore Padmanabha , Venkat Duvvuru , Mike Baucom Date: Sat, 12 Jun 2021 17:06:24 -0700 Message-Id: <20210613000652.28191-31-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 30/58] net/bnxt: modify TCAM opcode processing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kishore Padmanabha Added TCAM table specific opcode to process TCAM entry creation and reuse. This change removes the TCAM cache mechanism and uses the generic table mechanism for reuse of TCAM entries. Signed-off-by: Kishore Padmanabha Signed-off-by: Venkat Duvvuru Reviewed-by: Mike Baucom Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/ulp_mapper.c | 135 ++++++----------- drivers/net/bnxt/tf_ulp/ulp_mapper.h | 15 -- .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 7 + .../tf_ulp/ulp_template_db_wh_plus_class.c | 138 ++++++++++++------ drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 1 + 5 files changed, 144 insertions(+), 152 deletions(-) diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index c70e1c5215..56005480af 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -1356,20 +1356,11 @@ ulp_mapper_tcam_tbl_scan_ident_alloc(struct bnxt_ulp_mapper_parms *parms, uint32_t num_idents; uint32_t i; - /* - * Since the cache entry is responsible for allocating - * identifiers when in use, allocate the identifiers only - * during normal processing. - */ - if (parms->tcam_tbl_opc == - BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL) { - idents = ulp_mapper_ident_fields_get(parms, tbl, &num_idents); - - for (i = 0; i < num_idents; i++) { - if (ulp_mapper_ident_process(parms, tbl, - &idents[i], NULL)) - return -EINVAL; - } + idents = ulp_mapper_ident_fields_get(parms, tbl, &num_idents); + for (i = 0; i < num_idents; i++) { + if (ulp_mapper_ident_process(parms, tbl, + &idents[i], NULL)) + return -EINVAL; } return 0; } @@ -1490,14 +1481,15 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct tf_search_tcam_entry_parms searchparms = { 0 }; struct ulp_flow_db_res_params fid_parms = { 0 }; struct tf_free_tcam_entry_parms free_parms = { 0 }; - enum bnxt_ulp_search_before_alloc search_flag; uint32_t hit = 0; uint16_t tmplen = 0; uint16_t idx; - /* Skip this if was handled by the cache. */ - if (parms->tcam_tbl_opc == BNXT_ULP_MAPPER_TCAM_TBL_OPC_CACHE_SKIP) { - parms->tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL; + /* Skip this if table opcode is NOP */ + if (tbl->tbl_opcode == BNXT_ULP_TCAM_TBL_OPC_NOT_USED || + tbl->tbl_opcode >= BNXT_ULP_TCAM_TBL_OPC_LAST) { + BNXT_TF_DBG(ERR, "Invalid tcam table opcode %d\n", + tbl->tbl_opcode); return 0; } @@ -1555,41 +1547,31 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, } } + /* For wild card tcam perform the post process to swap the blob */ if (tbl->resource_type == TF_TCAM_TBL_TYPE_WC_TCAM) { ulp_mapper_wc_tcam_tbl_post_process(&key, tbl->key_bit_size); ulp_mapper_wc_tcam_tbl_post_process(&mask, tbl->key_bit_size); } - if (tbl->srch_b4_alloc == BNXT_ULP_SEARCH_BEFORE_ALLOC_NO) { - /* - * No search for re-use is requested, so simply allocate the - * tcam index. - */ - aparms.dir = tbl->direction; - aparms.tcam_tbl_type = tbl->resource_type; - aparms.search_enable = tbl->srch_b4_alloc; - aparms.key = ulp_blob_data_get(&key, &tmplen); - aparms.key_sz_in_bits = tmplen; + if (tbl->tbl_opcode == BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE) { + /* allocate the tcam index */ + aparms.dir = tbl->direction; + aparms.tcam_tbl_type = tbl->resource_type; + aparms.key = ulp_blob_data_get(&key, &tmplen); + aparms.key_sz_in_bits = tmplen; if (tbl->blob_key_bit_size != tmplen) { BNXT_TF_DBG(ERR, "Key len (%d) != Expected (%d)\n", tmplen, tbl->blob_key_bit_size); return -EINVAL; } - aparms.mask = ulp_blob_data_get(&mask, &tmplen); + aparms.mask = ulp_blob_data_get(&mask, &tmplen); if (tbl->blob_key_bit_size != tmplen) { BNXT_TF_DBG(ERR, "Mask len (%d) != Expected (%d)\n", tmplen, tbl->blob_key_bit_size); return -EINVAL; } - - aparms.priority = tbl->priority; - - /* - * All failures after this succeeds require the entry to be - * freed. cannot return directly on failure, but needs to goto - * error. - */ + aparms.priority = tbl->priority; rc = tf_alloc_tcam_entry(tfp, &aparms); if (rc) { BNXT_TF_DBG(ERR, "tcam alloc failed rc=%d.\n", rc); @@ -1627,14 +1609,18 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, hit = searchparms.hit; } - /* if it is miss then it is same as no search before alloc */ - if (!hit) - search_flag = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO; - else - search_flag = tbl->srch_b4_alloc; + /* Write the tcam index into the regfile*/ + if (!ulp_regfile_write(parms->regfile, tbl->tbl_operand, + (uint64_t)tfp_cpu_to_be_64(idx))) { + BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", + tbl->tbl_operand); + rc = -EINVAL; + /* Need to free the tcam idx, so goto error */ + goto error; + } - switch (search_flag) { - case BNXT_ULP_SEARCH_BEFORE_ALLOC_NO: + /* if it is miss then it is same as no search before alloc */ + if (!hit || tbl->tbl_opcode == BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE) { /*Scan identifier list, allocate identifier and update regfile*/ rc = ulp_mapper_tcam_tbl_scan_ident_alloc(parms, tbl); /* Create the result blob */ @@ -1645,60 +1631,29 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, if (!rc) rc = ulp_mapper_tcam_tbl_entry_write(parms, tbl, &key, &mask, &data, idx); - break; - case BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP: - /*Scan identifier list, extract identifier and update regfile*/ - rc = ulp_mapper_tcam_tbl_scan_ident_extract(parms, tbl, &data); - break; - case BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE: + } else { /*Scan identifier list, extract identifier and update regfile*/ rc = ulp_mapper_tcam_tbl_scan_ident_extract(parms, tbl, &data); - /* Create the result blob */ - if (!rc) - rc = ulp_mapper_tcam_tbl_result_create(parms, tbl, - &update_data); - /* Update/overwrite the tcam entry */ - if (!rc) - rc = ulp_mapper_tcam_tbl_entry_write(parms, tbl, &key, - &mask, - &update_data, idx); - break; - default: - BNXT_TF_DBG(ERR, "invalid search opcode\n"); - rc = -EINVAL; - break; } if (rc) goto error; - /* - * Only link the entry to the flow db in the event that cache was not - * used. - */ - if (parms->tcam_tbl_opc == BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL) { - fid_parms.direction = tbl->direction; - fid_parms.resource_func = tbl->resource_func; - fid_parms.resource_type = tbl->resource_type; - fid_parms.critical_resource = tbl->critical_resource; - fid_parms.resource_hndl = idx; - rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); - if (rc) { - BNXT_TF_DBG(ERR, - "Failed to link resource to flow rc = %d\n", - rc); - /* Need to free the identifier, so goto error */ - goto error; - } - } else { - /* - * Reset the tcam table opcode to normal in case the next tcam - * entry does not use cache. - */ - parms->tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL; + + /* Add the tcam index to the flow database */ + fid_parms.direction = tbl->direction; + fid_parms.resource_func = tbl->resource_func; + fid_parms.resource_type = tbl->resource_type; + fid_parms.critical_resource = tbl->critical_resource; + fid_parms.resource_hndl = idx; + rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to link resource to flow rc = %d\n", + rc); + /* Need to free the identifier, so goto error */ + goto error; } return 0; error: - parms->tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL; free_parms.dir = tbl->direction; free_parms.tcam_tbl_type = tbl->resource_type; free_parms.idx = idx; @@ -1706,7 +1661,6 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, if (trc) BNXT_TF_DBG(ERR, "Failed to free tcam[%d][%d][%d] on failure\n", tbl->resource_type, tbl->direction, idx); - return rc; } @@ -2976,7 +2930,6 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx, parms.comp_fld = cparms->comp_fld; parms.tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx); parms.ulp_ctx = ulp_ctx; - parms.tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL; parms.act_tid = cparms->act_tid; parms.class_tid = cparms->class_tid; parms.flow_type = cparms->flow_type; diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h index 8bc6cdbdd5..4c423d2374 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h @@ -18,20 +18,6 @@ #define ULP_IDENTS_INVALID ((uint16_t)0xffff) -/* - * The cache table opcode is used to convey informat from the cache handler - * to the tcam handler. The opcodes do the following: - * NORMAL - tcam should process all instructions as normal - * SKIP - tcam is using the cached entry and doesn't need to process the - * instruction. - * ALLOC - tcam needs to allocate the tcam index and store in the cache entry - */ -enum bnxt_ulp_cache_table_opc { - BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL, - BNXT_ULP_MAPPER_TCAM_TBL_OPC_CACHE_SKIP, - BNXT_ULP_MAPPER_TCAM_TBL_OPC_CACHE_ALLOC -}; - struct bnxt_ulp_mapper_glb_resource_entry { enum bnxt_ulp_resource_func resource_func; uint32_t resource_type; /* TF_ enum type */ @@ -66,7 +52,6 @@ struct bnxt_ulp_mapper_parms { uint32_t fid; enum bnxt_ulp_fdb_type flow_type; struct bnxt_ulp_mapper_data *mapper_data; - enum bnxt_ulp_cache_table_opc tcam_tbl_opc; struct bnxt_ulp_device_params *device_params; uint32_t parent_fid; uint32_t parent_flow; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index e4b8c56472..ddc396b3f9 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -323,6 +323,13 @@ enum bnxt_ulp_regfile_index { BNXT_ULP_REGFILE_INDEX_LAST = 30 }; +enum bnxt_ulp_tcam_tbl_opc { + BNXT_ULP_TCAM_TBL_OPC_NOT_USED = 0, + BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE = 1, + BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE = 2, + BNXT_ULP_TCAM_TBL_OPC_LAST = 3 +}; + enum bnxt_ulp_search_before_alloc { BNXT_ULP_SEARCH_BEFORE_ALLOC_NO = 0, BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP = 1, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c index ddf82c4abe..7a22aedf83 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c @@ -226,7 +226,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1, .blob_key_bit_size = 167, @@ -295,7 +296,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 14, .blob_key_bit_size = 167, @@ -335,7 +337,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 28, .blob_key_bit_size = 167, @@ -434,7 +437,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 42, .blob_key_bit_size = 167, @@ -523,7 +527,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 82, .blob_key_bit_size = 167, @@ -590,7 +595,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 95, .blob_key_bit_size = 167, @@ -624,7 +630,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 108, .blob_key_bit_size = 167, @@ -660,7 +667,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_1, .key_start_idx = 124, .blob_key_bit_size = 81, @@ -715,7 +723,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 189, .blob_key_bit_size = 167, @@ -751,7 +760,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_1, .key_start_idx = 205, .blob_key_bit_size = 81, @@ -823,7 +833,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 271, .blob_key_bit_size = 167, @@ -859,7 +870,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 287, .blob_key_bit_size = 81, @@ -931,7 +943,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 353, .blob_key_bit_size = 167, @@ -967,7 +980,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 369, .blob_key_bit_size = 81, @@ -1039,7 +1053,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 435, .blob_key_bit_size = 167, @@ -1075,7 +1090,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 451, .blob_key_bit_size = 81, @@ -1147,7 +1163,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 517, .blob_key_bit_size = 167, @@ -1183,7 +1200,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 533, .blob_key_bit_size = 81, @@ -1238,7 +1256,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 598, .blob_key_bit_size = 167, @@ -1274,7 +1293,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 614, .blob_key_bit_size = 81, @@ -1329,7 +1349,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 679, .blob_key_bit_size = 167, @@ -1365,7 +1386,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 695, .blob_key_bit_size = 81, @@ -1420,7 +1442,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 760, .blob_key_bit_size = 167, @@ -1456,7 +1479,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 776, .blob_key_bit_size = 81, @@ -1511,7 +1535,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 841, .blob_key_bit_size = 167, @@ -1547,7 +1572,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 857, .blob_key_bit_size = 81, @@ -1602,7 +1628,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 922, .blob_key_bit_size = 167, @@ -1638,7 +1665,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 938, .blob_key_bit_size = 81, @@ -1693,7 +1721,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1003, .blob_key_bit_size = 167, @@ -1729,7 +1758,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1019, .blob_key_bit_size = 81, @@ -1801,7 +1831,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1084, .blob_key_bit_size = 167, @@ -1837,7 +1868,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1100, .blob_key_bit_size = 81, @@ -1875,7 +1907,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1148, .blob_key_bit_size = 167, @@ -1911,7 +1944,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1164, .blob_key_bit_size = 81, @@ -1983,7 +2017,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1224, .blob_key_bit_size = 167, @@ -2019,7 +2054,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1240, .blob_key_bit_size = 81, @@ -2091,7 +2127,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1306, .blob_key_bit_size = 167, @@ -2127,7 +2164,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1322, .blob_key_bit_size = 81, @@ -2199,7 +2237,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1388, .blob_key_bit_size = 167, @@ -2235,7 +2274,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1404, .blob_key_bit_size = 81, @@ -2307,7 +2347,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1470, .blob_key_bit_size = 167, @@ -2343,7 +2384,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1486, .blob_key_bit_size = 81, @@ -2398,7 +2440,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1551, .blob_key_bit_size = 167, @@ -2434,7 +2477,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1567, .blob_key_bit_size = 81, @@ -2489,7 +2533,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1624, .blob_key_bit_size = 167, @@ -2525,7 +2570,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, .priority = BNXT_ULP_PRIORITY_LEVEL_0, .key_start_idx = 1640, .blob_key_bit_size = 81, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h index 9a15968ea8..ee17390358 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h @@ -234,6 +234,7 @@ struct bnxt_ulp_mapper_tbl_info { /* Table opcode for table operations */ uint32_t tbl_opcode; + uint32_t tbl_operand; /* FDB table opcode */ enum bnxt_ulp_fdb_opc fdb_opcode; From patchwork Sun Jun 13 00:06:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94125 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 49085A0C41; Sun, 13 Jun 2021 02:11:36 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 51F07411E2; Sun, 13 Jun 2021 02:07:51 +0200 (CEST) Received: from mail-pf1-f169.google.com (mail-pf1-f169.google.com [209.85.210.169]) by mails.dpdk.org (Postfix) with ESMTP id 12493411C5 for ; Sun, 13 Jun 2021 02:07:48 +0200 (CEST) Received: by mail-pf1-f169.google.com with SMTP id y15so7615125pfl.4 for ; Sat, 12 Jun 2021 17:07:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=B5dU62YcrLO/2a9f71p2D52BWxij/47wqY1vLidWq98=; b=PLkEjEZsp9jbmQNYnANPlcifu0OboAWTvwwvWfwR7eJZ1ajV1jlfw07vEES4b77o3m ArkE9vCjtr7ilF2QNaBHqSTq+hDrKGZPGM0JshDS/SGuQsY9P7lBMGaqJF6xew3g1NGd IXi0P1YvXSvqibItgWkB2EjUeI/865VOkbqbY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=B5dU62YcrLO/2a9f71p2D52BWxij/47wqY1vLidWq98=; b=P0z0AUidwFGoB88UJD1uRk5d47D9BukjO0l2BkFDNPjQTRo9ED29jmOdQ5Q5ffJqsN sQzHU1GNY9Qgt5P8HbxdarC+xLRamh2EUVghNrep5oZa7LdDumB0aWoB0NuFa0PRIGDL e7N+p2faiH4zLNPQX9Cwu4TDepFnJmBF4dd4HQ3RXlo595HqnXPg1K9S6vNzBaqNBoa9 VRZ+NI83CfnA8UZi0ImFwRRhNHNII+z7BWWByXV6EXtsM9xRh4qe09l4E2Mp3+xb55dA 7kSlD3fp3DMgWdiU+qO/6uFxI7fgVd+t0+oPSBBbys9vnqWktXLB6vGb7EKuarB+TNkP d4pw== X-Gm-Message-State: AOAM530bBaT0ZNYBmlfms7u0UNkg4dx4lkFwRtm3Ypp5yeUt/2pACA00 EPNEu5pXeB2nPEuI9g+Sf3bOAor9KEyPgFiGc8aplQGgRckZG7SUz5NeWmR10+lpYWYa1at8b/p IDyOxE/s0PWWD59rfLX5au9CF3ZG9mVf7eVU/sGpbWjqEmqiMFft/P3HUHl95wa4= X-Google-Smtp-Source: ABdhPJym9UZRYpoX7uz12HzggHTFbcEAB0rbKmK5wrFtunYtUQHrNeolunuCD84JEogt5TBUul5PmA== X-Received: by 2002:a62:3344:0:b029:28c:6f0f:cb90 with SMTP id z65-20020a6233440000b029028c6f0fcb90mr14860464pfz.58.1623542866481; Sat, 12 Jun 2021 17:07:46 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.45 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:45 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Venkat Duvvuru , Shahaji Bhosle Date: Sat, 12 Jun 2021 17:06:25 -0700 Message-Id: <20210613000652.28191-32-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 31/58] net/bnxt: modify VXLAN decap for multichannel mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Venkat Duvvuru The driver is using physical port id as the index into the tunnel inner flow table. However, this will not work in case of multichannel mode where multiple physical functions are going to share the same physical port id. When tunnel inner flow offload request comes before tunnel outer flow offload request, the driver caches the tunnel inner flow details and programs it in the hardware after installing the tunnel outer flow in the hardware. If more than one tunnel inner flow arrives before tunnel outer flow is offloaded, the driver rejects any such tunnel inner flow offload requests. This patch fixes the above two problems by 1. Using dpdk port id as the index to store tunnel inner info. 2. Caching any number of tunnel inner flow offload requests that come before offloading tunnel outer flow offload request Signed-off-by: Venkat Duvvuru Reviewed-by: Shahaji Bhosle Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 3 + drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c | 3 +- drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 1 + drivers/net/bnxt/tf_ulp/ulp_tun.c | 192 ++++++++++++------ drivers/net/bnxt/tf_ulp/ulp_tun.h | 30 ++- 5 files changed, 150 insertions(+), 79 deletions(-) diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c index 5c805eef97..59fb530fb1 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c @@ -22,6 +22,7 @@ #include "ulp_flow_db.h" #include "ulp_mapper.h" #include "ulp_port_db.h" +#include "ulp_tun.h" /* Linked list of all TF sessions. */ STAILQ_HEAD(, bnxt_ulp_session_state) bnxt_ulp_session_list = @@ -533,6 +534,8 @@ ulp_ctx_init(struct bnxt *bp, if (rc) goto error_deinit; + ulp_tun_tbl_init(ulp_data->tun_tbl); + bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, &bp->tfp); return rc; diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c index ddf38ed931..836e94bc60 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c @@ -79,6 +79,7 @@ bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms, struct ulp_rte_parser_params *params, enum bnxt_ulp_fdb_type flow_type) { + memset(mapper_cparms, 0, sizeof(*mapper_cparms)); mapper_cparms->flow_type = flow_type; mapper_cparms->app_priority = params->priority; mapper_cparms->dir_attr = params->dir_attr; @@ -176,7 +177,7 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev, params.fid = fid; params.func_id = func_id; params.priority = attr->priority; - params.port_id = bnxt_get_phy_port_id(dev->data->port_id); + params.port_id = dev->data->port_id; /* Perform the rte flow post process */ ret = bnxt_ulp_rte_parser_post_process(¶ms); if (ret == BNXT_TF_RC_ERROR) diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h index ee17390358..b253aefe8d 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h @@ -62,6 +62,7 @@ struct ulp_rte_act_prop { /* Structure to be used for passing all the parser functions */ struct ulp_rte_parser_params { + STAILQ_ENTRY(ulp_rte_parser_params) next; struct ulp_rte_hdr_bitmap hdr_bitmap; struct ulp_rte_hdr_bitmap hdr_fp_bit; struct ulp_rte_field_bitmap fld_bitmap; diff --git a/drivers/net/bnxt/tf_ulp/ulp_tun.c b/drivers/net/bnxt/tf_ulp/ulp_tun.c index 884692947a..6c1ae3ced2 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_tun.c +++ b/drivers/net/bnxt/tf_ulp/ulp_tun.c @@ -3,6 +3,8 @@ * All rights reserved. */ +#include + #include #include "ulp_tun.h" @@ -48,19 +50,18 @@ ulp_install_outer_tun_flow(struct ulp_rte_parser_params *params, goto err; /* Store the tunnel dmac in the tunnel cache table and use it while - * programming tunnel flow F2. + * programming tunnel inner flow. */ memcpy(tun_entry->t_dmac, ¶ms->hdr_field[ULP_TUN_O_DMAC_HDR_FIELD_INDEX].spec, RTE_ETHER_ADDR_LEN); - tun_entry->valid = true; tun_entry->tun_flow_info[params->port_id].state = BNXT_ULP_FLOW_STATE_TUN_O_OFFLD; tun_entry->outer_tun_flow_id = params->fid; - /* F1 and it's related F2s are correlated based on - * Tunnel Destination IP Address. + /* Tunnel outer flow and it's related inner flows are correlated + * based on Tunnel Destination IP Address. */ if (tun_entry->t_dst_ip_valid) goto done; @@ -89,25 +90,27 @@ ulp_install_inner_tun_flow(struct bnxt_tun_cache_entry *tun_entry, { struct bnxt_ulp_mapper_create_parms mparms = { 0 }; struct ulp_per_port_flow_info *flow_info; - struct ulp_rte_parser_params *params; + struct ulp_rte_parser_params *inner_params; int ret; - /* F2 doesn't have tunnel dmac, use the tunnel dmac that was - * stored during F1 programming. + /* Tunnel inner flow doesn't have tunnel dmac, use the tunnel + * dmac that was stored during F1 programming. */ flow_info = &tun_entry->tun_flow_info[tun_o_params->port_id]; - params = &flow_info->first_inner_tun_params; - memcpy(¶ms->hdr_field[ULP_TUN_O_DMAC_HDR_FIELD_INDEX], - tun_entry->t_dmac, RTE_ETHER_ADDR_LEN); - params->parent_fid = tun_entry->outer_tun_flow_id; - params->fid = flow_info->first_tun_i_fid; - - bnxt_ulp_init_mapper_params(&mparms, params, - BNXT_ULP_FDB_TYPE_REGULAR); - - ret = ulp_mapper_flow_create(params->ulp_ctx, &mparms); - if (ret) - PMD_DRV_LOG(ERR, "Failed to create F2 flow."); + STAILQ_FOREACH(inner_params, &flow_info->tun_i_prms_list, next) { + memcpy(&inner_params->hdr_field[ULP_TUN_O_DMAC_HDR_FIELD_INDEX], + tun_entry->t_dmac, RTE_ETHER_ADDR_LEN); + inner_params->parent_fid = tun_entry->outer_tun_flow_id; + + bnxt_ulp_init_mapper_params(&mparms, inner_params, + BNXT_ULP_FDB_TYPE_REGULAR); + + ret = ulp_mapper_flow_create(inner_params->ulp_ctx, &mparms); + if (ret) + PMD_DRV_LOG(ERR, + "Failed to create inner tun flow, FID:%u.", + inner_params->fid); + } } /* This function either install outer tunnel flow & inner tunnel flow @@ -118,21 +121,18 @@ ulp_post_process_outer_tun_flow(struct ulp_rte_parser_params *params, struct bnxt_tun_cache_entry *tun_entry, uint16_t tun_idx) { - enum bnxt_ulp_tun_flow_state flow_state; int ret; - flow_state = tun_entry->tun_flow_info[params->port_id].state; ret = ulp_install_outer_tun_flow(params, tun_entry, tun_idx); if (ret == BNXT_TF_RC_ERROR) { PMD_DRV_LOG(ERR, "Failed to create outer tunnel flow."); return ret; } - /* If flow_state == BNXT_ULP_FLOW_STATE_NORMAL before installing - * F1, that means F2 is not deferred. Hence, no need to install F2. + /* Install any cached tunnel inner flows that came before tunnel + * outer flow. */ - if (flow_state != BNXT_ULP_FLOW_STATE_NORMAL) - ulp_install_inner_tun_flow(tun_entry, params); + ulp_install_inner_tun_flow(tun_entry, params); return BNXT_TF_RC_FID; } @@ -141,9 +141,10 @@ ulp_post_process_outer_tun_flow(struct ulp_rte_parser_params *params, * outer tunnel flow request. */ static int32_t -ulp_post_process_first_inner_tun_flow(struct ulp_rte_parser_params *params, +ulp_post_process_cache_inner_tun_flow(struct ulp_rte_parser_params *params, struct bnxt_tun_cache_entry *tun_entry) { + struct ulp_rte_parser_params *inner_tun_params; struct ulp_per_port_flow_info *flow_info; int ret; @@ -155,19 +156,22 @@ ulp_post_process_first_inner_tun_flow(struct ulp_rte_parser_params *params, if (ret != BNXT_TF_RC_SUCCESS) return BNXT_TF_RC_ERROR; - /* If Tunnel F2 flow comes first then we can't install it in the - * hardware, because, F2 flow will not have L2 context information. - * So, just cache the F2 information and program it in the context - * of F1 flow installation. + /* If Tunnel inner flow comes first then we can't install it in the + * hardware, because, Tunnel inner flow will not have L2 context + * information. So, just cache the Tunnel inner flow information + * and program it in the context of F1 flow installation. */ flow_info = &tun_entry->tun_flow_info[params->port_id]; - memcpy(&flow_info->first_inner_tun_params, params, - sizeof(struct ulp_rte_parser_params)); - - flow_info->first_tun_i_fid = params->fid; - flow_info->state = BNXT_ULP_FLOW_STATE_TUN_I_CACHED; + inner_tun_params = rte_zmalloc("ulp_inner_tun_params", + sizeof(struct ulp_rte_parser_params), 0); + if (!inner_tun_params) + return BNXT_TF_RC_ERROR; + memcpy(inner_tun_params, params, sizeof(struct ulp_rte_parser_params)); + STAILQ_INSERT_TAIL(&flow_info->tun_i_prms_list, inner_tun_params, + next); + flow_info->tun_i_cnt++; - /* F1 and it's related F2s are correlated based on + /* F1 and it's related Tunnel inner flows are correlated based on * Tunnel Destination IP Address. It could be already set, if * the inner flow got offloaded first. */ @@ -248,8 +252,8 @@ ulp_get_tun_entry(struct ulp_rte_parser_params *params, int32_t ulp_post_process_tun_flow(struct ulp_rte_parser_params *params) { - bool outer_tun_sig, inner_tun_sig, first_inner_tun_flow; - bool outer_tun_reject, inner_tun_reject, outer_tun_flow, inner_tun_flow; + bool inner_tun_sig, cache_inner_tun_flow; + bool outer_tun_reject, outer_tun_flow, inner_tun_flow; enum bnxt_ulp_tun_flow_state flow_state; struct bnxt_tun_cache_entry *tun_entry; uint32_t l3_tun, l3_tun_decap; @@ -267,40 +271,31 @@ ulp_post_process_tun_flow(struct ulp_rte_parser_params *params) if (rc == BNXT_TF_RC_ERROR) return rc; + if (params->port_id >= RTE_MAX_ETHPORTS) + return BNXT_TF_RC_ERROR; flow_state = tun_entry->tun_flow_info[params->port_id].state; /* Outer tunnel flow validation */ - outer_tun_sig = BNXT_OUTER_TUN_SIGNATURE(l3_tun, params); - outer_tun_flow = BNXT_OUTER_TUN_FLOW(outer_tun_sig); + outer_tun_flow = BNXT_OUTER_TUN_FLOW(l3_tun, params); outer_tun_reject = BNXT_REJECT_OUTER_TUN_FLOW(flow_state, - outer_tun_sig); + outer_tun_flow); /* Inner tunnel flow validation */ inner_tun_sig = BNXT_INNER_TUN_SIGNATURE(l3_tun, l3_tun_decap, params); - first_inner_tun_flow = BNXT_FIRST_INNER_TUN_FLOW(flow_state, + cache_inner_tun_flow = BNXT_CACHE_INNER_TUN_FLOW(flow_state, inner_tun_sig); inner_tun_flow = BNXT_INNER_TUN_FLOW(flow_state, inner_tun_sig); - inner_tun_reject = BNXT_REJECT_INNER_TUN_FLOW(flow_state, - inner_tun_sig); if (outer_tun_reject) { tun_entry->outer_tun_rej_cnt++; BNXT_TF_DBG(ERR, "Tunnel F1 flow rejected, COUNT: %d\n", tun_entry->outer_tun_rej_cnt); - /* Inner tunnel flow is rejected if it comes between first inner - * tunnel flow and outer flow requests. - */ - } else if (inner_tun_reject) { - tun_entry->inner_tun_rej_cnt++; - BNXT_TF_DBG(ERR, - "Tunnel F2 flow rejected, COUNT: %d\n", - tun_entry->inner_tun_rej_cnt); } - if (outer_tun_reject || inner_tun_reject) + if (outer_tun_reject) return BNXT_TF_RC_ERROR; - else if (first_inner_tun_flow) - return ulp_post_process_first_inner_tun_flow(params, tun_entry); + else if (cache_inner_tun_flow) + return ulp_post_process_cache_inner_tun_flow(params, tun_entry); else if (outer_tun_flow) return ulp_post_process_outer_tun_flow(params, tun_entry, tun_idx); @@ -310,11 +305,86 @@ ulp_post_process_tun_flow(struct ulp_rte_parser_params *params) return BNXT_TF_RC_NORMAL; } +void +ulp_tun_tbl_init(struct bnxt_tun_cache_entry *tun_tbl) +{ + struct ulp_per_port_flow_info *flow_info; + int i, j; + + for (i = 0; i < BNXT_ULP_MAX_TUN_CACHE_ENTRIES; i++) { + for (j = 0; j < RTE_MAX_ETHPORTS; j++) { + flow_info = &tun_tbl[i].tun_flow_info[j]; + STAILQ_INIT(&flow_info->tun_i_prms_list); + } + } +} + void ulp_clear_tun_entry(struct bnxt_tun_cache_entry *tun_tbl, uint8_t tun_idx) { + struct ulp_rte_parser_params *inner_params; + struct ulp_per_port_flow_info *flow_info; + int j; + + for (j = 0; j < RTE_MAX_ETHPORTS; j++) { + flow_info = &tun_tbl[tun_idx].tun_flow_info[j]; + STAILQ_FOREACH(inner_params, + &flow_info->tun_i_prms_list, + next) { + STAILQ_REMOVE(&flow_info->tun_i_prms_list, + inner_params, + ulp_rte_parser_params, next); + rte_free(inner_params); + } + } + memset(&tun_tbl[tun_idx], 0, - sizeof(struct bnxt_tun_cache_entry)); + sizeof(struct bnxt_tun_cache_entry)); + + for (j = 0; j < RTE_MAX_ETHPORTS; j++) { + flow_info = &tun_tbl[tun_idx].tun_flow_info[j]; + STAILQ_INIT(&flow_info->tun_i_prms_list); + } +} + +static bool +ulp_chk_and_rem_tun_i_flow(struct bnxt_tun_cache_entry *tun_entry, + struct ulp_per_port_flow_info *flow_info, + uint32_t fid) +{ + struct ulp_rte_parser_params *inner_params; + int j; + + STAILQ_FOREACH(inner_params, + &flow_info->tun_i_prms_list, + next) { + if (inner_params->fid == fid) { + STAILQ_REMOVE(&flow_info->tun_i_prms_list, + inner_params, + ulp_rte_parser_params, + next); + rte_free(inner_params); + flow_info->tun_i_cnt--; + /* When a dpdk application offloads a duplicate + * tunnel inner flow on a port that it is not + * destined to, there won't be a tunnel outer flow + * associated with these duplicate tunnel inner flows. + * So, when the last tunnel inner flow ages out, the + * driver has to clear the tunnel entry, otherwise + * the tunnel entry cannot be reused. + */ + if (!flow_info->tun_i_cnt && + flow_info->state != BNXT_ULP_FLOW_STATE_TUN_O_OFFLD) { + memset(tun_entry, 0, + sizeof(struct bnxt_tun_cache_entry)); + for (j = 0; j < RTE_MAX_ETHPORTS; j++) + STAILQ_INIT(&flow_info->tun_i_prms_list); + } + return true; + } + } + + return false; } /* When a dpdk application offloads the same tunnel inner flow @@ -330,12 +400,14 @@ ulp_clear_tun_inner_entry(struct bnxt_tun_cache_entry *tun_tbl, uint32_t fid) struct ulp_per_port_flow_info *flow_info; int i, j; - for (i = 0; i < BNXT_ULP_MAX_TUN_CACHE_ENTRIES ; i++) { + for (i = 0; i < BNXT_ULP_MAX_TUN_CACHE_ENTRIES; i++) { + if (!tun_tbl[i].t_dst_ip_valid) + continue; for (j = 0; j < RTE_MAX_ETHPORTS; j++) { flow_info = &tun_tbl[i].tun_flow_info[j]; - if (flow_info->first_tun_i_fid == fid && - flow_info->state == BNXT_ULP_FLOW_STATE_TUN_I_CACHED) - memset(flow_info, 0, sizeof(*flow_info)); + if (ulp_chk_and_rem_tun_i_flow(&tun_tbl[i], + flow_info, fid) == true) + return; } } } diff --git a/drivers/net/bnxt/tf_ulp/ulp_tun.h b/drivers/net/bnxt/tf_ulp/ulp_tun.h index af6926f0e4..7e31f81f13 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_tun.h +++ b/drivers/net/bnxt/tf_ulp/ulp_tun.h @@ -15,7 +15,7 @@ #include "ulp_template_db_enum.h" #include "ulp_template_struct.h" -#define BNXT_OUTER_TUN_SIGNATURE(l3_tun, params) \ +#define BNXT_OUTER_TUN_FLOW(l3_tun, params) \ ((l3_tun) && \ ULP_BITMAP_ISSET((params)->act_bitmap.bits, \ BNXT_ULP_ACTION_BIT_JUMP)) @@ -24,22 +24,16 @@ !ULP_BITMAP_ISSET((params)->hdr_bitmap.bits, \ BNXT_ULP_HDR_BIT_O_ETH)) -#define BNXT_FIRST_INNER_TUN_FLOW(state, inner_tun_sig) \ +#define BNXT_CACHE_INNER_TUN_FLOW(state, inner_tun_sig) \ ((state) == BNXT_ULP_FLOW_STATE_NORMAL && (inner_tun_sig)) #define BNXT_INNER_TUN_FLOW(state, inner_tun_sig) \ ((state) == BNXT_ULP_FLOW_STATE_TUN_O_OFFLD && (inner_tun_sig)) -#define BNXT_OUTER_TUN_FLOW(outer_tun_sig) ((outer_tun_sig)) /* It is invalid to get another outer flow offload request * for the same tunnel, while the outer flow is already offloaded. */ #define BNXT_REJECT_OUTER_TUN_FLOW(state, outer_tun_sig) \ ((state) == BNXT_ULP_FLOW_STATE_TUN_O_OFFLD && (outer_tun_sig)) -/* It is invalid to get another inner flow offload request - * for the same tunnel, while the outer flow is not yet offloaded. - */ -#define BNXT_REJECT_INNER_TUN_FLOW(state, inner_tun_sig) \ - ((state) == BNXT_ULP_FLOW_STATE_TUN_I_CACHED && (inner_tun_sig)) #define ULP_TUN_O_DMAC_HDR_FIELD_INDEX 1 #define ULP_TUN_O_IPV4_DIP_INDEX 19 @@ -50,10 +44,10 @@ * requests arrive. * * If inner tunnel flow offload request arrives first then the flow - * state will change from BNXT_ULP_FLOW_STATE_NORMAL to - * BNXT_ULP_FLOW_STATE_TUN_I_CACHED and the following outer tunnel - * flow offload request will change the state of the flow to - * BNXT_ULP_FLOW_STATE_TUN_O_OFFLD from BNXT_ULP_FLOW_STATE_TUN_I_CACHED. + * state will remain in BNXT_ULP_FLOW_STATE_NORMAL state. + * The following outer tunnel flow offload request will change the + * state of the flow to BNXT_ULP_FLOW_STATE_TUN_O_OFFLD from + * BNXT_ULP_FLOW_STATE_NORMAL. * * If outer tunnel flow offload request arrives first then the flow state * will change from BNXT_ULP_FLOW_STATE_NORMAL to @@ -67,17 +61,15 @@ enum bnxt_ulp_tun_flow_state { BNXT_ULP_FLOW_STATE_NORMAL = 0, BNXT_ULP_FLOW_STATE_TUN_O_OFFLD, - BNXT_ULP_FLOW_STATE_TUN_I_CACHED }; struct ulp_per_port_flow_info { - enum bnxt_ulp_tun_flow_state state; - uint32_t first_tun_i_fid; - struct ulp_rte_parser_params first_inner_tun_params; + enum bnxt_ulp_tun_flow_state state; + uint32_t tun_i_cnt; + STAILQ_HEAD(, ulp_rte_parser_params) tun_i_prms_list; }; struct bnxt_tun_cache_entry { - bool valid; bool t_dst_ip_valid; uint8_t t_dmac[RTE_ETHER_ADDR_LEN]; union { @@ -86,10 +78,12 @@ struct bnxt_tun_cache_entry { }; uint32_t outer_tun_flow_id; uint16_t outer_tun_rej_cnt; - uint16_t inner_tun_rej_cnt; struct ulp_per_port_flow_info tun_flow_info[RTE_MAX_ETHPORTS]; }; +void +ulp_tun_tbl_init(struct bnxt_tun_cache_entry *tun_tbl); + void ulp_clear_tun_entry(struct bnxt_tun_cache_entry *tun_tbl, uint8_t tun_idx); From patchwork Sun Jun 13 00:06:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94126 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9A19AA0C41; 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Sat, 12 Jun 2021 17:07:47 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Kishore Padmanabha , Venkat Duvvuru , Mike Baucom Date: Sat, 12 Jun 2021 17:06:26 -0700 Message-Id: <20210613000652.28191-33-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 32/58] net/bnxt: modify table processing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kishore Padmanabha 1. Added interface table specific opcode to process interface table entry creation and reuse. This allows reuse of the interface table entry for multiple flows. Changed the regfile apis to store the data in big endian format. 2. The result blob creation being done in tcam, interface, index tables are consolidate to a common method. 3. Added result blob processing for generic table write 4. Modified the index table opcode processing to support new opcodes. 5. The driver was setting key size that did not take into account the word alignment. 6. The hard coded values for critical resource is replaced with template defined values. Signed-off-by: Kishore Padmanabha Signed-off-by: Venkat Duvvuru Reviewed-by: Mike Baucom Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c | 18 +- drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h | 4 +- drivers/net/bnxt/tf_ulp/ulp_mapper.c | 674 ++++++++++-------- .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 22 + .../bnxt/tf_ulp/ulp_template_db_wh_plus_act.c | 108 +-- .../tf_ulp/ulp_template_db_wh_plus_class.c | 69 +- 6 files changed, 512 insertions(+), 383 deletions(-) diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c index 0a15789c4e..62a5924a36 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c +++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c @@ -5,6 +5,8 @@ #include #include +#include "tf_core.h" +#include "tfp.h" #include "ulp_mapper.h" #include "ulp_flow_db.h" @@ -163,18 +165,20 @@ ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir) } /* - * Set the data in the generic table entry + * Set the data in the generic table entry, Data is in Big endian format * * entry [in] - generic table entry * offset [in] - The offset in bits where the data has to be set * len [in] - The length of the data in bits to be set * data [in] - pointer to the data to be used for setting the value. + * data_size [in] - length of the data pointer in bytes. * * returns 0 on success */ int32_t ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, - uint32_t offset, uint32_t len, uint8_t *data) + uint32_t offset, uint32_t len, uint8_t *data, + uint32_t data_size) { /* validate the null arguments */ if (!entry || !data) { @@ -183,12 +187,17 @@ ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, } /* check the size of the buffer for validation */ - if ((offset + len) > ULP_BYTE_2_BITS(entry->byte_data_size)) { + if ((offset + len) > ULP_BYTE_2_BITS(entry->byte_data_size) || + data_size < ULP_BITS_2_BYTE(len)) { BNXT_TF_DBG(ERR, "invalid offset or length %x:%x:%x\n", offset, len, entry->byte_data_size); return -EINVAL; } + /* adjust the data pointer */ + data = data + (data_size - ULP_BITS_2_BYTE(len)); + + /* Push the data into the byte data array */ if (entry->byte_order == BNXT_ULP_BYTE_ORDER_LE) { if (ulp_bs_push_lsb(entry->byte_data, offset, len, data) != len) { @@ -208,7 +217,7 @@ ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, } /* - * Get the data in the generic table entry + * Get the data in the generic table entry, Data is in Big endian format * * entry [in] - generic table entry * offset [in] - The offset in bits where the data has to get @@ -298,6 +307,7 @@ ulp_mapper_gen_tbl_res_free(struct bnxt_ulp_context *ulp_ctx, tbl_idx, res->resource_hndl); return -EINVAL; } + fid = tfp_be_to_cpu_32(fid); /* Destroy the flow associated with the shared flow id */ if (ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR, diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h index c8a1112af4..701a8d10e5 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h +++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h @@ -104,12 +104,14 @@ ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir); * offset [in] - The offset in bits where the data has to be set * len [in] - The length of the data in bits to be set * data [in] - pointer to the data to be used for setting the value. + * data_size [in] - length of the data pointer in bytes. * * returns 0 on success */ int32_t ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, - uint32_t offset, uint32_t len, uint8_t *data); + uint32_t offset, uint32_t len, uint8_t *data, + uint32_t data_size); /* * Get the data in the generic table entry diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index 56005480af..b38c834fce 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -530,7 +530,7 @@ ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms, case BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE: /* allocate a new fid */ rc = ulp_flow_db_fid_alloc(parms->ulp_ctx, - BNXT_ULP_FDB_TYPE_REGULAR, + parms->flow_type, tbl->resource_func, &fid); if (rc) { BNXT_TF_DBG(ERR, @@ -540,7 +540,7 @@ ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms, /* Store the allocated fid in regfile*/ val64 = fid; rc = ulp_regfile_write(parms->regfile, tbl->flow_db_operand, - val64); + tfp_cpu_to_be_64(val64)); if (!rc) { BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", tbl->flow_db_operand); @@ -560,7 +560,7 @@ ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms, return -EINVAL; } /* Use the extracted fid to update the flow resource */ - push_fid = (uint32_t)val64; + push_fid = tfp_be_to_cpu_64((uint32_t)val64); break; default: return rc; /* Nothing to be done */ @@ -584,6 +584,65 @@ ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms, return rc; } +/* + * Process the identifier list in the given table. + * Extract the ident from the table entry and + * write it to the reg file. + * returns 0 on success. + */ +static int32_t +ulp_mapper_tbl_ident_scan_ext(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl, + uint8_t *byte_data, + uint32_t byte_data_size, + enum bnxt_ulp_byte_order byte_order) +{ + struct bnxt_ulp_mapper_ident_info *idents; + uint32_t i, num_idents = 0; + uint64_t val64; + + /* validate the null arguments */ + if (!byte_data) { + BNXT_TF_DBG(ERR, "invalid argument\n"); + return -EINVAL; + } + + /* Get the ident list and process each one */ + idents = ulp_mapper_ident_fields_get(parms, tbl, &num_idents); + + for (i = 0; i < num_idents; i++) { + /* check the size of the buffer for validation */ + if ((idents[i].ident_bit_pos + idents[i].ident_bit_size) > + ULP_BYTE_2_BITS(byte_data_size) || + idents[i].ident_bit_size > ULP_BYTE_2_BITS(sizeof(val64))) { + BNXT_TF_DBG(ERR, "invalid offset or length %x:%x:%x\n", + idents[i].ident_bit_pos, + idents[i].ident_bit_size, + byte_data_size); + return -EINVAL; + } + if (byte_order == BNXT_ULP_BYTE_ORDER_LE) + ulp_bs_pull_lsb(byte_data, (uint8_t *)&val64, + sizeof(val64), + idents[i].ident_bit_pos, + idents[i].ident_bit_size); + else + ulp_bs_pull_msb(byte_data, (uint8_t *)&val64, + idents[i].ident_bit_pos, + idents[i].ident_bit_size); + + /* Write it to the regfile, val64 is already in big-endian*/ + if (!ulp_regfile_write(parms->regfile, + idents[i].regfile_idx, + val64)) { + BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", + idents[i].regfile_idx); + return -EINVAL; + } + } + return 0; +} + /* * Process the identifier instruction and either store it in the flow database * or return it in the val (if not NULL) on success. If val is NULL, the @@ -637,7 +696,7 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_func = ident->resource_func; fid_parms.resource_type = ident->ident_type; fid_parms.resource_hndl = iparms.id; - fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; + fid_parms.critical_resource = tbl->critical_resource; rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { @@ -729,7 +788,7 @@ ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_func = ident->resource_func; fid_parms.resource_type = ident->ident_type; fid_parms.resource_hndl = sparms.search_id; - fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; + fid_parms.critical_resource = tbl->critical_resource; rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { BNXT_TF_DBG(ERR, "Failed to link res to flow rc = %d\n", @@ -1044,6 +1103,57 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, return 0; } +/* + * Result table process and fill the result blob. + * data [out] - the result blob data + */ +static int32_t +ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl, + struct ulp_blob *data, + const char *name) +{ + struct bnxt_ulp_mapper_result_field_info *dflds; + uint32_t i, num_flds = 0, encap_flds = 0; + int32_t rc = 0; + + /* Get the result field list */ + dflds = ulp_mapper_result_fields_get(parms, tbl, &num_flds, + &encap_flds); + + /* validate the result field list counts */ + if ((tbl->resource_func == BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE && + (!num_flds && !encap_flds)) || !dflds || + (tbl->resource_func != BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE && + (!num_flds || encap_flds))) { + BNXT_TF_DBG(ERR, "Failed to get data fields %x:%x\n", + num_flds, encap_flds); + return -EINVAL; + } + + /* process the result fields, loop through them */ + for (i = 0; i < (num_flds + encap_flds); i++) { + /* set the swap index if encap swap bit is enabled */ + if (parms->device_params->encap_byte_swap && encap_flds && + i == num_flds) + ulp_blob_encap_swap_idx_set(data); + + /* Process the result fields */ + rc = ulp_mapper_result_field_process(parms, tbl->direction, + &dflds[i], data, name); + if (rc) { + BNXT_TF_DBG(ERR, "data field failed\n"); + return rc; + } + } + + /* if encap bit swap is enabled perform the bit swap */ + if (parms->device_params->encap_byte_swap && encap_flds) + ulp_blob_perform_encap_swap(data); + + return rc; +} + /* Function to alloc action record and set the table. */ static int32_t ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms, @@ -1209,7 +1319,7 @@ ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms, } fid_parms.direction = tbl->direction; fid_parms.resource_func = BNXT_ULP_RESOURCE_FUNC_HW_FID; - fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; + fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = gfid; rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); @@ -1255,7 +1365,7 @@ ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms, } fid_parms.direction = tbl->direction; fid_parms.resource_func = BNXT_ULP_RESOURCE_FUNC_HW_FID; - fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; + fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = act_idx; rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); @@ -1301,7 +1411,7 @@ ulp_mapper_mark_vfr_idx_process(struct bnxt_ulp_mapper_parms *parms, } fid_parms.direction = tbl->direction; fid_parms.resource_func = BNXT_ULP_RESOURCE_FUNC_HW_FID; - fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; + fid_parms.critical_resource = tbl->critical_resource; fid_parms.resource_type = mark_flag; fid_parms.resource_hndl = act_idx; rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); @@ -1310,43 +1420,6 @@ ulp_mapper_mark_vfr_idx_process(struct bnxt_ulp_mapper_parms *parms, return rc; } -/* - * Tcam table - create the result blob. - * data [out] - the result blob data - */ -static int32_t -ulp_mapper_tcam_tbl_result_create(struct bnxt_ulp_mapper_parms *parms, - struct bnxt_ulp_mapper_tbl_info *tbl, - struct ulp_blob *data) -{ - struct bnxt_ulp_mapper_result_field_info *dflds; - uint32_t num_dflds; - uint32_t encap_flds = 0; - uint32_t i; - int32_t rc = 0; - - /* Create the result data blob */ - dflds = ulp_mapper_result_fields_get(parms, tbl, &num_dflds, - &encap_flds); - if (!dflds || !num_dflds || encap_flds) { - BNXT_TF_DBG(ERR, "Failed to get data fields.\n"); - return -EINVAL; - } - - for (i = 0; i < num_dflds; i++) { - rc = ulp_mapper_result_field_process(parms, - tbl->direction, - &dflds[i], - data, - "TCAM Result"); - if (rc) { - BNXT_TF_DBG(ERR, "Failed to set data fields\n"); - return -EINVAL; - } - } - return rc; -} - /* Tcam table scan the identifier list and allocate each identifier */ static int32_t ulp_mapper_tcam_tbl_scan_ident_alloc(struct bnxt_ulp_mapper_parms *parms, @@ -1418,8 +1491,8 @@ ulp_mapper_tcam_tbl_entry_write(struct bnxt_ulp_mapper_parms *parms, sparms.idx = idx; /* Already verified the key/mask lengths */ sparms.key = ulp_blob_data_get(key, &tmplen); + sparms.key_sz_in_bits = tmplen; sparms.mask = ulp_blob_data_get(mask, &tmplen); - sparms.key_sz_in_bits = tbl->key_bit_size; sparms.result = ulp_blob_data_get(data, &tmplen); if (tbl->result_bit_size != tmplen) { @@ -1625,8 +1698,8 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, rc = ulp_mapper_tcam_tbl_scan_ident_alloc(parms, tbl); /* Create the result blob */ if (!rc) - rc = ulp_mapper_tcam_tbl_result_create(parms, tbl, - &data); + rc = ulp_mapper_tbl_result_build(parms, tbl, &data, + "TCAM Result"); /* write the tcam entry */ if (!rc) rc = ulp_mapper_tcam_tbl_entry_write(parms, tbl, &key, @@ -1669,9 +1742,8 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) { struct bnxt_ulp_mapper_key_field_info *kflds; - struct bnxt_ulp_mapper_result_field_info *dflds; struct ulp_blob key, data; - uint32_t i, num_kflds, num_dflds; + uint32_t i, num_kflds; uint16_t tmplen; struct tf *tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx); struct ulp_flow_db_res_params fid_parms = { 0 }; @@ -1680,7 +1752,6 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, enum bnxt_ulp_flow_mem_type mtype; int32_t trc; int32_t rc = 0; - uint32_t encap_flds = 0; rc = bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype); if (rc) { @@ -1721,27 +1792,10 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, */ /* Create the result data blob */ - dflds = ulp_mapper_result_fields_get(parms, tbl, - &num_dflds, &encap_flds); - if (!dflds || !num_dflds || encap_flds) { - BNXT_TF_DBG(ERR, "Failed to get data fields.\n"); - return -EINVAL; - } - - for (i = 0; i < num_dflds; i++) { - struct bnxt_ulp_mapper_result_field_info *fld; - - fld = &dflds[i]; - - rc = ulp_mapper_result_field_process(parms, - tbl->direction, - fld, - &data, - "EM Result"); - if (rc) { - BNXT_TF_DBG(ERR, "Failed to set data fields.\n"); - return rc; - } + rc = ulp_mapper_tbl_result_build(parms, tbl, &data, "EM Result"); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to build the result blob\n"); + return rc; } /* do the transpose for the internal EM keys */ if (tbl->resource_func == BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE) @@ -1818,28 +1872,23 @@ static int32_t ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) { - struct bnxt_ulp_mapper_result_field_info *flds; - struct ulp_flow_db_res_params fid_parms; + struct ulp_flow_db_res_params fid_parms; struct ulp_blob data; - uint64_t idx = 0; + uint64_t regval = 0; uint16_t tmplen; - uint32_t i, num_flds, index, hit; + uint32_t index, hit; int32_t rc = 0, trc = 0; - struct tf_alloc_tbl_entry_parms aparms = { 0 }; + struct tf_alloc_tbl_entry_parms aparms = { 0 }; struct tf_search_tbl_entry_parms srchparms = { 0 }; - struct tf_set_tbl_entry_parms sparms = { 0 }; - struct tf_free_tbl_entry_parms free_parms = { 0 }; + struct tf_set_tbl_entry_parms sparms = { 0 }; + struct tf_get_tbl_entry_parms gparms = { 0 }; + struct tf_free_tbl_entry_parms free_parms = { 0 }; uint32_t tbl_scope_id; struct tf *tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx); uint16_t bit_size; - uint32_t encap_flds = 0; - - /* Get the scope id first */ - rc = bnxt_ulp_cntxt_tbl_scope_id_get(parms->ulp_ctx, &tbl_scope_id); - if (rc) { - BNXT_TF_DBG(ERR, "Failed to get table scope rc=%d\n", rc); - return rc; - } + bool alloc = false; + bool write = false; + bool search = false; /* use the max size if encap is enabled */ if (tbl->encap_num_fields) @@ -1850,82 +1899,150 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, /* Initialize the blob data */ if (!ulp_blob_init(&data, bit_size, parms->device_params->byte_order)) { - BNXT_TF_DBG(ERR, "Failed initial index table blob\n"); + BNXT_TF_DBG(ERR, "Failed to initialize index table blob\n"); return -EINVAL; } - /* Get the result fields list */ - flds = ulp_mapper_result_fields_get(parms, tbl, &num_flds, &encap_flds); - - if (!flds || (!num_flds && !encap_flds)) { - BNXT_TF_DBG(ERR, "template undefined for the index table\n"); - return -EINVAL; + /* Get the scope id first */ + rc = bnxt_ulp_cntxt_tbl_scope_id_get(parms->ulp_ctx, &tbl_scope_id); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to get table scope rc=%d\n", rc); + return rc; } - /* process the result fields, loop through them */ - for (i = 0; i < (num_flds + encap_flds); i++) { - /* set the swap index if encap swap bit is enabled */ - if (parms->device_params->encap_byte_swap && encap_flds && - i == num_flds) - ulp_blob_encap_swap_idx_set(&data); - - /* Process the result fields */ - rc = ulp_mapper_result_field_process(parms, - tbl->direction, - &flds[i], - &data, - "Indexed Result"); - if (rc) { - BNXT_TF_DBG(ERR, "data field failed\n"); - return rc; + switch (tbl->tbl_opcode) { + case BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE: + alloc = true; + break; + case BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE: + /* + * Build the entry, alloc an index, write the table, and store + * the data in the regfile. + */ + alloc = true; + write = true; + break; + case BNXT_ULP_INDEX_TBL_OPC_SRCH_ALLOC_WR_REGFILE: + if (tbl->resource_type == TF_TBL_TYPE_EXT) { + /* Not currently supporting with EXT */ + BNXT_TF_DBG(ERR, + "Ext Table Search Opcode not supported.\n"); + return -EINVAL; } - } - - /* if encap bit swap is enabled perform the bit swap */ - if (parms->device_params->encap_byte_swap && encap_flds) { - ulp_blob_perform_encap_swap(&data); - } + /* + * Search for the entry in the tf core. If it is hit, save the + * index in the regfile. If it is a miss, Build the entry, + * alloc an index, write the table, and store the data in the + * regfile (same as ALLOC_WR). + */ + search = true; + break; + case BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE: + /* + * get the index to write to from the regfile and then write + * the table entry. + */ + if (!ulp_regfile_read(parms->regfile, + tbl->tbl_operand, + ®val)) { + BNXT_TF_DBG(ERR, + "Failed to get tbl idx from regfile[%d].\n", + tbl->tbl_operand); + return -EINVAL; + } + index = tfp_be_to_cpu_64(regval); + /* For external, we need to reverse shift */ + if (tbl->resource_type == TF_TBL_TYPE_EXT) + index = TF_ACT_REC_PTR_2_OFFSET(index); - /* - * Check for index opcode, if it is Global then - * no need to allocate the table, just set the table - * and exit since it is not maintained in the flow db. - */ - if (tbl->index_opcode == BNXT_ULP_INDEX_OPCODE_GLOBAL) { - /* get the index from index operand */ - if (tbl->index_operand < BNXT_ULP_GLB_REGFILE_INDEX_LAST && - ulp_mapper_glb_resource_read(parms->mapper_data, + write = true; + break; + case BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE: + /* + * get the index to write to from the global regfile and then + * write the table. + */ + if (ulp_mapper_glb_resource_read(parms->mapper_data, tbl->direction, - tbl->index_operand, - &idx)) { - BNXT_TF_DBG(ERR, "Glbl regfile[%d] read failed.\n", + tbl->tbl_operand, + ®val)) { + BNXT_TF_DBG(ERR, + "Failed to get tbl idx from Global " + "regfile[%d].\n", tbl->index_operand); return -EINVAL; } - /* set the Tf index table */ - sparms.dir = tbl->direction; - sparms.type = tbl->resource_type; - sparms.data = ulp_blob_data_get(&data, &tmplen); - sparms.data_sz_in_bytes = ULP_BITS_2_BYTE(tmplen); - sparms.idx = tfp_be_to_cpu_64(idx); - sparms.tbl_scope_id = tbl_scope_id; + index = tfp_be_to_cpu_64(regval); + /* For external, we need to reverse shift */ + if (tbl->resource_type == TF_TBL_TYPE_EXT) + index = TF_ACT_REC_PTR_2_OFFSET(index); + write = true; + break; + case BNXT_ULP_INDEX_TBL_OPC_RD_REGFILE: + /* + * The read is different from the rest and can be handled here + * instead of trying to use common code. Simply read the table + * with the index from the regfile, scan and store the + * identifiers, and return. + */ + if (tbl->resource_type == TF_TBL_TYPE_EXT) { + /* Not currently supporting with EXT */ + BNXT_TF_DBG(ERR, + "Ext Table Read Opcode not supported.\n"); + return -EINVAL; + } + if (!ulp_regfile_read(parms->regfile, + tbl->tbl_operand, ®val)) { + BNXT_TF_DBG(ERR, + "Failed to get tbl idx from regfile[%d]\n", + tbl->tbl_operand); + return -EINVAL; + } + index = tfp_be_to_cpu_64(regval); + gparms.dir = tbl->direction; + gparms.type = tbl->resource_type; + gparms.data = ulp_blob_data_get(&data, &tmplen); + gparms.data_sz_in_bytes = ULP_BITS_2_BYTE(tbl->result_bit_size); + gparms.idx = index; + rc = tf_get_tbl_entry(tfp, &gparms); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to read the tbl entry %d:%d\n", + tbl->resource_type, index); + return rc; + } + /* + * Scan the fields in the entry and push them into the regfile. + */ + rc = ulp_mapper_tbl_ident_scan_ext(parms, tbl, + gparms.data, + gparms.data_sz_in_bytes, + data.byte_order); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to read fields on tbl read " + "rc=%d\n", rc); + return rc; + } + return 0; + default: + BNXT_TF_DBG(ERR, "Invalid index table opcode %d\n", + tbl->tbl_opcode); + return -EINVAL; + } - rc = tf_set_tbl_entry(tfp, &sparms); + if (write || search) { + /* Get the result fields list */ + rc = ulp_mapper_tbl_result_build(parms, + tbl, + &data, + "Indexed Result"); if (rc) { - BNXT_TF_DBG(ERR, - "Glbl Index table[%s][%s][%x] failed rc=%d\n", - tf_tbl_type_2_str(sparms.type), - tf_dir_2_str(sparms.dir), - sparms.idx, rc); + BNXT_TF_DBG(ERR, "Failed to build the result blob\n"); return rc; } - return 0; /* success */ } - index = 0; - hit = 0; - /* Perform the tf table allocation by filling the alloc params */ - if (tbl->srch_b4_alloc) { + if (search) { + /* Use the result blob to perform a search */ memset(&srchparms, 0, sizeof(srchparms)); srchparms.dir = tbl->direction; srchparms.type = tbl->resource_type; @@ -1948,12 +2065,15 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, } index = srchparms.idx; hit = srchparms.hit; - } else { + if (hit) + write = false; + else + write = true; + } + + if (alloc) { aparms.dir = tbl->direction; aparms.type = tbl->resource_type; - aparms.search_enable = tbl->srch_b4_alloc; - aparms.result = ulp_blob_data_get(&data, &tmplen); - aparms.result_sz_in_bytes = ULP_BITS_2_BYTE(tmplen); aparms.tbl_scope_id = tbl_scope_id; /* All failures after the alloc succeeds require a free */ @@ -1967,39 +2087,43 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, index = aparms.idx; } - /* - * calculate the idx for the result record, for external EM the offset - * needs to be shifted accordingly. If external non-inline table types - * are used then need to revisit this logic. - */ - if (tbl->resource_type == TF_TBL_TYPE_EXT) - idx = TF_ACT_REC_OFFSET_2_PTR(index); - else - idx = index; + if (search || alloc) { + /* + * Store the index in the regfile since we either allocated it + * or it was a hit. + * + * Calculate the idx for the result record, for external EM the + * offset needs to be shifted accordingly. + * If external non-inline table types are used then need to + * revisit this logic. + */ + if (tbl->resource_type == TF_TBL_TYPE_EXT) + regval = TF_ACT_REC_OFFSET_2_PTR(index); + else + regval = index; - /* Always storing values in Regfile in BE */ - idx = tfp_cpu_to_be_64(idx); - if (tbl->index_opcode == BNXT_ULP_INDEX_OPCODE_ALLOCATE) { - rc = ulp_regfile_write(parms->regfile, tbl->index_operand, idx); + rc = ulp_regfile_write(parms->regfile, + tbl->tbl_operand, + tfp_cpu_to_be_64(regval)); if (!rc) { - BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", - tbl->index_operand); + BNXT_TF_DBG(ERR, "Failed to write regfile[%d] rc=%d\n", + tbl->tbl_operand, rc); goto error; } } - /* Perform the tf table set by filling the set params */ - if (!tbl->srch_b4_alloc || !hit) { - sparms.dir = tbl->direction; - sparms.type = tbl->resource_type; - sparms.data = ulp_blob_data_get(&data, &tmplen); + if (write) { + sparms.dir = tbl->direction; + sparms.type = tbl->resource_type; + sparms.data = ulp_blob_data_get(&data, &tmplen); sparms.data_sz_in_bytes = ULP_BITS_2_BYTE(tmplen); - sparms.idx = index; - sparms.tbl_scope_id = tbl_scope_id; - + sparms.idx = index; + sparms.tbl_scope_id = tbl_scope_id; rc = tf_set_tbl_entry(tfp, &sparms); if (rc) { - BNXT_TF_DBG(ERR, "Set table[%s][%s][%x] failed rc=%d\n", + BNXT_TF_DBG(ERR, + "Index table[%s][%s][%x] write failed " + "rc=%d\n", tf_tbl_type_2_str(sparms.type), tf_dir_2_str(sparms.dir), sparms.idx, rc); @@ -2014,7 +2138,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, fid_parms.resource_type = tbl->resource_type; fid_parms.resource_sub_type = tbl->resource_sub_type; fid_parms.resource_hndl = index; - fid_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO; + fid_parms.critical_resource = tbl->critical_resource; rc = ulp_mapper_fdb_opc_process(parms, tbl, &fid_parms); if (rc) { @@ -2051,15 +2175,15 @@ static int32_t ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) { - struct bnxt_ulp_mapper_result_field_info *flds; - struct ulp_blob data; + struct ulp_blob data, res_blob; uint64_t idx; uint16_t tmplen; - uint32_t i, num_flds; int32_t rc = 0; struct tf_set_if_tbl_entry_parms iftbl_params = { 0 }; + struct tf_get_if_tbl_entry_parms get_parms = { 0 }; struct tf *tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx); - uint32_t encap_flds; + enum bnxt_ulp_if_tbl_opc if_opc = tbl->tbl_opcode; + uint32_t res_size; /* Initialize the blob data */ if (!ulp_blob_init(&data, tbl->result_bit_size, @@ -2068,34 +2192,64 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms, return -EINVAL; } - /* Get the result fields list */ - flds = ulp_mapper_result_fields_get(parms, tbl, &num_flds, &encap_flds); - - if (!flds || !num_flds || encap_flds) { - BNXT_TF_DBG(ERR, "template undefined for the IF table\n"); - return -EINVAL; + /* create the result blob */ + rc = ulp_mapper_tbl_result_build(parms, tbl, &data, "IFtable Result"); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to build the result blob\n"); + return rc; } - /* process the result fields, loop through them */ - for (i = 0; i < num_flds; i++) { - /* Process the result fields */ - rc = ulp_mapper_result_field_process(parms, - tbl->direction, - &flds[i], - &data, - "IFtable Result"); + /* Get the index details */ + switch (if_opc) { + case BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD: + idx = ULP_COMP_FLD_IDX_RD(parms, tbl->tbl_operand); + break; + case BNXT_ULP_IF_TBL_OPC_WR_REGFILE: + if (!ulp_regfile_read(parms->regfile, tbl->tbl_operand, &idx)) { + BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", + tbl->tbl_operand); + return -EINVAL; + } + idx = tfp_be_to_cpu_64(idx); + break; + case BNXT_ULP_IF_TBL_OPC_WR_CONST: + idx = tbl->tbl_operand; + break; + case BNXT_ULP_IF_TBL_OPC_RD_COMP_FIELD: + /* Initialize the result blob */ + if (!ulp_blob_init(&res_blob, tbl->result_bit_size, + parms->device_params->byte_order)) { + BNXT_TF_DBG(ERR, "Failed initial result blob\n"); + return -EINVAL; + } + + /* read the interface table */ + idx = ULP_COMP_FLD_IDX_RD(parms, tbl->tbl_operand); + res_size = ULP_BITS_2_BYTE(tbl->result_bit_size); + get_parms.dir = tbl->direction; + get_parms.type = tbl->resource_type; + get_parms.idx = idx; + get_parms.data = ulp_blob_data_get(&res_blob, &tmplen); + get_parms.data_sz_in_bytes = res_size; + + rc = tf_get_if_tbl_entry(tfp, &get_parms); if (rc) { - BNXT_TF_DBG(ERR, "data field failed\n"); + BNXT_TF_DBG(ERR, "Get table[%d][%s][%x] failed rc=%d\n", + get_parms.type, + tf_dir_2_str(get_parms.dir), + get_parms.idx, rc); return rc; } - } - - /* Get the index details from computed field */ - if (tbl->index_opcode == BNXT_ULP_INDEX_OPCODE_COMP_FIELD) { - idx = ULP_COMP_FLD_IDX_RD(parms, tbl->index_operand); - } else if (tbl->index_opcode == BNXT_ULP_INDEX_OPCODE_CONSTANT) { - idx = tbl->index_operand; - } else { + rc = ulp_mapper_tbl_ident_scan_ext(parms, tbl, + res_blob.data, + res_size, + res_blob.byte_order); + if (rc) + BNXT_TF_DBG(ERR, "Scan and extract failed rc=%d\n", rc); + return rc; + case BNXT_ULP_IF_TBL_OPC_NOT_USED: + return rc; /* skip it */ + default: BNXT_TF_DBG(ERR, "Invalid tbl index opcode\n"); return -EINVAL; } @@ -2123,98 +2277,20 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms, return rc; } -/* - * Process the identifier list in the generic table. - * Extract the ident from the generic table entry and - * write it to the reg file. - */ -static int32_t -ulp_mapper_gen_tbl_ident_scan(struct bnxt_ulp_mapper_parms *parms, - struct bnxt_ulp_mapper_tbl_info *tbl, - struct ulp_mapper_gen_tbl_entry *gen_tbl_ent) -{ - struct bnxt_ulp_mapper_ident_info *idents; - uint32_t i, idx, num_idents = 0; - int32_t rc = 0; - - /* Get the ident list */ - idents = ulp_mapper_ident_fields_get(parms, tbl, &num_idents); - - for (i = 0; i < num_idents; i++) { - /* Extract the index from the result byte data array */ - rc = ulp_mapper_gen_tbl_entry_data_get(gen_tbl_ent, - idents[i].ident_bit_pos, - idents[i].ident_bit_size, - (uint8_t *)&idx, - sizeof(idx)); - - /* validate the extraction */ - if (rc) { - BNXT_TF_DBG(ERR, "failed to read %s:%x:%x\n", - idents[i].description, - idents[i].ident_bit_pos, - idents[i].ident_bit_size); - return -EINVAL; - } - - /* Write it to the regfile */ - if (!ulp_regfile_write(parms->regfile, - idents[i].regfile_idx, idx)) { - BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", - idents[i].regfile_idx); - return -EINVAL; - } - } - return 0; -} - -/* - * Process the identifier list in the generic table. - * Write the ident to the generic table entry - */ -static int32_t -ulp_mapper_gen_tbl_ident_write(struct bnxt_ulp_mapper_parms *parms, - struct bnxt_ulp_mapper_tbl_info *tbl, - struct ulp_mapper_gen_tbl_entry *gen_tbl_ent) -{ - struct bnxt_ulp_mapper_ident_info *idents; - uint32_t i, num_idents = 0; - uint64_t idx; - - /* Get the ident list */ - idents = ulp_mapper_ident_fields_get(parms, tbl, &num_idents); - - for (i = 0; i < num_idents; i++) { - /* read from the regfile */ - if (!ulp_regfile_read(parms->regfile, idents[i].regfile_idx, - &idx)) { - BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", - idents[i].regfile_idx); - return -EINVAL; - } - - /* Update the gen tbl entry with the new data */ - ulp_mapper_gen_tbl_entry_data_set(gen_tbl_ent, - idents[i].ident_bit_pos, - idents[i].ident_bit_size, - (uint8_t *)&idx); - } - return 0; -} - static int32_t ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) { struct bnxt_ulp_mapper_key_field_info *kflds; struct ulp_flow_db_res_params fid_parms; - struct ulp_mapper_gen_tbl_entry gen_tbl_ent; + struct ulp_mapper_gen_tbl_entry gen_tbl_ent, *g; uint16_t tmplen; - struct ulp_blob key; + struct ulp_blob key, data; uint8_t *cache_key; int32_t tbl_idx; uint32_t i, ckey, num_kflds = 0; uint32_t gen_tbl_hit = 0, fdb_write = 0; + uint8_t *byte_data; int32_t rc = 0; /* Get the key fields list and build the key. */ @@ -2265,9 +2341,12 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, case BNXT_ULP_GENERIC_TBL_OPC_READ: /* check the reference count */ if (ULP_GEN_TBL_REF_CNT(&gen_tbl_ent)) { + g = &gen_tbl_ent; /* Scan ident list and create the result blob*/ - rc = ulp_mapper_gen_tbl_ident_scan(parms, tbl, - &gen_tbl_ent); + rc = ulp_mapper_tbl_ident_scan_ext(parms, tbl, + g->byte_data, + g->byte_data_size, + g->byte_order); if (rc) { BNXT_TF_DBG(ERR, "Failed to scan ident list\n"); @@ -2290,11 +2369,26 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, return -EINVAL; /* success */ } - /* Create the result blob from the ident list */ - rc = ulp_mapper_gen_tbl_ident_write(parms, tbl, &gen_tbl_ent); + /* Initialize the blob data */ + if (!ulp_blob_init(&data, tbl->result_bit_size, + BNXT_ULP_BYTE_ORDER_BE)) { + BNXT_TF_DBG(ERR, "Failed initial index table blob\n"); + return -EINVAL; + } + + /* Get the result fields list */ + rc = ulp_mapper_tbl_result_build(parms, tbl, &data, + "Gen tbl Result"); if (rc) { - BNXT_TF_DBG(ERR, - "Failed to write ident list\n"); + BNXT_TF_DBG(ERR, "Failed to build the result blob\n"); + return rc; + } + byte_data = ulp_blob_data_get(&data, &tmplen); + rc = ulp_mapper_gen_tbl_entry_data_set(&gen_tbl_ent, 0, + tmplen, byte_data, + ULP_BITS_2_BYTE(tmplen)); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to write generic table\n"); return -EINVAL; } @@ -2310,7 +2404,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, /* Set the generic entry hit */ rc = ulp_regfile_write(parms->regfile, BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT, - gen_tbl_hit); + tfp_cpu_to_be_64(gen_tbl_hit)); if (!rc) { BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", tbl->index_operand); diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index ddc396b3f9..b9a81d881b 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -3,6 +3,8 @@ * All rights reserved. */ +/* date: Thu Oct 15 17:28:37 2020 */ + #ifndef ULP_TEMPLATE_DB_H_ #define ULP_TEMPLATE_DB_H_ @@ -230,6 +232,26 @@ enum bnxt_ulp_hdr_type { BNXT_ULP_HDR_TYPE_LAST = 3 }; +enum bnxt_ulp_if_tbl_opc { + BNXT_ULP_IF_TBL_OPC_NOT_USED = 0, + BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD = 1, + BNXT_ULP_IF_TBL_OPC_WR_REGFILE = 2, + BNXT_ULP_IF_TBL_OPC_WR_CONST = 3, + BNXT_ULP_IF_TBL_OPC_RD_COMP_FIELD = 4, + BNXT_ULP_IF_TBL_OPC_LAST = 5 +}; + +enum bnxt_ulp_index_tbl_opc { + BNXT_ULP_INDEX_TBL_OPC_NOT_USED = 0, + BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE = 1, + BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE = 2, + BNXT_ULP_INDEX_TBL_OPC_SRCH_ALLOC_WR_REGFILE = 3, + BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE = 4, + BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE = 5, + BNXT_ULP_INDEX_TBL_OPC_RD_REGFILE = 6, + BNXT_ULP_INDEX_TBL_OPC_LAST = 7 +}; + enum bnxt_ulp_index_opcode { BNXT_ULP_INDEX_OPCODE_NOT_USED = 0, BNXT_ULP_INDEX_OPCODE_ALLOCATE = 1, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c index be6149b9ce..73f57409a9 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c @@ -56,8 +56,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -73,7 +73,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 }, { @@ -90,8 +90,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -105,8 +105,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 0, .encap_num_fields = 12, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL, - .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -121,8 +121,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -137,8 +137,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -154,8 +154,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -170,8 +170,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -186,8 +186,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -203,8 +203,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -219,8 +219,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -235,8 +235,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -252,8 +252,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -269,7 +269,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 0, .encap_num_fields = 3, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR }, { @@ -286,8 +286,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 0, .encap_num_fields = 3, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -301,8 +301,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 0, .encap_num_fields = 12, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -317,8 +317,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 12, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -333,8 +333,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -350,8 +350,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -367,8 +367,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -384,7 +384,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 }, { @@ -400,8 +400,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 0, .encap_num_fields = 12, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL, - .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -416,8 +416,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -432,8 +432,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 11, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -449,8 +449,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -467,7 +467,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 0, .encap_num_fields = 12, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, { @@ -483,8 +483,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -501,8 +501,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -519,8 +519,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 11, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR } }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c index 7a22aedf83..fcc5c9e20c 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c @@ -202,8 +202,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 1, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, @@ -250,8 +250,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, }, { /* class_tid: 1, wh_plus, table: parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -261,8 +261,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, { /* class_tid: 1, wh_plus, table: parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -272,8 +272,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, { /* class_tid: 2, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -287,8 +287,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_vfr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, @@ -361,8 +361,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, { /* class_tid: 2, wh_plus, table: parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -372,8 +372,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, { /* class_tid: 2, wh_plus, table: parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -383,8 +383,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, { /* class_tid: 3, wh_plus, table: egr_int_vtag_encap_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -398,8 +398,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_num_fields = 0, .encap_num_fields = 12, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, { /* class_tid: 3, wh_plus, table: egr_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -413,8 +413,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 3, wh_plus, table: egr_l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, @@ -465,8 +465,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 3, wh_plus, table: ing_l2_cntxt_dtagged_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, @@ -551,8 +551,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, - .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, + .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, { /* class_tid: 4, wh_plus, table: egr_parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -562,8 +562,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, - .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, + .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, { /* class_tid: 4, wh_plus, table: egr_parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -573,8 +573,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, - .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, + .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, { /* class_tid: 4, wh_plus, table: ing_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, @@ -588,8 +588,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_VFR_FLAG, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 4, wh_plus, table: ing_l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, @@ -623,8 +623,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_num_fields = 26, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL, - .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP }, { /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, @@ -1824,8 +1825,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .result_num_fields = 1, .encap_num_fields = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, { /* class_tid: 18, wh_plus, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, From patchwork Sun Jun 13 00:06:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94127 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3EA6FA0C41; Sun, 13 Jun 2021 02:11:54 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E72E4411DD; Sun, 13 Jun 2021 02:07:55 +0200 (CEST) Received: from mail-pj1-f46.google.com (mail-pj1-f46.google.com [209.85.216.46]) by mails.dpdk.org (Postfix) with ESMTP id 874F3411F2 for ; Sun, 13 Jun 2021 02:07:53 +0200 (CEST) Received: by mail-pj1-f46.google.com with SMTP id x21-20020a17090aa395b029016e25313bfcso8063224pjp.2 for ; Sat, 12 Jun 2021 17:07:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=XThdR4ECegVVDzpGZaSFfsSZCODhDZvlCgo/ZPJfDnc=; b=ZT4YTkqG5tunkaCzb6H/Ss71e4re83/EmADo9hUqt7/rvFL8l0FhM7sE9GuBXNCtWr PFByNUoGUeuKVMehkFHL4y3g9nn4sf4vVyVnj38IeasDTTNhnblYIfOcuW6pNGIMW9gc qIkqXoWOaZF159cwjZMPS+1+xyEGhPM0h0vfw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=XThdR4ECegVVDzpGZaSFfsSZCODhDZvlCgo/ZPJfDnc=; b=lWzewtVY5LwTturVwdJ5wJeYkDciox+mgYBrTzz6lFvE+lDI2Z8G4l2FqZlVSykOC+ NCWMxShyhjY5lXRmcz9Ws+ri6elhpZL+2z4b+jfSaLTZon5KwOnqAyLk4MdKdIDlt7tq p+D/eiMGJK21w2AO0pUMeAmWzwOCJ8bfQZ5psl+E0qYHnQyIZ85Vv+cCw9WztHZDLuip vyHLGJmSYfvYLeSQa4vCi1uAv7t9Qwo8o5vkJg5RrRH+haeqSG1jLx75elTIEdxOd1MY hzusEr2uOA+0pjltQ8gzMiS2XRWmaPS8khJK8jM2V5gBwiI7RPTQPcXuuD8UVpGayNi4 qRGw== X-Gm-Message-State: AOAM5307f5ikQTfHiLT1kDdC9gh5S33G4bVrK53fWcyMwApF/H3XP8E1 wAnsNNaibQYN1S04W1y1neKvcMMnLUT0YV2/7QflQ9CHBe2lMZHBDQzp0xL4OE40g27IhHX1LHk 9MkvusbmMwtcGVfUJIJ9JxRrOuBH/JAqces/2aornL3dlblTR0V0zwCe5wm7b/SU= X-Google-Smtp-Source: ABdhPJyR7YPEQrxKJyCjs4bXjTS3BQV7wRWw3KPKbC1nmRKs3GD0rn+Rlb12aVDPoLFw4rkDE7Iu/Q== X-Received: by 2002:a17:902:eac1:b029:108:4a7c:ff2d with SMTP id p1-20020a170902eac1b02901084a7cff2dmr10378158pld.62.1623542870980; Sat, 12 Jun 2021 17:07:50 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.48 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:49 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Kishore Padmanabha , Venkat Duvvuru , Douglas Flint , Mike Baucom Date: Sat, 12 Jun 2021 17:06:27 -0700 Message-Id: <20210613000652.28191-34-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 33/58] net/bnxt: add ULP priority opcode processing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kishore Padmanabha Added ULP priority opcode to enable flexibility to the usage of the flow priority. New opcodes help template specify the flow priority accordingly. Signed-off-by: Kishore Padmanabha Signed-off-by: Venkat Duvvuru Reviewed-by: Douglas Flint Reviewed-by: Mike Baucom Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 7 + drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c | 25 +- drivers/net/bnxt/tf_ulp/ulp_flow_db.c | 23 +- drivers/net/bnxt/tf_ulp/ulp_flow_db.h | 3 +- drivers/net/bnxt/tf_ulp/ulp_mapper.c | 92 +- drivers/net/bnxt/tf_ulp/ulp_mapper.h | 1 + .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 75 +- .../tf_ulp/ulp_template_db_stingray_act.c | 833 ++++++++++++++---- .../tf_ulp/ulp_template_db_stingray_class.c | 620 +++++++------ drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c | 12 +- drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h | 12 +- .../bnxt/tf_ulp/ulp_template_db_wh_plus_act.c | 723 ++++++++++++--- .../tf_ulp/ulp_template_db_wh_plus_class.c | 506 ++++++----- drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 18 +- 14 files changed, 1955 insertions(+), 995 deletions(-) diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.h b/drivers/net/bnxt/tf_ulp/bnxt_ulp.h index 330965061a..96aef28b92 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.h +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.h @@ -30,6 +30,13 @@ #define BNXT_ULP_VF_REP_ENABLED 0x1 #define ULP_VF_REP_IS_ENABLED(flag) ((flag) & BNXT_ULP_VF_REP_ENABLED) +enum bnxt_ulp_flow_mem_type { + BNXT_ULP_FLOW_MEM_TYPE_INT = 0, + BNXT_ULP_FLOW_MEM_TYPE_EXT = 1, + BNXT_ULP_FLOW_MEM_TYPE_BOTH = 2, + BNXT_ULP_FLOW_MEM_TYPE_LAST = 3 +}; + struct bnxt_ulp_df_rule_info { uint32_t port_to_app_flow_id; uint32_t app_to_port_flow_id; diff --git a/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c b/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c index 3eddbd6831..de21fc0e20 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c +++ b/drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c @@ -251,7 +251,8 @@ ulp_bulk_get_flow_stats(struct tf *tfp, */ parms.entry_sz_in_bytes = sizeof(uint64_t); stats = (uint64_t *)fc_info->shadow_hw_tbl[dir].mem_va; - parms.physical_mem_addr = (uintptr_t)fc_info->shadow_hw_tbl[dir].mem_pa; + parms.physical_mem_addr = (uint64_t) + ((uintptr_t)(fc_info->shadow_hw_tbl[dir].mem_pa)); if (!stats) { PMD_DRV_LOG(ERR, @@ -588,11 +589,11 @@ int ulp_fc_mgr_query_count_get(struct bnxt_ulp_context *ctxt, if (params.resource_func == BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE && (params.resource_sub_type == - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT || + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT || params.resource_sub_type == - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_COUNT || + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_EXT_COUNT || params.resource_sub_type == - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC)) { + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC)) { found_cntr_resource = true; break; } @@ -606,7 +607,10 @@ int ulp_fc_mgr_query_count_get(struct bnxt_ulp_context *ctxt, dir = params.direction; hw_cntr_id = params.resource_hndl; if (params.resource_sub_type == - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT) { + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT) { + /* TODO: + * Think about optimizing with try_lock later + */ pthread_mutex_lock(&ulp_fc_info->fc_lock); sw_cntr_idx = hw_cntr_id - ulp_fc_info->shadow_hw_tbl[dir].start_idx; @@ -623,11 +627,12 @@ int ulp_fc_mgr_query_count_get(struct bnxt_ulp_context *ctxt, } pthread_mutex_unlock(&ulp_fc_info->fc_lock); } else if (params.resource_sub_type == - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC) { - /* Get stats from the parent child table */ - ulp_flow_db_parent_flow_count_get(ctxt, flow_id, - &count->hits, &count->bytes, - count->reset); + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC) { + /* Get the stats from the parent child table */ + ulp_flow_db_parent_flow_count_get(ctxt, + flow_id, + &count->hits, + &count->bytes); count->hits_set = 1; count->bytes_set = 1; } else { diff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c index 8669edfeba..c599e0c7e1 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c +++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c @@ -720,7 +720,7 @@ ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt, if (params->resource_type == TF_TBL_TYPE_ACT_STATS_64 && params->resource_sub_type == - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT) { + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT) { /* Store the first HW counter ID for this table */ if (!ulp_fc_mgr_start_idx_isset(ulp_ctxt, params->direction)) ulp_fc_mgr_start_idx_set(ulp_ctxt, params->direction, @@ -833,7 +833,7 @@ ulp_flow_db_resource_del(struct bnxt_ulp_context *ulp_ctxt, */ if (params->resource_type == TF_TBL_TYPE_ACT_STATS_64 && params->resource_sub_type == - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT) { + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT) { ulp_fc_mgr_cntr_reset(ulp_ctxt, params->direction, params->resource_hndl); } @@ -1259,7 +1259,7 @@ ulp_default_flow_db_cfa_action_get(struct bnxt_ulp_context *ulp_ctx, uint32_t flow_id, uint16_t *cfa_action) { - uint8_t sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION; + uint8_t sub_typ = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION; struct ulp_flow_db_res_params params; int32_t rc; @@ -1267,7 +1267,7 @@ ulp_default_flow_db_cfa_action_get(struct bnxt_ulp_context *ulp_ctx, BNXT_ULP_FDB_TYPE_DEFAULT, flow_id, BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - sub_type, ¶ms); + sub_typ, ¶ms); if (rc) { BNXT_TF_DBG(ERR, "CFA Action ptr not found for flow id %u\n", flow_id); @@ -1647,7 +1647,7 @@ int32_t ulp_flow_db_parent_flow_create(struct bnxt_ulp_mapper_parms *parms) { struct ulp_flow_db_res_params fid_parms; - uint32_t sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC; + uint32_t sub_typ = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC; struct ulp_flow_db_res_params res_params; int32_t fid_idx, rc; @@ -1676,7 +1676,7 @@ ulp_flow_db_parent_flow_create(struct bnxt_ulp_mapper_parms *parms) BNXT_ULP_FDB_TYPE_REGULAR, parms->fid, BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - sub_type, + sub_typ, &res_params)) { /* Enable the counter accumulation in parent entry */ if (ulp_flow_db_parent_flow_count_accum_set(parms->ulp_ctx, @@ -1708,7 +1708,7 @@ int32_t ulp_flow_db_child_flow_create(struct bnxt_ulp_mapper_parms *parms) { struct ulp_flow_db_res_params fid_parms; - uint32_t sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT; + uint32_t sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT; enum bnxt_ulp_resource_func res_fun; struct ulp_flow_db_res_params res_p; uint32_t parent_fid = parms->parent_fid; @@ -1819,8 +1819,9 @@ ulp_flow_db_parent_flow_count_update(struct bnxt_ulp_context *ulp_ctxt, */ int32_t ulp_flow_db_parent_flow_count_get(struct bnxt_ulp_context *ulp_ctxt, - uint32_t parent_fid, uint64_t *packet_count, - uint64_t *byte_count, uint8_t count_reset) + uint32_t parent_fid, + uint64_t *packet_count, + uint64_t *byte_count) { struct bnxt_ulp_flow_db *flow_db; struct ulp_fdb_parent_child_db *p_pdb; @@ -1841,10 +1842,6 @@ ulp_flow_db_parent_flow_count_get(struct bnxt_ulp_context *ulp_ctxt, p_pdb->parent_flow_tbl[idx].pkt_count; *byte_count = p_pdb->parent_flow_tbl[idx].byte_count; - if (count_reset) { - p_pdb->parent_flow_tbl[idx].pkt_count = 0; - p_pdb->parent_flow_tbl[idx].byte_count = 0; - } } return 0; } diff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.h b/drivers/net/bnxt/tf_ulp/ulp_flow_db.h index 62c914833b..14369271ff 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.h +++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.h @@ -390,8 +390,7 @@ int32_t ulp_flow_db_parent_flow_count_get(struct bnxt_ulp_context *ulp_ctxt, uint32_t parent_fid, uint64_t *packet_count, - uint64_t *byte_count, - uint8_t count_reset); + uint64_t *byte_count); /* * reset the parent accumulation counters diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index b38c834fce..8dc2e18f9f 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -154,7 +154,7 @@ ulp_mapper_resource_index_tbl_alloc(struct bnxt_ulp_context *ulp_ctx, aparms.type = glb_res->resource_type; aparms.dir = glb_res->direction; - aparms.search_enable = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO; + aparms.search_enable = 0; aparms.tbl_scope_id = tbl_scope_id; /* Allocate the index tbl using tf api */ @@ -219,7 +219,7 @@ ulp_mapper_tmpl_reject_list_get(struct bnxt_ulp_mapper_parms *mparms, enum bnxt_ulp_cond_list_opc *opc) { uint32_t idx; - const struct ulp_template_device_tbls *dev_tbls; + const struct bnxt_ulp_template_device_tbls *dev_tbls; dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; *num_tbls = dev_tbls->tmpl_list[tid].reject_info.cond_nums; @@ -236,7 +236,7 @@ ulp_mapper_tbl_execute_list_get(struct bnxt_ulp_mapper_parms *mparms, enum bnxt_ulp_cond_list_opc *opc) { uint32_t idx; - const struct ulp_template_device_tbls *dev_tbls; + const struct bnxt_ulp_template_device_tbls *dev_tbls; dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; *num_tbls = tbl->execute_info.cond_nums; @@ -265,7 +265,7 @@ ulp_mapper_tbl_list_get(struct bnxt_ulp_mapper_parms *mparms, uint32_t *num_tbls) { uint32_t idx; - const struct ulp_template_device_tbls *dev_tbls; + const struct bnxt_ulp_template_device_tbls *dev_tbls; dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; @@ -292,7 +292,7 @@ ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms, uint32_t *num_flds) { uint32_t idx; - const struct ulp_template_device_tbls *dev_tbls; + const struct bnxt_ulp_template_device_tbls *dev_tbls; dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; if (!dev_tbls->key_field_list) { @@ -326,7 +326,7 @@ ulp_mapper_result_fields_get(struct bnxt_ulp_mapper_parms *mparms, uint32_t *num_encap_flds) { uint32_t idx; - const struct ulp_template_device_tbls *dev_tbls; + const struct bnxt_ulp_template_device_tbls *dev_tbls; dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; if (!dev_tbls->result_field_list) { @@ -357,7 +357,7 @@ ulp_mapper_ident_fields_get(struct bnxt_ulp_mapper_parms *mparms, uint32_t *num_flds) { uint32_t idx; - const struct ulp_template_device_tbls *dev_tbls; + const struct bnxt_ulp_template_device_tbls *dev_tbls; dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; if (!dev_tbls->ident_list) { @@ -584,6 +584,36 @@ ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms, return rc; } +/* + * Process the flow database opcode action. + * returns 0 on success. + */ +static int32_t +ulp_mapper_priority_opc_process(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl, + uint32_t *priority) +{ + int32_t rc = 0; + + switch (tbl->pri_opcode) { + case BNXT_ULP_PRI_OPC_NOT_USED: + *priority = 0; + break; + case BNXT_ULP_PRI_OPC_CONST: + *priority = tbl->pri_operand; + break; + case BNXT_ULP_PRI_OPC_APP_PRI: + *priority = parms->app_priority; + break; + default: + BNXT_TF_DBG(ERR, "Priority opcode not supported %d\n", + tbl->pri_opcode); + rc = -EINVAL; + break; + } + return rc; +} + /* * Process the identifier list in the given table. * Extract the ident from the table entry and @@ -1294,11 +1324,11 @@ ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms, { struct ulp_flow_db_res_params fid_parms; uint32_t mark, gfid, mark_flag; - enum bnxt_ulp_mark_db_opcode mark_op = tbl->mark_db_opcode; + enum bnxt_ulp_mark_db_opc mark_op = tbl->mark_db_opcode; int32_t rc = 0; - if (mark_op == BNXT_ULP_MARK_DB_OPCODE_NOP || - !(mark_op == BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION && + if (mark_op == BNXT_ULP_MARK_DB_OPC_NOP || + !(mark_op == BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION && ULP_BITMAP_ISSET(parms->act_bitmap->bits, BNXT_ULP_ACTION_BIT_MARK))) return rc; /* no need to perform gfid process */ @@ -1335,11 +1365,11 @@ ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms, struct ulp_flow_db_res_params fid_parms; uint32_t act_idx, mark, mark_flag; uint64_t val64; - enum bnxt_ulp_mark_db_opcode mark_op = tbl->mark_db_opcode; + enum bnxt_ulp_mark_db_opc mark_op = tbl->mark_db_opcode; int32_t rc = 0; - if (mark_op == BNXT_ULP_MARK_DB_OPCODE_NOP || - !(mark_op == BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION && + if (mark_op == BNXT_ULP_MARK_DB_OPC_NOP || + !(mark_op == BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION && ULP_BITMAP_ISSET(parms->act_bitmap->bits, BNXT_ULP_ACTION_BIT_MARK))) return rc; /* no need to perform mark action process */ @@ -1381,11 +1411,11 @@ ulp_mapper_mark_vfr_idx_process(struct bnxt_ulp_mapper_parms *parms, struct ulp_flow_db_res_params fid_parms; uint32_t act_idx, mark, mark_flag; uint64_t val64; - enum bnxt_ulp_mark_db_opcode mark_op = tbl->mark_db_opcode; + enum bnxt_ulp_mark_db_opc mark_op = tbl->mark_db_opcode; int32_t rc = 0; - if (mark_op == BNXT_ULP_MARK_DB_OPCODE_NOP || - mark_op == BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION) + if (mark_op == BNXT_ULP_MARK_DB_OPC_NOP || + mark_op == BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION) return rc; /* no need to perform mark action process */ /* Get the mark id details from the computed field of dev port id */ @@ -1644,7 +1674,15 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, tmplen, tbl->blob_key_bit_size); return -EINVAL; } - aparms.priority = tbl->priority; + + /* calculate the entry priority */ + rc = ulp_mapper_priority_opc_process(parms, tbl, + &aparms.priority); + if (rc) { + BNXT_TF_DBG(ERR, "entry priority process failed\n"); + return rc; + } + rc = tf_alloc_tcam_entry(tfp, &aparms); if (rc) { BNXT_TF_DBG(ERR, "tcam alloc failed rc=%d.\n", rc); @@ -1662,11 +1700,18 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, searchparms.key = ulp_blob_data_get(&key, &tmplen); searchparms.key_sz_in_bits = tbl->key_bit_size; searchparms.mask = ulp_blob_data_get(&mask, &tmplen); - searchparms.priority = tbl->priority; searchparms.alloc = 1; searchparms.result = ulp_blob_data_get(&data, &tmplen); searchparms.result_sz_in_bits = tbl->result_bit_size; + /* calculate the entry priority */ + rc = ulp_mapper_priority_opc_process(parms, tbl, + &searchparms.priority); + if (rc) { + BNXT_TF_DBG(ERR, "entry priority process failed\n"); + return rc; + } + rc = tf_search_tcam_entry(tfp, &searchparms); if (rc) { BNXT_TF_DBG(ERR, "tcam search failed rc=%d\n", rc); @@ -1969,7 +2014,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, BNXT_TF_DBG(ERR, "Failed to get tbl idx from Global " "regfile[%d].\n", - tbl->index_operand); + tbl->tbl_operand); return -EINVAL; } index = tfp_be_to_cpu_64(regval); @@ -2407,7 +2452,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, tfp_cpu_to_be_64(gen_tbl_hit)); if (!rc) { BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", - tbl->index_operand); + BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT); return -EIO; } @@ -2482,15 +2527,15 @@ ulp_mapper_tbl_memtype_opcode_process(struct bnxt_ulp_mapper_parms *parms, bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype); switch (tbl->mem_type_opcode) { - case BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT: + case BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT: if (mtype == BNXT_ULP_FLOW_MEM_TYPE_INT) rc = 0; break; - case BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT: + case BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT: if (mtype == BNXT_ULP_FLOW_MEM_TYPE_EXT) rc = 0; break; - case BNXT_ULP_MEM_TYPE_OPCODE_NOP: + case BNXT_ULP_MEM_TYPE_OPC_NOP: rc = 0; break; default: @@ -3031,6 +3076,7 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx, parms.parent_fid = cparms->parent_fid; parms.fid = cparms->flow_id; parms.tun_idx = cparms->tun_idx; + parms.app_priority = cparms->app_priority; /* Get the device id from the ulp context */ if (bnxt_ulp_cntxt_dev_id_get(ulp_ctx, &parms.dev_id)) { diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h index 4c423d2374..bef72696d3 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h @@ -56,6 +56,7 @@ struct bnxt_ulp_mapper_parms { uint32_t parent_fid; uint32_t parent_flow; uint8_t tun_idx; + uint32_t app_priority; }; struct bnxt_ulp_mapper_create_parms { diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index b9a81d881b..6bb26f0ad5 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -26,7 +26,6 @@ #define BNXT_ULP_ACT_HID_SHFTR 23 #define BNXT_ULP_ACT_HID_SHFTL 23 #define BNXT_ULP_ACT_HID_MASK 4095 -#define BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM 2 #define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 8 #define BNXT_ULP_GLB_TEMPLATE_TBL_MAX_SZ 1 #define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7 @@ -201,13 +200,6 @@ enum bnxt_ulp_fdb_opc { BNXT_ULP_FDB_OPC_LAST = 4 }; -enum bnxt_ulp_flow_mem_type { - BNXT_ULP_FLOW_MEM_TYPE_INT = 0, - BNXT_ULP_FLOW_MEM_TYPE_EXT = 1, - BNXT_ULP_FLOW_MEM_TYPE_BOTH = 2, - BNXT_ULP_FLOW_MEM_TYPE_LAST = 3 -}; - enum bnxt_ulp_generic_tbl_opc { BNXT_ULP_GENERIC_TBL_OPC_NOT_USED = 0, BNXT_ULP_GENERIC_TBL_OPC_READ = 1, @@ -252,15 +244,6 @@ enum bnxt_ulp_index_tbl_opc { BNXT_ULP_INDEX_TBL_OPC_LAST = 7 }; -enum bnxt_ulp_index_opcode { - BNXT_ULP_INDEX_OPCODE_NOT_USED = 0, - BNXT_ULP_INDEX_OPCODE_ALLOCATE = 1, - BNXT_ULP_INDEX_OPCODE_GLOBAL = 2, - BNXT_ULP_INDEX_OPCODE_COMP_FIELD = 3, - BNXT_ULP_INDEX_OPCODE_CONSTANT = 4, - BNXT_ULP_INDEX_OPCODE_LAST = 5 -}; - enum bnxt_ulp_mapper_opc { BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT = 0, BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD = 1, @@ -278,11 +261,11 @@ enum bnxt_ulp_mapper_opc { BNXT_ULP_MAPPER_OPC_LAST = 13 }; -enum bnxt_ulp_mark_db_opcode { - BNXT_ULP_MARK_DB_OPCODE_NOP = 0, - BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION = 1, - BNXT_ULP_MARK_DB_OPCODE_SET_VFR_FLAG = 2, - BNXT_ULP_MARK_DB_OPCODE_LAST = 3 +enum bnxt_ulp_mark_db_opc { + BNXT_ULP_MARK_DB_OPC_NOP = 0, + BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION = 1, + BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG = 2, + BNXT_ULP_MARK_DB_OPC_LAST = 3 }; enum bnxt_ulp_match_type { @@ -291,24 +274,18 @@ enum bnxt_ulp_match_type { BNXT_ULP_MATCH_TYPE_LAST = 2 }; -enum bnxt_ulp_mem_type_opcode { - BNXT_ULP_MEM_TYPE_OPCODE_NOP = 0, - BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT = 1, - BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT = 2, - BNXT_ULP_MEM_TYPE_OPCODE_LAST = 3 +enum bnxt_ulp_mem_type_opc { + BNXT_ULP_MEM_TYPE_OPC_NOP = 0, + BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT = 1, + BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT = 2, + BNXT_ULP_MEM_TYPE_OPC_LAST = 3 }; -enum bnxt_ulp_priority { - BNXT_ULP_PRIORITY_LEVEL_0 = 0, - BNXT_ULP_PRIORITY_LEVEL_1 = 1, - BNXT_ULP_PRIORITY_LEVEL_2 = 2, - BNXT_ULP_PRIORITY_LEVEL_3 = 3, - BNXT_ULP_PRIORITY_LEVEL_4 = 4, - BNXT_ULP_PRIORITY_LEVEL_5 = 5, - BNXT_ULP_PRIORITY_LEVEL_6 = 6, - BNXT_ULP_PRIORITY_LEVEL_7 = 7, - BNXT_ULP_PRIORITY_NOT_USED = 8, - BNXT_ULP_PRIORITY_LAST = 9 +enum bnxt_ulp_pri_opc { + BNXT_ULP_PRI_OPC_NOT_USED = 0, + BNXT_ULP_PRI_OPC_CONST = 1, + BNXT_ULP_PRI_OPC_APP_PRI = 2, + BNXT_ULP_PRI_OPC_LAST = 3 }; enum bnxt_ulp_regfile_index { @@ -352,13 +329,6 @@ enum bnxt_ulp_tcam_tbl_opc { BNXT_ULP_TCAM_TBL_OPC_LAST = 3 }; -enum bnxt_ulp_search_before_alloc { - BNXT_ULP_SEARCH_BEFORE_ALLOC_NO = 0, - BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP = 1, - BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE = 2, - BNXT_ULP_SEARCH_BEFORE_ALLOC_LAST = 3 -}; - enum bnxt_ulp_template_type { BNXT_ULP_TEMPLATE_TYPE_CLASS = 0, BNXT_ULP_TEMPLATE_TYPE_ACTION = 1, @@ -403,13 +373,14 @@ enum bnxt_ulp_resource_func { enum bnxt_ulp_resource_sub_type { BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED = 0, - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL = 0, - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION = 1, - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT = 2, - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC = 3, - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_COUNT = 4, - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM = 0, - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM = 1 + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL = 0, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION = 1, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT = 2, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC = 3, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_EXT_COUNT = 4, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM = 0, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM = 1, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL = 2 }; enum bnxt_ulp_sym { diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c index 6ad6263183..eb71b5053c 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c @@ -3,37 +3,52 @@ * All rights reserved. */ +/* date: Thu Oct 15 17:28:37 2020 */ + #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" #include "ulp_rte_parser.h" -struct bnxt_ulp_mapper_tbl_list_info ulp_stingray_act_tmpl_list[] = { +/* Mapper templates for header act list */ +struct bnxt_ulp_mapper_tmpl_info ulp_stingray_act_tmpl_list[] = { + /* act-ing-[dec_ttl, count, nat]:1 */ + /* act_tid: 1, stingray, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 0 }, + /* act-ing-[drop, pop_vlan, push_vlan, dec_ttl, count, vxlan_decap]:2 */ + /* act_tid: 2, stingray, ingress */ [2] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 3, .start_tbl_idx = 6 }, + /* act-ing-[mark, rss, count, pop_vlan, vxlan_decap]:3 */ + /* act_tid: 3, stingray, ingress */ [3] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 3, .start_tbl_idx = 9 }, + /* act_egr-[vxlan_encap, count]:4 */ + /* act_tid: 4, stingray, egress */ [4] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 12 }, + /* act-egr-[dec_ttl, count, nat]:5 */ + /* act_tid: 5, stingray, egress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, .start_tbl_idx = 18 }, + /* act-egr-[drop, push_vlan, dec_ttl, count]:6 */ + /* act_tid: 6, stingray, egress */ [6] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 5, @@ -42,495 +57,470 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_stingray_act_tmpl_list[] = { }; struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { - { + { /* act_tid: 1, stingray, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 0, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 1, stingray, table: int_act_modify_ipv4_src_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 1, .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 }, - { + { /* act_tid: 1, stingray, table: int_act_modify_ipv4_dst_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 2, .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 }, - { + { /* act_tid: 1, stingray, table: int_encap_mac_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 3, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL, - .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR }, - { + { /* act_tid: 1, stingray, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 15, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 1, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 41, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 2, stingray, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 67, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 2, stingray, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 68, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 2, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 94, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 3, stingray, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 120, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 3, stingray, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 121, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 3, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 147, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 4, stingray, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 173, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 4, stingray, table: int_sp_smac_ipv4_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, .result_start_idx = 174, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 3, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR }, - { + { /* act_tid: 4, stingray, table: int_sp_smac_ipv6_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, .result_start_idx = 177, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 3, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR }, - { + { /* act_tid: 4, stingray, table: int_tun_encap_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, .result_start_idx = 180, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, - { + { /* act_tid: 4, stingray, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 192, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 4, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 230, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 5, stingray, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 256, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 5, stingray, table: int_act_modify_ipv4_src_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 257, .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 }, - { + { /* act_tid: 5, stingray, table: int_act_modify_ipv4_dst_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 258, .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 }, - { + { /* act_tid: 5, stingray, table: int_encap_mac_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 259, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL, - .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR }, - { + { /* act_tid: 5, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 271, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 5, stingray, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 297, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 11, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 6, stingray, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 334, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 6, stingray, table: int_vtag_encap_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 335, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, - { + { /* act_tid: 6, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 347, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 6, stingray, table: ext_full_act_record_no_tag_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 373, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 6, stingray, table: ext_full_act_record_one_tag_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 399, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 11, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR } }; struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = { + /* act_tid: 1, stingray, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 1, stingray, table: int_act_modify_ipv4_src_0 */ { + .description = "ipv4_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -539,7 +529,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 1, stingray, table: int_act_modify_ipv4_dst_0 */ { + .description = "ipv4_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -548,19 +540,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 1, stingray, table: int_encap_mac_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -569,40 +566,50 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "spare", .field_bit_size = 80, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 1, stingray, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -612,18 +619,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -638,22 +649,27 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -663,12 +679,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -678,6 +696,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -697,6 +716,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -706,6 +726,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -725,18 +746,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -746,6 +771,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -755,6 +781,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -773,6 +800,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -782,22 +810,28 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 1, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -807,18 +841,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -833,18 +871,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -854,6 +896,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -863,6 +906,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -882,6 +926,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -891,6 +936,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -910,18 +956,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -931,6 +981,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -940,6 +991,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -958,6 +1010,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -967,34 +1020,44 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 2, stingray, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 2, stingray, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1004,18 +1067,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1030,30 +1097,37 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1063,6 +1137,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -1082,6 +1157,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1091,6 +1167,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -1110,18 +1187,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -1131,6 +1212,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -1140,6 +1222,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -1156,6 +1239,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1165,6 +1249,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1179,14 +1264,17 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1200,7 +1288,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 2, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1210,18 +1300,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1236,18 +1330,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1257,6 +1355,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1266,6 +1365,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -1285,6 +1385,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1294,6 +1395,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -1313,18 +1415,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -1334,6 +1440,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -1343,6 +1450,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -1359,6 +1467,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1368,6 +1477,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1382,14 +1492,17 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1404,18 +1517,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 3, stingray, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 3, stingray, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1425,18 +1544,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1451,66 +1574,82 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -1527,6 +1666,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1536,6 +1676,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1550,18 +1691,23 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 3, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1571,18 +1717,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1597,58 +1747,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -1665,6 +1829,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1674,6 +1839,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1688,30 +1854,39 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 4, stingray, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 4, stingray, table: int_sp_smac_ipv4_0 */ { + .description = "smac", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1721,6 +1896,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1730,10 +1906,13 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 4, stingray, table: int_sp_smac_ipv6_0 */ { + .description = "smac", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1743,6 +1922,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1752,10 +1932,13 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 4, stingray, table: int_tun_encap_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -1764,6 +1947,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -1772,6 +1956,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1781,12 +1966,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1796,16 +1983,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_l2_dmac", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1815,6 +2005,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_vtag", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -1826,6 +2017,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_ip", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -1837,6 +2029,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_udp", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1846,6 +2039,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_tun", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -1856,7 +2050,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 4, stingray, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1866,18 +2062,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1892,70 +2092,87 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1965,22 +2182,27 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -1989,6 +2211,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -1997,6 +2220,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2006,12 +2230,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2021,16 +2247,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_l2_dmac", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2040,6 +2269,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_vtag", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -2051,6 +2281,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_ip", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -2062,6 +2293,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_udp", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2071,6 +2303,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_tun", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -2081,7 +2314,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 4, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2091,18 +2326,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2117,18 +2356,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2138,46 +2381,57 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2187,34 +2441,44 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 5, stingray, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 5, stingray, table: int_act_modify_ipv4_src_0 */ { + .description = "ipv4_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2223,7 +2487,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 5, stingray, table: int_act_modify_ipv4_dst_0 */ { + .description = "ipv4_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2232,19 +2498,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 5, stingray, table: int_encap_mac_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -2253,40 +2524,50 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "spare", .field_bit_size = 80, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 5, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2296,18 +2577,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2322,18 +2607,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -2343,6 +2632,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2352,6 +2642,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -2371,6 +2662,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2380,6 +2672,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -2399,18 +2692,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2420,6 +2717,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2429,6 +2727,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -2447,6 +2746,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2456,30 +2756,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 5, stingray, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2489,18 +2797,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2515,30 +2827,37 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2548,6 +2867,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -2567,6 +2887,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2576,6 +2897,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -2595,18 +2917,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2616,6 +2942,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2625,6 +2952,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -2643,6 +2971,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2652,34 +2981,42 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -2688,56 +3025,71 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 6, stingray, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 6, stingray, table: int_vtag_encap_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -2746,16 +3098,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2765,6 +3120,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2774,10 +3130,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2787,10 +3145,13 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "spare", .field_bit_size = 80, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 6, stingray, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2800,18 +3161,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2826,18 +3191,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2847,34 +3216,42 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2884,6 +3261,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2893,10 +3271,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2906,18 +3286,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2932,14 +3316,18 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 6, stingray, table: ext_full_act_record_no_tag_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2949,18 +3337,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2975,58 +3367,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -3036,6 +3442,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -3045,10 +3452,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -3058,18 +3467,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -3083,7 +3496,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 6, stingray, table: ext_full_act_record_one_tag_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -3093,18 +3508,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -3119,58 +3538,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -3180,6 +3613,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -3189,10 +3623,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -3202,6 +3638,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -3216,14 +3653,17 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -3238,22 +3678,27 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -3262,16 +3707,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -3281,6 +3729,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -3290,10 +3739,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c index c11d1ad96d..53ba637d4e 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c @@ -11,7 +11,7 @@ #include "ulp_rte_parser.h" /* Mapper templates for header class list */ -struct bnxt_ulp_mapper_tbl_list_info ulp_stingray_class_tmpl_list[] = { +struct bnxt_ulp_mapper_tmpl_info ulp_stingray_class_tmpl_list[] = { /* default-vfr-[port_to_vs]:1 */ /* class_tid: 1, stingray, ingress */ [1] = { @@ -194,22 +194,21 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 0, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_RX, .key_start_idx = 0, .blob_key_bit_size = 12, @@ -226,8 +225,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -238,7 +237,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 1, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 1, stingray, table: parif_def_lkup_arec_ptr_0 */ @@ -249,8 +248,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, { /* class_tid: 1, stingray, table: parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -260,8 +259,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, { /* class_tid: 1, stingray, table: parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -271,23 +270,22 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF }, { /* class_tid: 2, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 43, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, @@ -295,8 +293,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 14, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -307,14 +305,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 1, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, @@ -335,8 +333,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 28, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -347,7 +345,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 2, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 2, stingray, table: parif_def_lkup_arec_ptr_0 */ @@ -358,8 +356,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, { /* class_tid: 2, stingray, table: parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -369,8 +367,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, { /* class_tid: 2, stingray, table: parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -380,44 +378,42 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_COMP_FIELD, - .index_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF }, { /* class_tid: 3, stingray, table: egr_int_vtag_encap_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 99, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, { /* class_tid: 3, stingray, table: egr_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 111, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 3, stingray, table: egr_l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, .key_start_idx = 41, .blob_key_bit_size = 12, @@ -434,8 +430,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 42, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -446,30 +442,29 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 2, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 3, stingray, table: ing_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 150, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 3, stingray, table: ing_l2_cntxt_dtagged_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 55, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -480,15 +475,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 2, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 3, stingray, table: ing_l2_cntxt_stagged_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 68, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -499,14 +494,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 2, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, .key_start_idx = 81, .blob_key_bit_size = 12, @@ -523,8 +518,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 82, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -535,7 +530,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 3, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 4, stingray, table: egr_parif_def_lkup_arec_ptr_0 */ @@ -546,8 +541,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, - .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, + .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, { /* class_tid: 4, stingray, table: egr_parif_def_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -557,8 +552,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, - .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, + .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, { /* class_tid: 4, stingray, table: egr_parif_def_err_arec_ptr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, @@ -568,30 +563,29 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .index_opcode = BNXT_ULP_INDEX_OPCODE_CONSTANT, - .index_operand = BNXT_ULP_SYM_VF_FUNC_PARIF + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, + .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF }, { /* class_tid: 4, stingray, table: ing_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 219, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_VFR_FLAG, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, { /* class_tid: 4, stingray, table: ing_l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 95, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -602,30 +596,29 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 3, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 5, stingray, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 258, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL, - .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR }, { /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 108, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -636,14 +629,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 3, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 121, .blob_key_bit_size = 16, @@ -660,8 +653,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_1, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 1, .key_start_idx = 124, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -672,13 +665,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 5, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 6, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 167, .blob_key_bit_size = 448, @@ -690,13 +683,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 5, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 6, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 178, .blob_key_bit_size = 200, @@ -708,15 +701,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 5, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 189, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -727,14 +720,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 5, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 202, .blob_key_bit_size = 16, @@ -751,8 +744,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_1, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 1, .key_start_idx = 205, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -763,13 +756,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 7, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 7, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 248, .blob_key_bit_size = 448, @@ -781,13 +774,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 7, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 7, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 259, .blob_key_bit_size = 200, @@ -799,14 +792,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 7, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_RX, .key_start_idx = 270, .blob_key_bit_size = 12, @@ -823,8 +816,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 271, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -835,14 +828,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 8, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 284, .blob_key_bit_size = 16, @@ -859,8 +852,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 287, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -871,13 +864,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 9, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 8, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 330, .blob_key_bit_size = 448, @@ -889,13 +882,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 9, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 8, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 341, .blob_key_bit_size = 200, @@ -907,14 +900,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 9, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_RX, .key_start_idx = 352, .blob_key_bit_size = 12, @@ -931,8 +924,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 353, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -943,14 +936,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 10, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 366, .blob_key_bit_size = 16, @@ -967,8 +960,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 369, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -979,13 +972,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 11, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 9, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 412, .blob_key_bit_size = 448, @@ -997,13 +990,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 11, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 9, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 423, .blob_key_bit_size = 200, @@ -1015,14 +1008,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 11, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_RX, .key_start_idx = 434, .blob_key_bit_size = 12, @@ -1039,8 +1032,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 435, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1051,14 +1044,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 12, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 448, .blob_key_bit_size = 16, @@ -1075,8 +1068,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 451, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1087,13 +1080,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 13, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 10, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 494, .blob_key_bit_size = 448, @@ -1105,13 +1098,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 13, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 10, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 505, .blob_key_bit_size = 392, @@ -1123,14 +1116,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 13, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_RX, .key_start_idx = 516, .blob_key_bit_size = 12, @@ -1147,8 +1140,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 517, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1159,14 +1152,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 14, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 530, .blob_key_bit_size = 16, @@ -1183,8 +1176,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 533, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1195,13 +1188,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 15, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 11, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 576, .blob_key_bit_size = 448, @@ -1213,13 +1206,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 15, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 11, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 587, .blob_key_bit_size = 392, @@ -1231,15 +1224,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 15, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 598, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1250,14 +1243,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 15, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 611, .blob_key_bit_size = 16, @@ -1274,8 +1267,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 614, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1286,13 +1279,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 17, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 12, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 657, .blob_key_bit_size = 448, @@ -1304,13 +1297,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 17, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 12, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 668, .blob_key_bit_size = 200, @@ -1322,15 +1315,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 17, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 679, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1341,14 +1334,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 17, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 692, .blob_key_bit_size = 16, @@ -1365,8 +1358,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 695, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1377,13 +1370,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 19, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 13, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 738, .blob_key_bit_size = 448, @@ -1395,13 +1388,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 19, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 13, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 749, .blob_key_bit_size = 200, @@ -1413,15 +1406,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 19, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 760, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1432,14 +1425,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 19, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 773, .blob_key_bit_size = 16, @@ -1456,8 +1449,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 776, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1468,13 +1461,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 21, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 14, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 819, .blob_key_bit_size = 448, @@ -1486,13 +1479,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 21, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 14, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 830, .blob_key_bit_size = 392, @@ -1504,15 +1497,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 21, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 841, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1523,14 +1516,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 21, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 854, .blob_key_bit_size = 16, @@ -1547,8 +1540,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 857, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1559,13 +1552,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 23, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 15, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 900, .blob_key_bit_size = 448, @@ -1577,13 +1570,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 23, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 15, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 911, .blob_key_bit_size = 392, @@ -1595,15 +1588,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 23, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 922, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1614,14 +1607,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 23, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 935, .blob_key_bit_size = 16, @@ -1638,8 +1631,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 938, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1650,13 +1643,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 25, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 16, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 981, .blob_key_bit_size = 448, @@ -1668,13 +1661,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 25, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 16, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 992, .blob_key_bit_size = 200, @@ -1686,15 +1679,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 25, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1003, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1705,14 +1698,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 25, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 1016, .blob_key_bit_size = 16, @@ -1729,8 +1722,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1019, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1741,13 +1734,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 27, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 17, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 1062, .blob_key_bit_size = 448, @@ -1759,13 +1752,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 27, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 17, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 1073, .blob_key_bit_size = 392, @@ -1777,32 +1770,31 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 27, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 18, stingray, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 768, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, - .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE, - .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, { /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1084, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1813,14 +1805,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 27, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 1097, .blob_key_bit_size = 16, @@ -1837,8 +1829,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1100, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1849,15 +1841,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 30, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 18, stingray, table: wm_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1143, .blob_key_bit_size = 192, .key_bit_size = 160, @@ -1868,15 +1860,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 30, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1148, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1887,14 +1879,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 30, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 1161, .blob_key_bit_size = 16, @@ -1911,8 +1903,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1164, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1923,13 +1915,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 33, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 19, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 1207, .blob_key_bit_size = 112, @@ -1941,13 +1933,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 33, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 19, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 1215, .blob_key_bit_size = 448, @@ -1959,14 +1951,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 33, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1223, .blob_key_bit_size = 12, @@ -1983,8 +1975,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1224, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -1995,14 +1987,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 34, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1237, .blob_key_bit_size = 16, @@ -2019,8 +2011,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1240, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2031,13 +2023,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 35, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 20, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1283, .blob_key_bit_size = 448, @@ -2049,13 +2041,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 35, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 20, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1294, .blob_key_bit_size = 200, @@ -2067,14 +2059,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 35, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1305, .blob_key_bit_size = 12, @@ -2091,8 +2083,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1306, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -2103,14 +2095,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 36, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1319, .blob_key_bit_size = 16, @@ -2127,8 +2119,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1322, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2139,13 +2131,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 37, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 21, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1365, .blob_key_bit_size = 448, @@ -2157,13 +2149,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 37, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 21, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1376, .blob_key_bit_size = 200, @@ -2175,14 +2167,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 37, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1387, .blob_key_bit_size = 12, @@ -2199,8 +2191,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1388, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -2211,14 +2203,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 38, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1401, .blob_key_bit_size = 16, @@ -2235,8 +2227,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1404, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2247,13 +2239,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 39, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 22, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1447, .blob_key_bit_size = 448, @@ -2265,13 +2257,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 39, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 22, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1458, .blob_key_bit_size = 392, @@ -2283,14 +2275,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 39, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1469, .blob_key_bit_size = 12, @@ -2307,8 +2299,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1470, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -2319,14 +2311,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 40, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1483, .blob_key_bit_size = 16, @@ -2343,8 +2335,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1486, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2355,13 +2347,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 41, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 23, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1529, .blob_key_bit_size = 448, @@ -2373,13 +2365,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 41, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 23, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1540, .blob_key_bit_size = 392, @@ -2391,15 +2383,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 41, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1551, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -2410,14 +2402,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 41, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1564, .blob_key_bit_size = 16, @@ -2434,8 +2426,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1567, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2446,13 +2438,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 43, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 24, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1610, .blob_key_bit_size = 448, @@ -2464,13 +2456,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 43, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 24, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1617, .blob_key_bit_size = 104, @@ -2482,15 +2474,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 43, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1624, .blob_key_bit_size = 171, .key_bit_size = 171, @@ -2501,14 +2493,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 43, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1637, .blob_key_bit_size = 16, @@ -2525,8 +2517,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1640, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2537,13 +2529,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 45, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 25, stingray, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1683, .blob_key_bit_size = 448, @@ -2555,13 +2547,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 45, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 25, stingray, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1690, .blob_key_bit_size = 104, @@ -2573,7 +2565,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 45, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES } }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c index 4fe90d8bb9..bb48ad284a 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c @@ -547,26 +547,26 @@ struct bnxt_ulp_rte_act_info ulp_act_info[] = { /* Specifies parameters for the generic tables */ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { - [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM << 1 | + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM << 1 | TF_DIR_RX] = { .result_num_entries = 16384, .result_byte_size = 6, .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, - [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM << 1 | + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM << 1 | TF_DIR_TX] = { .result_num_entries = 16384, .result_byte_size = 6, .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, - [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM << 1 | + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM << 1 | TF_DIR_RX] = { .result_num_entries = 16384, .result_byte_size = 6, .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, - [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM << 1 | + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM << 1 | TF_DIR_TX] = { .result_num_entries = 16384, .result_byte_size = 6, @@ -575,7 +575,7 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { }; /* device tables */ -const struct ulp_template_device_tbls ulp_template_stingray_tbls[] = { +const struct bnxt_ulp_template_device_tbls ulp_template_stingray_tbls[] = { [BNXT_ULP_TEMPLATE_TYPE_CLASS] = { .tmpl_list = ulp_stingray_class_tmpl_list, .tbl_list = ulp_stingray_class_tbl_list, @@ -591,7 +591,7 @@ const struct ulp_template_device_tbls ulp_template_stingray_tbls[] = { }; /* device tables */ -const struct ulp_template_device_tbls ulp_template_wh_plus_tbls[] = { +const struct bnxt_ulp_template_device_tbls ulp_template_wh_plus_tbls[] = { [BNXT_ULP_TEMPLATE_TYPE_CLASS] = { .tmpl_list = ulp_wh_plus_class_tmpl_list, .tbl_list = ulp_wh_plus_class_tbl_list, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h index a656f3da52..727818bede 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h @@ -3,12 +3,15 @@ * All rights reserved. */ +/* date: Mon Sep 21 14:21:33 2020 */ + #ifndef ULP_TEMPLATE_DB_TBL_H_ #define ULP_TEMPLATE_DB_TBL_H_ #include "ulp_template_struct.h" -extern struct bnxt_ulp_mapper_tbl_list_info ulp_wh_plus_class_tmpl_list[]; +/* WH_PLUS template table declarations */ +extern struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[]; extern struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[]; @@ -20,14 +23,15 @@ bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[]; extern struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[]; -extern struct bnxt_ulp_mapper_tbl_list_info ulp_wh_plus_act_tmpl_list[]; +extern struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[]; extern struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[]; extern struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[]; -extern struct bnxt_ulp_mapper_tbl_list_info ulp_stingray_class_tmpl_list[]; +/* STINGRAY template table declarations */ +extern struct bnxt_ulp_mapper_tmpl_info ulp_stingray_class_tmpl_list[]; extern struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[]; @@ -39,7 +43,7 @@ bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]; extern struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[]; -extern struct bnxt_ulp_mapper_tbl_list_info ulp_stingray_act_tmpl_list[]; +extern struct bnxt_ulp_mapper_tmpl_info ulp_stingray_act_tmpl_list[]; extern struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[]; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c index 73f57409a9..40b1088325 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c @@ -3,37 +3,52 @@ * All rights reserved. */ +/* date: Thu Oct 15 17:28:37 2020 */ + #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" #include "ulp_rte_parser.h" -struct bnxt_ulp_mapper_tbl_list_info ulp_wh_plus_act_tmpl_list[] = { +/* Mapper templates for header act list */ +struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = { + /* act-ing-[dec_ttl, count, nat]:1 */ + /* act_tid: 1, wh_plus, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 0 }, + /* act-ing-[drop, pop_vlan, push_vlan, dec_ttl, count, vxlan_decap]:2 */ + /* act_tid: 2, wh_plus, ingress */ [2] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 3, .start_tbl_idx = 6 }, + /* act-ing-[mark, rss, count, pop_vlan, vxlan_decap]:3 */ + /* act_tid: 3, wh_plus, ingress */ [3] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 3, .start_tbl_idx = 9 }, + /* act_egr-[vxlan_encap, count]:4 */ + /* act_tid: 4, wh_plus, egress */ [4] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 12 }, + /* act-egr-[dec_ttl, count, nat]:5 */ + /* act_tid: 5, wh_plus, egress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, .start_tbl_idx = 18 }, + /* act-egr-[drop, push_vlan, dec_ttl, count]:6 */ + /* act_tid: 6, wh_plus, egress */ [6] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 5, @@ -42,494 +57,469 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_wh_plus_act_tmpl_list[] = { }; struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { - { + { /* act_tid: 1, wh_plus, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 0, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 1, wh_plus, table: int_act_modify_ipv4_src_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 1, .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 }, - { + { /* act_tid: 1, wh_plus, table: int_act_modify_ipv4_dst_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 2, .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 }, - { + { /* act_tid: 1, wh_plus, table: int_encap_mac_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 3, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR }, - { + { /* act_tid: 1, wh_plus, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 15, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 1, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 41, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 2, wh_plus, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 67, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 2, wh_plus, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 68, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 2, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 94, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 3, wh_plus, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 120, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 3, wh_plus, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 121, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 3, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 147, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 4, wh_plus, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 173, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 4, wh_plus, table: int_sp_smac_ipv4_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, .result_start_idx = 174, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 3, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR }, - { + { /* act_tid: 4, wh_plus, table: int_sp_smac_ipv6_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, .result_start_idx = 177, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 3, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR }, - { + { /* act_tid: 4, wh_plus, table: int_tun_encap_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP, .result_start_idx = 180, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, - { + { /* act_tid: 4, wh_plus, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 192, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 4, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 230, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 5, wh_plus, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 256, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 5, wh_plus, table: int_act_modify_ipv4_src_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 257, .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 }, - { + { /* act_tid: 5, wh_plus, table: int_act_modify_ipv4_dst_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 258, .result_bit_size = 32, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 + .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 }, - { + { /* act_tid: 5, wh_plus, table: int_encap_mac_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 259, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR }, - { + { /* act_tid: 5, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 271, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 5, wh_plus, table: ext_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 297, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 11, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 6, wh_plus, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 334, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, - { + { /* act_tid: 6, wh_plus, table: int_vtag_encap_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 335, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, - { + { /* act_tid: 6, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 347, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 6, wh_plus, table: ext_full_act_record_no_tag_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 373, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, - { + { /* act_tid: 6, wh_plus, table: ext_full_act_record_one_tag_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 399, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 11, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR } }; struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { + /* act_tid: 1, wh_plus, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 1, wh_plus, table: int_act_modify_ipv4_src_0 */ { + .description = "ipv4_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -538,7 +528,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 1, wh_plus, table: int_act_modify_ipv4_dst_0 */ { + .description = "ipv4_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -547,19 +539,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 1, wh_plus, table: int_encap_mac_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -568,40 +565,50 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "spare", .field_bit_size = 80, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 1, wh_plus, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -611,18 +618,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -637,22 +648,27 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -662,12 +678,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -677,6 +695,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -696,6 +715,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -705,6 +725,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -724,18 +745,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -745,6 +770,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -754,6 +780,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -772,6 +799,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -781,22 +809,28 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 1, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -806,18 +840,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -832,18 +870,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -853,6 +895,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -862,6 +905,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -881,6 +925,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -890,6 +935,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -909,18 +955,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -930,6 +980,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -939,6 +990,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -957,6 +1009,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -966,34 +1019,44 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 2, wh_plus, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 2, wh_plus, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1003,18 +1066,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1029,30 +1096,37 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1062,6 +1136,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -1081,6 +1156,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1090,6 +1166,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -1109,18 +1186,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -1130,6 +1211,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -1139,6 +1221,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -1155,6 +1238,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1164,6 +1248,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1178,14 +1263,17 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1199,7 +1287,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 2, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1209,18 +1299,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1235,18 +1329,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1256,6 +1354,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1265,6 +1364,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -1284,6 +1384,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1293,6 +1394,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -1312,18 +1414,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -1333,6 +1439,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -1342,6 +1449,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -1358,6 +1466,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1367,6 +1476,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1381,14 +1491,17 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1403,18 +1516,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 3, wh_plus, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 3, wh_plus, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1424,18 +1543,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1450,66 +1573,82 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -1526,6 +1665,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1535,6 +1675,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1549,18 +1690,23 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 3, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1570,18 +1716,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1596,58 +1746,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -1664,6 +1828,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1673,6 +1838,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1687,30 +1853,39 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 4, wh_plus, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 4, wh_plus, table: int_sp_smac_ipv4_0 */ { + .description = "smac", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1720,6 +1895,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv4_src_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1729,10 +1905,13 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 4, wh_plus, table: int_sp_smac_ipv6_0 */ { + .description = "smac", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1742,6 +1921,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ipv6_src_addr", .field_bit_size = 128, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1751,10 +1931,13 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 4, wh_plus, table: int_tun_encap_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -1763,6 +1946,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -1771,6 +1955,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1780,12 +1965,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1795,16 +1982,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_l2_dmac", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1814,6 +2004,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_vtag", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -1825,6 +2016,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_ip", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -1836,6 +2028,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_udp", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1845,6 +2038,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_tun", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -1855,7 +2049,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 4, wh_plus, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -1865,18 +2061,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -1891,70 +2091,87 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -1964,22 +2181,27 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -1988,6 +2210,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -1996,6 +2219,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2005,12 +2229,14 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2020,16 +2246,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_l2_dmac", .field_bit_size = 48, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2039,6 +2268,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_vtag", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -2050,6 +2280,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_ip", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -2061,6 +2292,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_udp", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2070,6 +2302,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "encap_tun", .field_bit_size = 0, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, .result_operand = { @@ -2080,7 +2313,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 4, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2090,18 +2325,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2116,18 +2355,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2137,46 +2380,57 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2186,34 +2440,44 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 5, wh_plus, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 5, wh_plus, table: int_act_modify_ipv4_src_0 */ { + .description = "ipv4_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2222,7 +2486,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 5, wh_plus, table: int_act_modify_ipv4_dst_0 */ { + .description = "ipv4_addr", .field_bit_size = 32, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2231,19 +2497,24 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 5, wh_plus, table: int_encap_mac_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -2252,40 +2523,50 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "spare", .field_bit_size = 80, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 5, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2295,18 +2576,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2321,18 +2606,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, .result_operand = { @@ -2342,6 +2631,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2351,6 +2641,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -2370,6 +2661,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2379,6 +2671,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -2398,18 +2691,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2419,6 +2716,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2428,6 +2726,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -2446,6 +2745,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2455,30 +2755,38 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 5, wh_plus, table: ext_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2488,18 +2796,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2514,30 +2826,37 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2547,6 +2866,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -2566,6 +2886,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2575,6 +2896,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, .result_operand = { @@ -2594,18 +2916,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2615,6 +2941,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2624,6 +2951,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, .result_operand = { @@ -2642,6 +2970,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2651,34 +2980,42 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -2687,56 +3024,71 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 6, wh_plus, table: int_flow_counter_tbl_0 */ { + .description = "count", .field_bit_size = 64, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 6, wh_plus, table: int_vtag_encap_record_0 */ { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -2745,16 +3097,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2764,6 +3119,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2773,10 +3129,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2786,10 +3144,13 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "spare", .field_bit_size = 80, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 6, wh_plus, table: int_full_act_record_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2799,18 +3160,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2825,18 +3190,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2846,34 +3215,42 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2883,6 +3260,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -2892,10 +3270,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -2905,18 +3285,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2931,14 +3315,18 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "hit", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "type", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, + /* act_tid: 6, wh_plus, table: ext_full_act_record_no_tag_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -2948,18 +3336,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -2974,58 +3366,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -3035,6 +3441,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -3044,10 +3451,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -3057,18 +3466,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -3082,7 +3495,9 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* act_tid: 6, wh_plus, table: ext_full_act_record_one_tag_0 */ { + .description = "flow_cntr_ptr", .field_bit_size = 14, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, .result_operand = { @@ -3092,18 +3507,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "age_enable", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "agg_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "rate_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "flow_cntr_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -3118,58 +3537,72 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "flow_cntr_ext", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_key", .field_bit_size = 8, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_mir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcpflags_match", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_ptr", .field_bit_size = 11, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "encap_rec_int", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "dst_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_dst_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "src_ip_ptr", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tcp_src_port", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "meter_id", .field_bit_size = 10, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "tl3_rdir", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "l3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -3179,6 +3612,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "tl3_ttl_dec", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, .result_operand = { @@ -3188,10 +3622,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "decap_func", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vnic_or_vport", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -3201,6 +3637,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "pop_vlan", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -3215,14 +3652,17 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "meter", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "mirror", .field_bit_size = 2, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "drop", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, .result_operand = { @@ -3237,22 +3677,27 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_tun_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l4_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l3_type", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_l2_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_vtag_type", .field_bit_size = 4, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = { @@ -3261,16 +3706,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "ecv_custom_en", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "ecv_valid", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_tpid", .field_bit_size = 16, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -3280,6 +3728,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_vid", .field_bit_size = 12, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { @@ -3289,10 +3738,12 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "vtag_de", .field_bit_size = 1, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO }, { + .description = "vtag_pcp", .field_bit_size = 3, .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, .result_operand = { diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c index fcc5c9e20c..a4a435cc6f 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c @@ -11,7 +11,7 @@ #include "ulp_rte_parser.h" /* Mapper templates for header class list */ -struct bnxt_ulp_mapper_tbl_list_info ulp_wh_plus_class_tmpl_list[] = { +struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = { /* default-vfr-[port_to_vs]:1 */ /* class_tid: 1, wh_plus, ingress */ [1] = { @@ -194,14 +194,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 0, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, @@ -209,7 +208,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 0, .blob_key_bit_size = 8, @@ -228,7 +227,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -239,7 +239,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 1, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 1, wh_plus, table: parif_def_lkup_arec_ptr_0 */ @@ -279,14 +279,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 43, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, @@ -298,7 +297,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 14, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -309,14 +309,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 1, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 2, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, @@ -339,7 +339,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 28, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -350,7 +351,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 2, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 2, wh_plus, table: parif_def_lkup_arec_ptr_0 */ @@ -390,14 +391,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 99, .result_bit_size = 0, .result_num_fields = 0, .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 }, @@ -405,14 +405,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 111, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, @@ -420,7 +419,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 41, .blob_key_bit_size = 8, @@ -439,7 +438,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 42, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -450,21 +450,20 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 2, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 3, wh_plus, table: ing_int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 150, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, @@ -472,8 +471,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 55, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -484,15 +483,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 2, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 3, wh_plus, table: ing_l2_cntxt_stagged_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 68, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -503,14 +502,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 2, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 4, wh_plus, table: egr_l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 81, .blob_key_bit_size = 8, @@ -529,7 +528,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 82, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -540,7 +540,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 3, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 4, wh_plus, table: egr_parif_def_lkup_arec_ptr_0 */ @@ -580,14 +580,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 219, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_VFR_FLAG, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR }, @@ -597,7 +596,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 95, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -608,21 +608,20 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 3, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 5, wh_plus, table: int_full_act_record_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 258, .result_bit_size = 128, .result_num_fields = 26, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP @@ -633,7 +632,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 108, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -644,14 +644,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 3, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 6, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 121, .blob_key_bit_size = 16, @@ -670,7 +670,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_1, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 1, .key_start_idx = 124, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -681,13 +682,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 5, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 6, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 167, .blob_key_bit_size = 448, @@ -699,13 +700,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 5, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 6, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 178, .blob_key_bit_size = 200, @@ -717,7 +718,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 5, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 7, wh_plus, table: l2_cntxt_tcam_0 */ @@ -726,7 +727,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 189, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -737,14 +739,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 5, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 7, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 202, .blob_key_bit_size = 16, @@ -763,7 +765,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_1, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 1, .key_start_idx = 205, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -774,13 +777,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 7, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 7, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 248, .blob_key_bit_size = 448, @@ -792,13 +795,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 7, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 7, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 259, .blob_key_bit_size = 200, @@ -810,14 +813,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 7, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 8, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 270, .blob_key_bit_size = 8, @@ -836,7 +839,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 271, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -847,14 +851,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 8, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 8, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 284, .blob_key_bit_size = 16, @@ -873,7 +877,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 287, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -884,13 +889,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 9, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 8, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 330, .blob_key_bit_size = 448, @@ -902,13 +907,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 9, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 8, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 341, .blob_key_bit_size = 200, @@ -920,14 +925,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 9, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 9, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 352, .blob_key_bit_size = 8, @@ -946,7 +951,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 353, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -957,14 +963,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 10, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 9, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 366, .blob_key_bit_size = 16, @@ -983,7 +989,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 369, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -994,13 +1001,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 11, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 9, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 412, .blob_key_bit_size = 448, @@ -1012,13 +1019,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 11, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 9, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 423, .blob_key_bit_size = 200, @@ -1030,14 +1037,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 11, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 10, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 434, .blob_key_bit_size = 8, @@ -1056,7 +1063,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 435, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1067,14 +1075,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 12, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 10, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 448, .blob_key_bit_size = 16, @@ -1093,7 +1101,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 451, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1104,13 +1113,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 13, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 10, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 494, .blob_key_bit_size = 448, @@ -1122,13 +1131,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 13, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 10, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 505, .blob_key_bit_size = 392, @@ -1140,14 +1149,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 13, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 11, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 516, .blob_key_bit_size = 8, @@ -1166,7 +1175,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 517, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1177,14 +1187,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 14, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 11, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 530, .blob_key_bit_size = 16, @@ -1203,7 +1213,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 533, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1214,13 +1225,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 15, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 11, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 576, .blob_key_bit_size = 448, @@ -1232,13 +1243,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 15, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 11, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 587, .blob_key_bit_size = 392, @@ -1250,7 +1261,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 15, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 12, wh_plus, table: l2_cntxt_tcam_0 */ @@ -1259,7 +1270,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 598, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1270,14 +1282,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 15, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 12, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 611, .blob_key_bit_size = 16, @@ -1296,7 +1308,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 614, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1307,13 +1320,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 17, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 12, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 657, .blob_key_bit_size = 448, @@ -1325,13 +1338,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 17, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 12, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 668, .blob_key_bit_size = 200, @@ -1343,7 +1356,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 17, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 13, wh_plus, table: l2_cntxt_tcam_0 */ @@ -1352,7 +1365,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 679, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1363,14 +1377,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 17, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 13, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 692, .blob_key_bit_size = 16, @@ -1389,7 +1403,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 695, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1400,13 +1415,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 19, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 13, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 738, .blob_key_bit_size = 448, @@ -1418,13 +1433,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 19, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 13, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 749, .blob_key_bit_size = 200, @@ -1436,7 +1451,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 19, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 14, wh_plus, table: l2_cntxt_tcam_0 */ @@ -1445,7 +1460,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 760, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1456,14 +1472,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 19, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 14, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 773, .blob_key_bit_size = 16, @@ -1482,7 +1498,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 776, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1493,13 +1510,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 21, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 14, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 819, .blob_key_bit_size = 448, @@ -1511,13 +1528,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 21, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 14, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 830, .blob_key_bit_size = 392, @@ -1529,7 +1546,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 21, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 15, wh_plus, table: l2_cntxt_tcam_0 */ @@ -1538,7 +1555,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 841, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1549,14 +1567,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 21, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 15, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 854, .blob_key_bit_size = 16, @@ -1575,7 +1593,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 857, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1586,13 +1605,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 23, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 15, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 900, .blob_key_bit_size = 448, @@ -1604,13 +1623,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 23, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 15, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 911, .blob_key_bit_size = 392, @@ -1622,7 +1641,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 23, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 16, wh_plus, table: l2_cntxt_tcam_0 */ @@ -1631,7 +1650,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 922, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1642,14 +1662,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 23, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 16, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 935, .blob_key_bit_size = 16, @@ -1668,7 +1688,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 938, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1679,13 +1700,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 25, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 16, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 981, .blob_key_bit_size = 448, @@ -1697,13 +1718,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 25, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 16, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 992, .blob_key_bit_size = 200, @@ -1715,7 +1736,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 25, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 17, wh_plus, table: l2_cntxt_tcam_0 */ @@ -1724,7 +1745,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1003, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1735,14 +1757,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 25, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 17, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 1016, .blob_key_bit_size = 16, @@ -1761,7 +1783,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1019, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1772,13 +1795,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 27, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 17, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 1062, .blob_key_bit_size = 448, @@ -1790,13 +1813,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 27, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 17, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 1073, .blob_key_bit_size = 392, @@ -1808,23 +1831,22 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 27, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 18, wh_plus, table: int_flow_counter_tbl_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC, .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, .result_start_idx = 768, .result_bit_size = 64, .result_num_fields = 1, .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 }, @@ -1834,7 +1856,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1084, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1845,14 +1868,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 27, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 18, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 1097, .blob_key_bit_size = 16, @@ -1871,7 +1894,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1100, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1882,15 +1906,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 30, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 18, wh_plus, table: wm_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, .direction = TF_DIR_RX, - .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1143, .blob_key_bit_size = 192, .key_bit_size = 160, @@ -1901,7 +1925,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 30, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 19, wh_plus, table: l2_cntxt_tcam_0 */ @@ -1910,7 +1934,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1148, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -1921,14 +1946,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 30, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 19, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_RX, .key_start_idx = 1161, .blob_key_bit_size = 16, @@ -1947,7 +1972,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_RX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1164, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -1958,13 +1984,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 33, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 19, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_RX, .key_start_idx = 1207, .blob_key_bit_size = 112, @@ -1976,13 +2002,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 33, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 19, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, .key_start_idx = 1215, .blob_key_bit_size = 448, @@ -1994,14 +2020,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 33, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 20, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1223, .blob_key_bit_size = 8, @@ -2020,7 +2046,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1224, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -2031,14 +2058,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 34, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 20, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1237, .blob_key_bit_size = 16, @@ -2057,7 +2084,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1240, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2068,13 +2096,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 35, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 20, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1283, .blob_key_bit_size = 448, @@ -2086,13 +2114,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 35, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 20, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1294, .blob_key_bit_size = 200, @@ -2104,14 +2132,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 35, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 21, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1305, .blob_key_bit_size = 8, @@ -2130,7 +2158,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1306, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -2141,14 +2170,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 36, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 21, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1319, .blob_key_bit_size = 16, @@ -2167,7 +2196,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1322, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2178,13 +2208,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 37, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 21, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1365, .blob_key_bit_size = 448, @@ -2196,13 +2226,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 37, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 21, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1376, .blob_key_bit_size = 200, @@ -2214,14 +2244,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 37, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 22, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1387, .blob_key_bit_size = 8, @@ -2240,7 +2270,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1388, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -2251,14 +2282,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 38, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 22, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1401, .blob_key_bit_size = 16, @@ -2277,7 +2308,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1404, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2288,13 +2320,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 39, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 22, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1447, .blob_key_bit_size = 448, @@ -2306,13 +2338,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 39, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 22, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1458, .blob_key_bit_size = 392, @@ -2324,14 +2356,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 39, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 23, wh_plus, table: l2_cntxt_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1469, .blob_key_bit_size = 8, @@ -2350,7 +2382,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1470, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -2361,14 +2394,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 40, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 23, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1483, .blob_key_bit_size = 16, @@ -2387,7 +2420,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1486, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2398,13 +2432,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 41, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 23, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1529, .blob_key_bit_size = 448, @@ -2416,13 +2450,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 41, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 23, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1540, .blob_key_bit_size = 392, @@ -2434,7 +2468,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 41, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 24, wh_plus, table: l2_cntxt_tcam_0 */ @@ -2443,7 +2477,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1551, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -2454,14 +2489,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 41, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 24, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1564, .blob_key_bit_size = 16, @@ -2480,7 +2515,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1567, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2491,13 +2527,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 43, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 24, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1610, .blob_key_bit_size = 448, @@ -2509,13 +2545,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 43, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 24, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1617, .blob_key_bit_size = 104, @@ -2527,7 +2563,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 43, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 25, wh_plus, table: l2_cntxt_tcam_0 */ @@ -2536,7 +2572,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1624, .blob_key_bit_size = 167, .key_bit_size = 167, @@ -2547,14 +2584,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 43, .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 25, wh_plus, table: profile_tcam_cache_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, .direction = TF_DIR_TX, .key_start_idx = 1637, .blob_key_bit_size = 16, @@ -2573,7 +2610,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .direction = TF_DIR_TX, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .priority = BNXT_ULP_PRIORITY_LEVEL_0, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, .key_start_idx = 1640, .blob_key_bit_size = 81, .key_bit_size = 81, @@ -2584,13 +2622,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 45, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO }, { /* class_tid: 25, wh_plus, table: ext_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_TX, .key_start_idx = 1683, .blob_key_bit_size = 448, @@ -2602,13 +2640,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 45, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES }, { /* class_tid: 25, wh_plus, table: int_em_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, .direction = TF_DIR_TX, .key_start_idx = 1690, .blob_key_bit_size = 104, @@ -2620,7 +2658,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .encap_num_fields = 0, .ident_start_idx = 45, .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES } }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h index b253aefe8d..23b4c89896 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h @@ -161,8 +161,8 @@ struct bnxt_ulp_mapper_cond_list_info { uint32_t cond_nums; }; -struct ulp_template_device_tbls { - struct bnxt_ulp_mapper_tbl_list_info *tmpl_list; +struct bnxt_ulp_template_device_tbls { + struct bnxt_ulp_mapper_tmpl_info *tmpl_list; struct bnxt_ulp_mapper_tbl_info *tbl_list; struct bnxt_ulp_mapper_key_field_info *key_field_list; struct bnxt_ulp_mapper_result_field_info *result_field_list; @@ -188,11 +188,11 @@ struct bnxt_ulp_device_params { uint64_t packet_count_mask; uint32_t byte_count_shift; uint32_t packet_count_shift; - const struct ulp_template_device_tbls *dev_tbls; + const struct bnxt_ulp_template_device_tbls *dev_tbls; }; /* Flow Mapper */ -struct bnxt_ulp_mapper_tbl_list_info { +struct bnxt_ulp_mapper_tmpl_info { uint32_t device_name; uint32_t start_tbl_idx; uint32_t num_tbls; @@ -206,10 +206,10 @@ struct bnxt_ulp_mapper_tbl_info { struct bnxt_ulp_mapper_cond_list_info execute_info; enum bnxt_ulp_cond_opc cond_opcode; uint32_t cond_operand; - enum bnxt_ulp_mem_type_opcode mem_type_opcode; + enum bnxt_ulp_mem_type_opc mem_type_opcode; uint8_t direction; - uint32_t priority; - enum bnxt_ulp_search_before_alloc srch_b4_alloc; + enum bnxt_ulp_pri_opc pri_opcode; + uint32_t pri_operand; enum bnxt_ulp_critical_resource critical_resource; /* Information for accessing the ulp_key_field_list */ @@ -229,9 +229,7 @@ struct bnxt_ulp_mapper_tbl_info { uint32_t ident_start_idx; uint16_t ident_nums; - enum bnxt_ulp_mark_db_opcode mark_db_opcode; - enum bnxt_ulp_index_opcode index_opcode; - uint32_t index_operand; + enum bnxt_ulp_mark_db_opc mark_db_opcode; /* Table opcode for table operations */ uint32_t tbl_opcode; From patchwork Sun Jun 13 00:06:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 94170 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org 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localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id gg22sm12774609pjb.17.2021.06.12.17.07.51 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jun 2021 17:07:56 -0700 (PDT) From: Ajit Khaparde To: dev@dpdk.org Cc: Kishore Padmanabha , Venkat Duvvuru , Mike Baucom Date: Sat, 12 Jun 2021 17:06:28 -0700 Message-Id: <20210613000652.28191-35-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210613000652.28191-1-ajit.khaparde@broadcom.com> References: <20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com> <20210613000652.28191-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 14 Jun 2021 16:37:12 +0200 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH v2 34/58] net/bnxt: add support to identify duplicate flows X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kishore Padmanabha Conflict resolution feature allows rejection of flows based on the previously added flows that conflict. For instance, a five tuple flow is added and then you add a new flow with only 4 tuple instead having same layer2 details then it will be rejected. Signed-off-by: Kishore Padmanabha Signed-off-by: Venkat Duvvuru Reviewed-by: Mike Baucom Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 12 +- drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c | 8 +- drivers/net/bnxt/tf_ulp/meson.build | 1 + drivers/net/bnxt/tf_ulp/ulp_def_rules.c | 10 +- drivers/net/bnxt/tf_ulp/ulp_flow_db.c | 62 +- drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c | 38 +- drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h | 3 +- drivers/net/bnxt/tf_ulp/ulp_mapper.c | 789 +- drivers/net/bnxt/tf_ulp/ulp_matcher.c | 2 + drivers/net/bnxt/tf_ulp/ulp_port_db.c | 4 +- drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c | 412 + drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 47 +- drivers/net/bnxt/tf_ulp/ulp_template_db_act.c | 766 +- .../net/bnxt/tf_ulp/ulp_template_db_class.c | 4144 +-- .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 1233 +- .../net/bnxt/tf_ulp/ulp_template_db_field.h | 1394 +- .../tf_ulp/ulp_template_db_stingray_act.c | 3706 +- .../tf_ulp/ulp_template_db_stingray_class.c | 28599 ++++----------- drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c | 1024 +- drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h | 24 +- .../bnxt/tf_ulp/ulp_template_db_wh_plus_act.c | 3705 +- .../tf_ulp/ulp_template_db_wh_plus_class.c | 28654 ++++------------ drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 61 +- drivers/net/bnxt/tf_ulp/ulp_tun.c | 225 +- drivers/net/bnxt/tf_ulp/ulp_tun.h | 37 +- drivers/net/bnxt/tf_ulp/ulp_utils.c | 16 +- drivers/net/bnxt/tf_ulp/ulp_utils.h | 10 +- 27 files changed, 15666 insertions(+), 59320 deletions(-) create mode 100644 drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c index 59fb530fb1..0975a4689f 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c @@ -22,7 +22,6 @@ #include "ulp_flow_db.h" #include "ulp_mapper.h" #include "ulp_port_db.h" -#include "ulp_tun.h" /* Linked list of all TF sessions. */ STAILQ_HEAD(, bnxt_ulp_session_state) bnxt_ulp_session_list = @@ -55,14 +54,13 @@ bnxt_ulp_devid_get(struct bnxt *bp, { if (BNXT_CHIP_P5(bp)) return -EINVAL; - /* Assuming Whitney */ - *ulp_dev_id = BNXT_ULP_DEVICE_ID_WH_PLUS; if (BNXT_STINGRAY(bp)) *ulp_dev_id = BNXT_ULP_DEVICE_ID_STINGRAY; else /* Assuming Whitney */ *ulp_dev_id = BNXT_ULP_DEVICE_ID_WH_PLUS; + return 0; } @@ -400,21 +398,18 @@ ulp_eem_tbl_scope_init(struct bnxt *bp) if (bnxt_ulp_cntxt_mem_type_get(bp->ulp_ctx, &mtype)) return -EINVAL; - if (mtype != BNXT_ULP_FLOW_MEM_TYPE_EXT) { BNXT_TF_DBG(INFO, "Table Scope alloc is not required\n"); return 0; } bnxt_init_tbl_scope_parms(bp, ¶ms); - rc = tf_alloc_tbl_scope(&bp->tfp, ¶ms); if (rc) { BNXT_TF_DBG(ERR, "Unable to allocate eem table scope rc = %d\n", rc); return rc; } - rc = bnxt_ulp_cntxt_tbl_scope_id_set(bp->ulp_ctx, params.tbl_scope_id); if (rc) { BNXT_TF_DBG(ERR, "Unable to set table scope id\n"); @@ -534,8 +529,6 @@ ulp_ctx_init(struct bnxt *bp, if (rc) goto error_deinit; - ulp_tun_tbl_init(ulp_data->tun_tbl); - bnxt_ulp_cntxt_tfp_set(bp->ulp_ctx, &bp->tfp); return rc; @@ -547,8 +540,7 @@ ulp_ctx_init(struct bnxt *bp, /* The function to initialize ulp dparms with devargs */ static int32_t -ulp_dparms_init(struct bnxt *bp, - struct bnxt_ulp_context *ulp_ctx) +ulp_dparms_init(struct bnxt *bp, struct bnxt_ulp_context *ulp_ctx) { struct bnxt_ulp_device_params *dparms; uint32_t dev_id; diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c index 836e94bc60..2c1a2a7be3 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c @@ -79,7 +79,6 @@ bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms, struct ulp_rte_parser_params *params, enum bnxt_ulp_fdb_type flow_type) { - memset(mapper_cparms, 0, sizeof(*mapper_cparms)); mapper_cparms->flow_type = flow_type; mapper_cparms->app_priority = params->priority; mapper_cparms->dir_attr = params->dir_attr; @@ -95,6 +94,12 @@ bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms, mapper_cparms->parent_flow = params->parent_flow; mapper_cparms->parent_fid = params->parent_fid; mapper_cparms->fld_bitmap = ¶ms->fld_bitmap; + + /* update the signature fields into the computed field list */ + ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_HDR_SIG_ID, + params->hdr_sig_id); + ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_FLOW_SIG_ID, + params->flow_sig_id); } /* Function to create the rte flow. */ @@ -177,7 +182,6 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev, params.fid = fid; params.func_id = func_id; params.priority = attr->priority; - params.port_id = dev->data->port_id; /* Perform the rte flow post process */ ret = bnxt_ulp_rte_parser_post_process(¶ms); if (ret == BNXT_TF_RC_ERROR) diff --git a/drivers/net/bnxt/tf_ulp/meson.build b/drivers/net/bnxt/tf_ulp/meson.build index 611d7ab58e..701a510f27 100644 --- a/drivers/net/bnxt/tf_ulp/meson.build +++ b/drivers/net/bnxt/tf_ulp/meson.build @@ -23,6 +23,7 @@ sources += files( 'ulp_fc_mgr.c', 'ulp_tun.c', 'ulp_gen_tbl.c', + 'ulp_rte_handler_tbl.c', 'ulp_template_db_wh_plus_act.c', 'ulp_template_db_wh_plus_class.c', 'ulp_template_db_stingray_act.c', diff --git a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c index 8a3c5ee8fb..72a6bcd1b3 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c +++ b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c @@ -366,7 +366,7 @@ ulp_default_flow_create(struct rte_eth_dev *eth_dev, goto err1; } - rc = ulp_flow_db_fid_alloc(ulp_ctx, BNXT_ULP_FDB_TYPE_DEFAULT, + rc = ulp_flow_db_fid_alloc(ulp_ctx, mapper_params.flow_type, mapper_params.func_id, &fid); if (rc) { BNXT_TF_DBG(ERR, "Unable to allocate flow table entry\n"); @@ -383,7 +383,7 @@ ulp_default_flow_create(struct rte_eth_dev *eth_dev, return 0; err3: - ulp_flow_db_fid_free(ulp_ctx, BNXT_ULP_FDB_TYPE_DEFAULT, fid); + ulp_flow_db_fid_free(ulp_ctx, mapper_params.flow_type, fid); err2: bnxt_ulp_cntxt_release_fdb_lock(ulp_ctx); err1: @@ -437,7 +437,7 @@ void bnxt_ulp_destroy_df_rules(struct bnxt *bp, bool global) { struct bnxt_ulp_df_rule_info *info; - uint16_t port_id; + uint8_t port_id; if (!BNXT_TRUFLOW_EN(bp) || BNXT_ETH_DEV_IS_REPRESENTOR(bp->eth_dev)) @@ -501,7 +501,7 @@ int32_t bnxt_ulp_create_df_rules(struct bnxt *bp) { struct bnxt_ulp_df_rule_info *info; - uint16_t port_id; + uint8_t port_id; int rc; if (!BNXT_TRUFLOW_EN(bp) || @@ -575,7 +575,7 @@ bnxt_ulp_create_vfr_default_rules(struct rte_eth_dev *vfr_ethdev) struct rte_eth_dev *parent_dev = vfr->parent_dev; struct bnxt *bp = parent_dev->data->dev_private; uint16_t vfr_port_id = vfr_ethdev->data->port_id; - uint16_t port_id; + uint8_t port_id; int rc; if (!bp || !BNXT_TRUFLOW_EN(bp)) diff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c index c599e0c7e1..8537388da6 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c +++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c @@ -48,17 +48,21 @@ ulp_flow_db_active_flows_bit_set(struct bnxt_ulp_flow_db *flow_db, uint32_t a_idx = idx / ULP_INDEX_BITMAP_SIZE; if (flag) { - if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR) + if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR || flow_type == + BNXT_ULP_FDB_TYPE_RID) ULP_INDEX_BITMAP_SET(f_tbl->active_reg_flows[a_idx], idx); - else + if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT || flow_type == + BNXT_ULP_FDB_TYPE_RID) ULP_INDEX_BITMAP_SET(f_tbl->active_dflt_flows[a_idx], idx); } else { - if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR) + if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR || flow_type == + BNXT_ULP_FDB_TYPE_RID) ULP_INDEX_BITMAP_RESET(f_tbl->active_reg_flows[a_idx], idx); - else + if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT || flow_type == + BNXT_ULP_FDB_TYPE_RID) ULP_INDEX_BITMAP_RESET(f_tbl->active_dflt_flows[a_idx], idx); } @@ -85,9 +89,15 @@ ulp_flow_db_active_flows_bit_is_set(struct bnxt_ulp_flow_db *flow_db, if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR) return ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx], idx); - else + else if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT) return ULP_INDEX_BITMAP_GET(f_tbl->active_dflt_flows[a_idx], idx); + else if (flow_type == BNXT_ULP_FDB_TYPE_RID) + return (ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx], + idx) && + ULP_INDEX_BITMAP_GET(f_tbl->active_reg_flows[a_idx], + idx)); + return 0; } static inline enum tf_dir @@ -213,7 +223,7 @@ ulp_flow_db_alloc_resource(struct bnxt_ulp_flow_db *flow_db) return -ENOMEM; } size = (flow_tbl->num_flows / sizeof(uint64_t)) + 1; - size = ULP_BYTE_ROUND_OFF_8(size); + size = ULP_BYTE_ROUND_OFF_8(size); flow_tbl->active_reg_flows = rte_zmalloc("active reg flows", size, ULP_BUFFER_ALIGN_64_BYTE); if (!flow_tbl->active_reg_flows) { @@ -617,7 +627,7 @@ ulp_flow_db_fid_alloc(struct bnxt_ulp_context *ulp_ctxt, return -EINVAL; } - if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) { + if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) { BNXT_TF_DBG(ERR, "Invalid flow type\n"); return -EINVAL; } @@ -674,7 +684,7 @@ ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt, return -EINVAL; } - if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) { + if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) { BNXT_TF_DBG(ERR, "Invalid flow type\n"); return -EINVAL; } @@ -688,7 +698,7 @@ ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt, /* check if the flow is active or not */ if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) { - BNXT_TF_DBG(ERR, "flow does not exist\n"); + BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid); return -EINVAL; } @@ -769,7 +779,7 @@ ulp_flow_db_resource_del(struct bnxt_ulp_context *ulp_ctxt, return -EINVAL; } - if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) { + if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) { BNXT_TF_DBG(ERR, "Invalid flow type\n"); return -EINVAL; } @@ -783,7 +793,7 @@ ulp_flow_db_resource_del(struct bnxt_ulp_context *ulp_ctxt, /* check if the flow is active or not */ if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) { - BNXT_TF_DBG(ERR, "flow does not exist\n"); + BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid); return -EINVAL; } @@ -868,9 +878,8 @@ ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt, enum bnxt_ulp_fdb_type flow_type, uint32_t fid) { - struct bnxt_tun_cache_entry *tun_tbl; - struct bnxt_ulp_flow_tbl *flow_tbl; struct bnxt_ulp_flow_db *flow_db; + struct bnxt_ulp_flow_tbl *flow_tbl; flow_db = bnxt_ulp_cntxt_ptr2_flow_db_get(ulp_ctxt); if (!flow_db) { @@ -878,7 +887,7 @@ ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt, return -EINVAL; } - if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) { + if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) { BNXT_TF_DBG(ERR, "Invalid flow type\n"); return -EINVAL; } @@ -893,7 +902,7 @@ ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt, /* check if the flow is active or not */ if (!ulp_flow_db_active_flows_bit_is_set(flow_db, flow_type, fid)) { - BNXT_TF_DBG(ERR, "flow does not exist\n"); + BNXT_TF_DBG(ERR, "flow does not exist %x:%x\n", flow_type, fid); return -EINVAL; } flow_tbl->head_index--; @@ -901,6 +910,7 @@ ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt, BNXT_TF_DBG(ERR, "FlowDB: Head Ptr is zero\n"); return -ENOENT; } + flow_tbl->flow_tbl_stack[flow_tbl->head_index] = fid; /* Clear the flows bitmap */ @@ -909,18 +919,12 @@ ulp_flow_db_fid_free(struct bnxt_ulp_context *ulp_ctxt, if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR) ulp_flow_db_func_id_set(flow_db, fid, 0); - tun_tbl = bnxt_ulp_cntxt_ptr2_tun_tbl_get(ulp_ctxt); - if (!tun_tbl) - return -EINVAL; - - ulp_clear_tun_inner_entry(tun_tbl, fid); - /* all good, return success */ return 0; } /* - * Get the flow database entry details + *Get the flow database entry details * * ulp_ctxt [in] Ptr to ulp_context * flow_type [in] - specify default or regular @@ -947,7 +951,7 @@ ulp_flow_db_resource_get(struct bnxt_ulp_context *ulp_ctxt, return -EINVAL; } - if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) { + if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) { BNXT_TF_DBG(ERR, "Invalid flow type\n"); return -EINVAL; } @@ -1003,10 +1007,14 @@ ulp_flow_db_next_entry_get(struct bnxt_ulp_flow_db *flow_db, uint64_t *active_flows; struct bnxt_ulp_flow_tbl *flowtbl = &flow_db->flow_tbl; - if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR) + if (flow_type == BNXT_ULP_FDB_TYPE_REGULAR) { active_flows = flowtbl->active_reg_flows; - else + } else if (flow_type == BNXT_ULP_FDB_TYPE_DEFAULT) { active_flows = flowtbl->active_dflt_flows; + } else { + BNXT_TF_DBG(ERR, "Invalid flow type %x\n", flow_type); + return -EINVAL; + } do { /* increment the flow id to find the next valid flow id */ @@ -1199,7 +1207,7 @@ ulp_flow_db_resource_params_get(struct bnxt_ulp_context *ulp_ctx, return -EINVAL; } - if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) { + if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) { BNXT_TF_DBG(ERR, "Invalid flow type\n"); return -EINVAL; } @@ -1601,7 +1609,7 @@ ulp_flow_db_child_flow_reset(struct bnxt_ulp_context *ulp_ctxt, return -EINVAL; } - if (flow_type > BNXT_ULP_FDB_TYPE_DEFAULT) { + if (flow_type >= BNXT_ULP_FDB_TYPE_LAST) { BNXT_TF_DBG(ERR, "Invalid flow type\n"); return -EINVAL; } diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c index 62a5924a36..da394ba210 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c +++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c @@ -47,7 +47,7 @@ ulp_mapper_generic_tbl_list_init(struct bnxt_ulp_mapper_data *mapper_data) if (tbl->result_num_entries != 0) { /* add 4 bytes for reference count */ entry->mem_data_size = (tbl->result_num_entries + 1) * - (tbl->result_byte_size + sizeof(uint32_t)); + (tbl->result_num_bytes + sizeof(uint32_t)); /* allocate the big chunk of memory */ entry->mem_data = rte_zmalloc("ulp mapper gen tbl", @@ -60,7 +60,7 @@ ulp_mapper_generic_tbl_list_init(struct bnxt_ulp_mapper_data *mapper_data) } /* Populate the generic table container */ entry->container.num_elem = tbl->result_num_entries; - entry->container.byte_data_size = tbl->result_byte_size; + entry->container.byte_data_size = tbl->result_num_bytes; entry->container.ref_count = (uint32_t *)entry->mem_data; size = sizeof(uint32_t) * (tbl->result_num_entries + 1); @@ -168,7 +168,6 @@ ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir) * Set the data in the generic table entry, Data is in Big endian format * * entry [in] - generic table entry - * offset [in] - The offset in bits where the data has to be set * len [in] - The length of the data in bits to be set * data [in] - pointer to the data to be used for setting the value. * data_size [in] - length of the data pointer in bytes. @@ -177,7 +176,7 @@ ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir) */ int32_t ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, - uint32_t offset, uint32_t len, uint8_t *data, + uint32_t len, uint8_t *data, uint32_t data_size) { /* validate the null arguments */ @@ -187,32 +186,13 @@ ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, } /* check the size of the buffer for validation */ - if ((offset + len) > ULP_BYTE_2_BITS(entry->byte_data_size) || + if (len > ULP_BYTE_2_BITS(entry->byte_data_size) || data_size < ULP_BITS_2_BYTE(len)) { - BNXT_TF_DBG(ERR, "invalid offset or length %x:%x:%x\n", - offset, len, entry->byte_data_size); + BNXT_TF_DBG(ERR, "invalid offset or length %x:%x\n", + len, entry->byte_data_size); return -EINVAL; } - - /* adjust the data pointer */ - data = data + (data_size - ULP_BITS_2_BYTE(len)); - - /* Push the data into the byte data array */ - if (entry->byte_order == BNXT_ULP_BYTE_ORDER_LE) { - if (ulp_bs_push_lsb(entry->byte_data, offset, len, data) != - len) { - BNXT_TF_DBG(ERR, "write failed offset = %x, len =%x\n", - offset, len); - return -EIO; - } - } else { - if (ulp_bs_push_msb(entry->byte_data, offset, len, data) != - len) { - BNXT_TF_DBG(ERR, "write failed offset = %x, len =%x\n", - offset, len); - return -EIO; - } - } + memcpy(entry->byte_data, data, ULP_BITS_2_BYTE(len)); return 0; } @@ -267,7 +247,7 @@ ulp_mapper_gen_tbl_res_free(struct bnxt_ulp_context *ulp_ctx, { struct ulp_mapper_gen_tbl_entry entry; int32_t tbl_idx; - uint32_t fid; + uint32_t fid = 0; /* Extract the resource sub type and direction */ tbl_idx = ulp_mapper_gen_tbl_idx_calculate(res->resource_sub_type, @@ -310,7 +290,7 @@ ulp_mapper_gen_tbl_res_free(struct bnxt_ulp_context *ulp_ctx, fid = tfp_be_to_cpu_32(fid); /* Destroy the flow associated with the shared flow id */ - if (ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR, + if (ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_RID, fid)) BNXT_TF_DBG(ERR, "Error in deleting shared flow id %x\n", fid); diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h index 701a8d10e5..6236dc3ca2 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h +++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.h @@ -101,7 +101,6 @@ ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir); * Set the data in the generic table entry * * entry [in] - generic table entry - * offset [in] - The offset in bits where the data has to be set * len [in] - The length of the data in bits to be set * data [in] - pointer to the data to be used for setting the value. * data_size [in] - length of the data pointer in bytes. @@ -110,7 +109,7 @@ ulp_mapper_gen_tbl_idx_calculate(uint32_t res_sub_type, uint32_t dir); */ int32_t ulp_mapper_gen_tbl_entry_data_set(struct ulp_mapper_gen_tbl_entry *entry, - uint32_t offset, uint32_t len, uint8_t *data, + uint32_t len, uint8_t *data, uint32_t data_size); /* diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index 8dc2e18f9f..206f3d54f2 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -19,6 +19,20 @@ #include "tf_util.h" #include "ulp_template_db_tbl.h" +static const char * +ulp_mapper_tmpl_name_str(enum bnxt_ulp_template_type tmpl_type) +{ + switch (tmpl_type) { + case BNXT_ULP_TEMPLATE_TYPE_CLASS: + return "class"; + case BNXT_ULP_TEMPLATE_TYPE_ACTION: + return "action"; + default: + return "invalid template type"; + } +} + + static struct bnxt_ulp_glb_resource_info * ulp_mapper_glb_resource_info_list_get(uint32_t *num_entries) { @@ -42,7 +56,7 @@ ulp_mapper_glb_resource_read(struct bnxt_ulp_mapper_data *mapper_data, uint64_t *regval) { if (!mapper_data || !regval || - dir >= TF_DIR_MAX || idx >= BNXT_ULP_GLB_REGFILE_INDEX_LAST) + dir >= TF_DIR_MAX || idx >= BNXT_ULP_GLB_RF_IDX_LAST) return -EINVAL; *regval = mapper_data->glb_res_tbl[dir][idx].resource_hndl; @@ -65,7 +79,7 @@ ulp_mapper_glb_resource_write(struct bnxt_ulp_mapper_data *data, /* validate the arguments */ if (!data || res->direction >= TF_DIR_MAX || - res->glb_regfile_index >= BNXT_ULP_GLB_REGFILE_INDEX_LAST) + res->glb_regfile_index >= BNXT_ULP_GLB_RF_IDX_LAST) return -EINVAL; /* write to the mapper data */ @@ -191,10 +205,27 @@ ulp_mapper_glb_template_table_get(uint32_t *num_entries) return ulp_glb_template_tbl; } -static uint8_t * -ulp_mapper_glb_field_tbl_get(uint32_t idx) +static int32_t +ulp_mapper_glb_field_tbl_get(struct bnxt_ulp_mapper_parms *parms, + uint32_t operand, + uint8_t *val) { - return &ulp_glb_field_tbl[idx]; + uint32_t t_idx; + + t_idx = parms->class_tid << (BNXT_ULP_HDR_SIG_ID_SHIFT + + BNXT_ULP_GLB_FIELD_TBL_SHIFT); + t_idx += ULP_COMP_FLD_IDX_RD(parms, BNXT_ULP_CF_IDX_HDR_SIG_ID) << + BNXT_ULP_GLB_FIELD_TBL_SHIFT; + t_idx += operand; + + if (t_idx >= BNXT_ULP_GLB_FIELD_TBL_SIZE) { + BNXT_TF_DBG(ERR, "Invalid hdr field index %x:%x:%x\n", + parms->class_tid, t_idx, operand); + *val = 0; + return -EINVAL; /* error */ + } + *val = ulp_glb_field_tbl[t_idx]; + return 0; } /* @@ -286,7 +317,7 @@ ulp_mapper_tbl_list_get(struct bnxt_ulp_mapper_parms *mparms, * * Returns array of Key fields, or NULL on error. */ -static struct bnxt_ulp_mapper_key_field_info * +static struct bnxt_ulp_mapper_key_info * ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms, struct bnxt_ulp_mapper_tbl_info *tbl, uint32_t *num_flds) @@ -295,7 +326,7 @@ ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms, const struct bnxt_ulp_template_device_tbls *dev_tbls; dev_tbls = &mparms->device_params->dev_tbls[mparms->tmpl_type]; - if (!dev_tbls->key_field_list) { + if (!dev_tbls->key_info_list) { *num_flds = 0; return NULL; } @@ -303,7 +334,7 @@ ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms, idx = tbl->key_start_idx; *num_flds = tbl->key_num_fields; - return &dev_tbls->key_field_list[idx]; + return &dev_tbls->key_info_list[idx]; } /* @@ -319,7 +350,7 @@ ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_parms *mparms, * * Returns array of data fields, or NULL on error. */ -static struct bnxt_ulp_mapper_result_field_info * +static struct bnxt_ulp_mapper_field_info * ulp_mapper_result_fields_get(struct bnxt_ulp_mapper_parms *mparms, struct bnxt_ulp_mapper_tbl_info *tbl, uint32_t *num_flds, @@ -510,6 +541,41 @@ ulp_mapper_child_flow_free(struct bnxt_ulp_context *ulp, return 0; } +/* + * Process the flow database opcode alloc action. + * returns 0 on success + */ +static int32_t +ulp_mapper_fdb_opc_alloc_rid(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl) +{ + uint32_t rid = 0; + uint64_t val64; + int32_t rc = 0; + + /* allocate a new fid */ + rc = ulp_flow_db_fid_alloc(parms->ulp_ctx, + BNXT_ULP_FDB_TYPE_RID, + 0, &rid); + if (rc) { + BNXT_TF_DBG(ERR, + "Unable to allocate flow table entry\n"); + return -EINVAL; + } + /* Store the allocated fid in regfile*/ + val64 = rid; + rc = ulp_regfile_write(parms->regfile, tbl->fdb_operand, + tfp_cpu_to_be_64(val64)); + if (rc) { + BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", + tbl->fdb_operand); + ulp_flow_db_fid_free(parms->ulp_ctx, + BNXT_ULP_FDB_TYPE_RID, rid); + return -EINVAL; + } + return 0; +} + /* * Process the flow database opcode action. * returns 0 on success. @@ -519,68 +585,40 @@ ulp_mapper_fdb_opc_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl, struct ulp_flow_db_res_params *fid_parms) { - uint32_t push_fid, fid = 0; + uint32_t push_fid; uint64_t val64; + enum bnxt_ulp_fdb_type flow_type; int32_t rc = 0; switch (tbl->fdb_opcode) { case BNXT_ULP_FDB_OPC_PUSH: push_fid = parms->fid; + flow_type = parms->flow_type; break; case BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE: - /* allocate a new fid */ - rc = ulp_flow_db_fid_alloc(parms->ulp_ctx, - parms->flow_type, - tbl->resource_func, &fid); - if (rc) { - BNXT_TF_DBG(ERR, - "Unable to allocate flow table entry\n"); - return rc; - } - /* Store the allocated fid in regfile*/ - val64 = fid; - rc = ulp_regfile_write(parms->regfile, tbl->flow_db_operand, - tfp_cpu_to_be_64(val64)); - if (!rc) { - BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", - tbl->flow_db_operand); - rc = -EINVAL; - goto error; - } - /* Use the allocated fid to update the flow resource */ - push_fid = fid; - break; case BNXT_ULP_FDB_OPC_PUSH_REGFILE: /* get the fid from the regfile */ - rc = ulp_regfile_read(parms->regfile, tbl->flow_db_operand, + rc = ulp_regfile_read(parms->regfile, tbl->fdb_operand, &val64); if (!rc) { BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", - tbl->flow_db_operand); + tbl->fdb_operand); return -EINVAL; } /* Use the extracted fid to update the flow resource */ - push_fid = tfp_be_to_cpu_64((uint32_t)val64); + push_fid = (uint32_t)tfp_be_to_cpu_64(val64); + flow_type = BNXT_ULP_FDB_TYPE_RID; break; default: return rc; /* Nothing to be done */ } /* Add the resource to the flow database */ - rc = ulp_flow_db_resource_add(parms->ulp_ctx, parms->flow_type, + rc = ulp_flow_db_resource_add(parms->ulp_ctx, flow_type, push_fid, fid_parms); - if (rc) { + if (rc) BNXT_TF_DBG(ERR, "Failed to add res to flow %x rc = %d\n", push_fid, rc); - goto error; - } - return rc; - -error: - /* free the allocated fid */ - if (fid) - ulp_flow_db_fid_free(parms->ulp_ctx, - BNXT_ULP_FDB_TYPE_REGULAR, fid); return rc; } @@ -651,6 +689,7 @@ ulp_mapper_tbl_ident_scan_ext(struct bnxt_ulp_mapper_parms *parms, byte_data_size); return -EINVAL; } + val64 = 0; if (byte_order == BNXT_ULP_BYTE_ORDER_LE) ulp_bs_pull_lsb(byte_data, (uint8_t *)&val64, sizeof(val64), @@ -662,9 +701,8 @@ ulp_mapper_tbl_ident_scan_ext(struct bnxt_ulp_mapper_parms *parms, idents[i].ident_bit_size); /* Write it to the regfile, val64 is already in big-endian*/ - if (!ulp_regfile_write(parms->regfile, - idents[i].regfile_idx, - val64)) { + if (ulp_regfile_write(parms->regfile, + idents[i].regfile_idx, val64)) { BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", idents[i].regfile_idx); return -EINVAL; @@ -712,7 +750,7 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms, } id = (uint64_t)tfp_cpu_to_be_64(iparms.id); - if (!ulp_regfile_write(parms->regfile, idx, id)) { + if (ulp_regfile_write(parms->regfile, idx, id)) { BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", idx); rc = -EINVAL; /* Need to free the identifier, so goto error */ @@ -805,7 +843,7 @@ ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms, /* Write it to the regfile */ id = (uint64_t)tfp_cpu_to_be_64(sparms.search_id); - if (!ulp_regfile_write(parms->regfile, ident->regfile_idx, id)) { + if (ulp_regfile_write(parms->regfile, ident->regfile_idx, id)) { BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", idx); rc = -EINVAL; /* Need to free the identifier, so goto error */ @@ -842,107 +880,38 @@ ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms, } static int32_t -ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, - enum tf_dir dir, - struct bnxt_ulp_mapper_result_field_info *fld, - struct ulp_blob *blob, - const char *name) +ulp_mapper_field_process(struct bnxt_ulp_mapper_parms *parms, + enum tf_dir dir, + struct bnxt_ulp_mapper_field_info *fld, + struct ulp_blob *blob, + uint8_t is_key, + const char *name) { - uint16_t idx, size_idx; - uint8_t *val = NULL; - uint16_t write_idx = blob->write_idx; - uint64_t regval; uint32_t val_size = 0, field_size = 0; - uint64_t act_bit; + uint64_t hdr_bit, act_bit, regval; + uint16_t write_idx = blob->write_idx; + uint16_t idx, size_idx, bitlen; + uint8_t *val = NULL; uint8_t act_val[16]; - uint64_t hdr_bit; - - switch (fld->result_opcode) { - case BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT: - val = fld->result_operand; - if (!ulp_blob_push(blob, val, fld->field_bit_size)) { - BNXT_TF_DBG(ERR, "%s failed to add field\n", name); - return -EINVAL; - } - break; - case BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP: - if (!ulp_operand_read(fld->result_operand, - (uint8_t *)&idx, sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s operand read failed\n", name); - return -EINVAL; - } - idx = tfp_be_to_cpu_16(idx); + uint8_t bit; - if (idx >= BNXT_ULP_ACT_PROP_IDX_LAST) { - BNXT_TF_DBG(ERR, "%s act_prop[%d] oob\n", name, idx); - return -EINVAL; - } - val = &parms->act_prop->act_details[idx]; - field_size = ulp_mapper_act_prop_size_get(idx); - if (fld->field_bit_size < ULP_BYTE_2_BITS(field_size)) { - field_size = field_size - - ((fld->field_bit_size + 7) / 8); - val += field_size; - } - if (!ulp_blob_push(blob, val, fld->field_bit_size)) { - BNXT_TF_DBG(ERR, "%s push field failed\n", name); - return -EINVAL; - } - break; - case BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT: - if (!ulp_operand_read(fld->result_operand, - (uint8_t *)&act_bit, sizeof(uint64_t))) { - BNXT_TF_DBG(ERR, "%s operand read failed\n", name); - return -EINVAL; - } - act_bit = tfp_be_to_cpu_64(act_bit); - memset(act_val, 0, sizeof(act_val)); - if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, act_bit)) - act_val[0] = 1; - if (fld->field_bit_size > ULP_BYTE_2_BITS(sizeof(act_val))) { - BNXT_TF_DBG(ERR, "%s field size is incorrect\n", name); - return -EINVAL; - } - if (!ulp_blob_push(blob, act_val, fld->field_bit_size)) { - BNXT_TF_DBG(ERR, "%s push field failed\n", name); + bitlen = fld->field_bit_size; + switch (fld->field_opcode) { + case BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT: + val = fld->field_operand; + if (!ulp_blob_push(blob, val, bitlen)) { + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } - val = act_val; break; - case BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ: - if (!ulp_operand_read(fld->result_operand, - (uint8_t *)&idx, sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s operand read failed\n", name); - return -EINVAL; - } - idx = tfp_be_to_cpu_16(idx); - - if (idx >= BNXT_ULP_ACT_PROP_IDX_LAST) { - BNXT_TF_DBG(ERR, "%s act_prop[%d] oob\n", name, idx); - return -EINVAL; - } - val = &parms->act_prop->act_details[idx]; - - /* get the size index next */ - if (!ulp_operand_read(&fld->result_operand[sizeof(uint16_t)], - (uint8_t *)&size_idx, sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s operand read failed\n", name); - return -EINVAL; - } - size_idx = tfp_be_to_cpu_16(size_idx); - - if (size_idx >= BNXT_ULP_ACT_PROP_IDX_LAST) { - BNXT_TF_DBG(ERR, "act_prop[%d] oob\n", size_idx); + case BNXT_ULP_FIELD_OPC_SET_TO_ZERO: + if (ulp_blob_pad_push(blob, bitlen) < 0) { + BNXT_TF_DBG(ERR, "%s too large for blob\n", name); return -EINVAL; } - memcpy(&val_size, &parms->act_prop->act_details[size_idx], - sizeof(uint32_t)); - val_size = tfp_be_to_cpu_32(val_size); - val_size = ULP_BYTE_2_BITS(val_size); - ulp_blob_push_encap(blob, val, val_size); break; - case BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE: - if (!ulp_operand_read(fld->result_operand, + case BNXT_ULP_FIELD_OPC_SET_TO_REGFILE: + if (!ulp_operand_read(fld->field_operand, (uint8_t *)&idx, sizeof(uint16_t))) { BNXT_TF_DBG(ERR, "%s operand read failed\n", name); return -EINVAL; @@ -956,58 +925,52 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, return -EINVAL; } - val = ulp_blob_push_64(blob, ®val, fld->field_bit_size); + val = ulp_blob_push_64(blob, ®val, bitlen); if (!val) { - BNXT_TF_DBG(ERR, "%s push field failed\n", name); + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } break; - case BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE: - if (!ulp_operand_read(fld->result_operand, + case BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE: + if (!ulp_operand_read(fld->field_operand, (uint8_t *)&idx, sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name); + BNXT_TF_DBG(ERR, "%s operand read failed.\n", name); return -EINVAL; } idx = tfp_be_to_cpu_16(idx); if (ulp_mapper_glb_resource_read(parms->mapper_data, dir, idx, ®val)) { - BNXT_TF_DBG(ERR, "%s regfile[%d] read failed.\n", + BNXT_TF_DBG(ERR, "%s global regfile[%d] read failed.\n", name, idx); return -EINVAL; } - val = ulp_blob_push_64(blob, ®val, fld->field_bit_size); + val = ulp_blob_push_64(blob, ®val, bitlen); if (!val) { - BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } break; - case BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD: - if (!ulp_operand_read(fld->result_operand, + case BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD: + if (!ulp_operand_read(fld->field_operand, (uint8_t *)&idx, sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name); + BNXT_TF_DBG(ERR, "%s operand read failed.\n", + name); return -EINVAL; } idx = tfp_be_to_cpu_16(idx); if (idx < BNXT_ULP_CF_IDX_LAST) val = ulp_blob_push_32(blob, &parms->comp_fld[idx], - fld->field_bit_size); + bitlen); if (!val) { - BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } break; - case BNXT_ULP_MAPPER_OPC_SET_TO_ZERO: - if (ulp_blob_pad_push(blob, fld->field_bit_size) < 0) { - BNXT_TF_DBG(ERR, "%s too large for blob\n", name); - return -EINVAL; - } - - break; - case BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST: - if (!ulp_operand_read(fld->result_operand, + case BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST: + if (!ulp_operand_read(fld->field_operand, (uint8_t *)&act_bit, sizeof(uint64_t))) { BNXT_TF_DBG(ERR, "%s operand read failed\n", name); return -EINVAL; @@ -1015,10 +978,11 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, act_bit = tfp_be_to_cpu_64(act_bit); if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, act_bit)) { /* Action bit is set so consider operand_true */ - if (!ulp_operand_read(fld->result_operand_true, + if (!ulp_operand_read(fld->field_operand_true, (uint8_t *)&idx, sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s operand read failed\n", + BNXT_TF_DBG(ERR, + "%s true operand read failed\n", name); return -EINVAL; } @@ -1030,28 +994,27 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, } val = &parms->act_prop->act_details[idx]; field_size = ulp_mapper_act_prop_size_get(idx); - if (fld->field_bit_size < ULP_BYTE_2_BITS(field_size)) { - field_size = field_size - - ((fld->field_bit_size + 7) / 8); + if (bitlen < ULP_BYTE_2_BITS(field_size)) { + field_size = field_size - ((bitlen + 7) / 8); val += field_size; } - if (!ulp_blob_push(blob, val, fld->field_bit_size)) { - BNXT_TF_DBG(ERR, "%s push field failed\n", + if (!ulp_blob_push(blob, val, bitlen)) { + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } } else { /* action bit is not set, use the operand false */ - val = fld->result_operand_false; - if (!ulp_blob_push(blob, val, fld->field_bit_size)) { - BNXT_TF_DBG(ERR, "%s failed to add field\n", + val = fld->field_operand_false; + if (!ulp_blob_push(blob, val, bitlen)) { + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } } break; - case BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST: - if (!ulp_operand_read(fld->result_operand, + case BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST: + if (!ulp_operand_read(fld->field_operand, (uint8_t *)&act_bit, sizeof(uint64_t))) { BNXT_TF_DBG(ERR, "%s operand read failed\n", name); return -EINVAL; @@ -1059,22 +1022,22 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, act_bit = tfp_be_to_cpu_64(act_bit); if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, act_bit)) { /* Action bit is set so consider operand_true */ - val = fld->result_operand_true; + val = fld->field_operand_true; } else { /* action bit is not set, use the operand false */ - val = fld->result_operand_false; + val = fld->field_operand_false; } - if (!ulp_blob_push(blob, val, fld->field_bit_size)) { - BNXT_TF_DBG(ERR, "%s failed to add field\n", + if (!ulp_blob_push(blob, val, bitlen)) { + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } break; - case BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF: - if (!ulp_operand_read(fld->result_operand, + case BNXT_ULP_FIELD_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF: + if (!ulp_operand_read(fld->field_operand, (uint8_t *)&idx, sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name); + BNXT_TF_DBG(ERR, "%s operand read failed.\n", name); return -EINVAL; } idx = tfp_be_to_cpu_16(idx); @@ -1084,9 +1047,9 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, } /* check if the computed field is set */ if (ULP_COMP_FLD_IDX_RD(parms, idx)) - val = fld->result_operand_true; + val = fld->field_operand_true; else - val = fld->result_operand_false; + val = fld->field_operand_false; /* read the appropriate computed field */ if (!ulp_operand_read(val, (uint8_t *)&idx, sizeof(uint16_t))) { @@ -1098,15 +1061,14 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, BNXT_TF_DBG(ERR, "%s invalid index %u\n", name, idx); return -EINVAL; } - val = ulp_blob_push_32(blob, &parms->comp_fld[idx], - fld->field_bit_size); + val = ulp_blob_push_32(blob, &parms->comp_fld[idx], bitlen); if (!val) { - BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } break; - case BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST: - if (!ulp_operand_read(fld->result_operand, + case BNXT_ULP_FIELD_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST: + if (!ulp_operand_read(fld->field_operand, (uint8_t *)&hdr_bit, sizeof(uint64_t))) { BNXT_TF_DBG(ERR, "%s operand read failed\n", name); return -EINVAL; @@ -1114,20 +1076,128 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, hdr_bit = tfp_be_to_cpu_64(hdr_bit); if (ULP_BITMAP_ISSET(parms->hdr_bitmap->bits, hdr_bit)) { /* Header bit is set so consider operand_true */ - val = fld->result_operand_true; + val = fld->field_operand_true; } else { /* Header bit is not set, use the operand false */ - val = fld->result_operand_false; + val = fld->field_operand_false; } - if (!ulp_blob_push(blob, val, fld->field_bit_size)) { - BNXT_TF_DBG(ERR, "%s failed to add field\n", + if (!ulp_blob_push(blob, val, bitlen)) { + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); return -EINVAL; } break; + case BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP: + if (!ulp_operand_read(fld->field_operand, + (uint8_t *)&idx, sizeof(uint16_t))) { + BNXT_TF_DBG(ERR, "%s operand read failed\n", name); + return -EINVAL; + } + idx = tfp_be_to_cpu_16(idx); + + if (idx >= BNXT_ULP_ACT_PROP_IDX_LAST) { + BNXT_TF_DBG(ERR, "%s act_prop[%d] oob\n", name, idx); + return -EINVAL; + } + val = &parms->act_prop->act_details[idx]; + field_size = ulp_mapper_act_prop_size_get(idx); + if (bitlen < ULP_BYTE_2_BITS(field_size)) { + field_size = field_size - ((bitlen + 7) / 8); + val += field_size; + } + if (!ulp_blob_push(blob, val, bitlen)) { + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); + return -EINVAL; + } + break; + case BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT: + if (!ulp_operand_read(fld->field_operand, + (uint8_t *)&act_bit, sizeof(uint64_t))) { + BNXT_TF_DBG(ERR, "%s operand read failed\n", name); + return -EINVAL; + } + act_bit = tfp_be_to_cpu_64(act_bit); + memset(act_val, 0, sizeof(act_val)); + if (ULP_BITMAP_ISSET(parms->act_bitmap->bits, act_bit)) + act_val[0] = 1; + if (bitlen > ULP_BYTE_2_BITS(sizeof(act_val))) { + BNXT_TF_DBG(ERR, "%s field size is incorrect\n", name); + return -EINVAL; + } + if (!ulp_blob_push(blob, act_val, bitlen)) { + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); + return -EINVAL; + } + val = act_val; + break; + case BNXT_ULP_FIELD_OPC_SET_TO_ENCAP_ACT_PROP_SZ: + if (!ulp_operand_read(fld->field_operand, + (uint8_t *)&idx, sizeof(uint16_t))) { + BNXT_TF_DBG(ERR, "%s operand read failed\n", name); + return -EINVAL; + } + idx = tfp_be_to_cpu_16(idx); + + if (idx >= BNXT_ULP_ACT_PROP_IDX_LAST) { + BNXT_TF_DBG(ERR, "%s act_prop[%d] oob\n", name, idx); + return -EINVAL; + } + val = &parms->act_prop->act_details[idx]; + + /* get the size index next */ + if (!ulp_operand_read(&fld->field_operand[sizeof(uint16_t)], + (uint8_t *)&size_idx, sizeof(uint16_t))) { + BNXT_TF_DBG(ERR, "%s operand read failed\n", name); + return -EINVAL; + } + size_idx = tfp_be_to_cpu_16(size_idx); + + if (size_idx >= BNXT_ULP_ACT_PROP_IDX_LAST) { + BNXT_TF_DBG(ERR, "act_prop[%d] oob\n", size_idx); + return -EINVAL; + } + memcpy(&val_size, &parms->act_prop->act_details[size_idx], + sizeof(uint32_t)); + val_size = tfp_be_to_cpu_32(val_size); + val_size = ULP_BYTE_2_BITS(val_size); + ulp_blob_push_encap(blob, val, val_size); + break; + case BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD: + if (!ulp_operand_read(fld->field_operand, (uint8_t *)&idx, + sizeof(uint16_t))) { + BNXT_TF_DBG(ERR, "%s operand read failed.\n", name); + return -EINVAL; + } + idx = tfp_be_to_cpu_16(idx); + /* get the index from the global field list */ + if (ulp_mapper_glb_field_tbl_get(parms, idx, &bit)) { + BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n", + idx); + return -EINVAL; + } + if (is_key) + val = parms->hdr_field[bit].spec; + else + val = parms->hdr_field[bit].mask; + + /* + * Need to account for how much data was pushed to the header + * field vs how much is to be inserted in the key/mask. + */ + field_size = parms->hdr_field[bit].size; + if (bitlen < ULP_BYTE_2_BITS(field_size)) { + field_size = field_size - ((bitlen + 7) / 8); + val += field_size; + } + + if (!ulp_blob_push(blob, val, bitlen)) { + BNXT_TF_DBG(ERR, "%s push to blob failed\n", name); + return -EINVAL; + } + break; default: - BNXT_TF_DBG(ERR, "invalid result mapper opcode 0x%x at %d\n", - fld->result_opcode, write_idx); + BNXT_TF_DBG(ERR, "%s invalid field opcode 0x%x at %d\n", + name, fld->field_opcode, write_idx); return -EINVAL; } return 0; @@ -1143,7 +1213,7 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms, struct ulp_blob *data, const char *name) { - struct bnxt_ulp_mapper_result_field_info *dflds; + struct bnxt_ulp_mapper_field_info *dflds; uint32_t i, num_flds = 0, encap_flds = 0; int32_t rc = 0; @@ -1169,8 +1239,8 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms, ulp_blob_encap_swap_idx_set(data); /* Process the result fields */ - rc = ulp_mapper_result_field_process(parms, tbl->direction, - &dflds[i], data, name); + rc = ulp_mapper_field_process(parms, tbl->direction, + &dflds[i], data, 0, name); if (rc) { BNXT_TF_DBG(ERR, "data field failed\n"); return rc; @@ -1184,139 +1254,6 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms, return rc; } -/* Function to alloc action record and set the table. */ -static int32_t -ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms, - enum tf_dir dir, - struct bnxt_ulp_mapper_key_field_info *f, - struct ulp_blob *blob, - uint8_t is_key, - const char *name) -{ - uint64_t val64; - uint16_t idx, bitlen; - uint32_t opcode; - uint8_t *operand; - struct ulp_regfile *regfile = parms->regfile; - uint8_t *val = NULL; - struct bnxt_ulp_mapper_key_field_info *fld = f; - uint32_t field_size; - - if (is_key) { - operand = fld->spec_operand; - opcode = fld->spec_opcode; - } else { - operand = fld->mask_operand; - opcode = fld->mask_opcode; - } - - bitlen = fld->field_bit_size; - - switch (opcode) { - case BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT: - val = operand; - if (!ulp_blob_push(blob, val, bitlen)) { - BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); - return -EINVAL; - } - break; - case BNXT_ULP_MAPPER_OPC_SET_TO_ZERO: - if (ulp_blob_pad_push(blob, bitlen) < 0) { - BNXT_TF_DBG(ERR, "%s pad too large for blob\n", name); - return -EINVAL; - } - - break; - case BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD: - if (!ulp_operand_read(operand, (uint8_t *)&idx, - sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name); - return -EINVAL; - } - idx = tfp_be_to_cpu_16(idx); - if (is_key) - val = parms->hdr_field[idx].spec; - else - val = parms->hdr_field[idx].mask; - - /* - * Need to account for how much data was pushed to the header - * field vs how much is to be inserted in the key/mask. - */ - field_size = parms->hdr_field[idx].size; - if (bitlen < ULP_BYTE_2_BITS(field_size)) { - field_size = field_size - ((bitlen + 7) / 8); - val += field_size; - } - - if (!ulp_blob_push(blob, val, bitlen)) { - BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); - return -EINVAL; - } - break; - case BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD: - if (!ulp_operand_read(operand, (uint8_t *)&idx, - sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name); - return -EINVAL; - } - idx = tfp_be_to_cpu_16(idx); - if (idx < BNXT_ULP_CF_IDX_LAST) - val = ulp_blob_push_32(blob, &parms->comp_fld[idx], - bitlen); - if (!val) { - BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); - return -EINVAL; - } - break; - case BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE: - if (!ulp_operand_read(operand, (uint8_t *)&idx, - sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name); - return -EINVAL; - } - idx = tfp_be_to_cpu_16(idx); - - if (!ulp_regfile_read(regfile, idx, &val64)) { - BNXT_TF_DBG(ERR, "%s regfile[%d] read failed.\n", - name, idx); - return -EINVAL; - } - - val = ulp_blob_push_64(blob, &val64, bitlen); - if (!val) { - BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); - return -EINVAL; - } - break; - case BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE: - if (!ulp_operand_read(operand, (uint8_t *)&idx, - sizeof(uint16_t))) { - BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name); - return -EINVAL; - } - idx = tfp_be_to_cpu_16(idx); - if (ulp_mapper_glb_resource_read(parms->mapper_data, - dir, - idx, &val64)) { - BNXT_TF_DBG(ERR, "%s regfile[%d] read failed.\n", - name, idx); - return -EINVAL; - } - val = ulp_blob_push_64(blob, &val64, bitlen); - if (!val) { - BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); - return -EINVAL; - } - break; - default: - BNXT_TF_DBG(ERR, "invalid keymask mapper opcode 0x%x\n", - opcode); - return -EINVAL; - } - return 0; -} - static int32_t ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl, @@ -1380,7 +1317,7 @@ ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms, mark = tfp_be_to_cpu_32(mark); if (!ulp_regfile_read(parms->regfile, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, &val64)) { BNXT_TF_DBG(ERR, "read action ptr main failed\n"); return -EINVAL; @@ -1423,7 +1360,7 @@ ulp_mapper_mark_vfr_idx_process(struct bnxt_ulp_mapper_parms *parms, /* Get the main action pointer */ if (!ulp_regfile_read(parms->regfile, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, &val64)) { BNXT_TF_DBG(ERR, "read action ptr main failed\n"); return -EINVAL; @@ -1521,8 +1458,8 @@ ulp_mapper_tcam_tbl_entry_write(struct bnxt_ulp_mapper_parms *parms, sparms.idx = idx; /* Already verified the key/mask lengths */ sparms.key = ulp_blob_data_get(key, &tmplen); - sparms.key_sz_in_bits = tmplen; sparms.mask = ulp_blob_data_get(mask, &tmplen); + sparms.key_sz_in_bits = tbl->key_bit_size; sparms.result = ulp_blob_data_get(data, &tmplen); if (tbl->result_bit_size != tmplen) { @@ -1575,7 +1512,7 @@ static int32_t ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) { - struct bnxt_ulp_mapper_key_field_info *kflds; + struct bnxt_ulp_mapper_key_info *kflds; struct ulp_blob key, mask, data, update_data; uint32_t i, num_kflds; struct tf *tfp; @@ -1632,20 +1569,22 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, */ for (i = 0; i < num_kflds; i++) { /* Setup the key */ - rc = ulp_mapper_keymask_field_process(parms, tbl->direction, - &kflds[i], - &key, 1, "TCAM Key"); + rc = ulp_mapper_field_process(parms, tbl->direction, + &kflds[i].field_info_spec, + &key, 1, "TCAM Key"); if (rc) { - BNXT_TF_DBG(ERR, "Key field set failed.\n"); + BNXT_TF_DBG(ERR, "Key field set failed %s\n", + kflds[i].field_info_spec.description); return rc; } /* Setup the mask */ - rc = ulp_mapper_keymask_field_process(parms, tbl->direction, - &kflds[i], - &mask, 0, "TCAM Mask"); + rc = ulp_mapper_field_process(parms, tbl->direction, + &kflds[i].field_info_mask, + &mask, 0, "TCAM Mask"); if (rc) { - BNXT_TF_DBG(ERR, "Mask field set failed.\n"); + BNXT_TF_DBG(ERR, "Mask field set failed %s\n", + kflds[i].field_info_mask.description); return rc; } } @@ -1728,8 +1667,8 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms, } /* Write the tcam index into the regfile*/ - if (!ulp_regfile_write(parms->regfile, tbl->tbl_operand, - (uint64_t)tfp_cpu_to_be_64(idx))) { + if (ulp_regfile_write(parms->regfile, tbl->tbl_operand, + (uint64_t)tfp_cpu_to_be_64(idx))) { BNXT_TF_DBG(ERR, "Regfile[%d] write failed.\n", tbl->tbl_operand); rc = -EINVAL; @@ -1786,7 +1725,7 @@ static int32_t ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) { - struct bnxt_ulp_mapper_key_field_info *kflds; + struct bnxt_ulp_mapper_key_info *kflds; struct ulp_blob key, data; uint32_t i, num_kflds; uint16_t tmplen; @@ -1822,9 +1761,9 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms, /* create the key */ for (i = 0; i < num_kflds; i++) { /* Setup the key */ - rc = ulp_mapper_keymask_field_process(parms, tbl->direction, - &kflds[i], - &key, 1, "EM Key"); + rc = ulp_mapper_field_process(parms, tbl->direction, + &kflds[i].field_info_spec, + &key, 1, "EM Key"); if (rc) { BNXT_TF_DBG(ERR, "Key field set failed.\n"); return rc; @@ -2150,7 +2089,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, rc = ulp_regfile_write(parms->regfile, tbl->tbl_operand, tfp_cpu_to_be_64(regval)); - if (!rc) { + if (rc) { BNXT_TF_DBG(ERR, "Failed to write regfile[%d] rc=%d\n", tbl->tbl_operand, rc); goto error; @@ -2326,7 +2265,7 @@ static int32_t ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, struct bnxt_ulp_mapper_tbl_info *tbl) { - struct bnxt_ulp_mapper_key_field_info *kflds; + struct bnxt_ulp_mapper_key_info *kflds; struct ulp_flow_db_res_params fid_parms; struct ulp_mapper_gen_tbl_entry gen_tbl_ent, *g; uint16_t tmplen; @@ -2351,9 +2290,9 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, } for (i = 0; i < num_kflds; i++) { /* Setup the key */ - rc = ulp_mapper_keymask_field_process(parms, tbl->direction, - &kflds[i], - &key, 1, "Gen Tbl Key"); + rc = ulp_mapper_field_process(parms, tbl->direction, + &kflds[i].field_info_spec, + &key, 1, "Gen Tbl Key"); if (rc) { BNXT_TF_DBG(ERR, "Failed to create key for Gen tbl rc=%d\n", @@ -2416,7 +2355,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, /* Initialize the blob data */ if (!ulp_blob_init(&data, tbl->result_bit_size, - BNXT_ULP_BYTE_ORDER_BE)) { + gen_tbl_ent.byte_order)) { BNXT_TF_DBG(ERR, "Failed initial index table blob\n"); return -EINVAL; } @@ -2429,7 +2368,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, return rc; } byte_data = ulp_blob_data_get(&data, &tmplen); - rc = ulp_mapper_gen_tbl_entry_data_set(&gen_tbl_ent, 0, + rc = ulp_mapper_gen_tbl_entry_data_set(&gen_tbl_ent, tmplen, byte_data, ULP_BITS_2_BYTE(tmplen)); if (rc) { @@ -2448,11 +2387,11 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms, /* Set the generic entry hit */ rc = ulp_regfile_write(parms->regfile, - BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT, + BNXT_ULP_RF_IDX_GENERIC_TBL_HIT, tfp_cpu_to_be_64(gen_tbl_hit)); - if (!rc) { + if (rc) { BNXT_TF_DBG(ERR, "Write regfile[%d] failed\n", - BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT); + BNXT_ULP_RF_IDX_GENERIC_TBL_HIT); return -EIO; } @@ -2557,8 +2496,7 @@ ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms, int32_t *res) { int32_t rc = 0; - uint8_t *bit; - uint32_t idx; + uint8_t bit; uint64_t regval; switch (opc) { @@ -2621,26 +2559,22 @@ ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms, } break; case BNXT_ULP_COND_OPC_FIELD_BIT_IS_SET: - idx = (parms->class_tid << BNXT_ULP_GLB_FIELD_TBL_SHIFT) | - operand; - bit = ulp_mapper_glb_field_tbl_get(idx); - if (!bit) { + rc = ulp_mapper_glb_field_tbl_get(parms, operand, &bit); + if (rc) { BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n", - idx); + operand); return -EINVAL; } - *res = ULP_BITMAP_ISSET(parms->fld_bitmap->bits, (1 << *bit)); + *res = ULP_INDEX_BITMAP_GET(parms->fld_bitmap->bits, bit); break; case BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET: - idx = (parms->class_tid << BNXT_ULP_GLB_FIELD_TBL_SHIFT) | - operand; - bit = ulp_mapper_glb_field_tbl_get(idx); - if (!bit) { + rc = ulp_mapper_glb_field_tbl_get(parms, operand, &bit); + if (rc) { BNXT_TF_DBG(ERR, "invalid ulp_glb_field_tbl idx %d\n", - idx); + operand); return -EINVAL; } - *res = !ULP_BITMAP_ISSET(parms->fld_bitmap->bits, (1 << *bit)); + *res = !ULP_INDEX_BITMAP_GET(parms->fld_bitmap->bits, bit); break; case BNXT_ULP_COND_OPC_REGFILE_IS_SET: if (!ulp_regfile_read(parms->regfile, operand, ®val)) { @@ -2728,6 +2662,70 @@ ulp_mapper_cond_opc_list_process(struct bnxt_ulp_mapper_parms *parms, return rc; } +/* + * Processes conflict resolution and returns both a status and result. + * The status must be checked prior to verifying the result. + * + * returns 0 for success, negative on failure + * returns res = 1 for true, res = 0 for false. + */ +static int32_t +ulp_mapper_conflict_resolution_process(struct bnxt_ulp_mapper_parms *parms, + struct bnxt_ulp_mapper_tbl_info *tbl, + int32_t *res) +{ + int32_t rc = 0; + uint64_t regval; + uint64_t comp_sig_id; + + *res = 0; + switch (tbl->accept_opcode) { + case BNXT_ULP_ACCEPT_OPC_ALWAYS: + *res = 1; + break; + case BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH: + /* perform the signature validation*/ + if (tbl->resource_func == + BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE) { + /* Perform the check that generic table is hit or not */ + if (!ulp_regfile_read(parms->regfile, + BNXT_ULP_RF_IDX_GENERIC_TBL_HIT, + ®val)) { + BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", + BNXT_ULP_RF_IDX_GENERIC_TBL_HIT); + return -EINVAL; + } + if (!regval) { + /* not a hit so no need to check flow sign*/ + *res = 1; + return rc; + } + } + /* compare the new flow signature against stored one */ + if (!ulp_regfile_read(parms->regfile, + BNXT_ULP_RF_IDX_FLOW_SIG_ID, + ®val)) { + BNXT_TF_DBG(ERR, "regfile[%d] read oob\n", + BNXT_ULP_RF_IDX_FLOW_SIG_ID); + return -EINVAL; + } + comp_sig_id = ULP_COMP_FLD_IDX_RD(parms, + BNXT_ULP_CF_IDX_FLOW_SIG_ID); + regval = tfp_be_to_cpu_64(regval); + if (comp_sig_id == regval) + *res = 1; + else + BNXT_TF_DBG(ERR, "failed signature match %x:%x\n", + (uint32_t)comp_sig_id, (uint32_t)regval); + break; + default: + BNXT_TF_DBG(ERR, "Invalid accept opcode %d\n", + tbl->accept_opcode); + return -EINVAL; + } + return rc; +} + static int32_t ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) { @@ -2757,9 +2755,8 @@ ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) /* Reject the template if True */ if (cond_rc) { BNXT_TF_DBG(ERR, "%s Template %d rejected.\n", - (parms->tmpl_type == - BNXT_ULP_TEMPLATE_TYPE_CLASS) ? - "class" : "action", tid); + ulp_mapper_tmpl_name_str(parms->tmpl_type), + tid); return -EINVAL; } } @@ -2767,8 +2764,8 @@ ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) tbls = ulp_mapper_tbl_list_get(parms, tid, &num_tbls); if (!tbls || !num_tbls) { BNXT_TF_DBG(ERR, "No %s tables for %d:%d\n", - (parms->tmpl_type == BNXT_ULP_TEMPLATE_TYPE_CLASS) ? - "class" : "action", parms->dev_id, tid); + ulp_mapper_tmpl_name_str(parms->tmpl_type), + parms->dev_id, tid); return -EINVAL; } @@ -2793,6 +2790,15 @@ ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) if (!cond_rc) continue; + /* process the fdb opcode for alloc push */ + if (tbl->fdb_opcode == BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE) { + rc = ulp_mapper_fdb_opc_alloc_rid(parms, tbl); + if (rc) { + BNXT_TF_DBG(ERR, "Failed to do fdb alloc\n"); + return rc; + } + } + switch (tbl->resource_func) { case BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE: rc = ulp_mapper_tcam_tbl_process(parms, tbl); @@ -2825,13 +2831,22 @@ ulp_mapper_tbls_process(struct bnxt_ulp_mapper_parms *parms, uint32_t tid) tbl->resource_func); goto error; } + + /* perform the post table process */ + rc = ulp_mapper_conflict_resolution_process(parms, tbl, + &cond_rc); + if (rc || !cond_rc) { + BNXT_TF_DBG(ERR, "Failed due to conflict resolution\n"); + rc = -EINVAL; + goto error; + } } return rc; error: BNXT_TF_DBG(ERR, "%s tables failed creation for %d:%d\n", - (parms->tmpl_type = BNXT_ULP_TEMPLATE_TYPE_CLASS) ? - "class" : "action", parms->dev_id, tid); + ulp_mapper_tmpl_name_str(parms->tmpl_type), + parms->dev_id, tid); return rc; } @@ -3054,7 +3069,7 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx, { struct bnxt_ulp_mapper_parms parms; struct ulp_regfile regfile; - int32_t rc, trc; + int32_t rc = 0, trc; if (!ulp_ctx || !cparms) return -EINVAL; @@ -3109,14 +3124,6 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx, return -EINVAL; } - rc = ulp_regfile_write(parms.regfile, - BNXT_ULP_REGFILE_INDEX_CLASS_TID, - tfp_cpu_to_be_64((uint64_t)parms.class_tid)); - if (!rc) { - BNXT_TF_DBG(ERR, "Unable to write template ID to regfile\n"); - return -EINVAL; - } - /* Process the action template list from the selected action table*/ if (parms.act_tid) { parms.tmpl_type = BNXT_ULP_TEMPLATE_TYPE_ACTION; @@ -3152,7 +3159,7 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx, flow_error: /* Free all resources that were allocated during flow creation */ - trc = ulp_mapper_flow_destroy(ulp_ctx, BNXT_ULP_FDB_TYPE_REGULAR, + trc = ulp_mapper_flow_destroy(ulp_ctx, parms.flow_type, parms.fid); if (trc) BNXT_TF_DBG(ERR, "Failed to free all resources rc=%d\n", trc); diff --git a/drivers/net/bnxt/tf_ulp/ulp_matcher.c b/drivers/net/bnxt/tf_ulp/ulp_matcher.c index e23867f8b9..275214d489 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_matcher.c +++ b/drivers/net/bnxt/tf_ulp/ulp_matcher.c @@ -77,6 +77,8 @@ ulp_matcher_pattern_match(struct ulp_rte_parser_params *params, BNXT_TF_DBG(DEBUG, "Found matching pattern template %d\n", class_match->class_tid); *class_id = class_match->class_tid; + params->hdr_sig_id = class_match->hdr_sig_id; + params->flow_sig_id = class_match->flow_sig_id; return BNXT_TF_RC_SUCCESS; error: diff --git a/drivers/net/bnxt/tf_ulp/ulp_port_db.c b/drivers/net/bnxt/tf_ulp/ulp_port_db.c index a11e6786c0..cc66c78312 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_port_db.c +++ b/drivers/net/bnxt/tf_ulp/ulp_port_db.c @@ -185,15 +185,13 @@ int32_t ulp_port_db_dev_port_intf_update(struct bnxt_ulp_context *ulp_ctxt, port_data = &port_db->phy_port_list[func->phy_port_id]; if (!port_data->port_valid) { port_data->port_svif = - bnxt_get_svif(port_id, false, - BNXT_ULP_INTF_TYPE_INVALID); + bnxt_get_svif(port_id, false, BNXT_ULP_INTF_TYPE_INVALID); port_data->port_spif = bnxt_get_phy_port_id(port_id); port_data->port_parif = bnxt_get_parif(port_id, BNXT_ULP_INTF_TYPE_INVALID); port_data->port_vport = bnxt_get_vport(port_id); port_data->port_valid = true; } - return 0; } diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c new file mode 100644 index 0000000000..8054bac189 --- /dev/null +++ b/drivers/net/bnxt/tf_ulp/ulp_rte_handler_tbl.c @@ -0,0 +1,412 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2014-2021 Broadcom + * All rights reserved. + */ + +#include "ulp_template_db_enum.h" +#include "ulp_template_struct.h" +#include "ulp_rte_parser.h" + +/* + * This structure has to be indexed based on the rte_flow_action_type that is + * part of DPDK. The below array is list of parsing functions for each of the + * flow actions that are supported. + */ +struct bnxt_ulp_rte_act_info ulp_act_info[] = { + [RTE_FLOW_ACTION_TYPE_END] = { + .act_type = BNXT_ULP_ACT_TYPE_END, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_VOID] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_void_act_handler + }, + [RTE_FLOW_ACTION_TYPE_PASSTHRU] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_JUMP] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_jump_act_handler + }, + [RTE_FLOW_ACTION_TYPE_MARK] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_mark_act_handler + }, + [RTE_FLOW_ACTION_TYPE_FLAG] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_QUEUE] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_DROP] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_drop_act_handler + }, + [RTE_FLOW_ACTION_TYPE_COUNT] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_count_act_handler + }, + [RTE_FLOW_ACTION_TYPE_RSS] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_rss_act_handler + }, + [RTE_FLOW_ACTION_TYPE_PF] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_pf_act_handler + }, + [RTE_FLOW_ACTION_TYPE_VF] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_vf_act_handler + }, + [RTE_FLOW_ACTION_TYPE_PHY_PORT] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_phy_port_act_handler + }, + [RTE_FLOW_ACTION_TYPE_PORT_ID] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_port_id_act_handler + }, + [RTE_FLOW_ACTION_TYPE_METER] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_SECURITY] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_of_pop_vlan_act_handler + }, + [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_of_push_vlan_act_handler + }, + [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_of_set_vlan_vid_act_handler + }, + [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_of_set_vlan_pcp_act_handler + }, + [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_vxlan_encap_act_handler + }, + [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_vxlan_decap_act_handler + }, + [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_set_ipv4_src_act_handler + }, + [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_set_ipv4_dst_act_handler + }, + [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_set_tp_src_act_handler + }, + [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_set_tp_dst_act_handler + }, + [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_DEC_TTL] = { + .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, + .proto_act_func = ulp_rte_dec_ttl_act_handler + }, + [RTE_FLOW_ACTION_TYPE_SET_TTL] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + }, + [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = { + .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, + .proto_act_func = NULL + } +}; + +/* + * This table has to be indexed based on the rte_flow_item_type that is part of + * DPDK. The below array is list of parsing functions for each of the flow items + * that are supported. + */ +struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = { + [RTE_FLOW_ITEM_TYPE_END] = { + .hdr_type = BNXT_ULP_HDR_TYPE_END, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_VOID] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_void_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_INVERT] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ANY] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_PF] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_pf_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_VF] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_vf_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_PHY_PORT] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_phy_port_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_PORT_ID] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_port_id_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_RAW] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ETH] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_eth_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_VLAN] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_vlan_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_IPV4] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_ipv4_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_IPV6] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_ipv6_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_ICMP] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_UDP] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_udp_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_TCP] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_tcp_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_SCTP] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_VXLAN] = { + .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, + .proto_hdr_func = ulp_rte_vxlan_hdr_handler + }, + [RTE_FLOW_ITEM_TYPE_E_TAG] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_NVGRE] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_MPLS] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_GRE] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_FUZZY] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_GTP] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_GTPC] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_GTPU] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ESP] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_GENEVE] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ICMP6] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_MARK] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_META] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_GRE_KEY] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_GTP_PSC] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_PPPOES] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_PPPOED] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_NSH] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_IGMP] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_AH] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + }, + [RTE_FLOW_ITEM_TYPE_HIGIG2] = { + .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, + .proto_hdr_func = NULL + } +}; diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c index 3fb29c0cb4..f5f9ff6839 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c +++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c @@ -3,7 +3,6 @@ * All rights reserved. */ -#include #include "bnxt.h" #include "ulp_template_db_enum.h" #include "ulp_template_struct.h" @@ -228,11 +227,6 @@ bnxt_ulp_comp_fld_intf_update(struct ulp_rte_parser_params *params) BNXT_ULP_CF_IDX_VF_FUNC_PARIF, parif); - /* populate the loopback parif */ - ULP_COMP_FLD_IDX_WR(params, - BNXT_ULP_CF_IDX_LOOPBACK_PARIF, - BNXT_ULP_SYM_VF_FUNC_PARIF); - } else { /* Set DRV func PARIF */ if (ulp_port_db_parif_get(params->ulp_ctx, ifindex, @@ -301,6 +295,9 @@ ulp_post_process_normal_flow(struct ulp_rte_parser_params *params) /* Merge the hdr_fp_bit into the proto header bit */ params->hdr_bitmap.bits |= params->hdr_fp_bit.bits; + /* Update the comp fld fid */ + ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_FID, params->fid); + /* Update the computed interface parameters */ bnxt_ulp_comp_fld_intf_update(params); @@ -686,10 +683,8 @@ ulp_rte_eth_hdr_handler(const struct rte_flow_item *item, ulp_rte_prsr_mask_copy(params, &idx, ð_mask->type, sizeof(eth_mask->type)); } - /* Add number of vlan header elements */ + /* Add number of Eth header elements */ params->field_idx += BNXT_ULP_PROTO_HDR_ETH_NUM; - params->vlan_idx = params->field_idx; - params->field_idx += BNXT_ULP_PROTO_HDR_VLAN_NUM; /* Update the protocol hdr bitmap */ if (ULP_BITMAP_ISSET(params->hdr_bitmap.bits, @@ -722,7 +717,7 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item, const struct rte_flow_item_vlan *vlan_mask = item->mask; struct ulp_rte_hdr_field *field; struct ulp_rte_hdr_bitmap *hdr_bit; - uint32_t idx = params->vlan_idx; + uint32_t idx = params->field_idx; uint16_t vlan_tag, priority; uint32_t outer_vtag_num; uint32_t inner_vtag_num; @@ -781,8 +776,8 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item, ulp_rte_prsr_mask_copy(params, &idx, &vlan_mask->inner_type, sizeof(vlan_mask->inner_type)); } - /* Set the vlan index to new incremented value */ - params->vlan_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM; + /* Set the field index to new incremented value */ + params->field_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM; /* Get the outer tag and inner tag counts */ outer_vtag_num = ULP_COMP_FLD_IDX_RD(params, @@ -1013,13 +1008,6 @@ ulp_rte_ipv4_hdr_handler(const struct rte_flow_item *item, ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3, 1); } - /* Some of the PMD applications may set the protocol field - * in the IPv4 spec but don't set the mask. So, consider - * the mask in the proto value calculation. - */ - if (ipv4_mask) - proto &= ipv4_mask->hdr.next_proto_id; - /* Update the field protocol hdr bitmap */ ulp_rte_l3_proto_type_update(params, proto, inner_flag); ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L3_HDR_CNT, ++cnt); @@ -1117,8 +1105,8 @@ ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item, &vtcf_mask, size); /* - * The TC and flow label field are ignored since OVS is - * setting it for match and it is not supported. + * The TC and flow label field are ignored since OVS is setting + * it for match and it is not supported. * This is a work around and * shall be addressed in the future. */ @@ -1158,13 +1146,6 @@ ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item, ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3, 1); } - /* Some of the PMD applications may set the protocol field - * in the IPv6 spec but don't set the mask. So, consider - * the mask in proto value calculation. - */ - if (ipv6_mask) - proto &= ipv6_mask->hdr.proto; - /* Update the field protocol hdr bitmap */ ulp_rte_l3_proto_type_update(params, proto, inner_flag); ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L3_HDR_CNT, ++cnt); @@ -1549,7 +1530,7 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item, buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG]; ulp_encap_buffer_copy(buff, item->spec, - sizeof(struct rte_vlan_hdr), + sizeof(struct rte_flow_item_vlan), ULP_BUFFER_ALIGN_8_BYTE); if (!ulp_rte_item_skip_void(&item, 1)) @@ -1560,15 +1541,15 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item, if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { vlan_num++; memcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG + - sizeof(struct rte_vlan_hdr)], + sizeof(struct rte_flow_item_vlan)], item->spec, - sizeof(struct rte_vlan_hdr)); + sizeof(struct rte_flow_item_vlan)); if (!ulp_rte_item_skip_void(&item, 1)) return BNXT_TF_RC_ERROR; } /* Update the vlan count and size of more than one */ if (vlan_num) { - vlan_size = vlan_num * sizeof(struct rte_vlan_hdr); + vlan_size = vlan_num * sizeof(struct rte_flow_item_vlan); vlan_num = tfp_cpu_to_be_32(vlan_num); memcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM], &vlan_num, @@ -1727,7 +1708,7 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item, BNXT_TF_DBG(ERR, "vxlan encap does not have vni\n"); return BNXT_TF_RC_ERROR; } - vxlan_size = sizeof(struct rte_vxlan_hdr); + vxlan_size = sizeof(struct rte_flow_item_vxlan); /* copy the vxlan details */ memcpy(&vxlan_spec, item->spec, vxlan_size); vxlan_spec.flags = 0x08; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c index 92d3c043ef..4cb532adb7 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c @@ -3,813 +3,141 @@ * All rights reserved. */ +/* date: Mon Nov 23 17:33:02 2020 */ + #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" -#include "ulp_rte_parser.h" +#include "ulp_template_db_tbl.h" /* * Action signature table: * maps hash id to ulp_act_match_list[] index */ uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = { - [BNXT_ULP_ACT_HID_015a] = 1, - [BNXT_ULP_ACT_HID_00eb] = 2, - [BNXT_ULP_ACT_HID_0043] = 3, - [BNXT_ULP_ACT_HID_03d8] = 4, - [BNXT_ULP_ACT_HID_02c1] = 5, - [BNXT_ULP_ACT_HID_015e] = 6, - [BNXT_ULP_ACT_HID_00ef] = 7, - [BNXT_ULP_ACT_HID_0047] = 8, - [BNXT_ULP_ACT_HID_03dc] = 9, - [BNXT_ULP_ACT_HID_02c5] = 10, - [BNXT_ULP_ACT_HID_025b] = 11, - [BNXT_ULP_ACT_HID_01ec] = 12, - [BNXT_ULP_ACT_HID_0144] = 13, - [BNXT_ULP_ACT_HID_04d9] = 14, - [BNXT_ULP_ACT_HID_03c2] = 15, - [BNXT_ULP_ACT_HID_025f] = 16, - [BNXT_ULP_ACT_HID_01f0] = 17, - [BNXT_ULP_ACT_HID_0148] = 18, - [BNXT_ULP_ACT_HID_04dd] = 19, - [BNXT_ULP_ACT_HID_03c6] = 20, - [BNXT_ULP_ACT_HID_0000] = 21, - [BNXT_ULP_ACT_HID_0002] = 22, - [BNXT_ULP_ACT_HID_0800] = 23, - [BNXT_ULP_ACT_HID_0101] = 24, - [BNXT_ULP_ACT_HID_0020] = 25, - [BNXT_ULP_ACT_HID_0901] = 26, - [BNXT_ULP_ACT_HID_0121] = 27, - [BNXT_ULP_ACT_HID_0004] = 28, - [BNXT_ULP_ACT_HID_0006] = 29, - [BNXT_ULP_ACT_HID_0804] = 30, - [BNXT_ULP_ACT_HID_0105] = 31, - [BNXT_ULP_ACT_HID_0024] = 32, - [BNXT_ULP_ACT_HID_0905] = 33, - [BNXT_ULP_ACT_HID_0125] = 34, - [BNXT_ULP_ACT_HID_0001] = 35, - [BNXT_ULP_ACT_HID_0005] = 36, - [BNXT_ULP_ACT_HID_0009] = 37, - [BNXT_ULP_ACT_HID_000d] = 38, - [BNXT_ULP_ACT_HID_0021] = 39, - [BNXT_ULP_ACT_HID_0029] = 40, - [BNXT_ULP_ACT_HID_0025] = 41, - [BNXT_ULP_ACT_HID_002d] = 42, - [BNXT_ULP_ACT_HID_0801] = 43, - [BNXT_ULP_ACT_HID_0809] = 44, - [BNXT_ULP_ACT_HID_0805] = 45, - [BNXT_ULP_ACT_HID_080d] = 46, - [BNXT_ULP_ACT_HID_0c15] = 47, - [BNXT_ULP_ACT_HID_0c19] = 48, - [BNXT_ULP_ACT_HID_02f6] = 49, - [BNXT_ULP_ACT_HID_04f8] = 50, - [BNXT_ULP_ACT_HID_01df] = 51, - [BNXT_ULP_ACT_HID_07e5] = 52, - [BNXT_ULP_ACT_HID_06ce] = 53, - [BNXT_ULP_ACT_HID_02fa] = 54, - [BNXT_ULP_ACT_HID_04fc] = 55, - [BNXT_ULP_ACT_HID_01e3] = 56, - [BNXT_ULP_ACT_HID_07e9] = 57, - [BNXT_ULP_ACT_HID_06d2] = 58, - [BNXT_ULP_ACT_HID_03f7] = 59, - [BNXT_ULP_ACT_HID_05f9] = 60, - [BNXT_ULP_ACT_HID_02e0] = 61, - [BNXT_ULP_ACT_HID_08e6] = 62, - [BNXT_ULP_ACT_HID_07cf] = 63, - [BNXT_ULP_ACT_HID_03fb] = 64, - [BNXT_ULP_ACT_HID_05fd] = 65, - [BNXT_ULP_ACT_HID_02e4] = 66, - [BNXT_ULP_ACT_HID_08ea] = 67, - [BNXT_ULP_ACT_HID_07d3] = 68, - [BNXT_ULP_ACT_HID_040d] = 69, - [BNXT_ULP_ACT_HID_040f] = 70, - [BNXT_ULP_ACT_HID_0413] = 71, - [BNXT_ULP_ACT_HID_0567] = 72, - [BNXT_ULP_ACT_HID_0a49] = 73, - [BNXT_ULP_ACT_HID_050e] = 74, - [BNXT_ULP_ACT_HID_0668] = 75, - [BNXT_ULP_ACT_HID_0b4a] = 76, - [BNXT_ULP_ACT_HID_0411] = 77, - [BNXT_ULP_ACT_HID_056b] = 78, - [BNXT_ULP_ACT_HID_0a4d] = 79, - [BNXT_ULP_ACT_HID_0512] = 80, - [BNXT_ULP_ACT_HID_066c] = 81, - [BNXT_ULP_ACT_HID_0b4e] = 82 + [BNXT_ULP_ACT_HID_0000] = 1, + [BNXT_ULP_ACT_HID_0001] = 2, + [BNXT_ULP_ACT_HID_0400] = 3, + [BNXT_ULP_ACT_HID_0331] = 4, + [BNXT_ULP_ACT_HID_0010] = 5, + [BNXT_ULP_ACT_HID_0731] = 6, + [BNXT_ULP_ACT_HID_0341] = 7, + [BNXT_ULP_ACT_HID_0002] = 8, + [BNXT_ULP_ACT_HID_0003] = 9, + [BNXT_ULP_ACT_HID_0402] = 10, + [BNXT_ULP_ACT_HID_0333] = 11, + [BNXT_ULP_ACT_HID_0012] = 12, + [BNXT_ULP_ACT_HID_0733] = 13, + [BNXT_ULP_ACT_HID_0343] = 14 }; /* Array for the act matcher list */ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { [1] = { - .act_hid = BNXT_ULP_ACT_HID_015a, + .act_hid = BNXT_ULP_ACT_HID_0000, .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [2] = { - .act_hid = BNXT_ULP_ACT_HID_00eb, + .act_hid = BNXT_ULP_ACT_HID_0001, .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | + BNXT_ULP_ACTION_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [3] = { - .act_hid = BNXT_ULP_ACT_HID_0043, + .act_hid = BNXT_ULP_ACT_HID_0400, .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | + BNXT_ULP_ACTION_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [4] = { - .act_hid = BNXT_ULP_ACT_HID_03d8, + .act_hid = BNXT_ULP_ACT_HID_0331, .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | + BNXT_ULP_ACTION_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [5] = { - .act_hid = BNXT_ULP_ACT_HID_02c1, + .act_hid = BNXT_ULP_ACT_HID_0010, .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | + BNXT_ULP_ACTION_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [6] = { - .act_hid = BNXT_ULP_ACT_HID_015e, + .act_hid = BNXT_ULP_ACT_HID_0731, .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | + BNXT_ULP_ACTION_BIT_DEC_TTL | + BNXT_ULP_ACTION_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [7] = { - .act_hid = BNXT_ULP_ACT_HID_00ef, + .act_hid = BNXT_ULP_ACT_HID_0341, .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | + BNXT_ULP_ACTION_BIT_VXLAN_DECAP | + BNXT_ULP_ACTION_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [8] = { - .act_hid = BNXT_ULP_ACT_HID_0047, + .act_hid = BNXT_ULP_ACT_HID_0002, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [9] = { - .act_hid = BNXT_ULP_ACT_HID_03dc, + .act_hid = BNXT_ULP_ACT_HID_0003, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | + BNXT_ULP_ACTION_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [10] = { - .act_hid = BNXT_ULP_ACT_HID_02c5, + .act_hid = BNXT_ULP_ACT_HID_0402, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | + BNXT_ULP_ACTION_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [11] = { - .act_hid = BNXT_ULP_ACT_HID_025b, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [12] = { - .act_hid = BNXT_ULP_ACT_HID_01ec, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [13] = { - .act_hid = BNXT_ULP_ACT_HID_0144, + .act_hid = BNXT_ULP_ACT_HID_0333, .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [14] = { - .act_hid = BNXT_ULP_ACT_HID_04d9, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [15] = { - .act_hid = BNXT_ULP_ACT_HID_03c2, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [16] = { - .act_hid = BNXT_ULP_ACT_HID_025f, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [17] = { - .act_hid = BNXT_ULP_ACT_HID_01f0, - .act_sig = { .bits = BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, - [18] = { - .act_hid = BNXT_ULP_ACT_HID_0148, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [19] = { - .act_hid = BNXT_ULP_ACT_HID_04dd, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [20] = { - .act_hid = BNXT_ULP_ACT_HID_03c6, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 1 - }, - [21] = { - .act_hid = BNXT_ULP_ACT_HID_0000, - .act_sig = { .bits = - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [22] = { - .act_hid = BNXT_ULP_ACT_HID_0002, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DROP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [23] = { - .act_hid = BNXT_ULP_ACT_HID_0800, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [24] = { - .act_hid = BNXT_ULP_ACT_HID_0101, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [25] = { - .act_hid = BNXT_ULP_ACT_HID_0020, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_VXLAN_DECAP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [26] = { - .act_hid = BNXT_ULP_ACT_HID_0901, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [27] = { - .act_hid = BNXT_ULP_ACT_HID_0121, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_VXLAN_DECAP | - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [28] = { - .act_hid = BNXT_ULP_ACT_HID_0004, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [29] = { - .act_hid = BNXT_ULP_ACT_HID_0006, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_DROP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [30] = { - .act_hid = BNXT_ULP_ACT_HID_0804, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [31] = { - .act_hid = BNXT_ULP_ACT_HID_0105, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [32] = { - .act_hid = BNXT_ULP_ACT_HID_0024, + [12] = { + .act_hid = BNXT_ULP_ACT_HID_0012, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | BNXT_ULP_ACTION_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 + .act_tid = 1 }, - [33] = { - .act_hid = BNXT_ULP_ACT_HID_0905, + [13] = { + .act_hid = BNXT_ULP_ACT_HID_0733, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | BNXT_ULP_ACTION_BIT_DEC_TTL | BNXT_ULP_ACTION_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 + .act_tid = 1 }, - [34] = { - .act_hid = BNXT_ULP_ACT_HID_0125, + [14] = { + .act_hid = BNXT_ULP_ACT_HID_0343, .act_sig = { .bits = BNXT_ULP_ACTION_BIT_COUNT | BNXT_ULP_ACTION_BIT_VXLAN_DECAP | BNXT_ULP_ACTION_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 2 - }, - [35] = { - .act_hid = BNXT_ULP_ACT_HID_0001, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [36] = { - .act_hid = BNXT_ULP_ACT_HID_0005, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [37] = { - .act_hid = BNXT_ULP_ACT_HID_0009, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_RSS | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [38] = { - .act_hid = BNXT_ULP_ACT_HID_000d, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_RSS | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [39] = { - .act_hid = BNXT_ULP_ACT_HID_0021, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_VXLAN_DECAP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [40] = { - .act_hid = BNXT_ULP_ACT_HID_0029, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_RSS | - BNXT_ULP_ACTION_BIT_VXLAN_DECAP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [41] = { - .act_hid = BNXT_ULP_ACT_HID_0025, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_VXLAN_DECAP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [42] = { - .act_hid = BNXT_ULP_ACT_HID_002d, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_RSS | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_VXLAN_DECAP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [43] = { - .act_hid = BNXT_ULP_ACT_HID_0801, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [44] = { - .act_hid = BNXT_ULP_ACT_HID_0809, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_RSS | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [45] = { - .act_hid = BNXT_ULP_ACT_HID_0805, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [46] = { - .act_hid = BNXT_ULP_ACT_HID_080d, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_MARK | - BNXT_ULP_ACTION_BIT_RSS | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_POP_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .act_tid = 3 - }, - [47] = { - .act_hid = BNXT_ULP_ACT_HID_0c15, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_VXLAN_ENCAP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 - }, - [48] = { - .act_hid = BNXT_ULP_ACT_HID_0c19, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_VXLAN_ENCAP | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 4 - }, - [49] = { - .act_hid = BNXT_ULP_ACT_HID_02f6, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [50] = { - .act_hid = BNXT_ULP_ACT_HID_04f8, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [51] = { - .act_hid = BNXT_ULP_ACT_HID_01df, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [52] = { - .act_hid = BNXT_ULP_ACT_HID_07e5, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [53] = { - .act_hid = BNXT_ULP_ACT_HID_06ce, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [54] = { - .act_hid = BNXT_ULP_ACT_HID_02fa, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [55] = { - .act_hid = BNXT_ULP_ACT_HID_04fc, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [56] = { - .act_hid = BNXT_ULP_ACT_HID_01e3, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [57] = { - .act_hid = BNXT_ULP_ACT_HID_07e9, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [58] = { - .act_hid = BNXT_ULP_ACT_HID_06d2, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [59] = { - .act_hid = BNXT_ULP_ACT_HID_03f7, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [60] = { - .act_hid = BNXT_ULP_ACT_HID_05f9, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [61] = { - .act_hid = BNXT_ULP_ACT_HID_02e0, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [62] = { - .act_hid = BNXT_ULP_ACT_HID_08e6, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [63] = { - .act_hid = BNXT_ULP_ACT_HID_07cf, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [64] = { - .act_hid = BNXT_ULP_ACT_HID_03fb, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [65] = { - .act_hid = BNXT_ULP_ACT_HID_05fd, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [66] = { - .act_hid = BNXT_ULP_ACT_HID_02e4, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [67] = { - .act_hid = BNXT_ULP_ACT_HID_08ea, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [68] = { - .act_hid = BNXT_ULP_ACT_HID_07d3, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_IPV4_SRC | - BNXT_ULP_ACTION_BIT_SET_IPV4_DST | - BNXT_ULP_ACTION_BIT_SET_TP_SRC | - BNXT_ULP_ACTION_BIT_SET_TP_DST | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 5 - }, - [69] = { - .act_hid = BNXT_ULP_ACT_HID_040d, - .act_sig = { .bits = - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [70] = { - .act_hid = BNXT_ULP_ACT_HID_040f, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DROP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [71] = { - .act_hid = BNXT_ULP_ACT_HID_0413, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DROP | - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [72] = { - .act_hid = BNXT_ULP_ACT_HID_0567, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_VLAN_PCP | - BNXT_ULP_ACTION_BIT_SET_VLAN_VID | - BNXT_ULP_ACTION_BIT_PUSH_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [73] = { - .act_hid = BNXT_ULP_ACT_HID_0a49, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_SET_VLAN_VID | - BNXT_ULP_ACTION_BIT_PUSH_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [74] = { - .act_hid = BNXT_ULP_ACT_HID_050e, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [75] = { - .act_hid = BNXT_ULP_ACT_HID_0668, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_VLAN_PCP | - BNXT_ULP_ACTION_BIT_SET_VLAN_VID | - BNXT_ULP_ACTION_BIT_PUSH_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [76] = { - .act_hid = BNXT_ULP_ACT_HID_0b4a, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_VLAN_VID | - BNXT_ULP_ACTION_BIT_PUSH_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [77] = { - .act_hid = BNXT_ULP_ACT_HID_0411, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [78] = { - .act_hid = BNXT_ULP_ACT_HID_056b, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_VLAN_PCP | - BNXT_ULP_ACTION_BIT_SET_VLAN_VID | - BNXT_ULP_ACTION_BIT_PUSH_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [79] = { - .act_hid = BNXT_ULP_ACT_HID_0a4d, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_SET_VLAN_VID | - BNXT_ULP_ACTION_BIT_PUSH_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [80] = { - .act_hid = BNXT_ULP_ACT_HID_0512, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [81] = { - .act_hid = BNXT_ULP_ACT_HID_066c, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_VLAN_PCP | - BNXT_ULP_ACTION_BIT_SET_VLAN_VID | - BNXT_ULP_ACTION_BIT_PUSH_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 - }, - [82] = { - .act_hid = BNXT_ULP_ACT_HID_0b4e, - .act_sig = { .bits = - BNXT_ULP_ACTION_BIT_COUNT | - BNXT_ULP_ACTION_BIT_DEC_TTL | - BNXT_ULP_ACTION_BIT_SET_VLAN_VID | - BNXT_ULP_ACTION_BIT_PUSH_VLAN | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .act_tid = 6 + .act_tid = 1 } }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c index 5c3e714f48..3cee406866 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c @@ -3,10 +3,12 @@ * All rights reserved. */ +/* date: Mon Nov 23 17:33:02 2020 */ + #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" -#include "ulp_rte_parser.h" +#include "ulp_template_db_tbl.h" /* Define the template structures */ /* @@ -14,437 +16,336 @@ * maps hash id to ulp_class_match_list[] index */ uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = { - [BNXT_ULP_CLASS_HID_0138] = 1, - [BNXT_ULP_CLASS_HID_03f0] = 2, - [BNXT_ULP_CLASS_HID_0139] = 3, - [BNXT_ULP_CLASS_HID_03f1] = 4, - [BNXT_ULP_CLASS_HID_068b] = 5, - [BNXT_ULP_CLASS_HID_0143] = 6, - [BNXT_ULP_CLASS_HID_0118] = 7, - [BNXT_ULP_CLASS_HID_03d0] = 8, - [BNXT_ULP_CLASS_HID_0119] = 9, - [BNXT_ULP_CLASS_HID_03d1] = 10, - [BNXT_ULP_CLASS_HID_06ab] = 11, - [BNXT_ULP_CLASS_HID_0163] = 12, - [BNXT_ULP_CLASS_HID_0128] = 13, - [BNXT_ULP_CLASS_HID_03e0] = 14, - [BNXT_ULP_CLASS_HID_0129] = 15, - [BNXT_ULP_CLASS_HID_03e1] = 16, - [BNXT_ULP_CLASS_HID_069b] = 17, - [BNXT_ULP_CLASS_HID_0153] = 18, - [BNXT_ULP_CLASS_HID_0134] = 19, - [BNXT_ULP_CLASS_HID_03fc] = 20, - [BNXT_ULP_CLASS_HID_0135] = 21, - [BNXT_ULP_CLASS_HID_03fd] = 22, - [BNXT_ULP_CLASS_HID_0687] = 23, - [BNXT_ULP_CLASS_HID_014f] = 24, - [BNXT_ULP_CLASS_HID_0114] = 25, - [BNXT_ULP_CLASS_HID_03dc] = 26, - [BNXT_ULP_CLASS_HID_0115] = 27, - [BNXT_ULP_CLASS_HID_03dd] = 28, - [BNXT_ULP_CLASS_HID_06a7] = 29, - [BNXT_ULP_CLASS_HID_016f] = 30, - [BNXT_ULP_CLASS_HID_0124] = 31, - [BNXT_ULP_CLASS_HID_03ec] = 32, - [BNXT_ULP_CLASS_HID_0125] = 33, - [BNXT_ULP_CLASS_HID_03ed] = 34, - [BNXT_ULP_CLASS_HID_0697] = 35, - [BNXT_ULP_CLASS_HID_015f] = 36, - [BNXT_ULP_CLASS_HID_0452] = 37, - [BNXT_ULP_CLASS_HID_0528] = 38, - [BNXT_ULP_CLASS_HID_0790] = 39, - [BNXT_ULP_CLASS_HID_046e] = 40, - [BNXT_ULP_CLASS_HID_0462] = 41, - [BNXT_ULP_CLASS_HID_0518] = 42, - [BNXT_ULP_CLASS_HID_07a0] = 43, - [BNXT_ULP_CLASS_HID_045e] = 44, - [BNXT_ULP_CLASS_HID_0228] = 45, - [BNXT_ULP_CLASS_HID_06d0] = 46, - [BNXT_ULP_CLASS_HID_02be] = 47, - [BNXT_ULP_CLASS_HID_07a6] = 48, - [BNXT_ULP_CLASS_HID_0218] = 49, - [BNXT_ULP_CLASS_HID_06e0] = 50, - [BNXT_ULP_CLASS_HID_028e] = 51, - [BNXT_ULP_CLASS_HID_0796] = 52, - [BNXT_ULP_CLASS_HID_079c] = 53, - [BNXT_ULP_CLASS_HID_0654] = 54, - [BNXT_ULP_CLASS_HID_06d2] = 55, - [BNXT_ULP_CLASS_HID_058a] = 56, - [BNXT_ULP_CLASS_HID_052f] = 57, - [BNXT_ULP_CLASS_HID_07e7] = 58, - [BNXT_ULP_CLASS_HID_079d] = 59, - [BNXT_ULP_CLASS_HID_0655] = 60, - [BNXT_ULP_CLASS_HID_046d] = 61, - [BNXT_ULP_CLASS_HID_0725] = 62, - [BNXT_ULP_CLASS_HID_06d3] = 63, - [BNXT_ULP_CLASS_HID_058b] = 64, - [BNXT_ULP_CLASS_HID_07ac] = 65, - [BNXT_ULP_CLASS_HID_0664] = 66, - [BNXT_ULP_CLASS_HID_06e2] = 67, - [BNXT_ULP_CLASS_HID_05ba] = 68, - [BNXT_ULP_CLASS_HID_051f] = 69, - [BNXT_ULP_CLASS_HID_07d7] = 70, - [BNXT_ULP_CLASS_HID_07ad] = 71, - [BNXT_ULP_CLASS_HID_0665] = 72, - [BNXT_ULP_CLASS_HID_045d] = 73, - [BNXT_ULP_CLASS_HID_0715] = 74, - [BNXT_ULP_CLASS_HID_06e3] = 75, - [BNXT_ULP_CLASS_HID_05bb] = 76, - [BNXT_ULP_CLASS_HID_016a] = 77, - [BNXT_ULP_CLASS_HID_03d2] = 78, - [BNXT_ULP_CLASS_HID_0612] = 79, - [BNXT_ULP_CLASS_HID_00da] = 80, - [BNXT_ULP_CLASS_HID_06bd] = 81, - [BNXT_ULP_CLASS_HID_0165] = 82, - [BNXT_ULP_CLASS_HID_016b] = 83, - [BNXT_ULP_CLASS_HID_03d3] = 84, - [BNXT_ULP_CLASS_HID_03a5] = 85, - [BNXT_ULP_CLASS_HID_066d] = 86, - [BNXT_ULP_CLASS_HID_0613] = 87, - [BNXT_ULP_CLASS_HID_00db] = 88, - [BNXT_ULP_CLASS_HID_015a] = 89, - [BNXT_ULP_CLASS_HID_03e2] = 90, - [BNXT_ULP_CLASS_HID_0622] = 91, - [BNXT_ULP_CLASS_HID_00ea] = 92, - [BNXT_ULP_CLASS_HID_068d] = 93, - [BNXT_ULP_CLASS_HID_0155] = 94, - [BNXT_ULP_CLASS_HID_015b] = 95, - [BNXT_ULP_CLASS_HID_03e3] = 96, - [BNXT_ULP_CLASS_HID_0395] = 97, - [BNXT_ULP_CLASS_HID_065d] = 98, - [BNXT_ULP_CLASS_HID_0623] = 99, - [BNXT_ULP_CLASS_HID_00eb] = 100, - [BNXT_ULP_CLASS_HID_04bc] = 101, - [BNXT_ULP_CLASS_HID_0442] = 102, - [BNXT_ULP_CLASS_HID_050a] = 103, - [BNXT_ULP_CLASS_HID_06ba] = 104, - [BNXT_ULP_CLASS_HID_0472] = 105, - [BNXT_ULP_CLASS_HID_0700] = 106, - [BNXT_ULP_CLASS_HID_04c8] = 107, - [BNXT_ULP_CLASS_HID_0678] = 108, - [BNXT_ULP_CLASS_HID_061f] = 109, - [BNXT_ULP_CLASS_HID_05ad] = 110, - [BNXT_ULP_CLASS_HID_06a5] = 111, - [BNXT_ULP_CLASS_HID_0455] = 112, - [BNXT_ULP_CLASS_HID_05dd] = 113, - [BNXT_ULP_CLASS_HID_0563] = 114, - [BNXT_ULP_CLASS_HID_059b] = 115, - [BNXT_ULP_CLASS_HID_070b] = 116, - [BNXT_ULP_CLASS_HID_04bd] = 117, - [BNXT_ULP_CLASS_HID_0443] = 118, - [BNXT_ULP_CLASS_HID_050b] = 119, - [BNXT_ULP_CLASS_HID_06bb] = 120, - [BNXT_ULP_CLASS_HID_0473] = 121, - [BNXT_ULP_CLASS_HID_0701] = 122, - [BNXT_ULP_CLASS_HID_04c9] = 123, - [BNXT_ULP_CLASS_HID_0679] = 124, - [BNXT_ULP_CLASS_HID_05e2] = 125, - [BNXT_ULP_CLASS_HID_00b0] = 126, - [BNXT_ULP_CLASS_HID_0648] = 127, - [BNXT_ULP_CLASS_HID_03f8] = 128, - [BNXT_ULP_CLASS_HID_02ea] = 129, - [BNXT_ULP_CLASS_HID_05b8] = 130, - [BNXT_ULP_CLASS_HID_0370] = 131, - [BNXT_ULP_CLASS_HID_00e0] = 132, - [BNXT_ULP_CLASS_HID_0745] = 133, - [BNXT_ULP_CLASS_HID_0213] = 134, - [BNXT_ULP_CLASS_HID_031b] = 135, - [BNXT_ULP_CLASS_HID_008b] = 136, - [BNXT_ULP_CLASS_HID_044d] = 137, - [BNXT_ULP_CLASS_HID_071b] = 138, - [BNXT_ULP_CLASS_HID_0003] = 139, - [BNXT_ULP_CLASS_HID_05b3] = 140, - [BNXT_ULP_CLASS_HID_05e3] = 141, - [BNXT_ULP_CLASS_HID_00b1] = 142, - [BNXT_ULP_CLASS_HID_0649] = 143, - [BNXT_ULP_CLASS_HID_03f9] = 144, - [BNXT_ULP_CLASS_HID_02eb] = 145, - [BNXT_ULP_CLASS_HID_05b9] = 146, - [BNXT_ULP_CLASS_HID_0371] = 147, - [BNXT_ULP_CLASS_HID_00e1] = 148, - [BNXT_ULP_CLASS_HID_0000] = 149, - [BNXT_ULP_CLASS_HID_00ce] = 150, - [BNXT_ULP_CLASS_HID_01b6] = 151, - [BNXT_ULP_CLASS_HID_0074] = 152, - [BNXT_ULP_CLASS_HID_00fe] = 153, - [BNXT_ULP_CLASS_HID_03bc] = 154, - [BNXT_ULP_CLASS_HID_0206] = 155, - [BNXT_ULP_CLASS_HID_02c4] = 156, - [BNXT_ULP_CLASS_HID_055a] = 157, - [BNXT_ULP_CLASS_HID_045a] = 158, - [BNXT_ULP_CLASS_HID_061a] = 159, - [BNXT_ULP_CLASS_HID_051a] = 160, - [BNXT_ULP_CLASS_HID_074a] = 161, - [BNXT_ULP_CLASS_HID_004e] = 162, - [BNXT_ULP_CLASS_HID_040a] = 163, - [BNXT_ULP_CLASS_HID_010e] = 164, - [BNXT_ULP_CLASS_HID_048b] = 165, - [BNXT_ULP_CLASS_HID_0749] = 166, - [BNXT_ULP_CLASS_HID_05f1] = 167, - [BNXT_ULP_CLASS_HID_04b7] = 168, - [BNXT_ULP_CLASS_HID_049b] = 169, - [BNXT_ULP_CLASS_HID_0759] = 170, - [BNXT_ULP_CLASS_HID_05e1] = 171, - [BNXT_ULP_CLASS_HID_04a7] = 172, - [BNXT_ULP_CLASS_HID_0301] = 173, - [BNXT_ULP_CLASS_HID_07f9] = 174, - [BNXT_ULP_CLASS_HID_0397] = 175, - [BNXT_ULP_CLASS_HID_068f] = 176, - [BNXT_ULP_CLASS_HID_02f1] = 177, - [BNXT_ULP_CLASS_HID_0609] = 178, - [BNXT_ULP_CLASS_HID_0267] = 179, - [BNXT_ULP_CLASS_HID_077f] = 180, - [BNXT_ULP_CLASS_HID_01e1] = 181, - [BNXT_ULP_CLASS_HID_0329] = 182, - [BNXT_ULP_CLASS_HID_01c1] = 183, - [BNXT_ULP_CLASS_HID_0309] = 184, - [BNXT_ULP_CLASS_HID_01d1] = 185, - [BNXT_ULP_CLASS_HID_0319] = 186, - [BNXT_ULP_CLASS_HID_01e2] = 187, - [BNXT_ULP_CLASS_HID_032a] = 188, - [BNXT_ULP_CLASS_HID_0650] = 189, - [BNXT_ULP_CLASS_HID_0198] = 190, - [BNXT_ULP_CLASS_HID_01c2] = 191, - [BNXT_ULP_CLASS_HID_030a] = 192, - [BNXT_ULP_CLASS_HID_0670] = 193, - [BNXT_ULP_CLASS_HID_01b8] = 194, - [BNXT_ULP_CLASS_HID_01d2] = 195, - [BNXT_ULP_CLASS_HID_031a] = 196, - [BNXT_ULP_CLASS_HID_0660] = 197, - [BNXT_ULP_CLASS_HID_01a8] = 198, - [BNXT_ULP_CLASS_HID_01dd] = 199, - [BNXT_ULP_CLASS_HID_0315] = 200, - [BNXT_ULP_CLASS_HID_003d] = 201, - [BNXT_ULP_CLASS_HID_02f5] = 202, - [BNXT_ULP_CLASS_HID_01cd] = 203, - [BNXT_ULP_CLASS_HID_0305] = 204, - [BNXT_ULP_CLASS_HID_01de] = 205, - [BNXT_ULP_CLASS_HID_0316] = 206, - [BNXT_ULP_CLASS_HID_066c] = 207, - [BNXT_ULP_CLASS_HID_01a4] = 208, - [BNXT_ULP_CLASS_HID_003e] = 209, - [BNXT_ULP_CLASS_HID_02f6] = 210, - [BNXT_ULP_CLASS_HID_078c] = 211, - [BNXT_ULP_CLASS_HID_0044] = 212, - [BNXT_ULP_CLASS_HID_01ce] = 213, - [BNXT_ULP_CLASS_HID_0306] = 214, - [BNXT_ULP_CLASS_HID_067c] = 215, - [BNXT_ULP_CLASS_HID_01b4] = 216 + [BNXT_ULP_CLASS_HID_00fc] = 1, + [BNXT_ULP_CLASS_HID_0046] = 2, + [BNXT_ULP_CLASS_HID_0056] = 3, + [BNXT_ULP_CLASS_HID_00b8] = 4, + [BNXT_ULP_CLASS_HID_0041] = 5, + [BNXT_ULP_CLASS_HID_00ab] = 6, + [BNXT_ULP_CLASS_HID_0053] = 7, + [BNXT_ULP_CLASS_HID_00a5] = 8, + [BNXT_ULP_CLASS_HID_0069] = 9, + [BNXT_ULP_CLASS_HID_009d] = 10, + [BNXT_ULP_CLASS_HID_0005] = 11, + [BNXT_ULP_CLASS_HID_006f] = 12, + [BNXT_ULP_CLASS_HID_00af] = 13, + [BNXT_ULP_CLASS_HID_00d3] = 14, + [BNXT_ULP_CLASS_HID_005b] = 15, + [BNXT_ULP_CLASS_HID_00ad] = 16, + [BNXT_ULP_CLASS_HID_0091] = 17, + [BNXT_ULP_CLASS_HID_00fb] = 18, + [BNXT_ULP_CLASS_HID_0063] = 19, + [BNXT_ULP_CLASS_HID_0097] = 20, + [BNXT_ULP_CLASS_HID_00cc] = 21, + [BNXT_ULP_CLASS_HID_00f0] = 22, + [BNXT_ULP_CLASS_HID_00c0] = 23, + [BNXT_ULP_CLASS_HID_002a] = 24, + [BNXT_ULP_CLASS_HID_00c7] = 25, + [BNXT_ULP_CLASS_HID_0029] = 26, + [BNXT_ULP_CLASS_HID_00d1] = 27, + [BNXT_ULP_CLASS_HID_003b] = 28, + [BNXT_ULP_CLASS_HID_00ef] = 29, + [BNXT_ULP_CLASS_HID_0013] = 30, + [BNXT_ULP_CLASS_HID_009b] = 31, + [BNXT_ULP_CLASS_HID_00ed] = 32, + [BNXT_ULP_CLASS_HID_002d] = 33, + [BNXT_ULP_CLASS_HID_0051] = 34, + [BNXT_ULP_CLASS_HID_00d9] = 35, + [BNXT_ULP_CLASS_HID_0023] = 36, + [BNXT_ULP_CLASS_HID_0017] = 37, + [BNXT_ULP_CLASS_HID_0079] = 38, + [BNXT_ULP_CLASS_HID_00e1] = 39, + [BNXT_ULP_CLASS_HID_0015] = 40 }; /* Array for the proto matcher list */ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { [1] = { - .class_hid = BNXT_ULP_CLASS_HID_0138, + .class_hid = BNXT_ULP_CLASS_HID_00fc, + .class_tid = 1, + .hdr_sig_id = 0, + .flow_sig_id = 0, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 0 }, [2] = { - .class_hid = BNXT_ULP_CLASS_HID_03f0, + .class_hid = BNXT_ULP_CLASS_HID_0046, + .class_tid = 1, + .hdr_sig_id = 0, + .flow_sig_id = 1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 1 }, [3] = { - .class_hid = BNXT_ULP_CLASS_HID_0139, + .class_hid = BNXT_ULP_CLASS_HID_0056, + .class_tid = 1, + .hdr_sig_id = 0, + .flow_sig_id = 1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 2 }, [4] = { - .class_hid = BNXT_ULP_CLASS_HID_03f1, + .class_hid = BNXT_ULP_CLASS_HID_00b8, + .class_tid = 1, + .hdr_sig_id = 0, + .flow_sig_id = 1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 3 }, [5] = { - .class_hid = BNXT_ULP_CLASS_HID_068b, + .class_hid = BNXT_ULP_CLASS_HID_0041, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 4 }, [6] = { - .class_hid = BNXT_ULP_CLASS_HID_0143, + .class_hid = BNXT_ULP_CLASS_HID_00ab, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 5 }, [7] = { - .class_hid = BNXT_ULP_CLASS_HID_0118, + .class_hid = BNXT_ULP_CLASS_HID_0053, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 1, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 6 }, [8] = { - .class_hid = BNXT_ULP_CLASS_HID_03d0, + .class_hid = BNXT_ULP_CLASS_HID_00a5, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 7 }, [9] = { - .class_hid = BNXT_ULP_CLASS_HID_0119, + .class_hid = BNXT_ULP_CLASS_HID_0069, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 8 }, [10] = { - .class_hid = BNXT_ULP_CLASS_HID_03d1, + .class_hid = BNXT_ULP_CLASS_HID_009d, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 9 }, [11] = { - .class_hid = BNXT_ULP_CLASS_HID_06ab, + .class_hid = BNXT_ULP_CLASS_HID_0005, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 10 }, [12] = { - .class_hid = BNXT_ULP_CLASS_HID_0163, + .class_hid = BNXT_ULP_CLASS_HID_006f, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 11 }, [13] = { - .class_hid = BNXT_ULP_CLASS_HID_0128, + .class_hid = BNXT_ULP_CLASS_HID_00af, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 12 }, [14] = { - .class_hid = BNXT_ULP_CLASS_HID_03e0, + .class_hid = BNXT_ULP_CLASS_HID_00d3, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 13 }, [15] = { - .class_hid = BNXT_ULP_CLASS_HID_0129, + .class_hid = BNXT_ULP_CLASS_HID_005b, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | @@ -452,15 +353,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 14 }, [16] = { - .class_hid = BNXT_ULP_CLASS_HID_03e1, + .class_hid = BNXT_ULP_CLASS_HID_00ad, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | @@ -468,14 +374,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 15 }, [17] = { - .class_hid = BNXT_ULP_CLASS_HID_069b, + .class_hid = BNXT_ULP_CLASS_HID_0091, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | @@ -483,16 +396,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 16 }, [18] = { - .class_hid = BNXT_ULP_CLASS_HID_0153, + .class_hid = BNXT_ULP_CLASS_HID_00fb, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | @@ -500,3486 +417,451 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = { BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 6, - .wc_pri = 17 }, [19] = { - .class_hid = BNXT_ULP_CLASS_HID_0134, + .class_hid = BNXT_ULP_CLASS_HID_0063, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 0 }, [20] = { - .class_hid = BNXT_ULP_CLASS_HID_03fc, + .class_hid = BNXT_ULP_CLASS_HID_0097, + .class_tid = 1, + .hdr_sig_id = 1, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 1 }, [21] = { - .class_hid = BNXT_ULP_CLASS_HID_0135, + .class_hid = BNXT_ULP_CLASS_HID_00cc, + .class_tid = 2, + .hdr_sig_id = 0, + .flow_sig_id = 2, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 2 }, [22] = { - .class_hid = BNXT_ULP_CLASS_HID_03fd, + .class_hid = BNXT_ULP_CLASS_HID_00f0, + .class_tid = 2, + .hdr_sig_id = 0, + .flow_sig_id = 3, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_0_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 3 }, [23] = { - .class_hid = BNXT_ULP_CLASS_HID_0687, + .class_hid = BNXT_ULP_CLASS_HID_00c0, + .class_tid = 2, + .hdr_sig_id = 0, + .flow_sig_id = 3, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_0_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 4 }, [24] = { - .class_hid = BNXT_ULP_CLASS_HID_014f, + .class_hid = BNXT_ULP_CLASS_HID_002a, + .class_tid = 2, + .hdr_sig_id = 0, + .flow_sig_id = 3, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_0_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_0_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 5 }, [25] = { - .class_hid = BNXT_ULP_CLASS_HID_0114, + .class_hid = BNXT_ULP_CLASS_HID_00c7, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 3, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 6 }, [26] = { - .class_hid = BNXT_ULP_CLASS_HID_03dc, + .class_hid = BNXT_ULP_CLASS_HID_0029, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 3, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 7 }, [27] = { - .class_hid = BNXT_ULP_CLASS_HID_0115, + .class_hid = BNXT_ULP_CLASS_HID_00d1, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 3, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 8 }, [28] = { - .class_hid = BNXT_ULP_CLASS_HID_03dd, + .class_hid = BNXT_ULP_CLASS_HID_003b, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 9 }, [29] = { - .class_hid = BNXT_ULP_CLASS_HID_06a7, + .class_hid = BNXT_ULP_CLASS_HID_00ef, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 10 }, [30] = { - .class_hid = BNXT_ULP_CLASS_HID_016f, + .class_hid = BNXT_ULP_CLASS_HID_0013, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_IPV4 | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 11 }, [31] = { - .class_hid = BNXT_ULP_CLASS_HID_0124, + .class_hid = BNXT_ULP_CLASS_HID_009b, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 12 }, [32] = { - .class_hid = BNXT_ULP_CLASS_HID_03ec, + .class_hid = BNXT_ULP_CLASS_HID_00ed, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_OO_VLAN | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 13 }, [33] = { - .class_hid = BNXT_ULP_CLASS_HID_0125, + .class_hid = BNXT_ULP_CLASS_HID_002d, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 14 }, [34] = { - .class_hid = BNXT_ULP_CLASS_HID_03ed, + .class_hid = BNXT_ULP_CLASS_HID_0051, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 15 }, [35] = { - .class_hid = BNXT_ULP_CLASS_HID_0697, + .class_hid = BNXT_ULP_CLASS_HID_00d9, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | + BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 16 }, [36] = { - .class_hid = BNXT_ULP_CLASS_HID_015f, + .class_hid = BNXT_ULP_CLASS_HID_0023, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF7_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 7, - .wc_pri = 17 - }, - [37] = { - .class_hid = BNXT_ULP_CLASS_HID_0452, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF8_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 8, - .wc_pri = 0 - }, - [38] = { - .class_hid = BNXT_ULP_CLASS_HID_0528, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 8, - .wc_pri = 1 - }, - [39] = { - .class_hid = BNXT_ULP_CLASS_HID_0790, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF8_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 8, - .wc_pri = 2 - }, - [40] = { - .class_hid = BNXT_ULP_CLASS_HID_046e, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 8, - .wc_pri = 3 - }, - [41] = { - .class_hid = BNXT_ULP_CLASS_HID_0462, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF9_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 9, - .wc_pri = 0 - }, - [42] = { - .class_hid = BNXT_ULP_CLASS_HID_0518, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 9, - .wc_pri = 1 - }, - [43] = { - .class_hid = BNXT_ULP_CLASS_HID_07a0, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF9_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 9, - .wc_pri = 2 - }, - [44] = { - .class_hid = BNXT_ULP_CLASS_HID_045e, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 9, - .wc_pri = 3 - }, - [45] = { - .class_hid = BNXT_ULP_CLASS_HID_0228, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF10_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 10, - .wc_pri = 0 - }, - [46] = { - .class_hid = BNXT_ULP_CLASS_HID_06d0, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF10_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 10, - .wc_pri = 1 - }, - [47] = { - .class_hid = BNXT_ULP_CLASS_HID_02be, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 10, - .wc_pri = 2 - }, - [48] = { - .class_hid = BNXT_ULP_CLASS_HID_07a6, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 10, - .wc_pri = 3 - }, - [49] = { - .class_hid = BNXT_ULP_CLASS_HID_0218, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, - .wc_pri = 0 - }, - [50] = { - .class_hid = BNXT_ULP_CLASS_HID_06e0, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, - .wc_pri = 1 - }, - [51] = { - .class_hid = BNXT_ULP_CLASS_HID_028e, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, - .wc_pri = 2 - }, - [52] = { - .class_hid = BNXT_ULP_CLASS_HID_0796, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 11, - .wc_pri = 3 - }, - [53] = { - .class_hid = BNXT_ULP_CLASS_HID_079c, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 0 - }, - [54] = { - .class_hid = BNXT_ULP_CLASS_HID_0654, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 1 - }, - [55] = { - .class_hid = BNXT_ULP_CLASS_HID_06d2, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 2 - }, - [56] = { - .class_hid = BNXT_ULP_CLASS_HID_058a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 3 - }, - [57] = { - .class_hid = BNXT_ULP_CLASS_HID_052f, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 4 - }, - [58] = { - .class_hid = BNXT_ULP_CLASS_HID_07e7, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 5 - }, - [59] = { - .class_hid = BNXT_ULP_CLASS_HID_079d, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 6 - }, - [60] = { - .class_hid = BNXT_ULP_CLASS_HID_0655, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 7 - }, - [61] = { - .class_hid = BNXT_ULP_CLASS_HID_046d, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 8 }, - [62] = { - .class_hid = BNXT_ULP_CLASS_HID_0725, + [37] = { + .class_hid = BNXT_ULP_CLASS_HID_0017, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 9 }, - [63] = { - .class_hid = BNXT_ULP_CLASS_HID_06d3, + [38] = { + .class_hid = BNXT_ULP_CLASS_HID_0079, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | + BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 10 }, - [64] = { - .class_hid = BNXT_ULP_CLASS_HID_058b, + [39] = { + .class_hid = BNXT_ULP_CLASS_HID_00e1, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 12, - .wc_pri = 11 - }, - [65] = { - .class_hid = BNXT_ULP_CLASS_HID_07ac, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 0 }, - [66] = { - .class_hid = BNXT_ULP_CLASS_HID_0664, + [40] = { + .class_hid = BNXT_ULP_CLASS_HID_0015, + .class_tid = 2, + .hdr_sig_id = 1, + .flow_sig_id = 4, .hdr_sig = { .bits = BNXT_ULP_HDR_BIT_O_ETH | + BNXT_ULP_HDR_BIT_OO_VLAN | BNXT_ULP_HDR_BIT_O_IPV4 | BNXT_ULP_HDR_BIT_O_TCP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 1 - }, - [67] = { - .class_hid = BNXT_ULP_CLASS_HID_06e2, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 2 - }, - [68] = { - .class_hid = BNXT_ULP_CLASS_HID_05ba, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 3 - }, - [69] = { - .class_hid = BNXT_ULP_CLASS_HID_051f, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 4 - }, - [70] = { - .class_hid = BNXT_ULP_CLASS_HID_07d7, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 5 - }, - [71] = { - .class_hid = BNXT_ULP_CLASS_HID_07ad, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 6 - }, - [72] = { - .class_hid = BNXT_ULP_CLASS_HID_0665, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 7 - }, - [73] = { - .class_hid = BNXT_ULP_CLASS_HID_045d, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 8 - }, - [74] = { - .class_hid = BNXT_ULP_CLASS_HID_0715, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 9 - }, - [75] = { - .class_hid = BNXT_ULP_CLASS_HID_06e3, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 10 - }, - [76] = { - .class_hid = BNXT_ULP_CLASS_HID_05bb, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 13, - .wc_pri = 11 - }, - [77] = { - .class_hid = BNXT_ULP_CLASS_HID_016a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 0 - }, - [78] = { - .class_hid = BNXT_ULP_CLASS_HID_03d2, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 1 - }, - [79] = { - .class_hid = BNXT_ULP_CLASS_HID_0612, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 2 - }, - [80] = { - .class_hid = BNXT_ULP_CLASS_HID_00da, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 3 - }, - [81] = { - .class_hid = BNXT_ULP_CLASS_HID_06bd, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 4 - }, - [82] = { - .class_hid = BNXT_ULP_CLASS_HID_0165, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 5 - }, - [83] = { - .class_hid = BNXT_ULP_CLASS_HID_016b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 6 - }, - [84] = { - .class_hid = BNXT_ULP_CLASS_HID_03d3, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 7 - }, - [85] = { - .class_hid = BNXT_ULP_CLASS_HID_03a5, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 8 - }, - [86] = { - .class_hid = BNXT_ULP_CLASS_HID_066d, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 9 - }, - [87] = { - .class_hid = BNXT_ULP_CLASS_HID_0613, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 10 - }, - [88] = { - .class_hid = BNXT_ULP_CLASS_HID_00db, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 14, - .wc_pri = 11 - }, - [89] = { - .class_hid = BNXT_ULP_CLASS_HID_015a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 0 - }, - [90] = { - .class_hid = BNXT_ULP_CLASS_HID_03e2, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 1 - }, - [91] = { - .class_hid = BNXT_ULP_CLASS_HID_0622, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 2 - }, - [92] = { - .class_hid = BNXT_ULP_CLASS_HID_00ea, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 3 - }, - [93] = { - .class_hid = BNXT_ULP_CLASS_HID_068d, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 4 - }, - [94] = { - .class_hid = BNXT_ULP_CLASS_HID_0155, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 5 - }, - [95] = { - .class_hid = BNXT_ULP_CLASS_HID_015b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 6 - }, - [96] = { - .class_hid = BNXT_ULP_CLASS_HID_03e3, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 7 - }, - [97] = { - .class_hid = BNXT_ULP_CLASS_HID_0395, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 8 - }, - [98] = { - .class_hid = BNXT_ULP_CLASS_HID_065d, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 9 - }, - [99] = { - .class_hid = BNXT_ULP_CLASS_HID_0623, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 10 - }, - [100] = { - .class_hid = BNXT_ULP_CLASS_HID_00eb, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 15, - .wc_pri = 11 - }, - [101] = { - .class_hid = BNXT_ULP_CLASS_HID_04bc, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 0 - }, - [102] = { - .class_hid = BNXT_ULP_CLASS_HID_0442, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 1 - }, - [103] = { - .class_hid = BNXT_ULP_CLASS_HID_050a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 2 - }, - [104] = { - .class_hid = BNXT_ULP_CLASS_HID_06ba, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 3 - }, - [105] = { - .class_hid = BNXT_ULP_CLASS_HID_0472, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 4 - }, - [106] = { - .class_hid = BNXT_ULP_CLASS_HID_0700, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 5 - }, - [107] = { - .class_hid = BNXT_ULP_CLASS_HID_04c8, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 6 - }, - [108] = { - .class_hid = BNXT_ULP_CLASS_HID_0678, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 7 - }, - [109] = { - .class_hid = BNXT_ULP_CLASS_HID_061f, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 8 - }, - [110] = { - .class_hid = BNXT_ULP_CLASS_HID_05ad, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 9 - }, - [111] = { - .class_hid = BNXT_ULP_CLASS_HID_06a5, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 10 - }, - [112] = { - .class_hid = BNXT_ULP_CLASS_HID_0455, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 11 - }, - [113] = { - .class_hid = BNXT_ULP_CLASS_HID_05dd, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 12 - }, - [114] = { - .class_hid = BNXT_ULP_CLASS_HID_0563, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 13 - }, - [115] = { - .class_hid = BNXT_ULP_CLASS_HID_059b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 14 - }, - [116] = { - .class_hid = BNXT_ULP_CLASS_HID_070b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 15 - }, - [117] = { - .class_hid = BNXT_ULP_CLASS_HID_04bd, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 16 - }, - [118] = { - .class_hid = BNXT_ULP_CLASS_HID_0443, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 17 - }, - [119] = { - .class_hid = BNXT_ULP_CLASS_HID_050b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 18 - }, - [120] = { - .class_hid = BNXT_ULP_CLASS_HID_06bb, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 19 - }, - [121] = { - .class_hid = BNXT_ULP_CLASS_HID_0473, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 20 - }, - [122] = { - .class_hid = BNXT_ULP_CLASS_HID_0701, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 21 - }, - [123] = { - .class_hid = BNXT_ULP_CLASS_HID_04c9, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 22 - }, - [124] = { - .class_hid = BNXT_ULP_CLASS_HID_0679, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 16, - .wc_pri = 23 - }, - [125] = { - .class_hid = BNXT_ULP_CLASS_HID_05e2, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 0 - }, - [126] = { - .class_hid = BNXT_ULP_CLASS_HID_00b0, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 1 - }, - [127] = { - .class_hid = BNXT_ULP_CLASS_HID_0648, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 2 - }, - [128] = { - .class_hid = BNXT_ULP_CLASS_HID_03f8, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 3 - }, - [129] = { - .class_hid = BNXT_ULP_CLASS_HID_02ea, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 4 - }, - [130] = { - .class_hid = BNXT_ULP_CLASS_HID_05b8, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 5 - }, - [131] = { - .class_hid = BNXT_ULP_CLASS_HID_0370, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 6 - }, - [132] = { - .class_hid = BNXT_ULP_CLASS_HID_00e0, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 7 - }, - [133] = { - .class_hid = BNXT_ULP_CLASS_HID_0745, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE | - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 8 - }, - [134] = { - .class_hid = BNXT_ULP_CLASS_HID_0213, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE | - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 9 - }, - [135] = { - .class_hid = BNXT_ULP_CLASS_HID_031b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 10 - }, - [136] = { - .class_hid = BNXT_ULP_CLASS_HID_008b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 11 - }, - [137] = { - .class_hid = BNXT_ULP_CLASS_HID_044d, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE | - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 12 - }, - [138] = { - .class_hid = BNXT_ULP_CLASS_HID_071b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE | - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 13 - }, - [139] = { - .class_hid = BNXT_ULP_CLASS_HID_0003, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 14 - }, - [140] = { - .class_hid = BNXT_ULP_CLASS_HID_05b3, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 15 - }, - [141] = { - .class_hid = BNXT_ULP_CLASS_HID_05e3, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 16 - }, - [142] = { - .class_hid = BNXT_ULP_CLASS_HID_00b1, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 17 - }, - [143] = { - .class_hid = BNXT_ULP_CLASS_HID_0649, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 18 - }, - [144] = { - .class_hid = BNXT_ULP_CLASS_HID_03f9, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 19 - }, - [145] = { - .class_hid = BNXT_ULP_CLASS_HID_02eb, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 20 - }, - [146] = { - .class_hid = BNXT_ULP_CLASS_HID_05b9, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 21 - }, - [147] = { - .class_hid = BNXT_ULP_CLASS_HID_0371, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 22 - }, - [148] = { - .class_hid = BNXT_ULP_CLASS_HID_00e1, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 17, - .wc_pri = 23 - }, - [149] = { - .class_hid = BNXT_ULP_CLASS_HID_0000, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_F1 | - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF18_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF18_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, - .wc_pri = 0 - }, - [150] = { - .class_hid = BNXT_ULP_CLASS_HID_00ce, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_F1 | - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF18_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF18_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, - .wc_pri = 1 - }, - [151] = { - .class_hid = BNXT_ULP_CLASS_HID_01b6, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_F1 | - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF18_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, - .wc_pri = 2 - }, - [152] = { - .class_hid = BNXT_ULP_CLASS_HID_0074, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_F1 | - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF18_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, - .wc_pri = 3 - }, - [153] = { - .class_hid = BNXT_ULP_CLASS_HID_00fe, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_F1 | - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF18_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, - .wc_pri = 4 - }, - [154] = { - .class_hid = BNXT_ULP_CLASS_HID_03bc, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_F1 | - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF18_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, - .wc_pri = 5 - }, - [155] = { - .class_hid = BNXT_ULP_CLASS_HID_0206, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_F1 | - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, - .wc_pri = 6 - }, - [156] = { - .class_hid = BNXT_ULP_CLASS_HID_02c4, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_F1 | - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 18, - .wc_pri = 7 - }, - [157] = { - .class_hid = BNXT_ULP_CLASS_HID_055a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, - .wc_pri = 0 - }, - [158] = { - .class_hid = BNXT_ULP_CLASS_HID_045a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, - .wc_pri = 1 - }, - [159] = { - .class_hid = BNXT_ULP_CLASS_HID_061a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, - .wc_pri = 2 - }, - [160] = { - .class_hid = BNXT_ULP_CLASS_HID_051a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_SMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, - .wc_pri = 3 - }, - [161] = { - .class_hid = BNXT_ULP_CLASS_HID_074a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, - .wc_pri = 4 - }, - [162] = { - .class_hid = BNXT_ULP_CLASS_HID_004e, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, - .wc_pri = 5 - }, - [163] = { - .class_hid = BNXT_ULP_CLASS_HID_040a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, - .wc_pri = 6 - }, - [164] = { - .class_hid = BNXT_ULP_CLASS_HID_010e, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_HDR_BIT_T_VXLAN | - BNXT_ULP_HDR_BIT_I_ETH | - BNXT_ULP_HDR_BIT_I_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_ING }, - .field_sig = { .bits = - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI | - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC | - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 19, - .wc_pri = 7 - }, - [165] = { - .class_hid = BNXT_ULP_CLASS_HID_048b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF20_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 20, - .wc_pri = 0 - }, - [166] = { - .class_hid = BNXT_ULP_CLASS_HID_0749, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF20_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 20, - .wc_pri = 1 - }, - [167] = { - .class_hid = BNXT_ULP_CLASS_HID_05f1, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 20, - .wc_pri = 2 - }, - [168] = { - .class_hid = BNXT_ULP_CLASS_HID_04b7, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 20, - .wc_pri = 3 - }, - [169] = { - .class_hid = BNXT_ULP_CLASS_HID_049b, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 0 - }, - [170] = { - .class_hid = BNXT_ULP_CLASS_HID_0759, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 1 - }, - [171] = { - .class_hid = BNXT_ULP_CLASS_HID_05e1, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID | - BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 2 - }, - [172] = { - .class_hid = BNXT_ULP_CLASS_HID_04a7, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR | - BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR | - BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 21, - .wc_pri = 3 - }, - [173] = { - .class_hid = BNXT_ULP_CLASS_HID_0301, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 22, - .wc_pri = 0 - }, - [174] = { - .class_hid = BNXT_ULP_CLASS_HID_07f9, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF22_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 22, - .wc_pri = 1 - }, - [175] = { - .class_hid = BNXT_ULP_CLASS_HID_0397, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 22, - .wc_pri = 2 - }, - [176] = { - .class_hid = BNXT_ULP_CLASS_HID_068f, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT | - BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 22, - .wc_pri = 3 - }, - [177] = { - .class_hid = BNXT_ULP_CLASS_HID_02f1, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 23, - .wc_pri = 0 - }, - [178] = { - .class_hid = BNXT_ULP_CLASS_HID_0609, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF23_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 23, - .wc_pri = 1 - }, - [179] = { - .class_hid = BNXT_ULP_CLASS_HID_0267, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID | - BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 23, - .wc_pri = 2 - }, - [180] = { - .class_hid = BNXT_ULP_CLASS_HID_077f, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR | - BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR | - BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT | - BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 23, - .wc_pri = 3 - }, - [181] = { - .class_hid = BNXT_ULP_CLASS_HID_01e1, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 0 - }, - [182] = { - .class_hid = BNXT_ULP_CLASS_HID_0329, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 1 - }, - [183] = { - .class_hid = BNXT_ULP_CLASS_HID_01c1, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 2 - }, - [184] = { - .class_hid = BNXT_ULP_CLASS_HID_0309, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 3 - }, - [185] = { - .class_hid = BNXT_ULP_CLASS_HID_01d1, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 4 - }, - [186] = { - .class_hid = BNXT_ULP_CLASS_HID_0319, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 5 - }, - [187] = { - .class_hid = BNXT_ULP_CLASS_HID_01e2, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 6 - }, - [188] = { - .class_hid = BNXT_ULP_CLASS_HID_032a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 7 - }, - [189] = { - .class_hid = BNXT_ULP_CLASS_HID_0650, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF24_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 8 - }, - [190] = { - .class_hid = BNXT_ULP_CLASS_HID_0198, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 9 - }, - [191] = { - .class_hid = BNXT_ULP_CLASS_HID_01c2, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 10 - }, - [192] = { - .class_hid = BNXT_ULP_CLASS_HID_030a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 11 - }, - [193] = { - .class_hid = BNXT_ULP_CLASS_HID_0670, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF24_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 12 - }, - [194] = { - .class_hid = BNXT_ULP_CLASS_HID_01b8, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 13 - }, - [195] = { - .class_hid = BNXT_ULP_CLASS_HID_01d2, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 14 - }, - [196] = { - .class_hid = BNXT_ULP_CLASS_HID_031a, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 15 - }, - [197] = { - .class_hid = BNXT_ULP_CLASS_HID_0660, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF24_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 16 - }, - [198] = { - .class_hid = BNXT_ULP_CLASS_HID_01a8, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV4 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF24_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 24, - .wc_pri = 17 - }, - [199] = { - .class_hid = BNXT_ULP_CLASS_HID_01dd, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 0 - }, - [200] = { - .class_hid = BNXT_ULP_CLASS_HID_0315, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 1 - }, - [201] = { - .class_hid = BNXT_ULP_CLASS_HID_003d, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 2 - }, - [202] = { - .class_hid = BNXT_ULP_CLASS_HID_02f5, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 3 - }, - [203] = { - .class_hid = BNXT_ULP_CLASS_HID_01cd, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 4 - }, - [204] = { - .class_hid = BNXT_ULP_CLASS_HID_0305, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 5 - }, - [205] = { - .class_hid = BNXT_ULP_CLASS_HID_01de, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 6 - }, - [206] = { - .class_hid = BNXT_ULP_CLASS_HID_0316, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 7 - }, - [207] = { - .class_hid = BNXT_ULP_CLASS_HID_066c, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF25_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 8 - }, - [208] = { - .class_hid = BNXT_ULP_CLASS_HID_01a4, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 9 - }, - [209] = { - .class_hid = BNXT_ULP_CLASS_HID_003e, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 10 - }, - [210] = { - .class_hid = BNXT_ULP_CLASS_HID_02f6, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 11 - }, - [211] = { - .class_hid = BNXT_ULP_CLASS_HID_078c, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF25_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 12 - }, - [212] = { - .class_hid = BNXT_ULP_CLASS_HID_0044, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_UDP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 13 - }, - [213] = { - .class_hid = BNXT_ULP_CLASS_HID_01ce, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 14 - }, - [214] = { - .class_hid = BNXT_ULP_CLASS_HID_0306, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 15 - }, - [215] = { - .class_hid = BNXT_ULP_CLASS_HID_067c, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE | - BNXT_ULP_HF25_BITMASK_OO_VLAN_VID | - BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 16 - }, - [216] = { - .class_hid = BNXT_ULP_CLASS_HID_01b4, - .hdr_sig = { .bits = - BNXT_ULP_HDR_BIT_O_ETH | - BNXT_ULP_HDR_BIT_OO_VLAN | - BNXT_ULP_HDR_BIT_O_IPV6 | - BNXT_ULP_HDR_BIT_O_TCP | - BNXT_ULP_FLOW_DIR_BITMASK_EGR }, - .field_sig = { .bits = - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC | - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC | - BNXT_ULP_HF25_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID | + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID | + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR | + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT | + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT | BNXT_ULP_MATCH_TYPE_BITMASK_EM }, - .class_tid = 25, - .wc_pri = 17 } }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index 6bb26f0ad5..4963fc0b95 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -3,32 +3,58 @@ * All rights reserved. */ -/* date: Thu Oct 15 17:28:37 2020 */ +/* date: Mon Nov 23 17:33:02 2020 */ #ifndef ULP_TEMPLATE_DB_H_ #define ULP_TEMPLATE_DB_H_ -#define BNXT_ULP_REGFILE_MAX_SZ 19 +#define BNXT_ULP_REGFILE_MAX_SZ 31 #define BNXT_ULP_MAX_NUM_DEVICES 4 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2 -#define BNXT_ULP_GEN_TBL_MAX_SZ 4 -#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 2048 -#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 217 -#define BNXT_ULP_CLASS_HID_LOW_PRIME 7919 -#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907 -#define BNXT_ULP_CLASS_HID_SHFTR 32 -#define BNXT_ULP_CLASS_HID_SHFTL 31 -#define BNXT_ULP_CLASS_HID_MASK 2047 -#define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 4096 -#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 83 +#define BNXT_ULP_GEN_TBL_MAX_SZ 6 +#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 256 +#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 41 +#define BNXT_ULP_CLASS_HID_LOW_PRIME 3793 +#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7919 +#define BNXT_ULP_CLASS_HID_SHFTR 24 +#define BNXT_ULP_CLASS_HID_SHFTL 23 +#define BNXT_ULP_CLASS_HID_MASK 255 +#define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 2048 +#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 15 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919 -#define BNXT_ULP_ACT_HID_HIGH_PRIME 4721 -#define BNXT_ULP_ACT_HID_SHFTR 23 +#define BNXT_ULP_ACT_HID_HIGH_PRIME 7919 +#define BNXT_ULP_ACT_HID_SHFTR 24 #define BNXT_ULP_ACT_HID_SHFTL 23 -#define BNXT_ULP_ACT_HID_MASK 4095 +#define BNXT_ULP_ACT_HID_MASK 2047 #define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 8 #define BNXT_ULP_GLB_TEMPLATE_TBL_MAX_SZ 1 #define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7 +#define BNXT_ULP_HDR_SIG_ID_SHIFT 4 +#define BNXT_ULP_GLB_FIELD_TBL_SIZE 4441 +#define ULP_WH_PLUS_CLASS_TMPL_LIST_SIZE 8 +#define ULP_WH_PLUS_CLASS_TBL_LIST_SIZE 41 +#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 273 +#define ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE 14 +#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 385 +#define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 10 +#define ULP_STINGRAY_CLASS_TMPL_LIST_SIZE 8 +#define ULP_STINGRAY_CLASS_TBL_LIST_SIZE 41 +#define ULP_STINGRAY_CLASS_KEY_INFO_LIST_SIZE 273 +#define ULP_STINGRAY_CLASS_IDENT_LIST_SIZE 14 +#define ULP_STINGRAY_CLASS_RESULT_FIELD_LIST_SIZE 385 +#define ULP_STINGRAY_CLASS_COND_LIST_SIZE 10 +#define ULP_WH_PLUS_ACT_TMPL_LIST_SIZE 2 +#define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 4 +#define ULP_WH_PLUS_ACT_KEY_INFO_LIST_SIZE 0 +#define ULP_WH_PLUS_ACT_IDENT_LIST_SIZE 0 +#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 65 +#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 2 +#define ULP_STINGRAY_ACT_TMPL_LIST_SIZE 2 +#define ULP_STINGRAY_ACT_TBL_LIST_SIZE 4 +#define ULP_STINGRAY_ACT_KEY_INFO_LIST_SIZE 0 +#define ULP_STINGRAY_ACT_IDENT_LIST_SIZE 0 +#define ULP_STINGRAY_ACT_RESULT_FIELD_LIST_SIZE 65 +#define ULP_STINGRAY_ACT_COND_LIST_SIZE 2 enum bnxt_ulp_action_bit { BNXT_ULP_ACTION_BIT_MARK = 0x0000000000000001, @@ -82,6 +108,12 @@ enum bnxt_ulp_hdr_bit { BNXT_ULP_HDR_BIT_LAST = 0x0000000000020000 }; +enum bnxt_ulp_accept_opc { + BNXT_ULP_ACCEPT_OPC_ALWAYS = 0, + BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH = 1, + BNXT_ULP_ACCEPT_OPC_LAST = 2 +}; + enum bnxt_ulp_act_type { BNXT_ULP_ACT_TYPE_NOT_SUPPORTED = 0, BNXT_ULP_ACT_TYPE_SUPPORTED = 1, @@ -139,10 +171,12 @@ enum bnxt_ulp_cf_idx { BNXT_ULP_CF_IDX_L3_HDR_CNT = 40, BNXT_ULP_CF_IDX_L4_HDR_CNT = 41, BNXT_ULP_CF_IDX_VFR_MODE = 42, - BNXT_ULP_CF_IDX_LOOPBACK_PARIF = 43, - BNXT_ULP_CF_IDX_L3_TUN = 44, - BNXT_ULP_CF_IDX_L3_TUN_DECAP = 45, - BNXT_ULP_CF_IDX_LAST = 46 + BNXT_ULP_CF_IDX_L3_TUN = 43, + BNXT_ULP_CF_IDX_L3_TUN_DECAP = 44, + BNXT_ULP_CF_IDX_FID = 45, + BNXT_ULP_CF_IDX_HDR_SIG_ID = 46, + BNXT_ULP_CF_IDX_FLOW_SIG_ID = 47, + BNXT_ULP_CF_IDX_LAST = 48 }; enum bnxt_ulp_cond_list_opc { @@ -200,6 +234,35 @@ enum bnxt_ulp_fdb_opc { BNXT_ULP_FDB_OPC_LAST = 4 }; +enum bnxt_ulp_fdb_type { + BNXT_ULP_FDB_TYPE_REGULAR = 0, + BNXT_ULP_FDB_TYPE_DEFAULT = 1, + BNXT_ULP_FDB_TYPE_RID = 2, + BNXT_ULP_FDB_TYPE_LAST = 3 +}; + +enum bnxt_ulp_field_opc { + BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT = 0, + BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD = 1, + BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD = 2, + BNXT_ULP_FIELD_OPC_SET_TO_REGFILE = 3, + BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE = 4, + BNXT_ULP_FIELD_OPC_SET_TO_ZERO = 5, + BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT = 6, + BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP = 7, + BNXT_ULP_FIELD_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8, + BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9, + BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10, + BNXT_ULP_FIELD_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11, + BNXT_ULP_FIELD_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST = 12, + BNXT_ULP_FIELD_OPC_IF_COMP_FIELD_THEN_ACT_PROP_ELSE_CONST = 13, + BNXT_ULP_FIELD_OPC_IF_NOT_COMP_FIELD_THEN_ACT_PROP_ELSE_CONST = 14, + BNXT_ULP_FIELD_OPC_IF_COMP_FIELD_THEN_CONST_ELSE_CF = 15, + BNXT_ULP_FIELD_OPC_IF_NOT_COMP_FIELD_THEN_CONST_ELSE_CF = 16, + BNXT_ULP_FIELD_OPC_IF_FIELD_BIT_THEN_ONES_ELSE_ZERO = 17, + BNXT_ULP_FIELD_OPC_LAST = 18 +}; + enum bnxt_ulp_generic_tbl_opc { BNXT_ULP_GENERIC_TBL_OPC_NOT_USED = 0, BNXT_ULP_GENERIC_TBL_OPC_READ = 1, @@ -207,14 +270,14 @@ enum bnxt_ulp_generic_tbl_opc { BNXT_ULP_GENERIC_TBL_OPC_LAST = 3 }; -enum bnxt_ulp_glb_regfile_index { - BNXT_ULP_GLB_REGFILE_INDEX_NOT_USED = 0, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 1, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR = 2, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID = 3, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID = 4, - BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR = 5, - BNXT_ULP_GLB_REGFILE_INDEX_LAST = 6 +enum bnxt_ulp_glb_rf_idx { + BNXT_ULP_GLB_RF_IDX_NOT_USED = 0, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID = 1, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR = 2, + BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID = 3, + BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID = 4, + BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR = 5, + BNXT_ULP_GLB_RF_IDX_LAST = 6 }; enum bnxt_ulp_hdr_type { @@ -244,23 +307,6 @@ enum bnxt_ulp_index_tbl_opc { BNXT_ULP_INDEX_TBL_OPC_LAST = 7 }; -enum bnxt_ulp_mapper_opc { - BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT = 0, - BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD = 1, - BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD = 2, - BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE = 3, - BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE = 4, - BNXT_ULP_MAPPER_OPC_SET_TO_ZERO = 5, - BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT = 6, - BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP = 7, - BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8, - BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9, - BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10, - BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11, - BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST = 12, - BNXT_ULP_MAPPER_OPC_LAST = 13 -}; - enum bnxt_ulp_mark_db_opc { BNXT_ULP_MARK_DB_OPC_NOP = 0, BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION = 1, @@ -288,38 +334,39 @@ enum bnxt_ulp_pri_opc { BNXT_ULP_PRI_OPC_LAST = 3 }; -enum bnxt_ulp_regfile_index { - BNXT_ULP_REGFILE_INDEX_NOT_USED = 0, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 1, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 2, - BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 3, - BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 4, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 5, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 6, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 7, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 8, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 9, - BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 10, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12, - BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 14, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR = 15, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 = 16, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 = 17, - BNXT_ULP_REGFILE_INDEX_ACTION_REC_SIZE = 18, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0 = 19, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_1 = 20, - BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0 = 21, - BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_1 = 22, - BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_0 = 23, - BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_1 = 24, - BNXT_ULP_REGFILE_INDEX_SRC_PROPERTY_PTR = 25, - BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT = 26, - BNXT_ULP_REGFILE_INDEX_MIRROR_PTR_0 = 27, - BNXT_ULP_REGFILE_INDEX_CLASS_TID = 28, - BNXT_ULP_REGFILE_INDEX_FID = 29, - BNXT_ULP_REGFILE_INDEX_LAST = 30 +enum bnxt_ulp_rf_idx { + BNXT_ULP_RF_IDX_NOT_USED = 0, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 = 1, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_1 = 2, + BNXT_ULP_RF_IDX_PROF_FUNC_ID_0 = 3, + BNXT_ULP_RF_IDX_PROF_FUNC_ID_1 = 4, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 = 5, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_1 = 6, + BNXT_ULP_RF_IDX_WC_PROFILE_ID_0 = 7, + BNXT_ULP_RF_IDX_WC_PROFILE_ID_1 = 8, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR = 9, + BNXT_ULP_RF_IDX_ACTION_PTR_0 = 10, + BNXT_ULP_RF_IDX_ENCAP_PTR_0 = 11, + BNXT_ULP_RF_IDX_ENCAP_PTR_1 = 12, + BNXT_ULP_RF_IDX_CRITICAL_RESOURCE = 13, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 = 14, + BNXT_ULP_RF_IDX_MAIN_SP_PTR = 15, + BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 = 16, + BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 = 17, + BNXT_ULP_RF_IDX_ACTION_REC_SIZE = 18, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 = 19, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_1 = 20, + BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 = 21, + BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_1 = 22, + BNXT_ULP_RF_IDX_WC_TCAM_INDEX_0 = 23, + BNXT_ULP_RF_IDX_WC_TCAM_INDEX_1 = 24, + BNXT_ULP_RF_IDX_SRC_PROPERTY_PTR = 25, + BNXT_ULP_RF_IDX_GENERIC_TBL_HIT = 26, + BNXT_ULP_RF_IDX_MIRROR_PTR_0 = 27, + BNXT_ULP_RF_IDX_HDR_SIG_ID = 28, + BNXT_ULP_RF_IDX_FLOW_SIG_ID = 29, + BNXT_ULP_RF_IDX_RID = 30, + BNXT_ULP_RF_IDX_LAST = 31 }; enum bnxt_ulp_tcam_tbl_opc { @@ -340,11 +387,6 @@ enum bnxt_ulp_fdb_resource_flags { BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_EGR = 0x01 }; -enum bnxt_ulp_fdb_type { - BNXT_ULP_FDB_TYPE_REGULAR = 0, - BNXT_ULP_FDB_TYPE_DEFAULT = 1 -}; - enum bnxt_ulp_flow_dir_bitmask { BNXT_ULP_FLOW_DIR_BITMASK_ING = 0x0000000000000000, BNXT_ULP_FLOW_DIR_BITMASK_EGR = 0x8000000000000000 @@ -352,7 +394,7 @@ enum bnxt_ulp_flow_dir_bitmask { enum bnxt_ulp_match_type_bitmask { BNXT_ULP_MATCH_TYPE_BITMASK_EM = 0x0000000000000000, - BNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x0000000000000001 + BNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x8000000000000000 }; enum bnxt_ulp_resource_func { @@ -366,9 +408,8 @@ enum bnxt_ulp_resource_func { BNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 0x83, BNXT_ULP_RESOURCE_FUNC_IF_TABLE = 0x84, BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85, - BNXT_ULP_RESOURCE_FUNC_SHARED_TABLE = 0x86, - BNXT_ULP_RESOURCE_FUNC_PARENT_FLOW = 0x87, - BNXT_ULP_RESOURCE_FUNC_CHILD_FLOW = 0x88 + BNXT_ULP_RESOURCE_FUNC_PARENT_FLOW = 0x86, + BNXT_ULP_RESOURCE_FUNC_CHILD_FLOW = 0x87 }; enum bnxt_ulp_resource_sub_type { @@ -383,232 +424,6 @@ enum bnxt_ulp_resource_sub_type { BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL = 2 }; -enum bnxt_ulp_sym { - BNXT_ULP_SYM_PKT_TYPE_IGNORE = 0, - BNXT_ULP_SYM_PKT_TYPE_L2 = 0, - BNXT_ULP_SYM_PKT_TYPE_0_IGNORE = 0, - BNXT_ULP_SYM_PKT_TYPE_0_L2 = 0, - BNXT_ULP_SYM_PKT_TYPE_1_IGNORE = 0, - BNXT_ULP_SYM_PKT_TYPE_1_L2 = 0, - BNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0, - BNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0, - BNXT_ULP_SYM_RECYCLE_CNT_ONE = 1, - BNXT_ULP_SYM_RECYCLE_CNT_TWO = 2, - BNXT_ULP_SYM_RECYCLE_CNT_THREE = 3, - BNXT_ULP_SYM_AGG_ERROR_IGNORE = 0, - BNXT_ULP_SYM_AGG_ERROR_NO = 0, - BNXT_ULP_SYM_AGG_ERROR_YES = 1, - BNXT_ULP_SYM_RESERVED_IGNORE = 0, - BNXT_ULP_SYM_HREC_NEXT_IGNORE = 0, - BNXT_ULP_SYM_HREC_NEXT_NO = 0, - BNXT_ULP_SYM_HREC_NEXT_YES = 1, - BNXT_ULP_SYM_TL2_HDR_VALID_IGNORE = 0, - BNXT_ULP_SYM_TL2_HDR_VALID_NO = 0, - BNXT_ULP_SYM_TL2_HDR_VALID_YES = 1, - BNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE = 0, - BNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0, - BNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE = 0, - BNXT_ULP_SYM_TL2_UC_MC_BC_UC = 0, - BNXT_ULP_SYM_TL2_UC_MC_BC_MC = 2, - BNXT_ULP_SYM_TL2_UC_MC_BC_BC = 3, - BNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE = 0, - BNXT_ULP_SYM_TL2_VTAG_PRESENT_NO = 0, - BNXT_ULP_SYM_TL2_VTAG_PRESENT_YES = 1, - BNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE = 0, - BNXT_ULP_SYM_TL2_TWO_VTAGS_NO = 0, - BNXT_ULP_SYM_TL2_TWO_VTAGS_YES = 1, - BNXT_ULP_SYM_TL3_HDR_VALID_IGNORE = 0, - BNXT_ULP_SYM_TL3_HDR_VALID_NO = 0, - BNXT_ULP_SYM_TL3_HDR_VALID_YES = 1, - BNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE = 0, - BNXT_ULP_SYM_TL3_HDR_ERROR_NO = 0, - BNXT_ULP_SYM_TL3_HDR_ERROR_YES = 1, - BNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE = 0, - BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0, - BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1, - BNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE = 0, - BNXT_ULP_SYM_TL3_HDR_ISIP_NO = 0, - BNXT_ULP_SYM_TL3_HDR_ISIP_YES = 1, - BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0, - BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_NO = 0, - BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_YES = 1, - BNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE = 0, - BNXT_ULP_SYM_TL3_IPV6_CMP_DST_NO = 0, - BNXT_ULP_SYM_TL3_IPV6_CMP_DST_YES = 1, - BNXT_ULP_SYM_TL4_HDR_VALID_IGNORE = 0, - BNXT_ULP_SYM_TL4_HDR_VALID_NO = 0, - BNXT_ULP_SYM_TL4_HDR_VALID_YES = 1, - BNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE = 0, - BNXT_ULP_SYM_TL4_HDR_ERROR_NO = 0, - BNXT_ULP_SYM_TL4_HDR_ERROR_YES = 1, - BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0, - BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_NO = 0, - BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_YES = 1, - BNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE = 0, - BNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0, - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1, - BNXT_ULP_SYM_TUN_HDR_VALID_IGNORE = 0, - BNXT_ULP_SYM_TUN_HDR_VALID_NO = 0, - BNXT_ULP_SYM_TUN_HDR_VALID_YES = 1, - BNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE = 0, - BNXT_ULP_SYM_TUN_HDR_ERROR_NO = 0, - BNXT_ULP_SYM_TUN_HDR_ERROR_YES = 1, - BNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE = 0, - BNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0, - BNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1, - BNXT_ULP_SYM_TUN_HDR_TYPE_NVGRE = 2, - BNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3, - BNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4, - BNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5, - BNXT_ULP_SYM_TUN_HDR_TYPE_PPPOE = 6, - BNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7, - BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8, - BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9, - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE = 15, - BNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE = 0, - BNXT_ULP_SYM_L2_HDR_VALID_IGNORE = 0, - BNXT_ULP_SYM_L2_HDR_VALID_NO = 0, - BNXT_ULP_SYM_L2_HDR_VALID_YES = 1, - BNXT_ULP_SYM_L2_HDR_ERROR_IGNORE = 0, - BNXT_ULP_SYM_L2_HDR_ERROR_NO = 0, - BNXT_ULP_SYM_L2_HDR_ERROR_YES = 1, - BNXT_ULP_SYM_L2_HDR_TYPE_IGNORE = 0, - BNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0, - BNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1, - BNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2, - BNXT_ULP_SYM_L2_UC_MC_BC_IGNORE = 0, - BNXT_ULP_SYM_L2_UC_MC_BC_UC = 0, - BNXT_ULP_SYM_L2_UC_MC_BC_MC = 2, - BNXT_ULP_SYM_L2_UC_MC_BC_BC = 3, - BNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE = 0, - BNXT_ULP_SYM_L2_VTAG_PRESENT_NO = 0, - BNXT_ULP_SYM_L2_VTAG_PRESENT_YES = 1, - BNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE = 0, - BNXT_ULP_SYM_L2_TWO_VTAGS_NO = 0, - BNXT_ULP_SYM_L2_TWO_VTAGS_YES = 1, - BNXT_ULP_SYM_L3_HDR_VALID_IGNORE = 0, - BNXT_ULP_SYM_L3_HDR_VALID_NO = 0, - BNXT_ULP_SYM_L3_HDR_VALID_YES = 1, - BNXT_ULP_SYM_L3_HDR_ERROR_IGNORE = 0, - BNXT_ULP_SYM_L3_HDR_ERROR_NO = 0, - BNXT_ULP_SYM_L3_HDR_ERROR_YES = 1, - BNXT_ULP_SYM_L3_HDR_TYPE_IGNORE = 0, - BNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0, - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1, - BNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2, - BNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3, - BNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4, - BNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5, - BNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6, - BNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7, - BNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8, - BNXT_ULP_SYM_L3_HDR_ISIP_IGNORE = 0, - BNXT_ULP_SYM_L3_HDR_ISIP_NO = 0, - BNXT_ULP_SYM_L3_HDR_ISIP_YES = 1, - BNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE = 0, - BNXT_ULP_SYM_L3_IPV6_CMP_SRC_NO = 0, - BNXT_ULP_SYM_L3_IPV6_CMP_SRC_YES = 1, - BNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE = 0, - BNXT_ULP_SYM_L3_IPV6_CMP_DST_NO = 0, - BNXT_ULP_SYM_L3_IPV6_CMP_DST_YES = 1, - BNXT_ULP_SYM_L4_HDR_VALID_IGNORE = 0, - BNXT_ULP_SYM_L4_HDR_VALID_NO = 0, - BNXT_ULP_SYM_L4_HDR_VALID_YES = 1, - BNXT_ULP_SYM_L4_HDR_ERROR_IGNORE = 0, - BNXT_ULP_SYM_L4_HDR_ERROR_NO = 0, - BNXT_ULP_SYM_L4_HDR_ERROR_YES = 1, - BNXT_ULP_SYM_L4_HDR_TYPE_IGNORE = 0, - BNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0, - BNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1, - BNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2, - BNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3, - BNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4, - BNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5, - BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0, - BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_NO = 0, - BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_YES = 1, - BNXT_ULP_SYM_POP_VLAN_NO = 0, - BNXT_ULP_SYM_POP_VLAN_YES = 1, - BNXT_ULP_SYM_DECAP_FUNC_NONE = 0, - BNXT_ULP_SYM_DECAP_FUNC_THRU_TL2 = 3, - BNXT_ULP_SYM_DECAP_FUNC_THRU_TL3 = 8, - BNXT_ULP_SYM_DECAP_FUNC_THRU_TL4 = 9, - BNXT_ULP_SYM_DECAP_FUNC_THRU_TUN = 10, - BNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11, - BNXT_ULP_SYM_DECAP_FUNC_THRU_L3 = 12, - BNXT_ULP_SYM_DECAP_FUNC_THRU_L4 = 13, - BNXT_ULP_SYM_ECV_VALID_NO = 0, - BNXT_ULP_SYM_ECV_VALID_YES = 1, - BNXT_ULP_SYM_ECV_CUSTOM_EN_NO = 0, - BNXT_ULP_SYM_ECV_CUSTOM_EN_YES = 1, - BNXT_ULP_SYM_ECV_L2_EN_NO = 0, - BNXT_ULP_SYM_ECV_L2_EN_YES = 1, - BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP = 0, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8, - BNXT_ULP_SYM_ECV_L3_TYPE_NONE = 0, - BNXT_ULP_SYM_ECV_L3_TYPE_IPV4 = 4, - BNXT_ULP_SYM_ECV_L3_TYPE_IPV6 = 5, - BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8847 = 6, - BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8848 = 7, - BNXT_ULP_SYM_ECV_L4_TYPE_NONE = 0, - BNXT_ULP_SYM_ECV_L4_TYPE_UDP = 4, - BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM = 5, - BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6, - BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7, - BNXT_ULP_SYM_ECV_TUN_TYPE_NONE = 0, - BNXT_ULP_SYM_ECV_TUN_TYPE_GENERIC = 1, - BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2, - BNXT_ULP_SYM_ECV_TUN_TYPE_NGE = 3, - BNXT_ULP_SYM_ECV_TUN_TYPE_NVGRE = 4, - BNXT_ULP_SYM_ECV_TUN_TYPE_GRE = 5, - BNXT_ULP_SYM_WH_PLUS_INT_ACT_REC = 1, - BNXT_ULP_SYM_WH_PLUS_EXT_ACT_REC = 0, - BNXT_ULP_SYM_WH_PLUS_UC_ACT_REC = 0, - BNXT_ULP_SYM_WH_PLUS_MC_ACT_REC = 1, - BNXT_ULP_SYM_ACT_REC_DROP_YES = 1, - BNXT_ULP_SYM_ACT_REC_DROP_NO = 0, - BNXT_ULP_SYM_ACT_REC_POP_VLAN_YES = 1, - BNXT_ULP_SYM_ACT_REC_POP_VLAN_NO = 0, - BNXT_ULP_SYM_ACT_REC_METER_EN_YES = 1, - BNXT_ULP_SYM_ACT_REC_METER_EN_NO = 0, - BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 4, - BNXT_ULP_SYM_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448, - BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 16, - BNXT_ULP_SYM_STINGRAY_EXT_EM_MAX_KEY_SIZE = 448, - BNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3, - BNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3, - BNXT_ULP_SYM_MATCH_TYPE_EM = 0, - BNXT_ULP_SYM_MATCH_TYPE_WM = 1, - BNXT_ULP_SYM_IP_PROTO_ICMP = 1, - BNXT_ULP_SYM_IP_PROTO_IGMP = 2, - BNXT_ULP_SYM_IP_PROTO_IP_IN_IP = 4, - BNXT_ULP_SYM_IP_PROTO_TCP = 6, - BNXT_ULP_SYM_IP_PROTO_UDP = 17, - BNXT_ULP_SYM_VF_FUNC_PARIF = 15, - BNXT_ULP_SYM_NO = 0, - BNXT_ULP_SYM_YES = 1, - BNXT_ULP_SYM_RECYCLE_DST = 0x800 -}; - -enum bnxt_ulp_wh_plus { - BNXT_ULP_WH_PLUS_LOOPBACK_PORT = 4, - BNXT_ULP_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448 -}; - enum bnxt_ulp_act_prop_sz { BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ = 4, BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ = 4, @@ -651,6 +466,7 @@ enum bnxt_ulp_act_prop_sz { BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP = 4, BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN = 32, BNXT_ULP_ACT_PROP_SZ_JUMP = 4, + BNXT_ULP_ACT_PROP_SZ_SHARED_HANDLE = 8, BNXT_ULP_ACT_PROP_SZ_LAST = 4 }; @@ -696,319 +512,512 @@ enum bnxt_ulp_act_prop_idx { BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 221, BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 225, BNXT_ULP_ACT_PROP_IDX_JUMP = 257, - BNXT_ULP_ACT_PROP_IDX_LAST = 261 + BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE = 261, + BNXT_ULP_ACT_PROP_IDX_LAST = 269 +}; + +enum bnxt_ulp_wh_plus_sym { + BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_L2 = 0, + BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_0_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_0_L2 = 0, + BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_1_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_PKT_TYPE_1_L2 = 0, + BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_ZERO = 0, + BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_ONE = 1, + BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_TWO = 2, + BNXT_ULP_WH_PLUS_SYM_RECYCLE_CNT_THREE = 3, + BNXT_ULP_WH_PLUS_SYM_AGG_ERROR_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_AGG_ERROR_NO = 0, + BNXT_ULP_WH_PLUS_SYM_AGG_ERROR_YES = 1, + BNXT_ULP_WH_PLUS_SYM_RESERVED_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_HREC_NEXT_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_HREC_NEXT_NO = 0, + BNXT_ULP_WH_PLUS_SYM_HREC_NEXT_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL2_HDR_VALID_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_HDR_VALID_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_HDR_VALID_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL2_HDR_TYPE_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_HDR_TYPE_DIX = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_UC_MC_BC_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_UC_MC_BC_UC = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_UC_MC_BC_MC = 2, + BNXT_ULP_WH_PLUS_SYM_TL2_UC_MC_BC_BC = 3, + BNXT_ULP_WH_PLUS_SYM_TL2_VTAG_PRESENT_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_VTAG_PRESENT_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_VTAG_PRESENT_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL2_TWO_VTAGS_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_TWO_VTAGS_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL2_TWO_VTAGS_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_VALID_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_VALID_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_VALID_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ERROR_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ERROR_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ERROR_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_TYPE_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_TYPE_IPV4 = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_TYPE_IPV6 = 1, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ISIP_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ISIP_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_HDR_ISIP_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_SRC_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_SRC_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_DST_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_DST_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL3_IPV6_CMP_DST_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_VALID_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_VALID_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_VALID_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_ERROR_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_ERROR_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_ERROR_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_IS_UDP_TCP_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_IS_UDP_TCP_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_TYPE_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_TYPE_TCP = 0, + BNXT_ULP_WH_PLUS_SYM_TL4_HDR_TYPE_UDP = 1, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_VALID_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_VALID_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_VALID_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_ERROR_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_ERROR_NO = 0, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_ERROR_YES = 1, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_VXLAN = 0, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_GENEVE = 1, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_NVGRE = 2, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_GRE = 3, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_IPV4 = 4, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_IPV6 = 5, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_PPPOE = 6, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_MPLS = 7, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_UPAR1 = 8, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_UPAR2 = 9, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_TYPE_NONE = 15, + BNXT_ULP_WH_PLUS_SYM_TUN_HDR_FLAGS_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_VALID_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_VALID_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_VALID_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_ERROR_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_ERROR_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_ERROR_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_TYPE_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_TYPE_DIX = 0, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_TYPE_LLC_SNAP = 1, + BNXT_ULP_WH_PLUS_SYM_L2_HDR_TYPE_LLC = 2, + BNXT_ULP_WH_PLUS_SYM_L2_UC_MC_BC_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L2_UC_MC_BC_UC = 0, + BNXT_ULP_WH_PLUS_SYM_L2_UC_MC_BC_MC = 2, + BNXT_ULP_WH_PLUS_SYM_L2_UC_MC_BC_BC = 3, + BNXT_ULP_WH_PLUS_SYM_L2_VTAG_PRESENT_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L2_VTAG_PRESENT_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L2_VTAG_PRESENT_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L2_TWO_VTAGS_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L2_TWO_VTAGS_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L2_TWO_VTAGS_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_VALID_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_VALID_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_VALID_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_ERROR_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_ERROR_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_ERROR_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_IPV4 = 0, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_IPV6 = 1, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_ARP = 2, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_PTP = 3, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_EAPOL = 4, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_ROCE = 5, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_FCOE = 6, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_UPAR1 = 7, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_TYPE_UPAR2 = 8, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_ISIP_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_ISIP_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L3_HDR_ISIP_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_SRC_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_SRC_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_SRC_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_DST_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_DST_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L3_IPV6_CMP_DST_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_VALID_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_VALID_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_VALID_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_ERROR_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_ERROR_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_ERROR_YES = 1, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_TCP = 0, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_UDP = 1, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_ICMP = 2, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_UPAR1 = 3, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_UPAR2 = 4, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_TYPE_BTH_V1 = 5, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_IS_UDP_TCP_NO = 0, + BNXT_ULP_WH_PLUS_SYM_L4_HDR_IS_UDP_TCP_YES = 1, + BNXT_ULP_WH_PLUS_SYM_POP_VLAN_NO = 0, + BNXT_ULP_WH_PLUS_SYM_POP_VLAN_YES = 1, + BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_NONE = 0, + BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_TL2 = 3, + BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_TL3 = 8, + BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_TL4 = 9, + BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_TUN = 10, + BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_L2 = 11, + BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_L3 = 12, + BNXT_ULP_WH_PLUS_SYM_DECAP_FUNC_THRU_L4 = 13, + BNXT_ULP_WH_PLUS_SYM_ECV_VALID_NO = 0, + BNXT_ULP_WH_PLUS_SYM_ECV_VALID_YES = 1, + BNXT_ULP_WH_PLUS_SYM_ECV_CUSTOM_EN_NO = 0, + BNXT_ULP_WH_PLUS_SYM_ECV_CUSTOM_EN_YES = 1, + BNXT_ULP_WH_PLUS_SYM_ECV_L2_EN_NO = 0, + BNXT_ULP_WH_PLUS_SYM_ECV_L2_EN_YES = 1, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_NOP = 0, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8, + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8, + BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_NONE = 0, + BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_IPV4 = 4, + BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_IPV6 = 5, + BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_MPLS_8847 = 6, + BNXT_ULP_WH_PLUS_SYM_ECV_L3_TYPE_MPLS_8848 = 7, + BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_NONE = 0, + BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_UDP = 4, + BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_UDP_CSUM = 5, + BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6, + BNXT_ULP_WH_PLUS_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7, + BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_NONE = 0, + BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_GENERIC = 1, + BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_VXLAN = 2, + BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_NGE = 3, + BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_NVGRE = 4, + BNXT_ULP_WH_PLUS_SYM_ECV_TUN_TYPE_GRE = 5, + BNXT_ULP_WH_PLUS_SYM_EEM_ACT_REC_INT = 1, + BNXT_ULP_WH_PLUS_SYM_EEM_EXT_FLOW_CNTR = 0, + BNXT_ULP_WH_PLUS_SYM_UC_ACT_REC = 0, + BNXT_ULP_WH_PLUS_SYM_MC_ACT_REC = 1, + BNXT_ULP_WH_PLUS_SYM_ACT_REC_DROP_YES = 1, + BNXT_ULP_WH_PLUS_SYM_ACT_REC_DROP_NO = 0, + BNXT_ULP_WH_PLUS_SYM_ACT_REC_POP_VLAN_YES = 1, + BNXT_ULP_WH_PLUS_SYM_ACT_REC_POP_VLAN_NO = 0, + BNXT_ULP_WH_PLUS_SYM_ACT_REC_METER_EN_YES = 1, + BNXT_ULP_WH_PLUS_SYM_ACT_REC_METER_EN_NO = 0, + BNXT_ULP_WH_PLUS_SYM_LOOPBACK_PORT = 4, + BNXT_ULP_WH_PLUS_SYM_LOOPBACK_PARIF = 15, + BNXT_ULP_WH_PLUS_SYM_EXT_EM_MAX_KEY_SIZE = 448, + BNXT_ULP_WH_PLUS_SYM_MATCH_TYPE_EM = 0, + BNXT_ULP_WH_PLUS_SYM_MATCH_TYPE_WM = 1, + BNXT_ULP_WH_PLUS_SYM_IP_PROTO_ICMP = 1, + BNXT_ULP_WH_PLUS_SYM_IP_PROTO_IGMP = 2, + BNXT_ULP_WH_PLUS_SYM_IP_PROTO_IP_IN_IP = 4, + BNXT_ULP_WH_PLUS_SYM_IP_PROTO_TCP = 6, + BNXT_ULP_WH_PLUS_SYM_IP_PROTO_UDP = 17, + BNXT_ULP_WH_PLUS_SYM_VF_FUNC_PARIF = 15, + BNXT_ULP_WH_PLUS_SYM_NO = 0, + BNXT_ULP_WH_PLUS_SYM_YES = 1, + BNXT_ULP_WH_PLUS_SYM_RECYCLE_DST = 0x800 +}; + +enum bnxt_ulp_stingray_sym { + BNXT_ULP_STINGRAY_SYM_PKT_TYPE_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_PKT_TYPE_L2 = 0, + BNXT_ULP_STINGRAY_SYM_PKT_TYPE_0_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_PKT_TYPE_0_L2 = 0, + BNXT_ULP_STINGRAY_SYM_PKT_TYPE_1_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_PKT_TYPE_1_L2 = 0, + BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_ZERO = 0, + BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_ONE = 1, + BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_TWO = 2, + BNXT_ULP_STINGRAY_SYM_RECYCLE_CNT_THREE = 3, + BNXT_ULP_STINGRAY_SYM_AGG_ERROR_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_AGG_ERROR_NO = 0, + BNXT_ULP_STINGRAY_SYM_AGG_ERROR_YES = 1, + BNXT_ULP_STINGRAY_SYM_RESERVED_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_HREC_NEXT_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_HREC_NEXT_NO = 0, + BNXT_ULP_STINGRAY_SYM_HREC_NEXT_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL2_HDR_VALID_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL2_HDR_VALID_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL2_HDR_VALID_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL2_HDR_TYPE_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL2_HDR_TYPE_DIX = 0, + BNXT_ULP_STINGRAY_SYM_TL2_UC_MC_BC_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL2_UC_MC_BC_UC = 0, + BNXT_ULP_STINGRAY_SYM_TL2_UC_MC_BC_MC = 2, + BNXT_ULP_STINGRAY_SYM_TL2_UC_MC_BC_BC = 3, + BNXT_ULP_STINGRAY_SYM_TL2_VTAG_PRESENT_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL2_VTAG_PRESENT_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL2_VTAG_PRESENT_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL2_TWO_VTAGS_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL2_TWO_VTAGS_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL2_TWO_VTAGS_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_VALID_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_VALID_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_VALID_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_ERROR_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_ERROR_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_ERROR_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_TYPE_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_TYPE_IPV4 = 0, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_TYPE_IPV6 = 1, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_ISIP_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_ISIP_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL3_HDR_ISIP_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_SRC_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_SRC_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_DST_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_DST_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL3_IPV6_CMP_DST_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_VALID_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_VALID_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_VALID_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_ERROR_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_ERROR_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_ERROR_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_IS_UDP_TCP_NO = 0, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_IS_UDP_TCP_YES = 1, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_TYPE_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_TYPE_TCP = 0, + BNXT_ULP_STINGRAY_SYM_TL4_HDR_TYPE_UDP = 1, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_VALID_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_VALID_NO = 0, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_VALID_YES = 1, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_ERROR_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_ERROR_NO = 0, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_ERROR_YES = 1, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_VXLAN = 0, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_GENEVE = 1, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_NVGRE = 2, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_GRE = 3, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_IPV4 = 4, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_IPV6 = 5, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_PPPOE = 6, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_MPLS = 7, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_UPAR1 = 8, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_UPAR2 = 9, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_NONE = 15, + BNXT_ULP_STINGRAY_SYM_TUN_HDR_FLAGS_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L2_HDR_VALID_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L2_HDR_VALID_NO = 0, + BNXT_ULP_STINGRAY_SYM_L2_HDR_VALID_YES = 1, + BNXT_ULP_STINGRAY_SYM_L2_HDR_ERROR_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L2_HDR_ERROR_NO = 0, + BNXT_ULP_STINGRAY_SYM_L2_HDR_ERROR_YES = 1, + BNXT_ULP_STINGRAY_SYM_L2_HDR_TYPE_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L2_HDR_TYPE_DIX = 0, + BNXT_ULP_STINGRAY_SYM_L2_HDR_TYPE_LLC_SNAP = 1, + BNXT_ULP_STINGRAY_SYM_L2_HDR_TYPE_LLC = 2, + BNXT_ULP_STINGRAY_SYM_L2_UC_MC_BC_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L2_UC_MC_BC_UC = 0, + BNXT_ULP_STINGRAY_SYM_L2_UC_MC_BC_MC = 2, + BNXT_ULP_STINGRAY_SYM_L2_UC_MC_BC_BC = 3, + BNXT_ULP_STINGRAY_SYM_L2_VTAG_PRESENT_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L2_VTAG_PRESENT_NO = 0, + BNXT_ULP_STINGRAY_SYM_L2_VTAG_PRESENT_YES = 1, + BNXT_ULP_STINGRAY_SYM_L2_TWO_VTAGS_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L2_TWO_VTAGS_NO = 0, + BNXT_ULP_STINGRAY_SYM_L2_TWO_VTAGS_YES = 1, + BNXT_ULP_STINGRAY_SYM_L3_HDR_VALID_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L3_HDR_VALID_NO = 0, + BNXT_ULP_STINGRAY_SYM_L3_HDR_VALID_YES = 1, + BNXT_ULP_STINGRAY_SYM_L3_HDR_ERROR_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L3_HDR_ERROR_NO = 0, + BNXT_ULP_STINGRAY_SYM_L3_HDR_ERROR_YES = 1, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_IPV4 = 0, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_IPV6 = 1, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_ARP = 2, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_PTP = 3, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_EAPOL = 4, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_ROCE = 5, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_FCOE = 6, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_UPAR1 = 7, + BNXT_ULP_STINGRAY_SYM_L3_HDR_TYPE_UPAR2 = 8, + BNXT_ULP_STINGRAY_SYM_L3_HDR_ISIP_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L3_HDR_ISIP_NO = 0, + BNXT_ULP_STINGRAY_SYM_L3_HDR_ISIP_YES = 1, + BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_SRC_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_SRC_NO = 0, + BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_SRC_YES = 1, + BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_DST_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_DST_NO = 0, + BNXT_ULP_STINGRAY_SYM_L3_IPV6_CMP_DST_YES = 1, + BNXT_ULP_STINGRAY_SYM_L4_HDR_VALID_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L4_HDR_VALID_NO = 0, + BNXT_ULP_STINGRAY_SYM_L4_HDR_VALID_YES = 1, + BNXT_ULP_STINGRAY_SYM_L4_HDR_ERROR_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L4_HDR_ERROR_NO = 0, + BNXT_ULP_STINGRAY_SYM_L4_HDR_ERROR_YES = 1, + BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_TCP = 0, + BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_UDP = 1, + BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_ICMP = 2, + BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_UPAR1 = 3, + BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_UPAR2 = 4, + BNXT_ULP_STINGRAY_SYM_L4_HDR_TYPE_BTH_V1 = 5, + BNXT_ULP_STINGRAY_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0, + BNXT_ULP_STINGRAY_SYM_L4_HDR_IS_UDP_TCP_NO = 0, + BNXT_ULP_STINGRAY_SYM_L4_HDR_IS_UDP_TCP_YES = 1, + BNXT_ULP_STINGRAY_SYM_POP_VLAN_NO = 0, + BNXT_ULP_STINGRAY_SYM_POP_VLAN_YES = 1, + BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_NONE = 0, + BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_TL2 = 3, + BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_TL3 = 8, + BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_TL4 = 9, + BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_TUN = 10, + BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_L2 = 11, + BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_L3 = 12, + BNXT_ULP_STINGRAY_SYM_DECAP_FUNC_THRU_L4 = 13, + BNXT_ULP_STINGRAY_SYM_ECV_VALID_NO = 0, + BNXT_ULP_STINGRAY_SYM_ECV_VALID_YES = 1, + BNXT_ULP_STINGRAY_SYM_ECV_CUSTOM_EN_NO = 0, + BNXT_ULP_STINGRAY_SYM_ECV_CUSTOM_EN_YES = 1, + BNXT_ULP_STINGRAY_SYM_ECV_L2_EN_NO = 0, + BNXT_ULP_STINGRAY_SYM_ECV_L2_EN_YES = 1, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_NOP = 0, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8, + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8, + BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_NONE = 0, + BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_IPV4 = 4, + BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_IPV6 = 5, + BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_MPLS_8847 = 6, + BNXT_ULP_STINGRAY_SYM_ECV_L3_TYPE_MPLS_8848 = 7, + BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_NONE = 0, + BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_UDP = 4, + BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_UDP_CSUM = 5, + BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6, + BNXT_ULP_STINGRAY_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7, + BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_NONE = 0, + BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_GENERIC = 1, + BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_VXLAN = 2, + BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_NGE = 3, + BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_NVGRE = 4, + BNXT_ULP_STINGRAY_SYM_ECV_TUN_TYPE_GRE = 5, + BNXT_ULP_STINGRAY_SYM_EEM_ACT_REC_INT = 0, + BNXT_ULP_STINGRAY_SYM_EEM_EXT_FLOW_CNTR = 1, + BNXT_ULP_STINGRAY_SYM_UC_ACT_REC = 0, + BNXT_ULP_STINGRAY_SYM_MC_ACT_REC = 1, + BNXT_ULP_STINGRAY_SYM_ACT_REC_DROP_YES = 1, + BNXT_ULP_STINGRAY_SYM_ACT_REC_DROP_NO = 0, + BNXT_ULP_STINGRAY_SYM_ACT_REC_POP_VLAN_YES = 1, + BNXT_ULP_STINGRAY_SYM_ACT_REC_POP_VLAN_NO = 0, + BNXT_ULP_STINGRAY_SYM_ACT_REC_METER_EN_YES = 1, + BNXT_ULP_STINGRAY_SYM_ACT_REC_METER_EN_NO = 0, + BNXT_ULP_STINGRAY_SYM_LOOPBACK_PORT = 16, + BNXT_ULP_STINGRAY_SYM_LOOPBACK_PARIF = 15, + BNXT_ULP_STINGRAY_SYM_EXT_EM_MAX_KEY_SIZE = 448, + BNXT_ULP_STINGRAY_SYM_MATCH_TYPE_EM = 0, + BNXT_ULP_STINGRAY_SYM_MATCH_TYPE_WM = 1, + BNXT_ULP_STINGRAY_SYM_IP_PROTO_ICMP = 1, + BNXT_ULP_STINGRAY_SYM_IP_PROTO_IGMP = 2, + BNXT_ULP_STINGRAY_SYM_IP_PROTO_IP_IN_IP = 4, + BNXT_ULP_STINGRAY_SYM_IP_PROTO_TCP = 6, + BNXT_ULP_STINGRAY_SYM_IP_PROTO_UDP = 17, + BNXT_ULP_STINGRAY_SYM_VF_FUNC_PARIF = 15, + BNXT_ULP_STINGRAY_SYM_NO = 0, + BNXT_ULP_STINGRAY_SYM_YES = 1, + BNXT_ULP_STINGRAY_SYM_RECYCLE_DST = 0x800 }; enum bnxt_ulp_class_hid { - BNXT_ULP_CLASS_HID_0138 = 0x0138, - BNXT_ULP_CLASS_HID_03f0 = 0x03f0, - BNXT_ULP_CLASS_HID_0139 = 0x0139, - BNXT_ULP_CLASS_HID_03f1 = 0x03f1, - BNXT_ULP_CLASS_HID_068b = 0x068b, - BNXT_ULP_CLASS_HID_0143 = 0x0143, - BNXT_ULP_CLASS_HID_0118 = 0x0118, - BNXT_ULP_CLASS_HID_03d0 = 0x03d0, - BNXT_ULP_CLASS_HID_0119 = 0x0119, - BNXT_ULP_CLASS_HID_03d1 = 0x03d1, - BNXT_ULP_CLASS_HID_06ab = 0x06ab, - BNXT_ULP_CLASS_HID_0163 = 0x0163, - BNXT_ULP_CLASS_HID_0128 = 0x0128, - BNXT_ULP_CLASS_HID_03e0 = 0x03e0, - BNXT_ULP_CLASS_HID_0129 = 0x0129, - BNXT_ULP_CLASS_HID_03e1 = 0x03e1, - BNXT_ULP_CLASS_HID_069b = 0x069b, - BNXT_ULP_CLASS_HID_0153 = 0x0153, - BNXT_ULP_CLASS_HID_0134 = 0x0134, - BNXT_ULP_CLASS_HID_03fc = 0x03fc, - BNXT_ULP_CLASS_HID_0135 = 0x0135, - BNXT_ULP_CLASS_HID_03fd = 0x03fd, - BNXT_ULP_CLASS_HID_0687 = 0x0687, - BNXT_ULP_CLASS_HID_014f = 0x014f, - BNXT_ULP_CLASS_HID_0114 = 0x0114, - BNXT_ULP_CLASS_HID_03dc = 0x03dc, - BNXT_ULP_CLASS_HID_0115 = 0x0115, - BNXT_ULP_CLASS_HID_03dd = 0x03dd, - BNXT_ULP_CLASS_HID_06a7 = 0x06a7, - BNXT_ULP_CLASS_HID_016f = 0x016f, - BNXT_ULP_CLASS_HID_0124 = 0x0124, - BNXT_ULP_CLASS_HID_03ec = 0x03ec, - BNXT_ULP_CLASS_HID_0125 = 0x0125, - BNXT_ULP_CLASS_HID_03ed = 0x03ed, - BNXT_ULP_CLASS_HID_0697 = 0x0697, - BNXT_ULP_CLASS_HID_015f = 0x015f, - BNXT_ULP_CLASS_HID_0452 = 0x0452, - BNXT_ULP_CLASS_HID_0528 = 0x0528, - BNXT_ULP_CLASS_HID_0790 = 0x0790, - BNXT_ULP_CLASS_HID_046e = 0x046e, - BNXT_ULP_CLASS_HID_0462 = 0x0462, - BNXT_ULP_CLASS_HID_0518 = 0x0518, - BNXT_ULP_CLASS_HID_07a0 = 0x07a0, - BNXT_ULP_CLASS_HID_045e = 0x045e, - BNXT_ULP_CLASS_HID_0228 = 0x0228, - BNXT_ULP_CLASS_HID_06d0 = 0x06d0, - BNXT_ULP_CLASS_HID_02be = 0x02be, - BNXT_ULP_CLASS_HID_07a6 = 0x07a6, - BNXT_ULP_CLASS_HID_0218 = 0x0218, - BNXT_ULP_CLASS_HID_06e0 = 0x06e0, - BNXT_ULP_CLASS_HID_028e = 0x028e, - BNXT_ULP_CLASS_HID_0796 = 0x0796, - BNXT_ULP_CLASS_HID_079c = 0x079c, - BNXT_ULP_CLASS_HID_0654 = 0x0654, - BNXT_ULP_CLASS_HID_06d2 = 0x06d2, - BNXT_ULP_CLASS_HID_058a = 0x058a, - BNXT_ULP_CLASS_HID_052f = 0x052f, - BNXT_ULP_CLASS_HID_07e7 = 0x07e7, - BNXT_ULP_CLASS_HID_079d = 0x079d, - BNXT_ULP_CLASS_HID_0655 = 0x0655, - BNXT_ULP_CLASS_HID_046d = 0x046d, - BNXT_ULP_CLASS_HID_0725 = 0x0725, - BNXT_ULP_CLASS_HID_06d3 = 0x06d3, - BNXT_ULP_CLASS_HID_058b = 0x058b, - BNXT_ULP_CLASS_HID_07ac = 0x07ac, - BNXT_ULP_CLASS_HID_0664 = 0x0664, - BNXT_ULP_CLASS_HID_06e2 = 0x06e2, - BNXT_ULP_CLASS_HID_05ba = 0x05ba, - BNXT_ULP_CLASS_HID_051f = 0x051f, - BNXT_ULP_CLASS_HID_07d7 = 0x07d7, - BNXT_ULP_CLASS_HID_07ad = 0x07ad, - BNXT_ULP_CLASS_HID_0665 = 0x0665, - BNXT_ULP_CLASS_HID_045d = 0x045d, - BNXT_ULP_CLASS_HID_0715 = 0x0715, - BNXT_ULP_CLASS_HID_06e3 = 0x06e3, - BNXT_ULP_CLASS_HID_05bb = 0x05bb, - BNXT_ULP_CLASS_HID_016a = 0x016a, - BNXT_ULP_CLASS_HID_03d2 = 0x03d2, - BNXT_ULP_CLASS_HID_0612 = 0x0612, - BNXT_ULP_CLASS_HID_00da = 0x00da, - BNXT_ULP_CLASS_HID_06bd = 0x06bd, - BNXT_ULP_CLASS_HID_0165 = 0x0165, - BNXT_ULP_CLASS_HID_016b = 0x016b, - BNXT_ULP_CLASS_HID_03d3 = 0x03d3, - BNXT_ULP_CLASS_HID_03a5 = 0x03a5, - BNXT_ULP_CLASS_HID_066d = 0x066d, - BNXT_ULP_CLASS_HID_0613 = 0x0613, - BNXT_ULP_CLASS_HID_00db = 0x00db, - BNXT_ULP_CLASS_HID_015a = 0x015a, - BNXT_ULP_CLASS_HID_03e2 = 0x03e2, - BNXT_ULP_CLASS_HID_0622 = 0x0622, - BNXT_ULP_CLASS_HID_00ea = 0x00ea, - BNXT_ULP_CLASS_HID_068d = 0x068d, - BNXT_ULP_CLASS_HID_0155 = 0x0155, - BNXT_ULP_CLASS_HID_015b = 0x015b, - BNXT_ULP_CLASS_HID_03e3 = 0x03e3, - BNXT_ULP_CLASS_HID_0395 = 0x0395, - BNXT_ULP_CLASS_HID_065d = 0x065d, - BNXT_ULP_CLASS_HID_0623 = 0x0623, - BNXT_ULP_CLASS_HID_00eb = 0x00eb, - BNXT_ULP_CLASS_HID_04bc = 0x04bc, - BNXT_ULP_CLASS_HID_0442 = 0x0442, - BNXT_ULP_CLASS_HID_050a = 0x050a, - BNXT_ULP_CLASS_HID_06ba = 0x06ba, - BNXT_ULP_CLASS_HID_0472 = 0x0472, - BNXT_ULP_CLASS_HID_0700 = 0x0700, - BNXT_ULP_CLASS_HID_04c8 = 0x04c8, - BNXT_ULP_CLASS_HID_0678 = 0x0678, - BNXT_ULP_CLASS_HID_061f = 0x061f, - BNXT_ULP_CLASS_HID_05ad = 0x05ad, - BNXT_ULP_CLASS_HID_06a5 = 0x06a5, - BNXT_ULP_CLASS_HID_0455 = 0x0455, - BNXT_ULP_CLASS_HID_05dd = 0x05dd, - BNXT_ULP_CLASS_HID_0563 = 0x0563, - BNXT_ULP_CLASS_HID_059b = 0x059b, - BNXT_ULP_CLASS_HID_070b = 0x070b, - BNXT_ULP_CLASS_HID_04bd = 0x04bd, - BNXT_ULP_CLASS_HID_0443 = 0x0443, - BNXT_ULP_CLASS_HID_050b = 0x050b, - BNXT_ULP_CLASS_HID_06bb = 0x06bb, - BNXT_ULP_CLASS_HID_0473 = 0x0473, - BNXT_ULP_CLASS_HID_0701 = 0x0701, - BNXT_ULP_CLASS_HID_04c9 = 0x04c9, - BNXT_ULP_CLASS_HID_0679 = 0x0679, - BNXT_ULP_CLASS_HID_05e2 = 0x05e2, - BNXT_ULP_CLASS_HID_00b0 = 0x00b0, - BNXT_ULP_CLASS_HID_0648 = 0x0648, - BNXT_ULP_CLASS_HID_03f8 = 0x03f8, - BNXT_ULP_CLASS_HID_02ea = 0x02ea, - BNXT_ULP_CLASS_HID_05b8 = 0x05b8, - BNXT_ULP_CLASS_HID_0370 = 0x0370, - BNXT_ULP_CLASS_HID_00e0 = 0x00e0, - BNXT_ULP_CLASS_HID_0745 = 0x0745, - BNXT_ULP_CLASS_HID_0213 = 0x0213, - BNXT_ULP_CLASS_HID_031b = 0x031b, - BNXT_ULP_CLASS_HID_008b = 0x008b, - BNXT_ULP_CLASS_HID_044d = 0x044d, - BNXT_ULP_CLASS_HID_071b = 0x071b, - BNXT_ULP_CLASS_HID_0003 = 0x0003, - BNXT_ULP_CLASS_HID_05b3 = 0x05b3, - BNXT_ULP_CLASS_HID_05e3 = 0x05e3, - BNXT_ULP_CLASS_HID_00b1 = 0x00b1, - BNXT_ULP_CLASS_HID_0649 = 0x0649, - BNXT_ULP_CLASS_HID_03f9 = 0x03f9, - BNXT_ULP_CLASS_HID_02eb = 0x02eb, - BNXT_ULP_CLASS_HID_05b9 = 0x05b9, - BNXT_ULP_CLASS_HID_0371 = 0x0371, + BNXT_ULP_CLASS_HID_00fc = 0x00fc, + BNXT_ULP_CLASS_HID_0046 = 0x0046, + BNXT_ULP_CLASS_HID_0056 = 0x0056, + BNXT_ULP_CLASS_HID_00b8 = 0x00b8, + BNXT_ULP_CLASS_HID_0041 = 0x0041, + BNXT_ULP_CLASS_HID_00ab = 0x00ab, + BNXT_ULP_CLASS_HID_0053 = 0x0053, + BNXT_ULP_CLASS_HID_00a5 = 0x00a5, + BNXT_ULP_CLASS_HID_0069 = 0x0069, + BNXT_ULP_CLASS_HID_009d = 0x009d, + BNXT_ULP_CLASS_HID_0005 = 0x0005, + BNXT_ULP_CLASS_HID_006f = 0x006f, + BNXT_ULP_CLASS_HID_00af = 0x00af, + BNXT_ULP_CLASS_HID_00d3 = 0x00d3, + BNXT_ULP_CLASS_HID_005b = 0x005b, + BNXT_ULP_CLASS_HID_00ad = 0x00ad, + BNXT_ULP_CLASS_HID_0091 = 0x0091, + BNXT_ULP_CLASS_HID_00fb = 0x00fb, + BNXT_ULP_CLASS_HID_0063 = 0x0063, + BNXT_ULP_CLASS_HID_0097 = 0x0097, + BNXT_ULP_CLASS_HID_00cc = 0x00cc, + BNXT_ULP_CLASS_HID_00f0 = 0x00f0, + BNXT_ULP_CLASS_HID_00c0 = 0x00c0, + BNXT_ULP_CLASS_HID_002a = 0x002a, + BNXT_ULP_CLASS_HID_00c7 = 0x00c7, + BNXT_ULP_CLASS_HID_0029 = 0x0029, + BNXT_ULP_CLASS_HID_00d1 = 0x00d1, + BNXT_ULP_CLASS_HID_003b = 0x003b, + BNXT_ULP_CLASS_HID_00ef = 0x00ef, + BNXT_ULP_CLASS_HID_0013 = 0x0013, + BNXT_ULP_CLASS_HID_009b = 0x009b, + BNXT_ULP_CLASS_HID_00ed = 0x00ed, + BNXT_ULP_CLASS_HID_002d = 0x002d, + BNXT_ULP_CLASS_HID_0051 = 0x0051, + BNXT_ULP_CLASS_HID_00d9 = 0x00d9, + BNXT_ULP_CLASS_HID_0023 = 0x0023, + BNXT_ULP_CLASS_HID_0017 = 0x0017, + BNXT_ULP_CLASS_HID_0079 = 0x0079, BNXT_ULP_CLASS_HID_00e1 = 0x00e1, - BNXT_ULP_CLASS_HID_0000 = 0x0000, - BNXT_ULP_CLASS_HID_00ce = 0x00ce, - BNXT_ULP_CLASS_HID_01b6 = 0x01b6, - BNXT_ULP_CLASS_HID_0074 = 0x0074, - BNXT_ULP_CLASS_HID_00fe = 0x00fe, - BNXT_ULP_CLASS_HID_03bc = 0x03bc, - BNXT_ULP_CLASS_HID_0206 = 0x0206, - BNXT_ULP_CLASS_HID_02c4 = 0x02c4, - BNXT_ULP_CLASS_HID_055a = 0x055a, - BNXT_ULP_CLASS_HID_045a = 0x045a, - BNXT_ULP_CLASS_HID_061a = 0x061a, - BNXT_ULP_CLASS_HID_051a = 0x051a, - BNXT_ULP_CLASS_HID_074a = 0x074a, - BNXT_ULP_CLASS_HID_004e = 0x004e, - BNXT_ULP_CLASS_HID_040a = 0x040a, - BNXT_ULP_CLASS_HID_010e = 0x010e, - BNXT_ULP_CLASS_HID_048b = 0x048b, - BNXT_ULP_CLASS_HID_0749 = 0x0749, - BNXT_ULP_CLASS_HID_05f1 = 0x05f1, - BNXT_ULP_CLASS_HID_04b7 = 0x04b7, - BNXT_ULP_CLASS_HID_049b = 0x049b, - BNXT_ULP_CLASS_HID_0759 = 0x0759, - BNXT_ULP_CLASS_HID_05e1 = 0x05e1, - BNXT_ULP_CLASS_HID_04a7 = 0x04a7, - BNXT_ULP_CLASS_HID_0301 = 0x0301, - BNXT_ULP_CLASS_HID_07f9 = 0x07f9, - BNXT_ULP_CLASS_HID_0397 = 0x0397, - BNXT_ULP_CLASS_HID_068f = 0x068f, - BNXT_ULP_CLASS_HID_02f1 = 0x02f1, - BNXT_ULP_CLASS_HID_0609 = 0x0609, - BNXT_ULP_CLASS_HID_0267 = 0x0267, - BNXT_ULP_CLASS_HID_077f = 0x077f, - BNXT_ULP_CLASS_HID_01e1 = 0x01e1, - BNXT_ULP_CLASS_HID_0329 = 0x0329, - BNXT_ULP_CLASS_HID_01c1 = 0x01c1, - BNXT_ULP_CLASS_HID_0309 = 0x0309, - BNXT_ULP_CLASS_HID_01d1 = 0x01d1, - BNXT_ULP_CLASS_HID_0319 = 0x0319, - BNXT_ULP_CLASS_HID_01e2 = 0x01e2, - BNXT_ULP_CLASS_HID_032a = 0x032a, - BNXT_ULP_CLASS_HID_0650 = 0x0650, - BNXT_ULP_CLASS_HID_0198 = 0x0198, - BNXT_ULP_CLASS_HID_01c2 = 0x01c2, - BNXT_ULP_CLASS_HID_030a = 0x030a, - BNXT_ULP_CLASS_HID_0670 = 0x0670, - BNXT_ULP_CLASS_HID_01b8 = 0x01b8, - BNXT_ULP_CLASS_HID_01d2 = 0x01d2, - BNXT_ULP_CLASS_HID_031a = 0x031a, - BNXT_ULP_CLASS_HID_0660 = 0x0660, - BNXT_ULP_CLASS_HID_01a8 = 0x01a8, - BNXT_ULP_CLASS_HID_01dd = 0x01dd, - BNXT_ULP_CLASS_HID_0315 = 0x0315, - BNXT_ULP_CLASS_HID_003d = 0x003d, - BNXT_ULP_CLASS_HID_02f5 = 0x02f5, - BNXT_ULP_CLASS_HID_01cd = 0x01cd, - BNXT_ULP_CLASS_HID_0305 = 0x0305, - BNXT_ULP_CLASS_HID_01de = 0x01de, - BNXT_ULP_CLASS_HID_0316 = 0x0316, - BNXT_ULP_CLASS_HID_066c = 0x066c, - BNXT_ULP_CLASS_HID_01a4 = 0x01a4, - BNXT_ULP_CLASS_HID_003e = 0x003e, - BNXT_ULP_CLASS_HID_02f6 = 0x02f6, - BNXT_ULP_CLASS_HID_078c = 0x078c, - BNXT_ULP_CLASS_HID_0044 = 0x0044, - BNXT_ULP_CLASS_HID_01ce = 0x01ce, - BNXT_ULP_CLASS_HID_0306 = 0x0306, - BNXT_ULP_CLASS_HID_067c = 0x067c, - BNXT_ULP_CLASS_HID_01b4 = 0x01b4 + BNXT_ULP_CLASS_HID_0015 = 0x0015 }; enum bnxt_ulp_act_hid { - BNXT_ULP_ACT_HID_015a = 0x015a, - BNXT_ULP_ACT_HID_00eb = 0x00eb, - BNXT_ULP_ACT_HID_0043 = 0x0043, - BNXT_ULP_ACT_HID_03d8 = 0x03d8, - BNXT_ULP_ACT_HID_02c1 = 0x02c1, - BNXT_ULP_ACT_HID_015e = 0x015e, - BNXT_ULP_ACT_HID_00ef = 0x00ef, - BNXT_ULP_ACT_HID_0047 = 0x0047, - BNXT_ULP_ACT_HID_03dc = 0x03dc, - BNXT_ULP_ACT_HID_02c5 = 0x02c5, - BNXT_ULP_ACT_HID_025b = 0x025b, - BNXT_ULP_ACT_HID_01ec = 0x01ec, - BNXT_ULP_ACT_HID_0144 = 0x0144, - BNXT_ULP_ACT_HID_04d9 = 0x04d9, - BNXT_ULP_ACT_HID_03c2 = 0x03c2, - BNXT_ULP_ACT_HID_025f = 0x025f, - BNXT_ULP_ACT_HID_01f0 = 0x01f0, - BNXT_ULP_ACT_HID_0148 = 0x0148, - BNXT_ULP_ACT_HID_04dd = 0x04dd, - BNXT_ULP_ACT_HID_03c6 = 0x03c6, BNXT_ULP_ACT_HID_0000 = 0x0000, - BNXT_ULP_ACT_HID_0002 = 0x0002, - BNXT_ULP_ACT_HID_0800 = 0x0800, - BNXT_ULP_ACT_HID_0101 = 0x0101, - BNXT_ULP_ACT_HID_0020 = 0x0020, - BNXT_ULP_ACT_HID_0901 = 0x0901, - BNXT_ULP_ACT_HID_0121 = 0x0121, - BNXT_ULP_ACT_HID_0004 = 0x0004, - BNXT_ULP_ACT_HID_0006 = 0x0006, - BNXT_ULP_ACT_HID_0804 = 0x0804, - BNXT_ULP_ACT_HID_0105 = 0x0105, - BNXT_ULP_ACT_HID_0024 = 0x0024, - BNXT_ULP_ACT_HID_0905 = 0x0905, - BNXT_ULP_ACT_HID_0125 = 0x0125, BNXT_ULP_ACT_HID_0001 = 0x0001, - BNXT_ULP_ACT_HID_0005 = 0x0005, - BNXT_ULP_ACT_HID_0009 = 0x0009, - BNXT_ULP_ACT_HID_000d = 0x000d, - BNXT_ULP_ACT_HID_0021 = 0x0021, - BNXT_ULP_ACT_HID_0029 = 0x0029, - BNXT_ULP_ACT_HID_0025 = 0x0025, - BNXT_ULP_ACT_HID_002d = 0x002d, - BNXT_ULP_ACT_HID_0801 = 0x0801, - BNXT_ULP_ACT_HID_0809 = 0x0809, - BNXT_ULP_ACT_HID_0805 = 0x0805, - BNXT_ULP_ACT_HID_080d = 0x080d, - BNXT_ULP_ACT_HID_0c15 = 0x0c15, - BNXT_ULP_ACT_HID_0c19 = 0x0c19, - BNXT_ULP_ACT_HID_02f6 = 0x02f6, - BNXT_ULP_ACT_HID_04f8 = 0x04f8, - BNXT_ULP_ACT_HID_01df = 0x01df, - BNXT_ULP_ACT_HID_07e5 = 0x07e5, - BNXT_ULP_ACT_HID_06ce = 0x06ce, - BNXT_ULP_ACT_HID_02fa = 0x02fa, - BNXT_ULP_ACT_HID_04fc = 0x04fc, - BNXT_ULP_ACT_HID_01e3 = 0x01e3, - BNXT_ULP_ACT_HID_07e9 = 0x07e9, - BNXT_ULP_ACT_HID_06d2 = 0x06d2, - BNXT_ULP_ACT_HID_03f7 = 0x03f7, - BNXT_ULP_ACT_HID_05f9 = 0x05f9, - BNXT_ULP_ACT_HID_02e0 = 0x02e0, - BNXT_ULP_ACT_HID_08e6 = 0x08e6, - BNXT_ULP_ACT_HID_07cf = 0x07cf, - BNXT_ULP_ACT_HID_03fb = 0x03fb, - BNXT_ULP_ACT_HID_05fd = 0x05fd, - BNXT_ULP_ACT_HID_02e4 = 0x02e4, - BNXT_ULP_ACT_HID_08ea = 0x08ea, - BNXT_ULP_ACT_HID_07d3 = 0x07d3, - BNXT_ULP_ACT_HID_040d = 0x040d, - BNXT_ULP_ACT_HID_040f = 0x040f, - BNXT_ULP_ACT_HID_0413 = 0x0413, - BNXT_ULP_ACT_HID_0567 = 0x0567, - BNXT_ULP_ACT_HID_0a49 = 0x0a49, - BNXT_ULP_ACT_HID_050e = 0x050e, - BNXT_ULP_ACT_HID_0668 = 0x0668, - BNXT_ULP_ACT_HID_0b4a = 0x0b4a, - BNXT_ULP_ACT_HID_0411 = 0x0411, - BNXT_ULP_ACT_HID_056b = 0x056b, - BNXT_ULP_ACT_HID_0a4d = 0x0a4d, - BNXT_ULP_ACT_HID_0512 = 0x0512, - BNXT_ULP_ACT_HID_066c = 0x066c, - BNXT_ULP_ACT_HID_0b4e = 0x0b4e + BNXT_ULP_ACT_HID_0400 = 0x0400, + BNXT_ULP_ACT_HID_0331 = 0x0331, + BNXT_ULP_ACT_HID_0010 = 0x0010, + BNXT_ULP_ACT_HID_0731 = 0x0731, + BNXT_ULP_ACT_HID_0341 = 0x0341, + BNXT_ULP_ACT_HID_0002 = 0x0002, + BNXT_ULP_ACT_HID_0003 = 0x0003, + BNXT_ULP_ACT_HID_0402 = 0x0402, + BNXT_ULP_ACT_HID_0333 = 0x0333, + BNXT_ULP_ACT_HID_0012 = 0x0012, + BNXT_ULP_ACT_HID_0733 = 0x0733, + BNXT_ULP_ACT_HID_0343 = 0x0343 }; enum bnxt_ulp_df_tpl { - BNXT_ULP_DF_TPL_PORT_TO_VS = 1, - BNXT_ULP_DF_TPL_VS_TO_PORT = 2, - BNXT_ULP_DF_TPL_VFREP_TO_VF = 3, - BNXT_ULP_DF_TPL_VF_TO_VFREP = 4, - BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC = 5 + BNXT_ULP_DF_TPL_PORT_TO_VS = 3, + BNXT_ULP_DF_TPL_VS_TO_PORT = 4, + BNXT_ULP_DF_TPL_VFREP_TO_VF = 5, + BNXT_ULP_DF_TPL_VF_TO_VFREP = 6, + BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC = 7 }; #endif diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h index 6bfea8abc6..29c9247d8a 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h @@ -3,1189 +3,221 @@ * All rights reserved. */ +/* date: Wed Nov 18 12:19:40 2020 */ + #ifndef ULP_HDR_FIELD_ENUMS_H_ #define ULP_HDR_FIELD_ENUMS_H_ -enum bnxt_ulp_hf1 { - BNXT_ULP_HF1_IDX_SVIF_INDEX = 0 -}; - -enum bnxt_ulp_hf2 { - BNXT_ULP_HF2_IDX_SVIF_INDEX = 0 -}; - -enum bnxt_ulp_hf3 { - BNXT_ULP_HF3_IDX_SVIF_INDEX = 0 -}; - -enum bnxt_ulp_hf4 { - BNXT_ULP_HF4_IDX_SVIF_INDEX = 0 -}; - -enum bnxt_ulp_hf5 { - BNXT_ULP_HF5_IDX_SVIF_INDEX = 0 -}; - -enum bnxt_ulp_hf6 { - BNXT_ULP_HF6_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF6_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF6_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF6_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF6_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF6_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF6_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF6_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF6_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF6_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF6_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF6_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF6_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF6_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF6_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF6_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF6_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF6_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF6_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF6_IDX_O_IPV4_DST_ADDR = 19 -}; - -enum bnxt_ulp_hf7 { - BNXT_ULP_HF7_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF7_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF7_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF7_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF7_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF7_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF7_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF7_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF7_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF7_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF7_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF7_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF7_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF7_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF7_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF7_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF7_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF7_IDX_O_IPV6_DST_ADDR = 17 -}; - -enum bnxt_ulp_hf8 { - BNXT_ULP_HF8_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF8_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF8_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF8_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF8_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF8_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF8_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF8_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF8_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF8_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF8_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF8_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF8_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF8_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF8_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF8_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF8_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF8_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF8_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF8_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF8_IDX_O_UDP_CSUM = 23 -}; - -enum bnxt_ulp_hf9 { - BNXT_ULP_HF9_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF9_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF9_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF9_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF9_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF9_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF9_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF9_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF9_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF9_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF9_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF9_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF9_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF9_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF9_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF9_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF9_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF9_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT = 20, - BNXT_ULP_HF9_IDX_O_TCP_DST_PORT = 21, - BNXT_ULP_HF9_IDX_O_TCP_SENT_SEQ = 22, - BNXT_ULP_HF9_IDX_O_TCP_RECV_ACK = 23, - BNXT_ULP_HF9_IDX_O_TCP_DATA_OFF = 24, - BNXT_ULP_HF9_IDX_O_TCP_TCP_FLAGS = 25, - BNXT_ULP_HF9_IDX_O_TCP_RX_WIN = 26, - BNXT_ULP_HF9_IDX_O_TCP_CSUM = 27, - BNXT_ULP_HF9_IDX_O_TCP_URP = 28 -}; - -enum bnxt_ulp_hf10 { - BNXT_ULP_HF10_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF10_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF10_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF10_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF10_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF10_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF10_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF10_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF10_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF10_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF10_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF10_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF10_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF10_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF10_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF10_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT = 18, - BNXT_ULP_HF10_IDX_O_UDP_DST_PORT = 19, - BNXT_ULP_HF10_IDX_O_UDP_LENGTH = 20, - BNXT_ULP_HF10_IDX_O_UDP_CSUM = 21 -}; - -enum bnxt_ulp_hf11 { - BNXT_ULP_HF11_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF11_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF11_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF11_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF11_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF11_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF11_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF11_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF11_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF11_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF11_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF11_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF11_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF11_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF11_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF11_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT = 18, - BNXT_ULP_HF11_IDX_O_TCP_DST_PORT = 19, - BNXT_ULP_HF11_IDX_O_TCP_SENT_SEQ = 20, - BNXT_ULP_HF11_IDX_O_TCP_RECV_ACK = 21, - BNXT_ULP_HF11_IDX_O_TCP_DATA_OFF = 22, - BNXT_ULP_HF11_IDX_O_TCP_TCP_FLAGS = 23, - BNXT_ULP_HF11_IDX_O_TCP_RX_WIN = 24, - BNXT_ULP_HF11_IDX_O_TCP_CSUM = 25, - BNXT_ULP_HF11_IDX_O_TCP_URP = 26 -}; - -enum bnxt_ulp_hf12 { - BNXT_ULP_HF12_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF12_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF12_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF12_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF12_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF12_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF12_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF12_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF12_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF12_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF12_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF12_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF12_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF12_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF12_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF12_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF12_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF12_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF12_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF12_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF12_IDX_O_UDP_CSUM = 23 -}; - -enum bnxt_ulp_hf13 { - BNXT_ULP_HF13_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF13_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF13_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF13_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF13_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF13_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF13_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF13_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF13_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF13_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF13_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF13_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF13_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF13_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF13_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF13_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF13_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF13_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT = 20, - BNXT_ULP_HF13_IDX_O_TCP_DST_PORT = 21, - BNXT_ULP_HF13_IDX_O_TCP_SENT_SEQ = 22, - BNXT_ULP_HF13_IDX_O_TCP_RECV_ACK = 23, - BNXT_ULP_HF13_IDX_O_TCP_DATA_OFF = 24, - BNXT_ULP_HF13_IDX_O_TCP_TCP_FLAGS = 25, - BNXT_ULP_HF13_IDX_O_TCP_RX_WIN = 26, - BNXT_ULP_HF13_IDX_O_TCP_CSUM = 27, - BNXT_ULP_HF13_IDX_O_TCP_URP = 28 -}; - -enum bnxt_ulp_hf14 { - BNXT_ULP_HF14_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF14_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF14_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF14_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF14_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF14_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF14_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF14_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF14_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF14_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF14_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF14_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF14_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF14_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF14_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF14_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT = 18, - BNXT_ULP_HF14_IDX_O_UDP_DST_PORT = 19, - BNXT_ULP_HF14_IDX_O_UDP_LENGTH = 20, - BNXT_ULP_HF14_IDX_O_UDP_CSUM = 21 -}; - -enum bnxt_ulp_hf15 { - BNXT_ULP_HF15_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF15_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF15_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF15_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF15_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF15_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF15_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF15_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF15_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF15_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF15_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF15_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF15_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF15_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF15_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF15_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT = 18, - BNXT_ULP_HF15_IDX_O_TCP_DST_PORT = 19, - BNXT_ULP_HF15_IDX_O_TCP_SENT_SEQ = 20, - BNXT_ULP_HF15_IDX_O_TCP_RECV_ACK = 21, - BNXT_ULP_HF15_IDX_O_TCP_DATA_OFF = 22, - BNXT_ULP_HF15_IDX_O_TCP_TCP_FLAGS = 23, - BNXT_ULP_HF15_IDX_O_TCP_RX_WIN = 24, - BNXT_ULP_HF15_IDX_O_TCP_CSUM = 25, - BNXT_ULP_HF15_IDX_O_TCP_URP = 26 -}; - -enum bnxt_ulp_hf16 { - BNXT_ULP_HF16_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF16_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF16_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF16_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF16_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF16_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF16_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF16_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF16_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF16_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF16_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF16_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF16_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF16_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF16_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF16_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF16_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF16_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF16_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF16_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF16_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF16_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF16_IDX_O_UDP_CSUM = 23, - BNXT_ULP_HF16_IDX_T_VXLAN_FLAGS = 24, - BNXT_ULP_HF16_IDX_T_VXLAN_RSVD0 = 25, - BNXT_ULP_HF16_IDX_T_VXLAN_VNI = 26, - BNXT_ULP_HF16_IDX_T_VXLAN_RSVD1 = 27 -}; - -enum bnxt_ulp_hf17 { - BNXT_ULP_HF17_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF17_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF17_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF17_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF17_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF17_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF17_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF17_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF17_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF17_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF17_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF17_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF17_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF17_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF17_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF17_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF17_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF17_IDX_O_UDP_SRC_PORT = 18, - BNXT_ULP_HF17_IDX_O_UDP_DST_PORT = 19, - BNXT_ULP_HF17_IDX_O_UDP_LENGTH = 20, - BNXT_ULP_HF17_IDX_O_UDP_CSUM = 21, - BNXT_ULP_HF17_IDX_T_VXLAN_FLAGS = 22, - BNXT_ULP_HF17_IDX_T_VXLAN_RSVD0 = 23, - BNXT_ULP_HF17_IDX_T_VXLAN_VNI = 24, - BNXT_ULP_HF17_IDX_T_VXLAN_RSVD1 = 25 -}; - -enum bnxt_ulp_hf18 { - BNXT_ULP_HF18_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF18_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF18_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF18_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF18_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF18_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF18_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF18_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF18_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF18_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF18_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF18_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF18_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF18_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF18_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF18_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF18_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF18_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF18_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF18_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF18_IDX_O_UDP_CSUM = 23, - BNXT_ULP_HF18_IDX_T_VXLAN_FLAGS = 24, - BNXT_ULP_HF18_IDX_T_VXLAN_RSVD0 = 25, - BNXT_ULP_HF18_IDX_T_VXLAN_VNI = 26, - BNXT_ULP_HF18_IDX_T_VXLAN_RSVD1 = 27 -}; - -enum bnxt_ulp_hf19 { - BNXT_ULP_HF19_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF19_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF19_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF19_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF19_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF19_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF19_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF19_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF19_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF19_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF19_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF19_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF19_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF19_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF19_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF19_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF19_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF19_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF19_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF19_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF19_IDX_O_UDP_CSUM = 23, - BNXT_ULP_HF19_IDX_T_VXLAN_FLAGS = 24, - BNXT_ULP_HF19_IDX_T_VXLAN_RSVD0 = 25, - BNXT_ULP_HF19_IDX_T_VXLAN_VNI = 26, - BNXT_ULP_HF19_IDX_T_VXLAN_RSVD1 = 27, - BNXT_ULP_HF19_IDX_I_ETH_DMAC = 28, - BNXT_ULP_HF19_IDX_I_ETH_SMAC = 29, - BNXT_ULP_HF19_IDX_I_ETH_TYPE = 30, - BNXT_ULP_HF19_IDX_IO_VLAN_CFI_PRI = 31, - BNXT_ULP_HF19_IDX_IO_VLAN_VID = 32, - BNXT_ULP_HF19_IDX_IO_VLAN_TYPE = 33, - BNXT_ULP_HF19_IDX_II_VLAN_CFI_PRI = 34, - BNXT_ULP_HF19_IDX_II_VLAN_VID = 35, - BNXT_ULP_HF19_IDX_II_VLAN_TYPE = 36, - BNXT_ULP_HF19_IDX_I_IPV4_VER = 37, - BNXT_ULP_HF19_IDX_I_IPV4_TOS = 38, - BNXT_ULP_HF19_IDX_I_IPV4_LEN = 39, - BNXT_ULP_HF19_IDX_I_IPV4_FRAG_ID = 40, - BNXT_ULP_HF19_IDX_I_IPV4_FRAG_OFF = 41, - BNXT_ULP_HF19_IDX_I_IPV4_TTL = 42, - BNXT_ULP_HF19_IDX_I_IPV4_PROTO_ID = 43, - BNXT_ULP_HF19_IDX_I_IPV4_CSUM = 44, - BNXT_ULP_HF19_IDX_I_IPV4_SRC_ADDR = 45, - BNXT_ULP_HF19_IDX_I_IPV4_DST_ADDR = 46 -}; - -enum bnxt_ulp_hf20 { - BNXT_ULP_HF20_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF20_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF20_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF20_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF20_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF20_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF20_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF20_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF20_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF20_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF20_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF20_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF20_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF20_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF20_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF20_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF20_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF20_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT = 20, - BNXT_ULP_HF20_IDX_O_UDP_DST_PORT = 21, - BNXT_ULP_HF20_IDX_O_UDP_LENGTH = 22, - BNXT_ULP_HF20_IDX_O_UDP_CSUM = 23 -}; - -enum bnxt_ulp_hf21 { - BNXT_ULP_HF21_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF21_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF21_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF21_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF21_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF21_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF21_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF21_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF21_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF21_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF21_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF21_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF21_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF21_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF21_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF21_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF21_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF21_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR = 19, - BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT = 20, - BNXT_ULP_HF21_IDX_O_TCP_DST_PORT = 21, - BNXT_ULP_HF21_IDX_O_TCP_SENT_SEQ = 22, - BNXT_ULP_HF21_IDX_O_TCP_RECV_ACK = 23, - BNXT_ULP_HF21_IDX_O_TCP_DATA_OFF = 24, - BNXT_ULP_HF21_IDX_O_TCP_TCP_FLAGS = 25, - BNXT_ULP_HF21_IDX_O_TCP_RX_WIN = 26, - BNXT_ULP_HF21_IDX_O_TCP_CSUM = 27, - BNXT_ULP_HF21_IDX_O_TCP_URP = 28 -}; - -enum bnxt_ulp_hf22 { - BNXT_ULP_HF22_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF22_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF22_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF22_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF22_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF22_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF22_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF22_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF22_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF22_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF22_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF22_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF22_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF22_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF22_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF22_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT = 18, - BNXT_ULP_HF22_IDX_O_UDP_DST_PORT = 19, - BNXT_ULP_HF22_IDX_O_UDP_LENGTH = 20, - BNXT_ULP_HF22_IDX_O_UDP_CSUM = 21 -}; - -enum bnxt_ulp_hf23 { - BNXT_ULP_HF23_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF23_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF23_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF23_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF23_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF23_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF23_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF23_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF23_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF23_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF23_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF23_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF23_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF23_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF23_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF23_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR = 17, - BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT = 18, - BNXT_ULP_HF23_IDX_O_TCP_DST_PORT = 19, - BNXT_ULP_HF23_IDX_O_TCP_SENT_SEQ = 20, - BNXT_ULP_HF23_IDX_O_TCP_RECV_ACK = 21, - BNXT_ULP_HF23_IDX_O_TCP_DATA_OFF = 22, - BNXT_ULP_HF23_IDX_O_TCP_TCP_FLAGS = 23, - BNXT_ULP_HF23_IDX_O_TCP_RX_WIN = 24, - BNXT_ULP_HF23_IDX_O_TCP_CSUM = 25, - BNXT_ULP_HF23_IDX_O_TCP_URP = 26 -}; - -enum bnxt_ulp_hf24 { - BNXT_ULP_HF24_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF24_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF24_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF24_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF24_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF24_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF24_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF24_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF24_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF24_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF24_IDX_O_IPV4_VER = 10, - BNXT_ULP_HF24_IDX_O_IPV4_TOS = 11, - BNXT_ULP_HF24_IDX_O_IPV4_LEN = 12, - BNXT_ULP_HF24_IDX_O_IPV4_FRAG_ID = 13, - BNXT_ULP_HF24_IDX_O_IPV4_FRAG_OFF = 14, - BNXT_ULP_HF24_IDX_O_IPV4_TTL = 15, - BNXT_ULP_HF24_IDX_O_IPV4_PROTO_ID = 16, - BNXT_ULP_HF24_IDX_O_IPV4_CSUM = 17, - BNXT_ULP_HF24_IDX_O_IPV4_SRC_ADDR = 18, - BNXT_ULP_HF24_IDX_O_IPV4_DST_ADDR = 19 -}; - -enum bnxt_ulp_hf25 { - BNXT_ULP_HF25_IDX_SVIF_INDEX = 0, - BNXT_ULP_HF25_IDX_O_ETH_DMAC = 1, - BNXT_ULP_HF25_IDX_O_ETH_SMAC = 2, - BNXT_ULP_HF25_IDX_O_ETH_TYPE = 3, - BNXT_ULP_HF25_IDX_OO_VLAN_CFI_PRI = 4, - BNXT_ULP_HF25_IDX_OO_VLAN_VID = 5, - BNXT_ULP_HF25_IDX_OO_VLAN_TYPE = 6, - BNXT_ULP_HF25_IDX_OI_VLAN_CFI_PRI = 7, - BNXT_ULP_HF25_IDX_OI_VLAN_VID = 8, - BNXT_ULP_HF25_IDX_OI_VLAN_TYPE = 9, - BNXT_ULP_HF25_IDX_O_IPV6_VER = 10, - BNXT_ULP_HF25_IDX_O_IPV6_TC = 11, - BNXT_ULP_HF25_IDX_O_IPV6_FLOW_LABEL = 12, - BNXT_ULP_HF25_IDX_O_IPV6_PAYLOAD_LEN = 13, - BNXT_ULP_HF25_IDX_O_IPV6_PROTO_ID = 14, - BNXT_ULP_HF25_IDX_O_IPV6_TTL = 15, - BNXT_ULP_HF25_IDX_O_IPV6_SRC_ADDR = 16, - BNXT_ULP_HF25_IDX_O_IPV6_DST_ADDR = 17 -}; - -enum bnxt_ulp_hf_bitmask1 { - BNXT_ULP_HF1_BITMASK_SVIF_INDEX = 0x8000000000000000 -}; - -enum bnxt_ulp_hf_bitmask2 { - BNXT_ULP_HF2_BITMASK_SVIF_INDEX = 0x8000000000000000 -}; - -enum bnxt_ulp_hf_bitmask3 { - BNXT_ULP_HF3_BITMASK_SVIF_INDEX = 0x8000000000000000 -}; - -enum bnxt_ulp_hf_bitmask4 { - BNXT_ULP_HF4_BITMASK_SVIF_INDEX = 0x8000000000000000 -}; - -enum bnxt_ulp_hf_bitmask5 { - BNXT_ULP_HF5_BITMASK_SVIF_INDEX = 0x8000000000000000 -}; - -enum bnxt_ulp_hf_bitmask6 { - BNXT_ULP_HF6_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF6_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF6_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF6_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF6_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF6_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF6_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF6_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF6_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF6_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF6_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000 -}; - -enum bnxt_ulp_hf_bitmask7 { - BNXT_ULP_HF7_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF7_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF7_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF7_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF7_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF7_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF7_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF7_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF7_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF7_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF7_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF7_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000 -}; - -enum bnxt_ulp_hf_bitmask8 { - BNXT_ULP_HF8_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF8_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF8_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF8_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF8_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF8_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF8_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF8_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF8_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF8_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF8_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF8_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF8_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF8_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF8_BITMASK_O_UDP_CSUM = 0x0000010000000000 -}; - -enum bnxt_ulp_hf_bitmask9 { - BNXT_ULP_HF9_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF9_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF9_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF9_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF9_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF9_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF9_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF9_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF9_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF9_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF9_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_CSUM = 0x0000001000000000, - BNXT_ULP_HF9_BITMASK_O_TCP_URP = 0x0000000800000000 -}; - -enum bnxt_ulp_hf_bitmask10 { - BNXT_ULP_HF10_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF10_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF10_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF10_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF10_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF10_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF10_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF10_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF10_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF10_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF10_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF10_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF10_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF10_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF10_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF10_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF10_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF10_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF10_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF10_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF10_BITMASK_O_UDP_LENGTH = 0x0000080000000000, - BNXT_ULP_HF10_BITMASK_O_UDP_CSUM = 0x0000040000000000 -}; - -enum bnxt_ulp_hf_bitmask11 { - BNXT_ULP_HF11_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF11_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF11_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF11_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF11_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF11_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF11_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF11_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF11_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF11_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF11_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF11_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_CSUM = 0x0000004000000000, - BNXT_ULP_HF11_BITMASK_O_TCP_URP = 0x0000002000000000 -}; - -enum bnxt_ulp_hf_bitmask12 { - BNXT_ULP_HF12_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF12_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF12_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF12_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF12_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF12_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF12_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF12_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF12_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF12_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF12_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF12_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF12_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF12_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF12_BITMASK_O_UDP_CSUM = 0x0000010000000000 -}; - -enum bnxt_ulp_hf_bitmask13 { - BNXT_ULP_HF13_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF13_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF13_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF13_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF13_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF13_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF13_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF13_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF13_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF13_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF13_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_CSUM = 0x0000001000000000, - BNXT_ULP_HF13_BITMASK_O_TCP_URP = 0x0000000800000000 +enum bnxt_ulp_glb_hf { + BNXT_ULP_GLB_HF_WM, + BNXT_ULP_GLB_HF_SVIF_INDEX, + BNXT_ULP_GLB_HF_O_ETH_DMAC, + BNXT_ULP_GLB_HF_I_ETH_DMAC, + BNXT_ULP_GLB_HF_O_ETH_SMAC, + BNXT_ULP_GLB_HF_I_ETH_SMAC, + BNXT_ULP_GLB_HF_O_ETH_TYPE, + BNXT_ULP_GLB_HF_I_ETH_TYPE, + BNXT_ULP_GLB_HF_O_IPV4_VER, + BNXT_ULP_GLB_HF_I_IPV4_VER, + BNXT_ULP_GLB_HF_O_IPV4_TOS, + BNXT_ULP_GLB_HF_I_IPV4_TOS, + BNXT_ULP_GLB_HF_O_IPV4_LEN, + BNXT_ULP_GLB_HF_I_IPV4_LEN, + BNXT_ULP_GLB_HF_O_IPV4_FRAG_ID, + BNXT_ULP_GLB_HF_I_IPV4_FRAG_ID, + BNXT_ULP_GLB_HF_O_IPV4_FRAG_OFF, + BNXT_ULP_GLB_HF_I_IPV4_FRAG_OFF, + BNXT_ULP_GLB_HF_O_IPV4_TTL, + BNXT_ULP_GLB_HF_I_IPV4_TTL, + BNXT_ULP_GLB_HF_O_IPV4_PROTO_ID, + BNXT_ULP_GLB_HF_I_IPV4_PROTO_ID, + BNXT_ULP_GLB_HF_O_IPV4_CSUM, + BNXT_ULP_GLB_HF_I_IPV4_CSUM, + BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR, + BNXT_ULP_GLB_HF_I_IPV4_SRC_ADDR, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR, + BNXT_ULP_GLB_HF_I_IPV4_DST_ADDR, + BNXT_ULP_GLB_HF_O_IPV6_VER, + BNXT_ULP_GLB_HF_I_IPV6_VER, + BNXT_ULP_GLB_HF_O_IPV6_TC, + BNXT_ULP_GLB_HF_I_IPV6_TC, + BNXT_ULP_GLB_HF_O_IPV6_FLOW_LABEL, + BNXT_ULP_GLB_HF_I_IPV6_FLOW_LABEL, + BNXT_ULP_GLB_HF_O_IPV6_PAYLOAD_LEN, + BNXT_ULP_GLB_HF_I_IPV6_PAYLOAD_LEN, + BNXT_ULP_GLB_HF_O_IPV6_PROTO_ID, + BNXT_ULP_GLB_HF_I_IPV6_PROTO_ID, + BNXT_ULP_GLB_HF_O_IPV6_TTL, + BNXT_ULP_GLB_HF_I_IPV6_TTL, + BNXT_ULP_GLB_HF_O_IPV6_SRC_ADDR, + BNXT_ULP_GLB_HF_I_IPV6_SRC_ADDR, + BNXT_ULP_GLB_HF_O_IPV6_DST_ADDR, + BNXT_ULP_GLB_HF_I_IPV6_DST_ADDR, + BNXT_ULP_GLB_HF_O_L3_PROTO_ID, + BNXT_ULP_GLB_HF_I_L3_PROTO_ID, + BNXT_ULP_GLB_HF_O_L3_SRC_ADDR, + BNXT_ULP_GLB_HF_I_L3_SRC_ADDR, + BNXT_ULP_GLB_HF_O_L3_DST_ADDR, + BNXT_ULP_GLB_HF_I_L3_DST_ADDR, + BNXT_ULP_GLB_HF_O_L4_SRC_PORT, + BNXT_ULP_GLB_HF_I_L4_SRC_PORT, + BNXT_ULP_GLB_HF_O_L4_DST_PORT, + BNXT_ULP_GLB_HF_I_L4_DST_PORT, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT, + BNXT_ULP_GLB_HF_I_TCP_SRC_PORT, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT, + BNXT_ULP_GLB_HF_I_TCP_DST_PORT, + BNXT_ULP_GLB_HF_O_TCP_SENT_SEQ, + BNXT_ULP_GLB_HF_I_TCP_SENT_SEQ, + BNXT_ULP_GLB_HF_O_TCP_RECV_ACK, + BNXT_ULP_GLB_HF_I_TCP_RECV_ACK, + BNXT_ULP_GLB_HF_O_TCP_DATA_OFF, + BNXT_ULP_GLB_HF_I_TCP_DATA_OFF, + BNXT_ULP_GLB_HF_O_TCP_TCP_FLAGS, + BNXT_ULP_GLB_HF_I_TCP_TCP_FLAGS, + BNXT_ULP_GLB_HF_O_TCP_RX_WIN, + BNXT_ULP_GLB_HF_I_TCP_RX_WIN, + BNXT_ULP_GLB_HF_O_TCP_CSUM, + BNXT_ULP_GLB_HF_I_TCP_CSUM, + BNXT_ULP_GLB_HF_O_TCP_URP, + BNXT_ULP_GLB_HF_I_TCP_URP, + BNXT_ULP_GLB_HF_O_UDP_SRC_PORT, + BNXT_ULP_GLB_HF_I_UDP_SRC_PORT, + BNXT_ULP_GLB_HF_O_UDP_DST_PORT, + BNXT_ULP_GLB_HF_I_UDP_DST_PORT, + BNXT_ULP_GLB_HF_O_UDP_LENGTH, + BNXT_ULP_GLB_HF_I_UDP_LENGTH, + BNXT_ULP_GLB_HF_O_UDP_CSUM, + BNXT_ULP_GLB_HF_I_UDP_CSUM, + BNXT_ULP_GLB_HF_OO_VLAN_CFI_PRI, + BNXT_ULP_GLB_HF_OI_VLAN_CFI_PRI, + BNXT_ULP_GLB_HF_IO_VLAN_CFI_PRI, + BNXT_ULP_GLB_HF_II_VLAN_CFI_PRI, + BNXT_ULP_GLB_HF_OO_VLAN_VID, + BNXT_ULP_GLB_HF_OI_VLAN_VID, + BNXT_ULP_GLB_HF_IO_VLAN_VID, + BNXT_ULP_GLB_HF_II_VLAN_VID, + BNXT_ULP_GLB_HF_OO_VLAN_TYPE, + BNXT_ULP_GLB_HF_OI_VLAN_TYPE, + BNXT_ULP_GLB_HF_IO_VLAN_TYPE, + BNXT_ULP_GLB_HF_II_VLAN_TYPE, + BNXT_ULP_GLB_HF_T_VXLAN_FLAGS, + BNXT_ULP_GLB_HF_T_VXLAN_RSVD0, + BNXT_ULP_GLB_HF_T_VXLAN_VNI, + BNXT_ULP_GLB_HF_T_VXLAN_RSVD1 +}; + +enum bnxt_ulp_hf1_0_bitmask { + BNXT_ULP_HF1_0_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF1_0_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF1_0_BITMASK_O_ETH_DMAC = 0x2000000000000000, + BNXT_ULP_HF1_0_BITMASK_O_ETH_SMAC = 0x1000000000000000, + BNXT_ULP_HF1_0_BITMASK_O_ETH_TYPE = 0x0800000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_VER = 0x0400000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_TOS = 0x0200000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_LEN = 0x0100000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_FRAG_ID = 0x0080000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_FRAG_OFF = 0x0040000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_TTL = 0x0020000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_PROTO_ID = 0x0010000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_CSUM = 0x0008000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_SRC_ADDR = 0x0004000000000000, + BNXT_ULP_HF1_0_BITMASK_O_IPV4_DST_ADDR = 0x0002000000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_SRC_PORT = 0x0001000000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_DST_PORT = 0x0000800000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_SENT_SEQ = 0x0000400000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_RECV_ACK = 0x0000200000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_DATA_OFF = 0x0000100000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_TCP_FLAGS = 0x0000080000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_RX_WIN = 0x0000040000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_CSUM = 0x0000020000000000, + BNXT_ULP_HF1_0_BITMASK_O_TCP_URP = 0x0000010000000000 +}; + +enum bnxt_ulp_hf1_1_bitmask { + BNXT_ULP_HF1_1_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF1_1_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF1_1_BITMASK_O_ETH_DMAC = 0x2000000000000000, + BNXT_ULP_HF1_1_BITMASK_O_ETH_SMAC = 0x1000000000000000, + BNXT_ULP_HF1_1_BITMASK_O_ETH_TYPE = 0x0800000000000000, + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_CFI_PRI = 0x0400000000000000, + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_VID = 0x0200000000000000, + BNXT_ULP_HF1_1_BITMASK_OO_VLAN_TYPE = 0x0100000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_VER = 0x0080000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_TOS = 0x0040000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_LEN = 0x0020000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_FRAG_ID = 0x0010000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_FRAG_OFF = 0x0008000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_TTL = 0x0004000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_PROTO_ID = 0x0002000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_CSUM = 0x0001000000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_SRC_ADDR = 0x0000800000000000, + BNXT_ULP_HF1_1_BITMASK_O_IPV4_DST_ADDR = 0x0000400000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_CSUM = 0x0000004000000000, + BNXT_ULP_HF1_1_BITMASK_O_TCP_URP = 0x0000002000000000 +}; + +enum bnxt_ulp_hf2_0_bitmask { + BNXT_ULP_HF2_0_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF2_0_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF2_0_BITMASK_O_ETH_DMAC = 0x2000000000000000, + BNXT_ULP_HF2_0_BITMASK_O_ETH_SMAC = 0x1000000000000000, + BNXT_ULP_HF2_0_BITMASK_O_ETH_TYPE = 0x0800000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_VER = 0x0400000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_TOS = 0x0200000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_LEN = 0x0100000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_FRAG_ID = 0x0080000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_FRAG_OFF = 0x0040000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_TTL = 0x0020000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_PROTO_ID = 0x0010000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_CSUM = 0x0008000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_SRC_ADDR = 0x0004000000000000, + BNXT_ULP_HF2_0_BITMASK_O_IPV4_DST_ADDR = 0x0002000000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_SRC_PORT = 0x0001000000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_DST_PORT = 0x0000800000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_SENT_SEQ = 0x0000400000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_RECV_ACK = 0x0000200000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_DATA_OFF = 0x0000100000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_TCP_FLAGS = 0x0000080000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_RX_WIN = 0x0000040000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_CSUM = 0x0000020000000000, + BNXT_ULP_HF2_0_BITMASK_O_TCP_URP = 0x0000010000000000 +}; + +enum bnxt_ulp_hf2_1_bitmask { + BNXT_ULP_HF2_1_BITMASK_WM = 0x8000000000000000, + BNXT_ULP_HF2_1_BITMASK_SVIF_INDEX = 0x4000000000000000, + BNXT_ULP_HF2_1_BITMASK_O_ETH_DMAC = 0x2000000000000000, + BNXT_ULP_HF2_1_BITMASK_O_ETH_SMAC = 0x1000000000000000, + BNXT_ULP_HF2_1_BITMASK_O_ETH_TYPE = 0x0800000000000000, + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_CFI_PRI = 0x0400000000000000, + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_VID = 0x0200000000000000, + BNXT_ULP_HF2_1_BITMASK_OO_VLAN_TYPE = 0x0100000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_VER = 0x0080000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_TOS = 0x0040000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_LEN = 0x0020000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_FRAG_ID = 0x0010000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_FRAG_OFF = 0x0008000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_TTL = 0x0004000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_PROTO_ID = 0x0002000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_CSUM = 0x0001000000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_SRC_ADDR = 0x0000800000000000, + BNXT_ULP_HF2_1_BITMASK_O_IPV4_DST_ADDR = 0x0000400000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_CSUM = 0x0000004000000000, + BNXT_ULP_HF2_1_BITMASK_O_TCP_URP = 0x0000002000000000 }; - -enum bnxt_ulp_hf_bitmask14 { - BNXT_ULP_HF14_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF14_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF14_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF14_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF14_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF14_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF14_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF14_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF14_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF14_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF14_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF14_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF14_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF14_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF14_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF14_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF14_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF14_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF14_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF14_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF14_BITMASK_O_UDP_LENGTH = 0x0000080000000000, - BNXT_ULP_HF14_BITMASK_O_UDP_CSUM = 0x0000040000000000 -}; - -enum bnxt_ulp_hf_bitmask15 { - BNXT_ULP_HF15_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF15_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF15_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF15_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF15_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF15_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF15_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF15_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF15_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF15_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF15_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF15_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_CSUM = 0x0000004000000000, - BNXT_ULP_HF15_BITMASK_O_TCP_URP = 0x0000002000000000 -}; - -enum bnxt_ulp_hf_bitmask16 { - BNXT_ULP_HF16_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF16_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF16_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF16_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF16_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF16_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF16_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF16_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF16_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF16_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF16_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF16_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF16_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF16_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF16_BITMASK_O_UDP_CSUM = 0x0000010000000000, - BNXT_ULP_HF16_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000, - BNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000, - BNXT_ULP_HF16_BITMASK_T_VXLAN_VNI = 0x0000002000000000, - BNXT_ULP_HF16_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000 -}; - -enum bnxt_ulp_hf_bitmask17 { - BNXT_ULP_HF17_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF17_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF17_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF17_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF17_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF17_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF17_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF17_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF17_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF17_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF17_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF17_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF17_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF17_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF17_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF17_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF17_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF17_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF17_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF17_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF17_BITMASK_O_UDP_LENGTH = 0x0000080000000000, - BNXT_ULP_HF17_BITMASK_O_UDP_CSUM = 0x0000040000000000, - BNXT_ULP_HF17_BITMASK_T_VXLAN_FLAGS = 0x0000020000000000, - BNXT_ULP_HF17_BITMASK_T_VXLAN_RSVD0 = 0x0000010000000000, - BNXT_ULP_HF17_BITMASK_T_VXLAN_VNI = 0x0000008000000000, - BNXT_ULP_HF17_BITMASK_T_VXLAN_RSVD1 = 0x0000004000000000 -}; - -enum bnxt_ulp_hf_bitmask18 { - BNXT_ULP_HF18_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF18_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF18_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF18_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF18_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF18_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF18_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF18_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF18_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF18_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF18_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF18_BITMASK_O_UDP_CSUM = 0x0000010000000000, - BNXT_ULP_HF18_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000, - BNXT_ULP_HF18_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000, - BNXT_ULP_HF18_BITMASK_T_VXLAN_VNI = 0x0000002000000000, - BNXT_ULP_HF18_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000 -}; - -enum bnxt_ulp_hf_bitmask19 { - BNXT_ULP_HF19_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF19_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF19_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF19_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF19_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF19_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF19_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF19_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF19_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF19_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF19_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF19_BITMASK_O_UDP_CSUM = 0x0000010000000000, - BNXT_ULP_HF19_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000, - BNXT_ULP_HF19_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000, - BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI = 0x0000002000000000, - BNXT_ULP_HF19_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000, - BNXT_ULP_HF19_BITMASK_I_ETH_DMAC = 0x0000000800000000, - BNXT_ULP_HF19_BITMASK_I_ETH_SMAC = 0x0000000400000000, - BNXT_ULP_HF19_BITMASK_I_ETH_TYPE = 0x0000000200000000, - BNXT_ULP_HF19_BITMASK_IO_VLAN_CFI_PRI = 0x0000000100000000, - BNXT_ULP_HF19_BITMASK_IO_VLAN_VID = 0x0000000080000000, - BNXT_ULP_HF19_BITMASK_IO_VLAN_TYPE = 0x0000000040000000, - BNXT_ULP_HF19_BITMASK_II_VLAN_CFI_PRI = 0x0000000020000000, - BNXT_ULP_HF19_BITMASK_II_VLAN_VID = 0x0000000010000000, - BNXT_ULP_HF19_BITMASK_II_VLAN_TYPE = 0x0000000008000000, - BNXT_ULP_HF19_BITMASK_I_IPV4_VER = 0x0000000004000000, - BNXT_ULP_HF19_BITMASK_I_IPV4_TOS = 0x0000000002000000, - BNXT_ULP_HF19_BITMASK_I_IPV4_LEN = 0x0000000001000000, - BNXT_ULP_HF19_BITMASK_I_IPV4_FRAG_ID = 0x0000000000800000, - BNXT_ULP_HF19_BITMASK_I_IPV4_FRAG_OFF = 0x0000000000400000, - BNXT_ULP_HF19_BITMASK_I_IPV4_TTL = 0x0000000000200000, - BNXT_ULP_HF19_BITMASK_I_IPV4_PROTO_ID = 0x0000000000100000, - BNXT_ULP_HF19_BITMASK_I_IPV4_CSUM = 0x0000000000080000, - BNXT_ULP_HF19_BITMASK_I_IPV4_SRC_ADDR = 0x0000000000040000, - BNXT_ULP_HF19_BITMASK_I_IPV4_DST_ADDR = 0x0000000000020000 -}; - -enum bnxt_ulp_hf_bitmask20 { - BNXT_ULP_HF20_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF20_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF20_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF20_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF20_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF20_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF20_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF20_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF20_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF20_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF20_BITMASK_O_UDP_LENGTH = 0x0000020000000000, - BNXT_ULP_HF20_BITMASK_O_UDP_CSUM = 0x0000010000000000 -}; - -enum bnxt_ulp_hf_bitmask21 { - BNXT_ULP_HF21_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF21_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF21_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF21_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF21_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF21_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF21_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF21_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF21_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF21_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT = 0x0000040000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_RX_WIN = 0x0000002000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_CSUM = 0x0000001000000000, - BNXT_ULP_HF21_BITMASK_O_TCP_URP = 0x0000000800000000 -}; - -enum bnxt_ulp_hf_bitmask22 { - BNXT_ULP_HF22_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF22_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF22_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF22_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF22_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF22_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF22_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF22_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF22_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF22_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF22_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF22_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF22_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF22_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF22_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF22_BITMASK_O_UDP_LENGTH = 0x0000080000000000, - BNXT_ULP_HF22_BITMASK_O_UDP_CSUM = 0x0000040000000000 -}; - -enum bnxt_ulp_hf_bitmask23 { - BNXT_ULP_HF23_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF23_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF23_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF23_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF23_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF23_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF23_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF23_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF23_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF23_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF23_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF23_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF23_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF23_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF23_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT = 0x0000100000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_RX_WIN = 0x0000008000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_CSUM = 0x0000004000000000, - BNXT_ULP_HF23_BITMASK_O_TCP_URP = 0x0000002000000000 -}; - -enum bnxt_ulp_hf_bitmask24 { - BNXT_ULP_HF24_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF24_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF24_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF24_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF24_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF24_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF24_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF24_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF24_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF24_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_VER = 0x0020000000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_TOS = 0x0010000000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_LEN = 0x0008000000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_TTL = 0x0001000000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_CSUM = 0x0000400000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000, - BNXT_ULP_HF24_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000 -}; - -enum bnxt_ulp_hf_bitmask25 { - BNXT_ULP_HF25_BITMASK_SVIF_INDEX = 0x8000000000000000, - BNXT_ULP_HF25_BITMASK_O_ETH_DMAC = 0x4000000000000000, - BNXT_ULP_HF25_BITMASK_O_ETH_SMAC = 0x2000000000000000, - BNXT_ULP_HF25_BITMASK_O_ETH_TYPE = 0x1000000000000000, - BNXT_ULP_HF25_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000, - BNXT_ULP_HF25_BITMASK_OO_VLAN_VID = 0x0400000000000000, - BNXT_ULP_HF25_BITMASK_OO_VLAN_TYPE = 0x0200000000000000, - BNXT_ULP_HF25_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000, - BNXT_ULP_HF25_BITMASK_OI_VLAN_VID = 0x0080000000000000, - BNXT_ULP_HF25_BITMASK_OI_VLAN_TYPE = 0x0040000000000000, - BNXT_ULP_HF25_BITMASK_O_IPV6_VER = 0x0020000000000000, - BNXT_ULP_HF25_BITMASK_O_IPV6_TC = 0x0010000000000000, - BNXT_ULP_HF25_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000, - BNXT_ULP_HF25_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000, - BNXT_ULP_HF25_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000, - BNXT_ULP_HF25_BITMASK_O_IPV6_TTL = 0x0001000000000000, - BNXT_ULP_HF25_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000, - BNXT_ULP_HF25_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000 -}; - #endif diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c index eb71b5053c..9f90af2f6e 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c @@ -3,3359 +3,244 @@ * All rights reserved. */ -/* date: Thu Oct 15 17:28:37 2020 */ +/* date: Mon Nov 23 17:33:02 2020 */ #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" -#include "ulp_rte_parser.h" +#include "ulp_template_db_tbl.h" /* Mapper templates for header act list */ struct bnxt_ulp_mapper_tmpl_info ulp_stingray_act_tmpl_list[] = { - /* act-ing-[dec_ttl, count, nat]:1 */ /* act_tid: 1, stingray, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 0 - }, - /* act-ing-[drop, pop_vlan, push_vlan, dec_ttl, count, vxlan_decap]:2 */ - /* act_tid: 2, stingray, ingress */ - [2] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 3, - .start_tbl_idx = 6 - }, - /* act-ing-[mark, rss, count, pop_vlan, vxlan_decap]:3 */ - /* act_tid: 3, stingray, ingress */ - [3] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 3, - .start_tbl_idx = 9 - }, - /* act_egr-[vxlan_encap, count]:4 */ - /* act_tid: 4, stingray, egress */ - [4] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 12 - }, - /* act-egr-[dec_ttl, count, nat]:5 */ - /* act_tid: 5, stingray, egress */ - [5] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 18 - }, - /* act-egr-[drop, push_vlan, dec_ttl, count]:6 */ - /* act_tid: 6, stingray, egress */ - [6] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 24 + .num_tbls = 4, + .start_tbl_idx = 0, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 0, + .cond_nums = 0 } } }; struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = { - { /* act_tid: 1, stingray, table: int_flow_counter_tbl_0 */ + { /* act_tid: 1, stingray, table: int_flow_counter_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 0, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .result_start_idx = 0, .result_bit_size = 64, .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .encap_num_fields = 0 }, - { /* act_tid: 1, stingray, table: int_act_modify_ipv4_src_0 */ + { /* act_tid: 1, stingray, table: int_vtag_encap_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_RX, - .result_start_idx = 1, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 1, + .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 - }, - { /* act_tid: 1, stingray, table: int_act_modify_ipv4_dst_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, - .direction = TF_DIR_RX, - .result_start_idx = 2, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, + .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 - }, - { /* act_tid: 1, stingray, table: int_encap_mac_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .result_start_idx = 3, + .result_start_idx = 1, .result_bit_size = 0, .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, - .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR - }, - { /* act_tid: 1, stingray, table: ext_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .result_start_idx = 15, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .encap_num_fields = 12 }, - { /* act_tid: 1, stingray, table: int_full_act_record_0 */ + { /* act_tid: 1, stingray, table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .result_start_idx = 41, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 2, stingray, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_RX, - .result_start_idx = 67, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* act_tid: 2, stingray, table: ext_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, - .result_start_idx = 68, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 2, stingray, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .result_start_idx = 94, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 3, stingray, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_RX, - .result_start_idx = 120, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* act_tid: 3, stingray, table: ext_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .result_start_idx = 121, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 3, stingray, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .result_start_idx = 147, + .result_start_idx = 13, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 4, stingray, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_TX, - .result_start_idx = 173, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* act_tid: 4, stingray, table: int_sp_smac_ipv4_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG, - .direction = TF_DIR_TX, - .result_start_idx = 174, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 3, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR - }, - { /* act_tid: 4, stingray, table: int_sp_smac_ipv6_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG, - .direction = TF_DIR_TX, - .result_start_idx = 177, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 3, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR - }, - { /* act_tid: 4, stingray, table: int_tun_encap_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, - .result_start_idx = 180, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .encap_num_fields = 0 }, - { /* act_tid: 4, stingray, table: ext_full_act_record_0 */ + { /* act_tid: 1, stingray, table: ext_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .result_start_idx = 192, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 4, stingray, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .result_start_idx = 230, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 5, stingray, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_TX, - .result_start_idx = 256, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* act_tid: 5, stingray, table: int_act_modify_ipv4_src_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, - .direction = TF_DIR_TX, - .result_start_idx = 257, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 - }, - { /* act_tid: 5, stingray, table: int_act_modify_ipv4_dst_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, - .direction = TF_DIR_TX, - .result_start_idx = 258, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 - }, - { /* act_tid: 5, stingray, table: int_encap_mac_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .result_start_idx = 259, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, - .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR - }, - { /* act_tid: 5, stingray, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .result_start_idx = 271, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 5, stingray, table: ext_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .result_start_idx = 297, + .result_start_idx = 39, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 11, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 6, stingray, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .encap_num_fields = 0 + } +}; + +struct bnxt_ulp_mapper_cond_info ulp_stingray_act_cond_list[] = { + { .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_TX, - .result_start_idx = 334, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .cond_operand = BNXT_ULP_ACTION_BIT_COUNT }, - { /* act_tid: 6, stingray, table: int_vtag_encap_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, + { .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, - .direction = TF_DIR_TX, - .result_start_idx = 335, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 - }, - { /* act_tid: 6, stingray, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .result_start_idx = 347, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 6, stingray, table: ext_full_act_record_no_tag_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, - .direction = TF_DIR_TX, - .result_start_idx = 373, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 6, stingray, table: ext_full_act_record_one_tag_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, - .direction = TF_DIR_TX, - .result_start_idx = 399, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 11, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN } }; -struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = { - /* act_tid: 1, stingray, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 1, stingray, table: int_act_modify_ipv4_src_0 */ - { - .description = "ipv4_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 1, stingray, table: int_act_modify_ipv4_dst_0 */ - { - .description = "ipv4_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 1, stingray, table: int_encap_mac_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L2_EN_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "spare", - .field_bit_size = 80, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 1, stingray, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 1, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 2, stingray, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 2, stingray, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 2, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 3, stingray, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 3, stingray, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 3, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 4, stingray, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 4, stingray, table: int_sp_smac_ipv4_0 */ - { - .description = "smac", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 4, stingray, table: int_sp_smac_ipv6_0 */ - { - .description = "smac", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 4, stingray, table: int_tun_encap_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_l2_dmac", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_vtag", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_ip", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_udp", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_tun", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 4, stingray, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_l2_dmac", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_vtag", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_ip", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_udp", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_tun", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 4, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 5, stingray, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 5, stingray, table: int_act_modify_ipv4_src_0 */ - { - .description = "ipv4_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 5, stingray, table: int_act_modify_ipv4_dst_0 */ - { - .description = "ipv4_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 5, stingray, table: int_encap_mac_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L2_EN_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "spare", - .field_bit_size = 80, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 5, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 5, stingray, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L2_EN_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 6, stingray, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 6, stingray, table: int_vtag_encap_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "spare", - .field_bit_size = 80, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 6, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, +struct bnxt_ulp_mapper_field_info ulp_stingray_act_result_field_list[] = { + /* act_tid: 1, stingray, table: int_flow_counter_tbl.0 */ { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "count", + .field_bit_size = 64, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* act_tid: 1, stingray, table: int_vtag_encap_record.0 */ { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_tun_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_l4_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_l3_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_l2_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_vtag_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "tl3_rdir", + .description = "ecv_custom_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l3_ttl_dec", + .description = "ecv_valid", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, + .description = "vtag_tpid", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", + .description = "vtag_vid", .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", + .description = "vtag_de", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "vtag_pcp", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "spare", + .field_bit_size = 80, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* act_tid: 6, stingray, table: ext_full_act_record_no_tag_0 */ + /* act_tid: 1, stingray, table: int_full_act_record.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "age_enable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "agg_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "rate_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "flow_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, @@ -3367,75 +252,110 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { .description = "tcpflags_key", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_mir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_match", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "encap_ptr", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "dst_ip_ptr", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "tcp_dst_port", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "src_ip_ptr", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "tcp_src_port", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "meter_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tl3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -3444,8 +364,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = { .description = "tl3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -3454,38 +374,60 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = { .description = "decap_func", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "vnic_or_vport", .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pop_vlan", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "meter", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "mirror", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "drop", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, @@ -3496,37 +438,47 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* act_tid: 6, stingray, table: ext_full_act_record_one_tag_0 */ + { + .description = "hit", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "type", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + /* act_tid: 1, stingray, table: ext_full_act_record.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "age_enable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "agg_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "rate_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "flow_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, @@ -3540,73 +492,113 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = { .description = "flow_cntr_ext", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_key", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_mir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_match", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "encap_ptr", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "encap_rec_int", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "dst_ip_ptr", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "tcp_dst_port", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "src_ip_ptr", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "tcp_src_port", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "meter_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tl3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -3615,8 +607,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = { .description = "tl3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -3625,23 +617,35 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = { .description = "decap_func", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "vnic_or_vport", .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pop_vlan", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, @@ -3655,18 +659,18 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = { .description = "meter", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "mirror", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "drop", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, @@ -3676,81 +680,5 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[] = ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff, (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} } }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c index 53ba637d4e..c836e2f8ed 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c @@ -3,21096 +3,5059 @@ * All rights reserved. */ -/* date: Thu Oct 15 17:28:37 2020 */ +/* date: Mon Nov 23 17:33:02 2020 */ #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" -#include "ulp_rte_parser.h" +#include "ulp_template_db_tbl.h" /* Mapper templates for header class list */ struct bnxt_ulp_mapper_tmpl_info ulp_stingray_class_tmpl_list[] = { - /* default-vfr-[port_to_vs]:1 */ /* class_tid: 1, stingray, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, .num_tbls = 6, - .start_tbl_idx = 0 + .start_tbl_idx = 0, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 0, + .cond_nums = 0 } }, - /* default-vfr-[vs_to_port]:2 */ - /* class_tid: 2, stingray, egress */ + /* class_tid: 2, stingray, ingress */ [2] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 7, - .start_tbl_idx = 6 + .num_tbls = 6, + .start_tbl_idx = 6, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 2, + .cond_nums = 0 } }, - /* default-vfr-[vfrep_to_vf]:3 */ - /* class_tid: 3, stingray, egress */ + /* class_tid: 3, stingray, ingress */ [3] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 7, - .start_tbl_idx = 13 + .num_tbls = 6, + .start_tbl_idx = 12, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 4, + .cond_nums = 0 } }, - /* default-vfr-[vf_to_vfrep]:4 */ /* class_tid: 4, stingray, egress */ [4] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 7, - .start_tbl_idx = 20 + .num_tbls = 8, + .start_tbl_idx = 18, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 4, + .cond_nums = 0 } }, - /* default-egr-[loopback_action_rec]:5 */ /* class_tid: 5, stingray, egress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 1, - .start_tbl_idx = 27 + .num_tbls = 7, + .start_tbl_idx = 26, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 10, + .cond_nums = 0 } }, - /* class-ing-em-[eth, (vlan), ipv4]-[smac, dmac, (vid)]:6 */ - /* class_tid: 6, stingray, ingress */ + /* class_tid: 6, stingray, egress */ [6] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 28 + .num_tbls = 7, + .start_tbl_idx = 33, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 10, + .cond_nums = 0 } }, - /* class-ing-em-[eth, (vlan), ipv6]-[smac, dmac, (vid)]:7 */ - /* class_tid: 7, stingray, ingress */ + /* class_tid: 7, stingray, egress */ [7] = { .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 33 - }, - /* class-ing-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:8 */ - /* class_tid: 8, stingray, ingress */ - [8] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 38 - }, - /* class-ing-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:9 */ - /* class_tid: 9, stingray, ingress */ - [9] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 44 - }, - /* class-ing-em-[eth,ipv6, udp]-[sip, dip, sp, dp]:10 */ - /* class_tid: 10, stingray, ingress */ - [10] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 50 - }, - /* class-ing-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:11 */ - /* class_tid: 11, stingray, ingress */ - [11] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 56 - }, - /* class-ing-em-[eth, (vlan), ipv4, udp]-[dmac, (vid), sip, dip, sp, dp]:12 */ - /* class_tid: 12, stingray, ingress */ - [12] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 62 - }, - /* class-ing-em-[eth, (vlan), ipv4, tcp]-[dmac, (vid), sip, dip, sp, dp]:13 */ - /* class_tid: 13, stingray, ingress */ - [13] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 67 + .num_tbls = 1, + .start_tbl_idx = 40, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 10, + .cond_nums = 0 } + } +}; + +struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { + { /* class_tid: 1, stingray, table: l2_cntxt_tcam.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 0, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .key_start_idx = 0, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 0, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 0, + .ident_nums = 1 }, - /* class-ing-em-[eth, (vlan), ipv6, udp]-[dmac, (vid), sip, dip, sp, dp]:14 */ - /* class_tid: 14, stingray, ingress */ - [14] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 72 + { /* class_tid: 1, stingray, table: profile_tcam_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 0, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 13, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .ident_start_idx = 1, + .ident_nums = 3 }, - /* class-ing-em-[eth, (vlan), ipv6, tcp]-[dmac, (vid), sip, dip, sp, dp]:15 */ - /* class_tid: 15, stingray, ingress */ - [15] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 77 + { /* class_tid: 1, stingray, table: profile_tcam.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 0, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 16, + .blob_key_bit_size = 81, + .key_bit_size = 81, + .key_num_fields = 43, + .result_start_idx = 13, + .result_bit_size = 38, + .result_num_fields = 8, + .encap_num_fields = 0, + .ident_start_idx = 4, + .ident_nums = 1 }, - /* class-ing-em-[eth, (vlan), ipv4, udp, vxlan]-[dmac, (vid), dip, dp]:16 */ - /* class_tid: 16, stingray, ingress */ - [16] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 82 + { /* class_tid: 1, stingray, table: profile_tcam_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 1, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 59, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .result_start_idx = 21, + .result_bit_size = 66, + .result_num_fields = 5, + .encap_num_fields = 0 }, - /* class-ing-em-[eth, (vlan), ipv6, udp, vxlan]-[t_dmac, (vid), t_dip, t_dp]:17 */ - /* class_tid: 17, stingray, ingress */ - [17] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 87 + { /* class_tid: 1, stingray, table: eem.ext_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, + .resource_type = TF_MEM_EXTERNAL, + .direction = TF_DIR_RX, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .key_start_idx = 62, + .blob_key_bit_size = 448, + .key_bit_size = 448, + .key_num_fields = 10, + .result_start_idx = 26, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0 }, - /* class-ing-em-f1-[eth, ipv4, udp, vxlan]-[t_dmac]:18 */ - /* class_tid: 18, stingray, ingress */ - [18] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 92 + { /* class_tid: 1, stingray, table: em.int_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, + .resource_type = TF_MEM_INTERNAL, + .direction = TF_DIR_RX, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .key_start_idx = 72, + .blob_key_bit_size = 176, + .key_bit_size = 176, + .key_num_fields = 10, + .result_start_idx = 35, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0 }, - /* class-ing-em-f2-[ipv4, udp, vxlan]-[vni, i_dmac]:19 */ - /* class_tid: 19, stingray, ingress */ - [19] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 97 + { /* class_tid: 2, stingray, table: l2_cntxt_tcam.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .key_start_idx = 82, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 44, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 5, + .ident_nums = 1 }, - /* class-egr-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:20 */ - /* class_tid: 20, stingray, egress */ - [20] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 102 + { /* class_tid: 2, stingray, table: profile_tcam_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 95, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .ident_start_idx = 6, + .ident_nums = 3 }, - /* class-egr-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:21 */ - /* class_tid: 21, stingray, egress */ - [21] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 108 + { /* class_tid: 2, stingray, table: profile_tcam.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 2, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 98, + .blob_key_bit_size = 81, + .key_bit_size = 81, + .key_num_fields = 43, + .result_start_idx = 57, + .result_bit_size = 38, + .result_num_fields = 8, + .encap_num_fields = 0, + .ident_start_idx = 9, + .ident_nums = 1 }, - /* class-egr-em-[eth-ipv6-udp]-[sip-dip-sp-dp]:22 */ - /* class_tid: 22, stingray, egress */ - [22] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 114 + { /* class_tid: 2, stingray, table: profile_tcam_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 3, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 141, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .result_start_idx = 65, + .result_bit_size = 66, + .result_num_fields = 5, + .encap_num_fields = 0 }, - /* class-egr-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:23 */ - /* class_tid: 23, stingray, egress */ - [23] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 6, - .start_tbl_idx = 120 + { /* class_tid: 2, stingray, table: eem.ext_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, + .resource_type = TF_MEM_EXTERNAL, + .direction = TF_DIR_RX, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .key_start_idx = 144, + .blob_key_bit_size = 448, + .key_bit_size = 448, + .key_num_fields = 10, + .result_start_idx = 70, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0 }, - /* class-egr-em-[eth, (vlan), ipv4]-[smac, dmac, type]:24 */ - /* class_tid: 24, stingray, egress */ - [24] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 126 + { /* class_tid: 2, stingray, table: em.int_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, + .resource_type = TF_MEM_INTERNAL, + .direction = TF_DIR_RX, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .key_start_idx = 154, + .blob_key_bit_size = 176, + .key_bit_size = 176, + .key_num_fields = 10, + .result_start_idx = 79, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0 }, - /* class-egr-em-[eth, (vlan), ipv6]-[smac, dmac, type]:25 */ - /* class_tid: 25, stingray, egress */ - [25] = { - .device_name = BNXT_ULP_DEVICE_ID_STINGRAY, - .num_tbls = 5, - .start_tbl_idx = 131 - } -}; - -struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = { - { /* class_tid: 1, stingray, table: int_full_act_record_0 */ + { /* class_tid: 3, stingray, table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .result_start_idx = 0, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 88, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 0, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 26, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 0, - .ident_nums = 1 + .encap_num_fields = 0 }, - { /* class_tid: 1, stingray, table: l2_cntxt_tcam_0 */ + { /* class_tid: 3, stingray, table: l2_cntxt_tcam.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 1, - .blob_key_bit_size = 171, - .key_bit_size = 171, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 164, + .blob_key_bit_size = 167, + .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 27, + .result_start_idx = 114, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 1, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + .ident_start_idx = 10, + .ident_nums = 1 + }, + { /* class_tid: 3, stingray, table: l2_cntxt_tcam_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 177, + .blob_key_bit_size = 8, + .key_bit_size = 8, + .key_num_fields = 1, + .result_start_idx = 127, + .result_bit_size = 62, + .result_num_fields = 4, + .encap_num_fields = 0 }, - { /* class_tid: 1, stingray, table: parif_def_lkup_arec_ptr_0 */ + { /* class_tid: 3, stingray, table: parif_def_lkup_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_RX, - .result_start_idx = 40, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 131, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 1, stingray, table: parif_def_arec_ptr_0 */ + { /* class_tid: 3, stingray, table: parif_def_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_RX, - .result_start_idx = 41, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 132, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 1, stingray, table: parif_def_err_arec_ptr_0 */ + { /* class_tid: 3, stingray, table: parif_def_err_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_RX, - .result_start_idx = 42, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 133, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 2, stingray, table: int_full_act_record_0 */ + { /* class_tid: 4, stingray, table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .result_start_idx = 43, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 134, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .encap_num_fields = 0 }, - { /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */ + { /* class_tid: 4, stingray, table: l2_cntxt_tcam_bypass.vfr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 4, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 14, - .blob_key_bit_size = 171, - .key_bit_size = 171, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 178, + .blob_key_bit_size = 167, + .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 69, + .result_start_idx = 160, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 1, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + .ident_start_idx = 11, + .ident_nums = 0 }, - { /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, + { /* class_tid: 4, stingray, table: l2_cntxt_tcam_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, - .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, - .key_start_idx = 27, - .blob_key_bit_size = 12, - .key_bit_size = 12, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 5, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 191, + .blob_key_bit_size = 8, + .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 82, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 1, + .ident_start_idx = 11, .ident_nums = 1 }, - { /* class_tid: 2, stingray, table: l2_cntxt_tcam_0 */ + { /* class_tid: 4, stingray, table: l2_cntxt_tcam.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, - .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 28, - .blob_key_bit_size = 171, - .key_bit_size = 171, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 6, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 192, + .blob_key_bit_size = 167, + .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 83, + .result_start_idx = 173, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + .ident_start_idx = 12, + .ident_nums = 1 + }, + { /* class_tid: 4, stingray, table: l2_cntxt_tcam_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 8, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 205, + .blob_key_bit_size = 8, + .key_bit_size = 8, + .key_num_fields = 1, + .result_start_idx = 186, + .result_bit_size = 62, + .result_num_fields = 4, + .encap_num_fields = 0 }, - { /* class_tid: 2, stingray, table: parif_def_lkup_arec_ptr_0 */ + { /* class_tid: 4, stingray, table: parif_def_lkup_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, - .result_start_idx = 96, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 190, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 2, stingray, table: parif_def_arec_ptr_0 */ + { /* class_tid: 4, stingray, table: parif_def_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, - .result_start_idx = 97, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 191, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 2, stingray, table: parif_def_err_arec_ptr_0 */ + { /* class_tid: 4, stingray, table: parif_def_err_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_TX, - .result_start_idx = 98, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 192, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 3, stingray, table: egr_int_vtag_encap_record_0 */ + { /* class_tid: 5, stingray, table: int_vtag_encap_record.egr0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, - .result_start_idx = 99, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 193, .result_bit_size = 0, .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .encap_num_fields = 12 }, - { /* class_tid: 3, stingray, table: egr_int_full_act_record_0 */ + { /* class_tid: 5, stingray, table: int_full_act_record.egr0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .result_start_idx = 111, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 205, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* class_tid: 3, stingray, table: egr_l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 41, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 137, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0 + .encap_num_fields = 0 }, - { /* class_tid: 3, stingray, table: egr_l2_cntxt_tcam_0 */ + { /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.egr0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 42, - .blob_key_bit_size = 171, - .key_bit_size = 171, + .key_start_idx = 206, + .blob_key_bit_size = 167, + .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 137, + .result_start_idx = 231, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + .ident_start_idx = 13, + .ident_nums = 0 }, - { /* class_tid: 3, stingray, table: ing_int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_RX, - .result_start_idx = 150, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* class_tid: 3, stingray, table: ing_l2_cntxt_dtagged_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 55, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 176, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 3, stingray, table: ing_l2_cntxt_stagged_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 68, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 189, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + { /* class_tid: 5, stingray, table: l2_cntxt_tcam_cache.wr_egr0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 81, - .blob_key_bit_size = 12, - .key_bit_size = 12, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 219, + .blob_key_bit_size = 8, + .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 202, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 1 - }, - { /* class_tid: 4, stingray, table: egr_l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 82, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 203, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 3, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 4, stingray, table: egr_parif_def_lkup_arec_ptr_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, - .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, - .direction = TF_DIR_TX, - .result_start_idx = 216, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, - .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF - }, - { /* class_tid: 4, stingray, table: egr_parif_def_arec_ptr_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, - .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, - .direction = TF_DIR_TX, - .result_start_idx = 217, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, - .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF - }, - { /* class_tid: 4, stingray, table: egr_parif_def_err_arec_ptr_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, - .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, - .direction = TF_DIR_TX, - .result_start_idx = 218, - .result_bit_size = 32, - .result_num_fields = 1, + .result_start_idx = 244, + .result_bit_size = 62, + .result_num_fields = 4, .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, - .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF + .ident_start_idx = 13, + .ident_nums = 0 }, - { /* class_tid: 4, stingray, table: ing_int_full_act_record_0 */ + { /* class_tid: 5, stingray, table: int_full_act_record.ing0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .result_start_idx = 219, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* class_tid: 4, stingray, table: ing_l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 95, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 245, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 3, - .ident_nums = 0, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 5, stingray, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, - .direction = TF_DIR_TX, - .result_start_idx = 258, + .result_start_idx = 248, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, - .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR + .encap_num_fields = 0 }, - { /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ + { /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.dtagged_ing0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 108, - .blob_key_bit_size = 171, - .key_bit_size = 171, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 220, + .blob_key_bit_size = 167, + .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 284, + .result_start_idx = 274, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 3, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 121, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 297, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 4, - .ident_nums = 1 - }, - { /* class_tid: 6, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 1, - .key_start_idx = 124, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 298, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 6, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 167, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 306, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 6, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 178, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 315, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES + .ident_start_idx = 13, + .ident_nums = 0 }, - { /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ + { /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.stagged_ing0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 189, - .blob_key_bit_size = 171, - .key_bit_size = 171, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 233, + .blob_key_bit_size = 167, + .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 324, + .result_start_idx = 287, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 202, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 337, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 6, - .ident_nums = 1 - }, - { /* class_tid: 7, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 1, - .key_start_idx = 205, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 338, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 7, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 7, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 248, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 346, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 7, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 7, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 259, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 355, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 7, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 270, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 364, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 7, - .ident_nums = 1 + .ident_start_idx = 13, + .ident_nums = 0 }, - { /* class_tid: 8, stingray, table: l2_cntxt_tcam_0 */ + { /* class_tid: 6, stingray, table: l2_cntxt_tcam.egr */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 271, - .blob_key_bit_size = 171, - .key_bit_size = 171, + .key_start_idx = 246, + .blob_key_bit_size = 167, + .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 365, + .result_start_idx = 300, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 8, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 284, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 378, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 8, - .ident_nums = 1 - }, - { /* class_tid: 8, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 287, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 379, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 9, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 8, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 330, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 387, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 9, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 8, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 341, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 396, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 9, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 352, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 405, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 9, + .ident_start_idx = 13, .ident_nums = 1 }, - { /* class_tid: 9, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 353, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 406, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 10, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 366, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 419, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 10, - .ident_nums = 1 - }, - { /* class_tid: 9, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 369, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 420, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 11, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 9, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 412, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 428, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 11, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 9, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 423, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 437, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 11, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 434, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 446, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 11, - .ident_nums = 1 - }, - { /* class_tid: 10, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 435, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 447, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 12, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 448, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 460, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 12, - .ident_nums = 1 - }, - { /* class_tid: 10, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 451, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 461, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 10, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 494, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 469, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 10, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 505, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 478, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 516, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 487, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 1 - }, - { /* class_tid: 11, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 517, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 488, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 14, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 530, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 501, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 14, - .ident_nums = 1 - }, - { /* class_tid: 11, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 533, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 502, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 15, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 11, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 576, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 510, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 15, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 11, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 587, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 519, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 15, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 598, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 528, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 15, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 611, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 541, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 16, - .ident_nums = 1 - }, - { /* class_tid: 12, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 614, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 542, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 17, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 12, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 657, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 550, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 17, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 12, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 668, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 559, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 17, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 679, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 568, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 17, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 692, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 581, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 18, - .ident_nums = 1 - }, - { /* class_tid: 13, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 695, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 582, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 19, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 13, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 738, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 590, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 19, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 13, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 749, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 599, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 19, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 760, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 608, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 19, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 773, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 621, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 20, - .ident_nums = 1 - }, - { /* class_tid: 14, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 776, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 622, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 21, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 14, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 819, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 630, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 21, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 14, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 830, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 639, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 21, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 841, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 648, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 21, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 854, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 661, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 22, - .ident_nums = 1 - }, - { /* class_tid: 15, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 857, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 662, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 23, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 15, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 900, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 670, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 23, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 15, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 911, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 679, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 23, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 922, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 688, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 23, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 935, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 701, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 24, - .ident_nums = 1 - }, - { /* class_tid: 16, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 938, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 702, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 16, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 981, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 710, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 16, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 992, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 719, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1003, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 728, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 1016, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 741, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 26, - .ident_nums = 1 - }, - { /* class_tid: 17, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1019, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 742, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 27, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 17, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 1062, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 750, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 27, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 17, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 1073, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 759, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 27, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 18, stingray, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_RX, - .result_start_idx = 768, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1084, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 769, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 27, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 1097, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 782, - .result_bit_size = 20, - .result_num_fields = 2, - .encap_num_fields = 0, - .ident_start_idx = 28, - .ident_nums = 2 - }, - { /* class_tid: 18, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1100, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 784, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 30, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 18, stingray, table: wm_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1143, - .blob_key_bit_size = 192, - .key_bit_size = 160, - .key_num_fields = 5, - .result_start_idx = 792, - .result_bit_size = 19, - .result_num_fields = 3, - .encap_num_fields = 0, - .ident_start_idx = 30, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1148, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 795, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 30, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 1161, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 808, - .result_bit_size = 20, - .result_num_fields = 2, - .encap_num_fields = 0, - .ident_start_idx = 31, - .ident_nums = 2 - }, - { /* class_tid: 19, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1164, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 810, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 19, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 1207, - .blob_key_bit_size = 112, - .key_bit_size = 112, - .key_num_fields = 8, - .result_start_idx = 818, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 19, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 1215, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 8, - .result_start_idx = 827, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1223, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 836, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 1 - }, - { /* class_tid: 20, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1224, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 837, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 34, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1237, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 850, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 34, - .ident_nums = 1 - }, - { /* class_tid: 20, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1240, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 851, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 35, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 20, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1283, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 859, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 35, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 20, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1294, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 868, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 35, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1305, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 877, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 35, - .ident_nums = 1 - }, - { /* class_tid: 21, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1306, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 878, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 36, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1319, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 891, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 36, - .ident_nums = 1 - }, - { /* class_tid: 21, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1322, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 892, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 37, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 21, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1365, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 900, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 37, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 21, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1376, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 909, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 37, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1387, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 918, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 37, - .ident_nums = 1 - }, - { /* class_tid: 22, stingray, table: l2_cntxt_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1388, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 919, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 38, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1401, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 932, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 38, - .ident_nums = 1 - }, - { /* class_tid: 22, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1404, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 933, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 39, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 22, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1447, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 941, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 39, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 22, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1458, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 950, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 39, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1469, - .blob_key_bit_size = 12, - .key_bit_size = 12, - .key_num_fields = 1, - .result_start_idx = 959, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 39, - .ident_nums = 1 - }, - { /* class_tid: 23, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1470, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 960, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 40, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1483, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 973, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 40, - .ident_nums = 1 - }, - { /* class_tid: 23, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1486, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 974, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 41, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 23, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1529, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 982, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 41, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 23, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1540, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 991, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 41, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1551, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 1000, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 41, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1564, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 1013, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 42, - .ident_nums = 1 - }, - { /* class_tid: 24, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1567, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 1014, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 43, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 24, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1610, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 7, - .result_start_idx = 1022, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 43, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 24, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1617, - .blob_key_bit_size = 104, - .key_bit_size = 104, - .key_num_fields = 7, - .result_start_idx = 1031, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 43, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1624, - .blob_key_bit_size = 171, - .key_bit_size = 171, - .key_num_fields = 13, - .result_start_idx = 1040, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 43, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1637, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 1053, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 44, - .ident_nums = 1 - }, - { /* class_tid: 25, stingray, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1640, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 1054, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 45, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 25, stingray, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1683, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 7, - .result_start_idx = 1062, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 45, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 25, stingray, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1690, - .blob_key_bit_size = 104, - .key_bit_size = 104, - .key_num_fields = 7, - .result_start_idx = 1071, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 45, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - } -}; - -struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = { - /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 1, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, stingray, table: egr_l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, stingray, table: egr_l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, stingray, table: ing_l2_cntxt_dtagged_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, stingray, table: ing_l2_cntxt_stagged_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, stingray, table: egr_l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, stingray, table: ing_l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF6_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF6_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF6_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF6_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF6_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF6_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "t_ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "t_ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "t_ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "t_ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF18_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF18_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 18, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 18, stingray, table: wm_0 */ - { - .description = "wc_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "spare", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "others", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF19_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 19, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 19, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dst_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_I_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF19_IDX_I_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_T_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_HF19_IDX_T_VXLAN_VNI & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 19, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 339, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dst_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_I_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF19_IDX_I_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_T_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_HF19_IDX_T_VXLAN_VNI & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, stingray, table: l2_cntxt_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF24_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF24_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF24_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF24_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF24_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF24_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF24_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF24_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF24_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 351, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_eth_type", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF24_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_eth_type", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF24_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF25_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF25_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF25_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF25_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF25_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF25_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF25_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF25_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF25_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, stingray, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, stingray, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 351, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_eth_type", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF25_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, stingray, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_eth_type", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF25_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - } -}; - -struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] = { - /* class_tid: 1, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 1, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 1, stingray, table: parif_def_lkup_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 1, stingray, table: parif_def_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 1, stingray, table: parif_def_err_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_VPORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 2, stingray, table: l2_cntxt_tcam_vfr_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 2, stingray, table: parif_def_lkup_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, stingray, table: parif_def_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, stingray, table: parif_def_err_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, stingray, table: egr_int_vtag_encap_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x81, 0x00} - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "spare", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, stingray, table: egr_int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT >> 8) & 0xff, - BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, stingray, table: egr_l2_cntxt_cache_0 */ - /* class_tid: 3, stingray, table: egr_l2_cntxt_tcam_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, stingray, table: ing_int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_VF_FUNC_VNIC >> 8) & 0xff, - BNXT_ULP_CF_IDX_VF_FUNC_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, stingray, table: ing_l2_cntxt_dtagged_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, stingray, table: ing_l2_cntxt_stagged_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, stingray, table: egr_l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_VF_FUNC_PARIF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 4, stingray, table: egr_parif_def_lkup_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, stingray, table: egr_parif_def_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, stingray, table: egr_parif_def_err_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, stingray, table: ing_int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 4, stingray, table: ing_l2_cntxt_tcam_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 5, stingray, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT >> 8) & 0xff, - BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0005 >> 8) & 0xff, - 0x0005 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 6, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0005 >> 8) & 0xff, - 0x0005 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 7, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 8, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 9, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 10, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 11, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 12, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 13, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 14, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 15, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0031 >> 8) & 0xff, - 0x0031 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 16, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, stingray, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0031 >> 8) & 0xff, - 0x0031 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 17, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + { /* class_tid: 6, stingray, table: l2_cntxt_tcam_cache.egr_wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 259, + .blob_key_bit_size = 8, + .key_bit_size = 8, + .key_num_fields = 1, + .result_start_idx = 313, + .result_bit_size = 62, + .result_num_fields = 4, + .encap_num_fields = 0 }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + { /* class_tid: 6, stingray, table: parif_def_lkup_arec_ptr.egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 317, + .result_bit_size = 32, + .result_num_fields = 1, + .encap_num_fields = 0 }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + { /* class_tid: 6, stingray, table: parif_def_arec_ptr.egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 318, + .result_bit_size = 32, + .result_num_fields = 1, + .encap_num_fields = 0 }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + { /* class_tid: 6, stingray, table: parif_def_err_arec_ptr.egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 319, + .result_bit_size = 32, + .result_num_fields = 1, + .encap_num_fields = 0 }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + { /* class_tid: 6, stingray, table: int_full_act_record.ing */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG, + .result_start_idx = 320, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 0 }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + { /* class_tid: 6, stingray, table: l2_cntxt_tcam_bypass.ing */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 260, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 346, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 14, + .ident_nums = 0 }, - /* class_tid: 17, stingray, table: int_em_0 */ + { /* class_tid: 7, stingray, table: int_full_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 359, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 0 + } +}; + +struct bnxt_ulp_mapper_cond_info ulp_stingray_class_cond_list[] = { { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, + .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE }, { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, + .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE }, { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, + .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE }, { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, + .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE }, - /* class_tid: 18, stingray, table: int_flow_counter_tbl_0 */ { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT + } +}; + +struct bnxt_ulp_mapper_key_info ulp_stingray_class_key_info_list[] = { + /* class_tid: 1, stingray, table: l2_cntxt_tcam.0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_GLB_HF_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_GLB_HF_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_GLB_HF_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_GLB_HF_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 1, stingray, table: profile_tcam_cache.rd */ + { + .field_info_mask = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 1, stingray, table: profile_tcam.0 */ + { + .field_info_mask = { + .description = "l4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l4_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l4_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l4_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l4_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l4_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l4_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_L4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_hdr_isIP", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l3_hdr_isIP", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l3_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l3_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l3_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_L3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l2_two_vtags", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_two_vtags", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_vtag_present", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_vtag_present", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_O_ONE_VTAG >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_ONE_VTAG & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l2_uc_mc_bc", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_uc_mc_bc", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_hdr_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_hdr_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_L2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "tun_hdr_flags", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_flags", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_err", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_err", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tun_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl4_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl4_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl4_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl4_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl4_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tl4_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_hdr_isIP", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_hdr_isIP", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tl3_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_two_vtags", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_two_vtags", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_vtag_present", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_vtag_present", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_uc_mc_bc", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_uc_mc_bc", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_hdr_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_hdr_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tl2_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "hrec_next", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "hrec_next", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "reserved", + .field_bit_size = 9, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "reserved", + .field_bit_size = 9, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "agg_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "agg_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "pkt_type_0", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "pkt_type_0", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "pkt_type_1", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "pkt_type_1", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 1, stingray, table: profile_tcam_cache.wr */ + { + .field_info_mask = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 1, stingray, table: eem.ext_0 */ + { + .field_info_mask = { + .description = "spare", + .field_bit_size = 275, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "spare", + .field_bit_size = 275, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "local_cos", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "local_cos", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "o_l4.dport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_l4.dport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_l4.sport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_l4.sport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.ip_proto", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_ipv4.ip_proto", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_IP_PROTO_TCP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_eth.smac", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_eth.smac", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 1, stingray, table: em.int_0 */ + { + .field_info_mask = { + .description = "spare", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "spare", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "local_cos", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "local_cos", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "o_l4.dport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_l4.dport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_l4.sport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_l4.sport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.ip_proto", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_ipv4.ip_proto", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_IP_PROTO_TCP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_SRC_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_eth.smac", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_eth.smac", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 2, stingray, table: l2_cntxt_tcam.0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_GLB_HF_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_GLB_HF_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_GLB_HF_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_SVIF_INDEX >> 8) & 0xff, + BNXT_ULP_GLB_HF_SVIF_INDEX & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 2, stingray, table: profile_tcam_cache.rd */ + { + .field_info_mask = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 2, stingray, table: profile_tcam.0 */ + { + .field_info_mask = { + .description = "l4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l4_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l4_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l4_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l4_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l4_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l4_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_L4_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_hdr_isIP", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l3_hdr_isIP", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l3_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l3_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l3_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l3_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_L3_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l2_two_vtags", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_two_vtags", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_vtag_present", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_vtag_present", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_O_ONE_VTAG >> 8) & 0xff, + BNXT_ULP_CF_IDX_O_ONE_VTAG & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l2_uc_mc_bc", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_uc_mc_bc", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_hdr_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_hdr_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_L2_HDR_VALID_YES, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "tun_hdr_flags", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_flags", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_err", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_err", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tun_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl4_hdr_is_udp_tcp", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl4_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl4_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl4_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl4_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl4_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tl4_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_ipv6_cmp_dst", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_ipv6_cmp_src", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_hdr_isIP", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_hdr_isIP", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl3_hdr_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl3_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tl3_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_two_vtags", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_two_vtags", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_vtag_present", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_vtag_present", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_uc_mc_bc", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_uc_mc_bc", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_hdr_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_hdr_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tl2_hdr_valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "hrec_next", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "hrec_next", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "reserved", + .field_bit_size = 9, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "reserved", + .field_bit_size = 9, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "agg_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "agg_error", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "pkt_type_0", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "pkt_type_0", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "pkt_type_1", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "pkt_type_1", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 2, stingray, table: profile_tcam_cache.wr */ + { + .field_info_mask = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "recycle_cnt", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "prof_func_id", + .field_bit_size = 7, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "hdr_sig_id", + .field_bit_size = 5, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 2, stingray, table: eem.ext_0 */ + { + .field_info_mask = { + .description = "spare", + .field_bit_size = 275, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "spare", + .field_bit_size = 275, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "local_cos", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "local_cos", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "o_l4.dport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_l4.dport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_l4.sport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_l4.sport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.ip_proto", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_ipv4.ip_proto", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_IP_PROTO_TCP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "o_eth.smac", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_eth.smac", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 2, stingray, table: em.int_0 */ + { + .field_info_mask = { + .description = "spare", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "spare", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "local_cos", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "local_cos", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "o_l4.dport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_l4.dport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_DST_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_l4.sport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_l4.sport", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_TCP_SRC_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.ip_proto", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_ipv4.ip_proto", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_IP_PROTO_TCP, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_IPV4_DST_ADDR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "o_eth.smac", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "o_eth.smac", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 3, stingray, table: l2_cntxt_tcam.0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 3, stingray, table: l2_cntxt_tcam_cache.wr */ + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 4, stingray, table: l2_cntxt_tcam_bypass.vfr_0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 4, stingray, table: l2_cntxt_tcam_cache.rd */ + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 4, stingray, table: l2_cntxt_tcam.0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 4, stingray, table: l2_cntxt_tcam_cache.wr */ + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.egr0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 5, stingray, table: l2_cntxt_tcam_cache.wr_egr0 */ + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.dtagged_ing0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_NONE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.stagged_ing0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_TUN_HDR_TYPE_NONE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 6, stingray, table: l2_cntxt_tcam.egr */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 6, stingray, table: l2_cntxt_tcam_cache.egr_wr */ + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + /* class_tid: 6, stingray, table: l2_cntxt_tcam_bypass.ing */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "svif", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "sparif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "mac1_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tl2_num_vtags", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "tun_hdr_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "key_type", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }, + .field_info_spec = { + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + } +}; + +struct bnxt_ulp_mapper_field_info ulp_stingray_class_result_field_list[] = { + /* class_tid: 1, stingray, table: l2_cntxt_tcam.0 */ { .description = "l2_cntxt_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "prof_func_id", .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "parif", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -21101,1089 +5064,1117 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] { .description = "allowed_pri", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_pri", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_tpid", .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_tpid", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "bd_act_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "sp_rec_ptr", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "byp_sp_lkup", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pri_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "wc_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 18, stingray, table: profile_tcam_0 */ + /* class_tid: 1, stingray, table: profile_tcam.0 */ { .description = "wc_key_id", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "wc_profile_id", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "wc_search_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "em_key_mask", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x001b >> 8) & 0xff, - 0x001b & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + (0x007d >> 8) & 0xff, + 0x007d & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "em_key_id", .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "em_profile_id", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "em_search_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pl_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 18, stingray, table: wm_0 */ - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* class_tid: 1, stingray, table: profile_tcam_cache.wr */ { - .description = "act_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .description = "rid", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", + .description = "profile_tcam_index", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ - { .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "wc_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff, + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 19, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, { - .description = "wc_profile_id", + .description = "wm_profile_id", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "em_profile_id", + .description = "flow_sig_id", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 19, stingray, table: int_em_0 */ + /* class_tid: 1, stingray, table: eem.ext_0 */ { .description = "act_rec_ptr", .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "ext_flow_ctr", + .description = "ext_flow_cntr", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_EEM_EXT_FLOW_CNTR, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "act_rec_int", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "act_rec_size", .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_ACTION_REC_SIZE >> 8) & 0xff, + BNXT_ULP_RF_IDX_ACTION_REC_SIZE & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "key_size", .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x006d >> 8) & 0xff, - 0x006d & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + (0x00ad >> 8) & 0xff, + 0x00ad & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "reserved", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "strength", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l1_cacheable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "valid", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 19, stingray, table: ext_em_0 */ + /* class_tid: 1, stingray, table: em.int_0 */ { .description = "act_rec_ptr", .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "ext_flow_ctr", + .description = "ext_flow_cntr", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "act_rec_int", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "act_rec_size", .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "key_size", .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x006d >> 8) & 0xff, - 0x006d & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "reserved", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "strength", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l1_cacheable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "valid", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 20, stingray, table: l2_cntxt_tcam_0 */ + /* class_tid: 2, stingray, table: l2_cntxt_tcam.0 */ { .description = "l2_cntxt_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "prof_func_id", .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "parif", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, - .result_operand = { - (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, - BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "allowed_pri", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_pri", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_tpid", .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_tpid", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "bd_act_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "sp_rec_ptr", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "byp_sp_lkup", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pri_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 20, stingray, table: profile_tcam_0 */ + /* class_tid: 2, stingray, table: profile_tcam.0 */ { .description = "wc_key_id", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "wc_profile_id", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "wc_search_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "em_key_mask", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + (0x0079 >> 8) & 0xff, + 0x0079 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "em_key_id", .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "em_profile_id", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "em_search_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pl_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + /* class_tid: 2, stingray, table: profile_tcam_cache.wr */ + { + .description = "rid", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .description = "profile_tcam_index", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .description = "em_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .description = "wm_profile_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "flow_sig_id", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 20, stingray, table: ext_em_0 */ + /* class_tid: 2, stingray, table: eem.ext_0 */ { .description = "act_rec_ptr", .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "ext_flow_ctr", + .description = "ext_flow_cntr", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_EEM_EXT_FLOW_CNTR, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "act_rec_int", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "act_rec_size", .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_ACTION_REC_SIZE >> 8) & 0xff, + BNXT_ULP_RF_IDX_ACTION_REC_SIZE & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "key_size", .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + (0x00ad >> 8) & 0xff, + 0x00ad & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "reserved", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "strength", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l1_cacheable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "valid", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 20, stingray, table: int_em_0 */ + /* class_tid: 2, stingray, table: em.int_0 */ { .description = "act_rec_ptr", .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "ext_flow_ctr", + .description = "ext_flow_cntr", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "act_rec_int", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "act_rec_size", .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "key_size", .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "reserved", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "strength", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l1_cacheable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "valid", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ + /* class_tid: 3, stingray, table: int_full_act_record.0 */ { - .description = "l2_cntxt_id", + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "age_enable", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "agg_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "rate_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "flow_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_key", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_mir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_match", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "encap_ptr", + .field_bit_size = 11, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcp_dst_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "src_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcp_src_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "meter_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "l3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tl3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "l3_ttl_dec", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tl3_ttl_dec", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 21, stingray, table: l2_cntxt_tcam_0 */ + { + .description = "pop_vlan", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "meter", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "mirror", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "drop", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "hit", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "type", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + /* class_tid: 3, stingray, table: l2_cntxt_tcam.0 */ { .description = "l2_cntxt_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "prof_func_id", .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "parif", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, - .result_operand = { - (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, - BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "allowed_pri", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_pri", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_tpid", .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_tpid", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "bd_act_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "sp_rec_ptr", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "byp_sp_lkup", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pri_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 3, stingray, table: l2_cntxt_tcam_cache.wr */ { - .description = "em_profile_id", + .description = "rid", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + { + .description = "l2_cntxt_tcam_index", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 21, stingray, table: profile_tcam_0 */ { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "wc_profile_id", + .description = "src_property_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + /* class_tid: 3, stingray, table: parif_def_lkup_arec_ptr.0 */ + { + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + /* class_tid: 3, stingray, table: parif_def_arec_ptr.0 */ + { + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + /* class_tid: 3, stingray, table: parif_def_err_arec_ptr.0 */ + { + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + /* class_tid: 4, stingray, table: int_full_act_record.0 */ + { + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "age_enable", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "agg_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "rate_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "flow_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_key", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_mir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_match", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "encap_ptr", + .field_bit_size = 11, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcp_dst_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "src_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcp_src_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "meter_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "l3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tl3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "wc_search_en", + .description = "l3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "tl3_ttl_dec", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "decap_func", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_PHY_PORT_VPORT >> 8) & 0xff, + BNXT_ULP_CF_IDX_PHY_PORT_VPORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "em_search_en", + .description = "pop_vlan", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "pl_byp_lkup_en", + .description = "meter", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 21, stingray, table: ext_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "mirror", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "ext_flow_ctr", + .description = "drop", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_int", + .description = "hit", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "type", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* class_tid: 4, stingray, table: l2_cntxt_tcam_bypass.vfr_0 */ { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "act_record_ptr", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", + .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 21, stingray, table: int_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .description = "parif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "allowed_pri", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "default_pri", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "allowed_tpid", + .field_bit_size = 6, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "default_tpid", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + .description = "bd_act_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "sp_rec_ptr", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", + .description = "byp_sp_lkup", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "pri_anti_spoof_ctl", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tpid_anti_spoof_ctl", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 22, stingray, table: l2_cntxt_0 */ + /* class_tid: 4, stingray, table: l2_cntxt_tcam.0 */ { .description = "l2_cntxt_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "prof_func_id", .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "parif", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, - .result_operand = { - (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, - BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -22192,1539 +6183,1323 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[] { .description = "allowed_pri", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_pri", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_tpid", .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_tpid", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "bd_act_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "sp_rec_ptr", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "byp_sp_lkup", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pri_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 4, stingray, table: l2_cntxt_tcam_cache.wr */ { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .description = "rid", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 22, stingray, table: profile_tcam_0 */ { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "src_property_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* class_tid: 4, stingray, table: parif_def_lkup_arec_ptr.0 */ { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: parif_def_arec_ptr.0 */ { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 4, stingray, table: parif_def_err_arec_ptr.0 */ { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 5, stingray, table: int_vtag_encap_record.egr0 */ { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "ecv_tun_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "pl_byp_lkup_en", + .description = "ecv_l4_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "ecv_l3_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "ecv_l2_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 22, stingray, table: ext_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .description = "ecv_vtag_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_STINGRAY_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "ext_flow_ctr", + .description = "ecv_custom_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_int", + .description = "ecv_valid", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "vtag_tpid", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x81, 0x00} }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, + .description = "vtag_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, + BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "vtag_de", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "vtag_pcp", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l1_cacheable", + .description = "spare", + .field_bit_size = 80, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + /* class_tid: 5, stingray, table: int_full_act_record.egr0 */ + { + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "age_enable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", + .description = "agg_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 22, stingray, table: int_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .description = "rate_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "flow_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_key", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_mir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcpflags_match", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "encap_ptr", + .field_bit_size = 11, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "ext_flow_ctr", + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcp_dst_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "src_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcp_src_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "meter_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "l3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tl3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "l3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_int", + .description = "tl3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "decap_func", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + (BNXT_ULP_STINGRAY_SYM_LOOPBACK_PORT >> 8) & 0xff, + BNXT_ULP_STINGRAY_SYM_LOOPBACK_PORT & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "pop_vlan", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "strength", + .description = "meter", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "mirror", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l1_cacheable", + .description = "drop", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", + .description = "hit", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "type", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 23, stingray, table: l2_cntxt_tcam_0 */ + /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.egr0 */ { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "act_record_ptr", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "reserved", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "parif", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, - .result_operand = { - (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, - BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_pri", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_pri", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_tpid", .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_tpid", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "bd_act_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "sp_rec_ptr", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "byp_sp_lkup", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pri_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 5, stingray, table: l2_cntxt_tcam_cache.wr_egr0 */ { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .description = "rid", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 23, stingray, table: profile_tcam_0 */ { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "src_property_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* class_tid: 5, stingray, table: int_full_act_record.ing0 */ { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "age_enable", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "agg_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "em_search_en", + .description = "rate_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "pl_byp_lkup_en", + .description = "flow_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 23, stingray, table: ext_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "tcpflags_key", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "ext_flow_ctr", + .description = "tcpflags_mir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_int", + .description = "tcpflags_match", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "encap_ptr", + .field_bit_size = 11, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "tcp_dst_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "src_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "tcp_src_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", + .description = "meter_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "l3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 23, stingray, table: int_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "tl3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "ext_flow_ctr", + .description = "l3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_int", + .description = "tl3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "decap_func", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_VF_FUNC_VNIC >> 8) & 0xff, + BNXT_ULP_CF_IDX_VF_FUNC_VNIC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "pop_vlan", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "strength", + .description = "meter", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "mirror", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l1_cacheable", + .description = "drop", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", + .description = "hit", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "type", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.dtagged_ing0 */ { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + .description = "act_record_ptr", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { + .description = "reserved", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "parif", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, - .result_operand = { - (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, - BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_pri", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_pri", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_tpid", .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_tpid", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "bd_act_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "sp_rec_ptr", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, stingray, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0003 >> 8) & 0xff, - 0x0003 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 24, stingray, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "ext_flow_ctr", + .description = "byp_sp_lkup", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "pri_anti_spoof_ctl", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "tpid_anti_spoof_ctl", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* class_tid: 5, stingray, table: l2_cntxt_tcam_bypass.stagged_ing0 */ { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0061 >> 8) & 0xff, - 0x0061 & 0xff, + .description = "act_record_ptr", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l1_cacheable", + .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "parif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 24, stingray, table: int_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "allowed_pri", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "default_pri", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "allowed_tpid", + .field_bit_size = 6, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "default_tpid", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0061 >> 8) & 0xff, - 0x0061 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "bd_act_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "sp_rec_ptr", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + .description = "byp_sp_lkup", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "pri_anti_spoof_ctl", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "tpid_anti_spoof_ctl", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ + /* class_tid: 6, stingray, table: l2_cntxt_tcam.egr */ { .description = "l2_cntxt_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "prof_func_id", .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "l2_byp_lkup_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "parif", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, - .result_operand = { - (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, - BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_CF_IDX_LOOPBACK_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_LOOPBACK_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_VF_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_VF_FUNC_PARIF & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "allowed_pri", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_pri", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "allowed_tpid", .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "default_tpid", .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "bd_act_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "sp_rec_ptr", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "byp_sp_lkup", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pri_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tpid_anti_spoof_ctl", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 6, stingray, table: l2_cntxt_tcam_cache.egr_wr */ { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .description = "rid", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_RID >> 8) & 0xff, + BNXT_ULP_RF_IDX_RID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 25, stingray, table: profile_tcam_0 */ { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "l2_cntxt_tcam_index", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "l2_cntxt_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "src_property_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* class_tid: 6, stingray, table: parif_def_lkup_arec_ptr.egr */ { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0003 >> 8) & 0xff, - 0x0003 & 0xff, + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: parif_def_arec_ptr.egr */ { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: parif_def_err_arec_ptr.egr */ { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, + .description = "act_rec_ptr", + .field_bit_size = 32, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_GLB_REGFILE, + .field_operand = { + (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff, + BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, + /* class_tid: 6, stingray, table: int_full_act_record.ing */ { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "pl_byp_lkup_en", + .description = "age_enable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 25, stingray, table: ext_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "agg_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "ext_flow_ctr", + .description = "rate_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_int", + .description = "flow_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "tcpflags_key", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0061 >> 8) & 0xff, - 0x0061 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "tcpflags_mir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "reserved", + .description = "tcpflags_match", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "encap_ptr", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l1_cacheable", + .description = "tcp_dst_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "src_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tcp_src_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "meter_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "l3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", + .description = "tl3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 25, stingray, table: int_em_0 */ { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, + .description = "l3_ttl_dec", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "tl3_ttl_dec", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "decap_func", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { + (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "ext_flow_ctr", + .description = "pop_vlan", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_int", + .description = "meter", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "mirror", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0061 >> 8) & 0xff, - 0x0061 & 0xff, + .description = "drop", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "hit", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "type", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + /* class_tid: 6, stingray, table: l2_cntxt_tcam_bypass.ing */ + { + .description = "act_record_ptr", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff, + BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .description = "l2_byp_lkup_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "parif", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - } -}; - -struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[] = { - /* class_tid: 1, stingray, table: l2_cntxt_cache_0 */ + .description = "allowed_pri", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "default_pri", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 2, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "allowed_tpid", + .field_bit_size = 6, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "default_tpid", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "bd_act_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "sp_rec_ptr", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 4, stingray, table: egr_l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "byp_sp_lkup", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 6, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "pri_anti_spoof_ctl", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 6, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "tpid_anti_spoof_ctl", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 7, stingray, table: l2_cntxt_tcam_0 */ + /* class_tid: 7, stingray, table: int_full_act_record.0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "flow_cntr_ptr", + .field_bit_size = 14, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 7, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "age_enable", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 8, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "agg_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 8, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "rate_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 9, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "flow_cntr_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 9, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "tcpflags_key", + .field_bit_size = 8, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 10, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "tcpflags_mir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 10, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "tcpflags_match", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 11, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "encap_ptr", + .field_bit_size = 11, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 11, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "dst_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 12, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "tcp_dst_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 12, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "src_ip_ptr", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 13, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "tcp_src_port", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 13, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "meter_id", + .field_bit_size = 10, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 14, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "l3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 14, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "tl3_rdir", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 15, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "l3_ttl_dec", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 15, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "tl3_ttl_dec", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 16, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "decap_func", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 16, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "vnic_or_vport", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + (BNXT_ULP_STINGRAY_SYM_LOOPBACK_PORT >> 8) & 0xff, + BNXT_ULP_STINGRAY_SYM_LOOPBACK_PORT & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* class_tid: 17, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "pop_vlan", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 17, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "meter", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 18, stingray, table: l2_cntxt_tcam_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "mirror", + .field_bit_size = 2, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 18, stingray, table: profile_tcam_cache_0 */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "drop", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "hit", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* class_tid: 19, stingray, table: l2_cntxt_tcam_0 */ + { + .description = "type", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } +}; + +struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[] = { + /* class_tid: 1, stingray, table: l2_cntxt_tcam.0 */ { .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, - /* class_tid: 19, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 1, stingray, table: profile_tcam_cache.rd */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "flow_sig_id", + .regfile_idx = BNXT_ULP_RF_IDX_FLOW_SIG_ID, + .ident_bit_size = 8, + .ident_bit_pos = 58 }, { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0, + .description = "profile_tcam_index", + .regfile_idx = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, .ident_bit_size = 10, - .ident_bit_pos = 0 + .ident_bit_pos = 32 }, - /* class_tid: 20, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "em_profile_id", + .regfile_idx = BNXT_ULP_RF_IDX_EM_PROFILE_ID_0, + .ident_bit_size = 8, + .ident_bit_pos = 42 }, - /* class_tid: 20, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 1, stingray, table: profile_tcam.0 */ { .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .regfile_idx = BNXT_ULP_RF_IDX_EM_PROFILE_ID_0, + .ident_bit_size = 8, + .ident_bit_pos = 28 }, - /* class_tid: 21, stingray, table: l2_cntxt_cache_0 */ + /* class_tid: 2, stingray, table: l2_cntxt_tcam.0 */ { .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, - /* class_tid: 21, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 2, stingray, table: profile_tcam_cache.rd */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, + .description = "profile_tcam_index", + .regfile_idx = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, .ident_bit_size = 10, - .ident_bit_pos = 0 + .ident_bit_pos = 32 }, - /* class_tid: 22, stingray, table: l2_cntxt_cache_0 */ { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .description = "flow_sig_id", + .regfile_idx = BNXT_ULP_RF_IDX_FLOW_SIG_ID, + .ident_bit_size = 8, + .ident_bit_pos = 58 }, - /* class_tid: 22, stingray, table: profile_tcam_cache_0 */ { .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 - }, - /* class_tid: 23, stingray, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .regfile_idx = BNXT_ULP_RF_IDX_EM_PROFILE_ID_0, + .ident_bit_size = 8, + .ident_bit_pos = 42 }, - /* class_tid: 23, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 2, stingray, table: profile_tcam.0 */ { .description = "em_profile_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, - .ident_bit_size = 10, - .ident_bit_pos = 0 + .regfile_idx = BNXT_ULP_RF_IDX_EM_PROFILE_ID_0, + .ident_bit_size = 8, + .ident_bit_pos = 28 }, - /* class_tid: 24, stingray, table: l2_cntxt_tcam_0 */ + /* class_tid: 3, stingray, table: l2_cntxt_tcam.0 */ { .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, - /* class_tid: 24, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 4, stingray, table: l2_cntxt_tcam_cache.rd */ { - .description = "em_profile_id", - .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, + .description = "l2_cntxt_id", + .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0, .ident_bit_size = 10, - .ident_bit_pos = 0 + .ident_bit_pos = 42 }, - /* class_tid: 25, stingray, table: l2_cntxt_tcam_0 */ + /* class_tid: 4, stingray, table: l2_cntxt_tcam.0 */ { .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0, + .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 }, - /* class_tid: 25, stingray, table: profile_tcam_cache_0 */ + /* class_tid: 6, stingray, table: l2_cntxt_tcam.egr */ { - .description = "em_profile_id", + .description = "l2_cntxt_id", .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, - .ident_type = TF_IDENT_TYPE_EM_PROF, - .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0, + .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH, + .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0, .ident_bit_size = 10, .ident_bit_pos = 0 } diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c index bb48ad284a..30a71def95 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c @@ -3,574 +3,50 @@ * All rights reserved. */ -/* date: Thu Oct 15 17:28:37 2020 */ +/* date: Mon Nov 23 17:33:02 2020 */ #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" -#include "ulp_rte_parser.h" #include "ulp_template_db_tbl.h" -uint32_t ulp_act_prop_map_table[] = { - [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE, - [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] = - BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM, - [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] = - BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM, - [BNXT_ULP_ACT_PROP_IDX_PORT_ID] = - BNXT_ULP_ACT_PROP_SZ_PORT_ID, - [BNXT_ULP_ACT_PROP_IDX_VNIC] = - BNXT_ULP_ACT_PROP_SZ_VNIC, - [BNXT_ULP_ACT_PROP_IDX_VPORT] = - BNXT_ULP_ACT_PROP_SZ_VPORT, - [BNXT_ULP_ACT_PROP_IDX_MARK] = - BNXT_ULP_ACT_PROP_SZ_MARK, - [BNXT_ULP_ACT_PROP_IDX_COUNT] = - BNXT_ULP_ACT_PROP_SZ_COUNT, - [BNXT_ULP_ACT_PROP_IDX_METER] = - BNXT_ULP_ACT_PROP_SZ_METER, - [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] = - BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC, - [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] = - BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST, - [BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN] = - BNXT_ULP_ACT_PROP_SZ_PUSH_VLAN, - [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP] = - BNXT_ULP_ACT_PROP_SZ_SET_VLAN_PCP, - [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID] = - BNXT_ULP_ACT_PROP_SZ_SET_VLAN_VID, - [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] = - BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC, - [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] = - BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST, - [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] = - BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC, - [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] = - BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST, - [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] = - BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC, - [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] = - BNXT_ULP_ACT_PROP_SZ_SET_TP_DST, - [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] = - BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0, - [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] = - BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1, - [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] = - BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2, - [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] = - BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3, - [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] = - BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4, - [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] = - BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5, - [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] = - BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6, - [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] = - BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_IP, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP, - [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] = - BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN, - [BNXT_ULP_ACT_PROP_IDX_JUMP] = - BNXT_ULP_ACT_PROP_SZ_JUMP, - [BNXT_ULP_ACT_PROP_IDX_LAST] = - BNXT_ULP_ACT_PROP_SZ_LAST -}; - -uint8_t ulp_glb_field_tbl[211] = { - [0] = 0, - [1] = 0, - [2] = 0, - [3] = 0, - [4] = 0, - [5] = 0, - [6] = 0, - [7] = 0, - [8] = 0, - [9] = 0, - [10] = 0, - [11] = 0, - [12] = 0, - [13] = 0, - [14] = 0, - [15] = 0, - [16] = 0, - [17] = 0, - [18] = 0, - [19] = 0, - [20] = 0, - [21] = 0, - [22] = 0, - [23] = 0, - [24] = 0, - [25] = 0, - [26] = 0, - [27] = 0, - [28] = 0, - [29] = 0, - [30] = 0, - [31] = 0, - [32] = 0, - [33] = 0, - [34] = 0, - [35] = 0, - [36] = 0, - [37] = 0, - [38] = 0, - [39] = 0, - [40] = 0, - [41] = 0, - [42] = 0, - [43] = 0, - [44] = 0, - [45] = 0, - [46] = 0, - [47] = 0, - [48] = 0, - [49] = 0, - [50] = 0, - [51] = 0, - [52] = 0, - [53] = 0, - [54] = 0, - [55] = 0, - [56] = 0, - [57] = 0, - [58] = 0, - [59] = 0, - [60] = 0, - [61] = 0, - [62] = 0, - [63] = 0, - [64] = 0, - [65] = 0, - [66] = 0, - [67] = 0, - [68] = 0, - [69] = 0, - [70] = 0, - [71] = 0, - [72] = 0, - [73] = 0, - [74] = 0, - [75] = 0, - [76] = 0, - [77] = 0, - [78] = 0, - [79] = 0, - [80] = 0, - [81] = 0, - [82] = 0, - [83] = 0, - [84] = 0, - [85] = 0, - [86] = 0, - [87] = 0, - [88] = 0, - [89] = 0, - [90] = 0, - [91] = 0, - [92] = 0, - [93] = 0, - [94] = 0, - [95] = 0, - [96] = 0, - [97] = 0, - [98] = 0, - [99] = 0, - [100] = 0, - [101] = 0, - [102] = 0, - [103] = 0, - [104] = 0, - [105] = 0, - [106] = 0, - [107] = 0, - [108] = 0, - [109] = 0, - [110] = 0, - [111] = 0, - [112] = 0, - [113] = 0, - [114] = 0, - [115] = 0, - [116] = 0, - [117] = 0, - [118] = 0, - [119] = 0, - [120] = 0, - [121] = 0, - [122] = 0, - [123] = 0, - [124] = 0, - [125] = 0, - [126] = 0, - [127] = 0, - /* svif.index */ - [128] = 1, - /* o_eth.dmac */ - [129] = 2, - [130] = 0, - /* o_eth.smac */ - [131] = 3, - [132] = 0, - /* o_eth.type */ - [133] = 4, - [134] = 0, - /* o_ipv4.ver */ - [135] = 11, - [136] = 0, - /* o_ipv4.tos */ - [137] = 12, - [138] = 0, - /* o_ipv4.len */ - [139] = 13, - [140] = 0, - /* o_ipv4.frag_id */ - [141] = 14, - [142] = 0, - /* o_ipv4.frag_off */ - [143] = 15, - [144] = 0, - /* o_ipv4.ttl */ - [145] = 16, - [146] = 0, - /* o_ipv4.proto_id */ - [147] = 17, - [148] = 0, - /* o_ipv4.csum */ - [149] = 18, - [150] = 0, - /* o_ipv4.src_addr */ - [151] = 19, - [152] = 0, - /* o_ipv4.dst_addr */ - [153] = 20, - [154] = 0, - [155] = 0, - [156] = 0, - [157] = 0, - [158] = 0, - [159] = 0, - [160] = 0, - [161] = 0, - [162] = 0, - [163] = 0, - [164] = 0, - [165] = 0, - [166] = 0, - [167] = 0, - [168] = 0, - [169] = 0, - [170] = 0, - [171] = 0, - [172] = 0, - [173] = 0, - [174] = 0, - /* o_tcp.src_port */ - [175] = 21, - [176] = 0, - /* o_tcp.dst_port */ - [177] = 22, - [178] = 0, - /* o_tcp.sent_seq */ - [179] = 23, - [180] = 0, - /* o_tcp.recv_ack */ - [181] = 24, - [182] = 0, - /* o_tcp.data_off */ - [183] = 25, - [184] = 0, - /* o_tcp.tcp_flags */ - [185] = 26, - [186] = 0, - /* o_tcp.rx_win */ - [187] = 27, - [188] = 0, - /* o_tcp.csum */ - [189] = 28, - [190] = 0, - /* o_tcp.urp */ - [191] = 29, - [192] = 0, - [193] = 0, - [194] = 0, - [195] = 0, - [196] = 0, - [197] = 0, - [198] = 0, - [199] = 0, - [200] = 0, - /* oo_vlan.cfi_pri */ - [201] = 5, - /* oi_vlan.cfi_pri */ - [202] = 8, - [203] = 0, - [204] = 0, - /* oo_vlan.vid */ - [205] = 6, - /* oi_vlan.vid */ - [206] = 9, - [207] = 0, - [208] = 0, - /* oo_vlan.type */ - [209] = 7, - /* oi_vlan.type */ - [210] = 10 -}; - -/* - * This structure has to be indexed based on the rte_flow_action_type that is - * part of DPDK. The below array is list of parsing functions for each of the - * flow actions that are supported. - */ -struct bnxt_ulp_rte_act_info ulp_act_info[] = { - [RTE_FLOW_ACTION_TYPE_END] = { - .act_type = BNXT_ULP_ACT_TYPE_END, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_VOID] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_void_act_handler - }, - [RTE_FLOW_ACTION_TYPE_PASSTHRU] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_JUMP] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_jump_act_handler - }, - [RTE_FLOW_ACTION_TYPE_MARK] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_mark_act_handler - }, - [RTE_FLOW_ACTION_TYPE_FLAG] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_QUEUE] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_DROP] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_drop_act_handler - }, - [RTE_FLOW_ACTION_TYPE_COUNT] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_count_act_handler - }, - [RTE_FLOW_ACTION_TYPE_RSS] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_rss_act_handler - }, - [RTE_FLOW_ACTION_TYPE_PF] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_pf_act_handler - }, - [RTE_FLOW_ACTION_TYPE_VF] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_vf_act_handler - }, - [RTE_FLOW_ACTION_TYPE_PHY_PORT] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_phy_port_act_handler - }, - [RTE_FLOW_ACTION_TYPE_PORT_ID] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_port_id_act_handler - }, - [RTE_FLOW_ACTION_TYPE_METER] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_SECURITY] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_of_pop_vlan_act_handler - }, - [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_of_push_vlan_act_handler - }, - [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_of_set_vlan_vid_act_handler - }, - [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_of_set_vlan_pcp_act_handler - }, - [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_vxlan_encap_act_handler - }, - [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_vxlan_decap_act_handler - }, - [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_set_ipv4_src_act_handler - }, - [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_set_ipv4_dst_act_handler - }, - [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_set_tp_src_act_handler - }, - [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_set_tp_dst_act_handler - }, - [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_DEC_TTL] = { - .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, - .proto_act_func = ulp_rte_dec_ttl_act_handler - }, - [RTE_FLOW_ACTION_TYPE_SET_TTL] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - }, - [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = { - .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, - .proto_act_func = NULL - } -}; - -/* Specifies parameters for the generic tables */ +/* Specifies parameters for the cache and shared tables */ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM << 1 | - TF_DIR_RX] = { - .result_num_entries = 16384, - .result_byte_size = 6, - .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + BNXT_ULP_DIRECTION_INGRESS] = { + .result_num_entries = 16384, + .result_num_bytes = 16, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM << 1 | - TF_DIR_TX] = { - .result_num_entries = 16384, - .result_byte_size = 6, - .result_byte_order = BNXT_ULP_BYTE_ORDER_LE - + BNXT_ULP_DIRECTION_EGRESS] = { + .result_num_entries = 16384, + .result_num_bytes = 16, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM << 1 | - TF_DIR_RX] = { - .result_num_entries = 16384, - .result_byte_size = 6, - .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + BNXT_ULP_DIRECTION_INGRESS] = { + .result_num_entries = 16384, + .result_num_bytes = 16, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE }, [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM << 1 | - TF_DIR_TX] = { - .result_num_entries = 16384, - .result_byte_size = 6, - .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + BNXT_ULP_DIRECTION_EGRESS] = { + .result_num_entries = 16384, + .result_num_bytes = 16, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .result_num_entries = 16, + .result_num_bytes = 16, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .result_num_entries = 16, + .result_num_bytes = 16, + .result_byte_order = BNXT_ULP_BYTE_ORDER_LE } }; @@ -578,15 +54,27 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = { const struct bnxt_ulp_template_device_tbls ulp_template_stingray_tbls[] = { [BNXT_ULP_TEMPLATE_TYPE_CLASS] = { .tmpl_list = ulp_stingray_class_tmpl_list, + .tmpl_list_size = ULP_STINGRAY_CLASS_TMPL_LIST_SIZE, .tbl_list = ulp_stingray_class_tbl_list, - .key_field_list = ulp_stingray_class_key_field_list, + .tbl_list_size = ULP_STINGRAY_CLASS_TBL_LIST_SIZE, + .key_info_list = ulp_stingray_class_key_info_list, + .key_info_list_size = ULP_STINGRAY_CLASS_KEY_INFO_LIST_SIZE, + .ident_list = ulp_stingray_class_ident_list, + .ident_list_size = ULP_STINGRAY_CLASS_IDENT_LIST_SIZE, + .cond_list = ulp_stingray_class_cond_list, + .cond_list_size = ULP_STINGRAY_CLASS_COND_LIST_SIZE, .result_field_list = ulp_stingray_class_result_field_list, - .ident_list = ulp_stingray_class_ident_list + .result_field_list_size = ULP_STINGRAY_CLASS_RESULT_FIELD_LIST_SIZE }, [BNXT_ULP_TEMPLATE_TYPE_ACTION] = { .tmpl_list = ulp_stingray_act_tmpl_list, + .tmpl_list_size = ULP_STINGRAY_ACT_TMPL_LIST_SIZE, .tbl_list = ulp_stingray_act_tbl_list, - .result_field_list = ulp_stingray_act_result_field_list + .tbl_list_size = ULP_STINGRAY_ACT_TBL_LIST_SIZE, + .cond_list = ulp_stingray_act_cond_list, + .cond_list_size = ULP_STINGRAY_ACT_COND_LIST_SIZE, + .result_field_list = ulp_stingray_act_result_field_list, + .result_field_list_size = ULP_STINGRAY_ACT_RESULT_FIELD_LIST_SIZE } }; @@ -594,15 +82,27 @@ const struct bnxt_ulp_template_device_tbls ulp_template_stingray_tbls[] = { const struct bnxt_ulp_template_device_tbls ulp_template_wh_plus_tbls[] = { [BNXT_ULP_TEMPLATE_TYPE_CLASS] = { .tmpl_list = ulp_wh_plus_class_tmpl_list, + .tmpl_list_size = ULP_WH_PLUS_CLASS_TMPL_LIST_SIZE, .tbl_list = ulp_wh_plus_class_tbl_list, - .key_field_list = ulp_wh_plus_class_key_field_list, + .tbl_list_size = ULP_WH_PLUS_CLASS_TBL_LIST_SIZE, + .key_info_list = ulp_wh_plus_class_key_info_list, + .key_info_list_size = ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE, + .ident_list = ulp_wh_plus_class_ident_list, + .ident_list_size = ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE, + .cond_list = ulp_wh_plus_class_cond_list, + .cond_list_size = ULP_WH_PLUS_CLASS_COND_LIST_SIZE, .result_field_list = ulp_wh_plus_class_result_field_list, - .ident_list = ulp_wh_plus_class_ident_list + .result_field_list_size = ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE }, [BNXT_ULP_TEMPLATE_TYPE_ACTION] = { .tmpl_list = ulp_wh_plus_act_tmpl_list, + .tmpl_list_size = ULP_WH_PLUS_ACT_TMPL_LIST_SIZE, .tbl_list = ulp_wh_plus_act_tbl_list, - .result_field_list = ulp_wh_plus_act_result_field_list + .tbl_list_size = ULP_WH_PLUS_ACT_TBL_LIST_SIZE, + .cond_list = ulp_wh_plus_act_cond_list, + .cond_list_size = ULP_WH_PLUS_ACT_COND_LIST_SIZE, + .result_field_list = ulp_wh_plus_act_result_field_list, + .result_field_list_size = ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE } }; @@ -653,265 +153,237 @@ struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = { [0] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, .direction = TF_DIR_RX }, [1] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID, .direction = TF_DIR_TX }, [2] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, .direction = TF_DIR_TX }, [3] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, .direction = TF_DIR_RX }, [4] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID, .direction = TF_DIR_TX }, [5] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, .resource_type = TF_IDENT_TYPE_PROF_FUNC, - .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID, .direction = TF_DIR_RX }, [6] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, .direction = TF_DIR_RX }, [7] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR, + .glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR, .direction = TF_DIR_TX } }; -/* - * This table has to be indexed based on the rte_flow_item_type that is part of - * DPDK. The below array is list of parsing functions for each of the flow items - * that are supported. - */ -struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = { - [RTE_FLOW_ITEM_TYPE_END] = { - .hdr_type = BNXT_ULP_HDR_TYPE_END, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_VOID] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_void_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_INVERT] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ANY] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_PF] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_pf_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_VF] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_vf_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_PHY_PORT] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_phy_port_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_PORT_ID] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_port_id_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_RAW] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ETH] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_eth_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_VLAN] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_vlan_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_IPV4] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_ipv4_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_IPV6] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_ipv6_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_ICMP] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_UDP] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_udp_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_TCP] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_tcp_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_SCTP] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_VXLAN] = { - .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, - .proto_hdr_func = ulp_rte_vxlan_hdr_handler - }, - [RTE_FLOW_ITEM_TYPE_E_TAG] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_NVGRE] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_MPLS] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_GRE] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_FUZZY] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_GTP] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_GTPC] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_GTPU] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ESP] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_GENEVE] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ICMP6] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_MARK] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_META] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_GRE_KEY] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_GTP_PSC] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_PPPOES] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_PPPOED] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_NSH] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_IGMP] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_AH] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL - }, - [RTE_FLOW_ITEM_TYPE_HIGIG2] = { - .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, - .proto_hdr_func = NULL +/* Lists global action records */ +uint32_t ulp_glb_template_tbl[] = { + BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC +}; + +/* Provides act_bitmask */ +struct bnxt_ulp_shared_act_info ulp_shared_act_info[] = { + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL << 1 | + BNXT_ULP_DIRECTION_INGRESS] = { + .act_bitmask = BNXT_ULP_ACTION_BIT_SHARED_SAMPLE + }, + [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MIRROR_TBL << 1 | + BNXT_ULP_DIRECTION_EGRESS] = { + .act_bitmask = BNXT_ULP_ACTION_BIT_SHARED_SAMPLE } }; -/* - * The parser uses this table to map vtags_num to CFA encapsulation VTAG - * encoding. It then takes the result and stores it in act_prop[encap_vtag_type] - */ -uint32_t bnxt_ulp_encap_vtag_map[] = { - BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI +uint32_t ulp_act_prop_map_table[] = { + [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE, + [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] = + BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM, + [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] = + BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM, + [BNXT_ULP_ACT_PROP_IDX_PORT_ID] = + BNXT_ULP_ACT_PROP_SZ_PORT_ID, + [BNXT_ULP_ACT_PROP_IDX_VNIC] = + BNXT_ULP_ACT_PROP_SZ_VNIC, + [BNXT_ULP_ACT_PROP_IDX_VPORT] = + BNXT_ULP_ACT_PROP_SZ_VPORT, + [BNXT_ULP_ACT_PROP_IDX_MARK] = + BNXT_ULP_ACT_PROP_SZ_MARK, + [BNXT_ULP_ACT_PROP_IDX_COUNT] = + BNXT_ULP_ACT_PROP_SZ_COUNT, + [BNXT_ULP_ACT_PROP_IDX_METER] = + BNXT_ULP_ACT_PROP_SZ_METER, + [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] = + BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC, + [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] = + BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST, + [BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN] = + BNXT_ULP_ACT_PROP_SZ_PUSH_VLAN, + [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP] = + BNXT_ULP_ACT_PROP_SZ_SET_VLAN_PCP, + [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID] = + BNXT_ULP_ACT_PROP_SZ_SET_VLAN_VID, + [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] = + BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC, + [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] = + BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST, + [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] = + BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC, + [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] = + BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST, + [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] = + BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC, + [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] = + BNXT_ULP_ACT_PROP_SZ_SET_TP_DST, + [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] = + BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0, + [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] = + BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1, + [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] = + BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2, + [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] = + BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3, + [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] = + BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4, + [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] = + BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5, + [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] = + BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6, + [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] = + BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_IP, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP, + [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] = + BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN, + [BNXT_ULP_ACT_PROP_IDX_JUMP] = + BNXT_ULP_ACT_PROP_SZ_JUMP, + [BNXT_ULP_ACT_PROP_IDX_SHARED_HANDLE] = + BNXT_ULP_ACT_PROP_SZ_SHARED_HANDLE, + [BNXT_ULP_ACT_PROP_IDX_LAST] = + BNXT_ULP_ACT_PROP_SZ_LAST }; -/* Lists global action records */ -uint32_t ulp_glb_template_tbl[] = { - BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC +uint8_t ulp_glb_field_tbl[] = { + [2048] = 0, + [2049] = 1, + [2050] = 2, + [2052] = 3, + [2054] = 4, + [2056] = 5, + [2058] = 6, + [2060] = 7, + [2062] = 8, + [2064] = 9, + [2066] = 10, + [2068] = 11, + [2070] = 12, + [2072] = 13, + [2074] = 14, + [2102] = 15, + [2104] = 16, + [2106] = 17, + [2108] = 18, + [2110] = 19, + [2112] = 20, + [2114] = 21, + [2116] = 22, + [2118] = 23, + [2176] = 0, + [2177] = 1, + [2178] = 2, + [2180] = 3, + [2182] = 4, + [2184] = 8, + [2186] = 9, + [2188] = 10, + [2190] = 11, + [2192] = 12, + [2194] = 13, + [2196] = 14, + [2198] = 15, + [2200] = 16, + [2202] = 17, + [2230] = 18, + [2232] = 19, + [2234] = 20, + [2236] = 21, + [2238] = 22, + [2240] = 23, + [2242] = 24, + [2244] = 25, + [2246] = 26, + [2256] = 5, + [2260] = 6, + [2264] = 7, + [4352] = 0, + [4353] = 1, + [4354] = 2, + [4356] = 3, + [4358] = 4, + [4360] = 8, + [4362] = 9, + [4364] = 10, + [4366] = 11, + [4368] = 12, + [4370] = 13, + [4372] = 14, + [4374] = 15, + [4376] = 16, + [4378] = 17, + [4406] = 18, + [4408] = 19, + [4410] = 20, + [4412] = 21, + [4414] = 22, + [4416] = 23, + [4418] = 24, + [4420] = 25, + [4422] = 26, + [4432] = 5, + [4436] = 6, + [4440] = 7 }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h index 727818bede..befde44a1b 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h @@ -16,10 +16,10 @@ extern struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[]; extern struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[]; extern struct -bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[]; +bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[]; extern struct -bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[]; +bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[]; extern struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[]; @@ -28,7 +28,13 @@ extern struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[]; extern struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[]; extern struct -bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[]; +bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[]; + +extern struct +bnxt_ulp_mapper_cond_info ulp_wh_plus_class_cond_list[]; + +extern struct +bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[]; /* STINGRAY template table declarations */ extern struct bnxt_ulp_mapper_tmpl_info ulp_stingray_class_tmpl_list[]; @@ -36,10 +42,10 @@ extern struct bnxt_ulp_mapper_tmpl_info ulp_stingray_class_tmpl_list[]; extern struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[]; extern struct -bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[]; +bnxt_ulp_mapper_key_info ulp_stingray_class_key_info_list[]; extern struct -bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]; +bnxt_ulp_mapper_field_info ulp_stingray_class_result_field_list[]; extern struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[]; @@ -48,7 +54,13 @@ extern struct bnxt_ulp_mapper_tmpl_info ulp_stingray_act_tmpl_list[]; extern struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[]; extern struct -bnxt_ulp_mapper_result_field_info ulp_stingray_act_result_field_list[]; +bnxt_ulp_mapper_field_info ulp_stingray_act_result_field_list[]; + +extern struct +bnxt_ulp_mapper_cond_info ulp_stingray_class_cond_list[]; + +extern struct +bnxt_ulp_mapper_cond_info ulp_stingray_act_cond_list[]; extern uint8_t ulp_glb_field_tbl[]; #endif diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c index 40b1088325..32f36d1c88 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c @@ -3,3358 +3,242 @@ * All rights reserved. */ -/* date: Thu Oct 15 17:28:37 2020 */ +/* date: Wed Nov 18 12:19:40 2020 */ #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" -#include "ulp_rte_parser.h" +#include "ulp_template_db_tbl.h" /* Mapper templates for header act list */ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = { - /* act-ing-[dec_ttl, count, nat]:1 */ /* act_tid: 1, wh_plus, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 0 - }, - /* act-ing-[drop, pop_vlan, push_vlan, dec_ttl, count, vxlan_decap]:2 */ - /* act_tid: 2, wh_plus, ingress */ - [2] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 3, - .start_tbl_idx = 6 - }, - /* act-ing-[mark, rss, count, pop_vlan, vxlan_decap]:3 */ - /* act_tid: 3, wh_plus, ingress */ - [3] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 3, - .start_tbl_idx = 9 - }, - /* act_egr-[vxlan_encap, count]:4 */ - /* act_tid: 4, wh_plus, egress */ - [4] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 12 - }, - /* act-egr-[dec_ttl, count, nat]:5 */ - /* act_tid: 5, wh_plus, egress */ - [5] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 18 - }, - /* act-egr-[drop, push_vlan, dec_ttl, count]:6 */ - /* act_tid: 6, wh_plus, egress */ - [6] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 24 + .num_tbls = 4, + .start_tbl_idx = 0, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 0, + .cond_nums = 0 } } }; struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { - { /* act_tid: 1, wh_plus, table: int_flow_counter_tbl_0 */ + { /* act_tid: 1, wh_plus, table: int_flow_counter_tbl.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_STATS_64, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 0, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .result_start_idx = 0, .result_bit_size = 64, .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .encap_num_fields = 0 }, - { /* act_tid: 1, wh_plus, table: int_act_modify_ipv4_src_0 */ + { /* act_tid: 1, wh_plus, table: int_vtag_encap_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, + .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, .direction = TF_DIR_RX, - .result_start_idx = 1, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 1, + .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 - }, - { /* act_tid: 1, wh_plus, table: int_act_modify_ipv4_dst_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, - .direction = TF_DIR_RX, - .result_start_idx = 2, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, + .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 - }, - { /* act_tid: 1, wh_plus, table: int_encap_mac_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_RX, - .result_start_idx = 3, + .result_start_idx = 1, .result_bit_size = 0, .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, - .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR - }, - { /* act_tid: 1, wh_plus, table: ext_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .result_start_idx = 15, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .encap_num_fields = 12 }, - { /* act_tid: 1, wh_plus, table: int_full_act_record_0 */ + { /* act_tid: 1, wh_plus, table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .result_start_idx = 41, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 2, wh_plus, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_RX, - .result_start_idx = 67, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* act_tid: 2, wh_plus, table: ext_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .direction = TF_DIR_RX, - .result_start_idx = 68, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 2, wh_plus, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .result_start_idx = 94, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 3, wh_plus, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_RX, - .result_start_idx = 120, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* act_tid: 3, wh_plus, table: ext_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .result_start_idx = 121, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 3, wh_plus, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .result_start_idx = 147, + .result_start_idx = 13, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 4, wh_plus, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_TX, - .result_start_idx = 173, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* act_tid: 4, wh_plus, table: int_sp_smac_ipv4_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG, - .direction = TF_DIR_TX, - .result_start_idx = 174, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 3, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR - }, - { /* act_tid: 4, wh_plus, table: int_sp_smac_ipv6_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG, - .direction = TF_DIR_TX, - .result_start_idx = 177, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 3, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR - }, - { /* act_tid: 4, wh_plus, table: int_tun_encap_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_TX, - .result_start_idx = 180, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .encap_num_fields = 0 }, - { /* act_tid: 4, wh_plus, table: ext_full_act_record_0 */ + { /* act_tid: 1, wh_plus, table: ext_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_EXT, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .result_start_idx = 192, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 4, wh_plus, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .result_start_idx = 230, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 5, wh_plus, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_TX, - .result_start_idx = 256, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* act_tid: 5, wh_plus, table: int_act_modify_ipv4_src_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_SRC, - .direction = TF_DIR_TX, - .result_start_idx = 257, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 - }, - { /* act_tid: 5, wh_plus, table: int_act_modify_ipv4_dst_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_MODIFY_IPV4, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_SET_IPV4_DST, - .direction = TF_DIR_TX, - .result_start_idx = 258, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 - }, - { /* act_tid: 5, wh_plus, table: int_encap_mac_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .result_start_idx = 259, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, - .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR - }, - { /* act_tid: 5, wh_plus, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .result_start_idx = 271, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 5, wh_plus, table: ext_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .result_start_idx = 297, + .result_start_idx = 39, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 11, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 6, wh_plus, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT, + .encap_num_fields = 0 + } +}; + +struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = { + { .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_TX, - .result_start_idx = 334, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 + .cond_operand = BNXT_ULP_ACTION_BIT_COUNT }, - { /* act_tid: 6, wh_plus, table: int_vtag_encap_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, + { .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, - .direction = TF_DIR_TX, - .result_start_idx = 335, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 - }, - { /* act_tid: 6, wh_plus, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .result_start_idx = 347, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 6, wh_plus, table: ext_full_act_record_no_tag_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, - .direction = TF_DIR_TX, - .result_start_idx = 373, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* act_tid: 6, wh_plus, table: ext_full_act_record_one_tag_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_EXT, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN, - .direction = TF_DIR_TX, - .result_start_idx = 399, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 11, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .cond_operand = BNXT_ULP_ACTION_BIT_PUSH_VLAN } }; - -struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { - /* act_tid: 1, wh_plus, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 1, wh_plus, table: int_act_modify_ipv4_src_0 */ - { - .description = "ipv4_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 1, wh_plus, table: int_act_modify_ipv4_dst_0 */ - { - .description = "ipv4_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 1, wh_plus, table: int_encap_mac_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L2_EN_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "spare", - .field_bit_size = 80, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 1, wh_plus, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 1, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 2, wh_plus, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 2, wh_plus, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 2, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 3, wh_plus, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 3, wh_plus, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 3, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 4, wh_plus, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 4, wh_plus, table: int_sp_smac_ipv4_0 */ - { - .description = "smac", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 4, wh_plus, table: int_sp_smac_ipv6_0 */ - { - .description = "smac", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 4, wh_plus, table: int_tun_encap_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_l2_dmac", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_vtag", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_ip", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_udp", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_tun", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 4, wh_plus, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_l2_dmac", - .field_bit_size = 48, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_vtag", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_ip", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_udp", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "encap_tun", - .field_bit_size = 0, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff, - (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 4, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 5, wh_plus, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 5, wh_plus, table: int_act_modify_ipv4_src_0 */ - { - .description = "ipv4_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 5, wh_plus, table: int_act_modify_ipv4_dst_0 */ - { - .description = "ipv4_addr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* act_tid: 5, wh_plus, table: int_encap_mac_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L2_EN_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "spare", - .field_bit_size = 80, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 5, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 5, wh_plus, table: ext_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = { - (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST, - .result_operand = { - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff, - ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff, - (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_true = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .result_operand_false = {0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_L2_EN_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 6, wh_plus, table: int_flow_counter_tbl_0 */ - { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 6, wh_plus, table: int_vtag_encap_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "spare", - .field_bit_size = 80, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* act_tid: 6, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_COUNT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, + +struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { + /* act_tid: 1, wh_plus, table: int_flow_counter_tbl.0 */ { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "count", + .field_bit_size = 64, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, + /* act_tid: 1, wh_plus, table: int_vtag_encap_record.0 */ { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_tun_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_l4_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_l3_type", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_l2_en", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "ecv_vtag_type", + .field_bit_size = 4, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_CONSTANT, + .field_operand = { + BNXT_ULP_WH_PLUS_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "tl3_rdir", + .description = "ecv_custom_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "l3_ttl_dec", + .description = "ecv_valid", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, - BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, + .description = "vtag_tpid", + .field_bit_size = 16, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", + .description = "vtag_vid", .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", + .description = "vtag_de", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 32) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 24) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 16) & 0xff, - ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff, - (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "vtag_pcp", + .field_bit_size = 3, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .description = "spare", + .field_bit_size = 80, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, - /* act_tid: 6, wh_plus, table: ext_full_act_record_no_tag_0 */ + /* act_tid: 1, wh_plus, table: int_full_act_record.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "age_enable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "agg_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "rate_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "flow_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, @@ -3366,75 +250,110 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { - .description = "flow_cntr_ext", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { .description = "tcpflags_key", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_mir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_match", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "encap_ptr", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "dst_ip_ptr", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "tcp_dst_port", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "src_ip_ptr", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "tcp_src_port", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "meter_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tl3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -3443,8 +362,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -3453,38 +372,60 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "vnic_or_vport", .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pop_vlan", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "meter", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "mirror", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "drop", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, @@ -3495,37 +436,47 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, - /* act_tid: 6, wh_plus, table: ext_full_act_record_one_tag_0 */ + { + .description = "hit", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + { + .description = "type", + .field_bit_size = 1, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + /* act_tid: 1, wh_plus, table: ext_full_act_record.0 */ { .description = "flow_cntr_ptr", .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "age_enable", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "agg_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "rate_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "flow_cntr_en", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_COUNT >> 40) & 0xff, @@ -3539,73 +490,113 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ext", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_key", .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_mir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tcpflags_match", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "encap_ptr", .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "encap_rec_int", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "dst_ip_ptr", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "tcp_dst_port", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_DST & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_DST >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_DST & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "src_ip_ptr", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_REGFILE, + .field_operand = { + (BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 >> 8) & 0xff, + BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0 & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "tcp_src_port", .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_SET_TP_SRC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = { + (BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "meter_id", .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "tl3_rdir", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "l3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_ACT_DEC_TTL >> 8) & 0xff, BNXT_ULP_CF_IDX_ACT_DEC_TTL & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -3614,8 +605,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_COMP_FIELD, + .field_operand = { (BNXT_ULP_CF_IDX_ACT_T_DEC_TTL >> 8) & 0xff, BNXT_ULP_CF_IDX_ACT_T_DEC_TTL & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -3624,23 +615,35 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, + .field_operand = { + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .field_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "vnic_or_vport", .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_PROP, + .field_operand = { + (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff, + BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .description = "pop_vlan", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_POP_VLAN >> 40) & 0xff, @@ -3654,18 +657,18 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "meter", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "mirror", .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO }, { .description = "drop", .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT, - .result_operand = { + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ACT_BIT, + .field_operand = { ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 56) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 48) & 0xff, ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 40) & 0xff, @@ -3675,81 +678,5 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_act_result_field_list[] = { ((uint64_t)BNXT_ULP_ACTION_BIT_DROP >> 8) & 0xff, (uint64_t)BNXT_ULP_ACTION_BIT_DROP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP, - .result_operand = { - (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff, - BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} } }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c index a4a435cc6f..e870628927 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c @@ -3,21189 +3,5059 @@ * All rights reserved. */ -/* date: Thu Oct 15 17:28:37 2020 */ +/* date: Mon Nov 23 17:33:02 2020 */ #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" #include "ulp_template_struct.h" -#include "ulp_rte_parser.h" +#include "ulp_template_db_tbl.h" /* Mapper templates for header class list */ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = { - /* default-vfr-[port_to_vs]:1 */ /* class_tid: 1, wh_plus, ingress */ [1] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, .num_tbls = 6, - .start_tbl_idx = 0 + .start_tbl_idx = 0, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 0, + .cond_nums = 0 } }, - /* default-vfr-[vs_to_port]:2 */ - /* class_tid: 2, wh_plus, egress */ + /* class_tid: 2, wh_plus, ingress */ [2] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 7, - .start_tbl_idx = 6 + .num_tbls = 6, + .start_tbl_idx = 6, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 2, + .cond_nums = 0 } }, - /* default-vfr-[vfrep_to_vf]:3 */ - /* class_tid: 3, wh_plus, egress */ + /* class_tid: 3, wh_plus, ingress */ [3] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 7, - .start_tbl_idx = 13 + .num_tbls = 6, + .start_tbl_idx = 12, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 4, + .cond_nums = 0 } }, - /* default-vfr-[vf_to_vfrep]:4 */ /* class_tid: 4, wh_plus, egress */ [4] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 7, - .start_tbl_idx = 20 + .num_tbls = 8, + .start_tbl_idx = 18, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 4, + .cond_nums = 0 } }, - /* default-egr-[loopback_action_rec]:5 */ /* class_tid: 5, wh_plus, egress */ [5] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 1, - .start_tbl_idx = 27 + .num_tbls = 7, + .start_tbl_idx = 26, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 10, + .cond_nums = 0 } }, - /* class-ing-em-[eth, (vlan), ipv4]-[smac, dmac, (vid)]:6 */ - /* class_tid: 6, wh_plus, ingress */ + /* class_tid: 6, wh_plus, egress */ [6] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 28 + .num_tbls = 7, + .start_tbl_idx = 33, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 10, + .cond_nums = 0 } }, - /* class-ing-em-[eth, (vlan), ipv6]-[smac, dmac, (vid)]:7 */ - /* class_tid: 7, wh_plus, ingress */ + /* class_tid: 7, wh_plus, egress */ [7] = { .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 33 - }, - /* class-ing-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:8 */ - /* class_tid: 8, wh_plus, ingress */ - [8] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 38 - }, - /* class-ing-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:9 */ - /* class_tid: 9, wh_plus, ingress */ - [9] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 44 - }, - /* class-ing-em-[eth,ipv6, udp]-[sip, dip, sp, dp]:10 */ - /* class_tid: 10, wh_plus, ingress */ - [10] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 50 - }, - /* class-ing-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:11 */ - /* class_tid: 11, wh_plus, ingress */ - [11] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 56 - }, - /* class-ing-em-[eth, (vlan), ipv4, udp]-[dmac, (vid), sip, dip, sp, dp]:12 */ - /* class_tid: 12, wh_plus, ingress */ - [12] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 62 - }, - /* class-ing-em-[eth, (vlan), ipv4, tcp]-[dmac, (vid), sip, dip, sp, dp]:13 */ - /* class_tid: 13, wh_plus, ingress */ - [13] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 67 + .num_tbls = 1, + .start_tbl_idx = 40, + .reject_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, + .cond_start_idx = 10, + .cond_nums = 0 } + } +}; + +struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { + { /* class_tid: 1, wh_plus, table: l2_cntxt_tcam.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 0, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .key_start_idx = 0, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 0, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 0, + .ident_nums = 1 }, - /* class-ing-em-[eth, (vlan), ipv6, udp]-[dmac, (vid), sip, dip, sp, dp]:14 */ - /* class_tid: 14, wh_plus, ingress */ - [14] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 72 + { /* class_tid: 1, wh_plus, table: profile_tcam_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 0, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 13, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .ident_start_idx = 1, + .ident_nums = 3 }, - /* class-ing-em-[eth, (vlan), ipv6, tcp]-[dmac, (vid), sip, dip, sp, dp]:15 */ - /* class_tid: 15, wh_plus, ingress */ - [15] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 77 + { /* class_tid: 1, wh_plus, table: profile_tcam.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 0, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 16, + .blob_key_bit_size = 81, + .key_bit_size = 81, + .key_num_fields = 43, + .result_start_idx = 13, + .result_bit_size = 38, + .result_num_fields = 8, + .encap_num_fields = 0, + .ident_start_idx = 4, + .ident_nums = 1 }, - /* class-ing-em-[eth, (vlan), ipv4, udp, vxlan]-[dmac, (vid), dip, dp]:16 */ - /* class_tid: 16, wh_plus, ingress */ - [16] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 82 + { /* class_tid: 1, wh_plus, table: profile_tcam_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 1, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 59, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .result_start_idx = 21, + .result_bit_size = 66, + .result_num_fields = 5, + .encap_num_fields = 0 }, - /* class-ing-em-[eth, (vlan), ipv6, udp, vxlan]-[t_dmac, (vid), t_dip, t_dp]:17 */ - /* class_tid: 17, wh_plus, ingress */ - [17] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 87 + { /* class_tid: 1, wh_plus, table: eem.ext_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, + .resource_type = TF_MEM_EXTERNAL, + .direction = TF_DIR_RX, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .key_start_idx = 62, + .blob_key_bit_size = 448, + .key_bit_size = 448, + .key_num_fields = 10, + .result_start_idx = 26, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0 }, - /* class-ing-em-f1-[eth, ipv4, udp, vxlan]-[t_dmac]:18 */ - /* class_tid: 18, wh_plus, ingress */ - [18] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 92 + { /* class_tid: 1, wh_plus, table: em.int_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, + .resource_type = TF_MEM_INTERNAL, + .direction = TF_DIR_RX, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .key_start_idx = 72, + .blob_key_bit_size = 176, + .key_bit_size = 176, + .key_num_fields = 10, + .result_start_idx = 35, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0 }, - /* class-ing-em-f2-[ipv4, udp, vxlan]-[vni, i_dmac]:19 */ - /* class_tid: 19, wh_plus, ingress */ - [19] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 97 + { /* class_tid: 2, wh_plus, table: l2_cntxt_tcam.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .key_start_idx = 82, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 44, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 5, + .ident_nums = 1 }, - /* class-egr-em-[eth, ipv4, udp]-[sip, dip, sp, dp]:20 */ - /* class_tid: 20, wh_plus, egress */ - [20] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 102 + { /* class_tid: 2, wh_plus, table: profile_tcam_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 2, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 95, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .ident_start_idx = 6, + .ident_nums = 3 }, - /* class-egr-em-[eth, ipv4, tcp]-[sip, dip, sp, dp]:21 */ - /* class_tid: 21, wh_plus, egress */ - [21] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 108 + { /* class_tid: 2, wh_plus, table: profile_tcam.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 2, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 98, + .blob_key_bit_size = 81, + .key_bit_size = 81, + .key_num_fields = 43, + .result_start_idx = 57, + .result_bit_size = 38, + .result_num_fields = 8, + .encap_num_fields = 0, + .ident_start_idx = 9, + .ident_nums = 1 }, - /* class-egr-em-[eth-ipv6-udp]-[sip-dip-sp-dp]:22 */ - /* class_tid: 22, wh_plus, egress */ - [22] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 114 + { /* class_tid: 2, wh_plus, table: profile_tcam_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 3, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 141, + .blob_key_bit_size = 14, + .key_bit_size = 14, + .key_num_fields = 3, + .result_start_idx = 65, + .result_bit_size = 66, + .result_num_fields = 5, + .encap_num_fields = 0 }, - /* class-egr-em-[eth, ipv6, tcp]-[sip, dip, sp, dp]:23 */ - /* class_tid: 23, wh_plus, egress */ - [23] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 6, - .start_tbl_idx = 120 + { /* class_tid: 2, wh_plus, table: eem.ext_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, + .resource_type = TF_MEM_EXTERNAL, + .direction = TF_DIR_RX, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .key_start_idx = 144, + .blob_key_bit_size = 448, + .key_bit_size = 448, + .key_num_fields = 10, + .result_start_idx = 70, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0 }, - /* class-egr-em-[eth, (vlan), ipv4]-[smac, dmac, type]:24 */ - /* class_tid: 24, wh_plus, egress */ - [24] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 126 + { /* class_tid: 2, wh_plus, table: em.int_0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, + .resource_type = TF_MEM_INTERNAL, + .direction = TF_DIR_RX, + .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, + .key_start_idx = 154, + .blob_key_bit_size = 176, + .key_bit_size = 176, + .key_num_fields = 10, + .result_start_idx = 79, + .result_bit_size = 64, + .result_num_fields = 9, + .encap_num_fields = 0 }, - /* class-egr-em-[eth, (vlan), ipv6]-[smac, dmac, type]:25 */ - /* class_tid: 25, wh_plus, egress */ - [25] = { - .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS, - .num_tbls = 5, - .start_tbl_idx = 131 - } -}; - -struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { - { /* class_tid: 1, wh_plus, table: int_full_act_record_0 */ + { /* class_tid: 3, wh_plus, table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .result_start_idx = 0, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 88, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* class_tid: 1, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 0, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 26, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 0, - .ident_nums = 1 + .encap_num_fields = 0 }, - { /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_0 */ + { /* class_tid: 3, wh_plus, table: l2_cntxt_tcam.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 1, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 164, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 27, + .result_start_idx = 114, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 1, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + .ident_start_idx = 10, + .ident_nums = 1 + }, + { /* class_tid: 3, wh_plus, table: l2_cntxt_tcam_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 177, + .blob_key_bit_size = 8, + .key_bit_size = 8, + .key_num_fields = 1, + .result_start_idx = 127, + .result_bit_size = 62, + .result_num_fields = 4, + .encap_num_fields = 0 }, - { /* class_tid: 1, wh_plus, table: parif_def_lkup_arec_ptr_0 */ + { /* class_tid: 3, wh_plus, table: parif_def_lkup_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_RX, - .result_start_idx = 40, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 131, + .result_bit_size = 32, + .result_num_fields = 1, + .encap_num_fields = 0 }, - { /* class_tid: 1, wh_plus, table: parif_def_arec_ptr_0 */ + { /* class_tid: 3, wh_plus, table: parif_def_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_RX, - .result_start_idx = 41, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 132, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 1, wh_plus, table: parif_def_err_arec_ptr_0 */ + { /* class_tid: 3, wh_plus, table: parif_def_err_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_RX, - .result_start_idx = 42, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 133, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 2, wh_plus, table: int_full_act_record_0 */ + { /* class_tid: 4, wh_plus, table: int_full_act_record.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .result_start_idx = 43, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 4, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 134, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .encap_num_fields = 0 }, - { /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_vfr_0 */ + { /* class_tid: 4, wh_plus, table: l2_cntxt_tcam_bypass.vfr_0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, - .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 4, + .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 14, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 178, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 69, + .result_start_idx = 160, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 1, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + .ident_start_idx = 11, + .ident_nums = 0 }, - { /* class_tid: 2, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, + { /* class_tid: 4, wh_plus, table: l2_cntxt_tcam_cache.rd */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, - .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 27, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 5, + .cond_nums = 1 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 191, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 82, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 1, + .ident_start_idx = 11, .ident_nums = 1 }, - { /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_0 */ + { /* class_tid: 4, wh_plus, table: l2_cntxt_tcam.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, - .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE, .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 6, + .cond_nums = 2 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 28, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 192, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 83, + .result_start_idx = 173, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + .ident_start_idx = 12, + .ident_nums = 1 + }, + { /* class_tid: 4, wh_plus, table: l2_cntxt_tcam_cache.wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, + .cond_start_idx = 8, + .cond_nums = 2 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 205, + .blob_key_bit_size = 8, + .key_bit_size = 8, + .key_num_fields = 1, + .result_start_idx = 186, + .result_bit_size = 62, + .result_num_fields = 4, + .encap_num_fields = 0 }, - { /* class_tid: 2, wh_plus, table: parif_def_lkup_arec_ptr_0 */ + { /* class_tid: 4, wh_plus, table: parif_def_lkup_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, - .result_start_idx = 96, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 190, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 2, wh_plus, table: parif_def_arec_ptr_0 */ + { /* class_tid: 4, wh_plus, table: parif_def_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, .direction = TF_DIR_TX, - .result_start_idx = 97, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 191, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 2, wh_plus, table: parif_def_err_arec_ptr_0 */ + { /* class_tid: 4, wh_plus, table: parif_def_err_arec_ptr.0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, .direction = TF_DIR_TX, - .result_start_idx = 98, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 192, .result_bit_size = 32, .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, - .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF + .encap_num_fields = 0 }, - { /* class_tid: 3, wh_plus, table: egr_int_vtag_encap_record_0 */ + { /* class_tid: 5, wh_plus, table: int_vtag_encap_record.egr0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_TX, - .result_start_idx = 99, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 193, .result_bit_size = 0, .result_num_fields = 0, - .encap_num_fields = 12, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 + .encap_num_fields = 12 }, - { /* class_tid: 3, wh_plus, table: egr_int_full_act_record_0 */ + { /* class_tid: 5, wh_plus, table: int_full_act_record.egr0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, .direction = TF_DIR_TX, - .result_start_idx = 111, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 205, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR + .encap_num_fields = 0 }, - { /* class_tid: 3, wh_plus, table: egr_l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 41, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 137, - .result_bit_size = 0, - .result_num_fields = 0, - .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0 - }, - { /* class_tid: 3, wh_plus, table: egr_l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + { /* class_tid: 5, wh_plus, table: l2_cntxt_tcam_bypass.egr0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 42, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 137, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 3, wh_plus, table: ing_int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, - .direction = TF_DIR_RX, - .result_start_idx = 150, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* class_tid: 3, wh_plus, table: ing_l2_cntxt_dtagged_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 55, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 176, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 3, wh_plus, table: ing_l2_cntxt_stagged_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 68, + .key_start_idx = 206, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 189, + .result_start_idx = 231, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO + .ident_start_idx = 13, + .ident_nums = 0 }, - { /* class_tid: 4, wh_plus, table: egr_l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, + { /* class_tid: 5, wh_plus, table: l2_cntxt_tcam_cache.wr_egr0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, .direction = TF_DIR_TX, - .key_start_idx = 81, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 219, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, - .result_start_idx = 202, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 2, - .ident_nums = 1 - }, - { /* class_tid: 4, wh_plus, table: egr_l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 82, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 203, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 3, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 4, wh_plus, table: egr_parif_def_lkup_arec_ptr_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, - .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, - .direction = TF_DIR_TX, - .result_start_idx = 216, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, - .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF - }, - { /* class_tid: 4, wh_plus, table: egr_parif_def_arec_ptr_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, - .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, - .direction = TF_DIR_TX, - .result_start_idx = 217, - .result_bit_size = 32, - .result_num_fields = 1, - .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, - .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF - }, - { /* class_tid: 4, wh_plus, table: egr_parif_def_err_arec_ptr_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, - .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, - .direction = TF_DIR_TX, - .result_start_idx = 218, - .result_bit_size = 32, - .result_num_fields = 1, + .result_start_idx = 244, + .result_bit_size = 62, + .result_num_fields = 4, .encap_num_fields = 0, - .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, - .tbl_operand = BNXT_ULP_SYM_VF_FUNC_PARIF + .ident_start_idx = 13, + .ident_nums = 0 }, - { /* class_tid: 4, wh_plus, table: ing_int_full_act_record_0 */ + { /* class_tid: 5, wh_plus, table: int_full_act_record.ing0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, .resource_sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, .direction = TF_DIR_RX, - .result_start_idx = 219, - .result_bit_size = 128, - .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR - }, - { /* class_tid: 4, wh_plus, table: ing_l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 95, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 245, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 3, - .ident_nums = 0, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 5, wh_plus, table: int_full_act_record_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, - .direction = TF_DIR_TX, - .result_start_idx = 258, + .result_start_idx = 248, .result_bit_size = 128, .result_num_fields = 26, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, - .tbl_operand = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR, - .fdb_opcode = BNXT_ULP_FDB_OPC_NOP + .encap_num_fields = 0 }, - { /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_0 */ + { /* class_tid: 5, wh_plus, table: l2_cntxt_tcam_bypass.dtagged_ing0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 108, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 220, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 284, + .result_start_idx = 274, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 3, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 6, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 121, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 297, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 4, - .ident_nums = 1 - }, - { /* class_tid: 6, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 1, - .key_start_idx = 124, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 298, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 6, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 167, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 306, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 6, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 178, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 315, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES + .ident_start_idx = 13, + .ident_nums = 0 }, - { /* class_tid: 7, wh_plus, table: l2_cntxt_tcam_0 */ + { /* class_tid: 5, wh_plus, table: l2_cntxt_tcam_bypass.stagged_ing0 */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 189, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 233, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 324, + .result_start_idx = 287, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 5, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 7, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 202, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 337, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 6, - .ident_nums = 1 - }, - { /* class_tid: 7, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 1, - .key_start_idx = 205, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 338, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 7, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 7, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 248, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 346, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 7, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 7, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 259, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 355, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 7, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 8, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 270, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 364, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 7, - .ident_nums = 1 + .ident_start_idx = 13, + .ident_nums = 0 }, - { /* class_tid: 8, wh_plus, table: l2_cntxt_tcam_0 */ + { /* class_tid: 6, wh_plus, table: l2_cntxt_tcam.egr */ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE, + .fdb_operand = BNXT_ULP_RF_IDX_RID, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 271, + .key_start_idx = 246, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, - .result_start_idx = 365, + .result_start_idx = 300, .result_bit_size = 64, .result_num_fields = 13, .encap_num_fields = 0, - .ident_start_idx = 8, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 8, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 284, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 378, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 8, + .ident_start_idx = 13, .ident_nums = 1 }, - { /* class_tid: 8, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 287, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 379, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 9, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 8, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 330, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 387, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 9, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 8, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 341, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 396, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 9, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 9, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 352, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 405, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 9, - .ident_nums = 1 - }, - { /* class_tid: 9, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 353, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 406, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 10, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 9, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 366, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 419, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 10, - .ident_nums = 1 - }, - { /* class_tid: 9, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 369, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 420, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 11, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 9, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 412, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 428, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 11, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 9, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 423, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 437, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 11, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 10, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 434, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 446, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 11, - .ident_nums = 1 - }, - { /* class_tid: 10, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 435, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 447, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 12, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 10, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 448, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 460, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 12, - .ident_nums = 1 - }, - { /* class_tid: 10, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 451, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 461, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 10, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 494, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 469, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 10, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 505, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 478, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 11, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 516, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 487, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 13, - .ident_nums = 1 - }, - { /* class_tid: 11, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 517, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 488, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 14, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 11, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 530, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 501, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 14, - .ident_nums = 1 - }, - { /* class_tid: 11, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 533, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 502, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 15, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 11, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 576, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 510, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 15, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 11, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 587, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 519, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 15, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 12, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 598, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 528, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 15, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 12, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 611, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 541, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 16, - .ident_nums = 1 - }, - { /* class_tid: 12, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 614, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 542, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 17, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 12, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 657, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 550, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 17, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 12, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 668, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 559, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 17, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 13, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 679, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 568, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 17, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 13, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 692, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 581, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 18, - .ident_nums = 1 - }, - { /* class_tid: 13, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 695, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 582, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 19, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 13, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 738, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 590, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 19, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 13, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 749, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 599, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 19, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 14, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 760, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 608, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 19, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 14, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 773, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 621, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 20, - .ident_nums = 1 - }, - { /* class_tid: 14, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 776, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 622, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 21, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 14, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 819, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 630, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 21, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 14, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 830, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 639, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 21, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 15, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 841, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 648, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 21, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 15, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 854, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 661, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 22, - .ident_nums = 1 - }, - { /* class_tid: 15, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 857, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 662, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 23, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 15, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 900, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 670, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 23, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 15, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 911, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 679, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 23, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 16, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 922, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 688, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 23, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 16, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 935, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 701, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 24, - .ident_nums = 1 - }, - { /* class_tid: 16, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 938, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 702, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 16, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 981, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 710, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 16, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 992, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 719, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 17, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1003, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 728, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 25, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 17, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 1016, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 741, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 26, - .ident_nums = 1 - }, - { /* class_tid: 17, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1019, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 742, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 27, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 17, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 1062, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 750, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 27, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 17, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 1073, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 759, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 27, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 18, wh_plus, table: int_flow_counter_tbl_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, - .resource_type = TF_TBL_TYPE_ACT_STATS_64, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_INT_COUNT_ACC, - .cond_opcode = BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET, - .cond_operand = BNXT_ULP_ACTION_BIT_COUNT, - .direction = TF_DIR_RX, - .result_start_idx = 768, - .result_bit_size = 64, - .result_num_fields = 1, - .encap_num_fields = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 - }, - { /* class_tid: 18, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1084, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 769, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 27, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 18, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 1097, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 782, - .result_bit_size = 20, - .result_num_fields = 2, - .encap_num_fields = 0, - .ident_start_idx = 28, - .ident_nums = 2 - }, - { /* class_tid: 18, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1100, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 784, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 30, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 18, wh_plus, table: wm_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM, - .direction = TF_DIR_RX, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1143, - .blob_key_bit_size = 192, - .key_bit_size = 160, - .key_num_fields = 5, - .result_start_idx = 792, - .result_bit_size = 19, - .result_num_fields = 3, - .encap_num_fields = 0, - .ident_start_idx = 30, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 19, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1148, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 795, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 30, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 19, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_RX, - .key_start_idx = 1161, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 808, - .result_bit_size = 20, - .result_num_fields = 2, - .encap_num_fields = 0, - .ident_start_idx = 31, - .ident_nums = 2 - }, - { /* class_tid: 19, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_RX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1164, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 810, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 19, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_RX, - .key_start_idx = 1207, - .blob_key_bit_size = 112, - .key_bit_size = 112, - .key_num_fields = 8, - .result_start_idx = 818, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 19, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_RX, - .key_start_idx = 1215, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 8, - .result_start_idx = 827, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 20, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1223, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 836, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 33, - .ident_nums = 1 - }, - { /* class_tid: 20, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1224, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 837, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 34, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 20, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1237, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 850, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 34, - .ident_nums = 1 - }, - { /* class_tid: 20, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1240, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 851, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 35, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 20, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1283, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 859, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 35, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 20, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1294, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 868, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 35, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 21, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1305, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 877, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 35, - .ident_nums = 1 - }, - { /* class_tid: 21, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1306, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 878, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 36, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 21, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1319, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 891, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 36, - .ident_nums = 1 - }, - { /* class_tid: 21, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1322, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 892, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 37, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 21, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1365, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 900, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 37, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 21, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1376, - .blob_key_bit_size = 200, - .key_bit_size = 200, - .key_num_fields = 11, - .result_start_idx = 909, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 37, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 22, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1387, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 918, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 37, - .ident_nums = 1 - }, - { /* class_tid: 22, wh_plus, table: l2_cntxt_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1388, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 919, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 38, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 22, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1401, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 932, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 38, - .ident_nums = 1 - }, - { /* class_tid: 22, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1404, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 933, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 39, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 22, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1447, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 941, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 39, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 22, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1458, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 950, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 39, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 23, wh_plus, table: l2_cntxt_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1469, - .blob_key_bit_size = 8, - .key_bit_size = 8, - .key_num_fields = 1, - .result_start_idx = 959, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 39, - .ident_nums = 1 - }, - { /* class_tid: 23, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1470, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 960, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 40, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 23, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1483, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 973, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 40, - .ident_nums = 1 - }, - { /* class_tid: 23, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1486, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 974, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 41, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 23, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1529, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 11, - .result_start_idx = 982, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 41, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 23, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1540, - .blob_key_bit_size = 392, - .key_bit_size = 392, - .key_num_fields = 11, - .result_start_idx = 991, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 41, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 24, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1551, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 1000, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 41, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 24, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1564, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 1013, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 42, - .ident_nums = 1 - }, - { /* class_tid: 24, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1567, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 1014, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 43, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 24, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1610, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 7, - .result_start_idx = 1022, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 43, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 24, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1617, - .blob_key_bit_size = 104, - .key_bit_size = 104, - .key_num_fields = 7, - .result_start_idx = 1031, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 43, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 25, wh_plus, table: l2_cntxt_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1624, - .blob_key_bit_size = 167, - .key_bit_size = 167, - .key_num_fields = 13, - .result_start_idx = 1040, - .result_bit_size = 64, - .result_num_fields = 13, - .encap_num_fields = 0, - .ident_start_idx = 43, - .ident_nums = 1, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 25, wh_plus, table: profile_tcam_cache_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INVALID, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .resource_sub_type = - BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM, - .direction = TF_DIR_TX, - .key_start_idx = 1637, - .blob_key_bit_size = 16, - .key_bit_size = 16, - .key_num_fields = 3, - .result_start_idx = 1053, - .result_bit_size = 10, - .result_num_fields = 1, - .encap_num_fields = 0, - .ident_start_idx = 44, - .ident_nums = 1 - }, - { /* class_tid: 25, wh_plus, table: profile_tcam_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, - .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM, - .direction = TF_DIR_TX, - .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, - .tbl_operand = BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0, - .pri_opcode = BNXT_ULP_PRI_OPC_CONST, - .pri_operand = 0, - .key_start_idx = 1640, - .blob_key_bit_size = 81, - .key_bit_size = 81, - .key_num_fields = 43, - .result_start_idx = 1054, - .result_bit_size = 38, - .result_num_fields = 8, - .encap_num_fields = 0, - .ident_start_idx = 45, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO - }, - { /* class_tid: 25, wh_plus, table: ext_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, - .resource_type = TF_MEM_EXTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, - .direction = TF_DIR_TX, - .key_start_idx = 1683, - .blob_key_bit_size = 448, - .key_bit_size = 448, - .key_num_fields = 7, - .result_start_idx = 1062, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 45, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - }, - { /* class_tid: 25, wh_plus, table: int_em_0 */ - .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE, - .resource_type = TF_MEM_INTERNAL, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_INT, - .direction = TF_DIR_TX, - .key_start_idx = 1690, - .blob_key_bit_size = 104, - .key_bit_size = 104, - .key_num_fields = 7, - .result_start_idx = 1071, - .result_bit_size = 64, - .result_num_fields = 9, - .encap_num_fields = 0, - .ident_start_idx = 45, - .ident_nums = 0, - .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, - .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES - } -}; - -struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = { - /* class_tid: 1, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_vfr_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, wh_plus, table: egr_l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, wh_plus, table: egr_l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, wh_plus, table: ing_l2_cntxt_dtagged_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, wh_plus, table: ing_l2_cntxt_stagged_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, wh_plus, table: egr_l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, wh_plus, table: egr_l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, wh_plus, table: ing_l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF6_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF6_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF6_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF6_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF6_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF6_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF6_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF6_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF7_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF7_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF7_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF7_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF8_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF8_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF9_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF9_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF10_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF10_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF11_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF11_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF12_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF12_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF12_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF13_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF13_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF13_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF14_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF14_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF14_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF15_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF15_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF15_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF16_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF16_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF16_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "t_ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "t_ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "t_ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "t_ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "t_l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 18, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF18_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF18_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 18, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 18, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 18, wh_plus, table: wm_0 */ - { - .description = "wc_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "spare", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "others", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 19, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF19_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 19, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 19, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TL2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 19, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dst_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_I_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF19_IDX_I_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_T_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_HF19_IDX_T_VXLAN_VNI & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 19, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 339, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dst_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_I_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF19_IDX_I_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF19_IDX_T_VXLAN_VNI >> 8) & 0xff, - BNXT_ULP_HF19_IDX_T_VXLAN_VNI & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 20, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 251, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 21, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_dst_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv4_src_addr", - .field_bit_size = 32, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, wh_plus, table: l2_cntxt_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_TYPE_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 22, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_UDP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_UDP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_UDP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_tl2_dst", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L4_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 59, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 23, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_dst_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_TCP_DST_PORT >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_TCP_DST_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l4_src_port", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ip_proto", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_IP_PROTO_TCP, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_dst_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ipv6_src_addr", - .field_bit_size = 128, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_src_mac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_id", - .field_bit_size = 24, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF24_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF24_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF24_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF24_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF24_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF24_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF24_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF24_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF24_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 351, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_eth_type", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF24_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 24, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_eth_type", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF24_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF24_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF25_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF25_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_OO_VLAN_VID >> 8) & 0xff, - BNXT_ULP_HF25_IDX_OO_VLAN_VID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac0_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF25_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF25_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_O_ETH_SMAC >> 8) & 0xff, - BNXT_ULP_HF25_IDX_O_ETH_SMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "svif", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .mask_operand = { - (BNXT_ULP_HF25_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF25_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_SVIF_INDEX >> 8) & 0xff, - BNXT_ULP_HF25_IDX_SVIF_INDEX & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sparif", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ivlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_ovlan_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mac1_l2_addr", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .spec_operand = { - (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff, - BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tl2_num_vtags", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_TUN_HDR_TYPE_NONE, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "recycle", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "class_tid", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, wh_plus, table: profile_tcam_0 */ - { - .description = "l4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_TYPE_IPV6, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L3_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = { - BNXT_ULP_SYM_L2_HDR_VALID_YES, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "tun_hdr_flags", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tun_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_is_udp_tcp", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl4_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_dst", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ipv6_cmp_src", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_isIP", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_type", - .field_bit_size = 4, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_two_vtags", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_vtag_present", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_uc_mc_bc", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_type", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl2_hdr_valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hrec_next", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 9, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .spec_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "agg_error", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "recycle_cnt", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_0", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "pkt_type_1", - .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, wh_plus, table: ext_em_0 */ - { - .description = "spare", - .field_bit_size = 351, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_eth_type", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF25_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 25, wh_plus, table: int_em_0 */ - { - .description = "spare", - .field_bit_size = 7, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "local_cos", - .field_bit_size = 3, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_eth_type", - .field_bit_size = 16, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_inner_vid", - .field_bit_size = 12, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_dmac", - .field_bit_size = 48, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD, - .spec_operand = { - (BNXT_ULP_HF25_IDX_O_ETH_DMAC >> 8) & 0xff, - BNXT_ULP_HF25_IDX_O_ETH_DMAC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, - .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .spec_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - } -}; - -struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] = { - /* class_tid: 1, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 1, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 1, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 1, wh_plus, table: parif_def_lkup_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 1, wh_plus, table: parif_def_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 1, wh_plus, table: parif_def_err_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_VPORT >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_VPORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_vfr_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 2, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 2, wh_plus, table: parif_def_lkup_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, wh_plus, table: parif_def_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 2, wh_plus, table: parif_def_err_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 3, wh_plus, table: egr_int_vtag_encap_record_0 */ - { - .description = "ecv_tun_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l4_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l3_type", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_l2_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_vtag_type", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ecv_custom_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "ecv_valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_tpid", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x81, 0x00} - }, - { - .description = "vtag_vid", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff, - BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "vtag_de", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vtag_pcp", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "spare", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, wh_plus, table: egr_int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT >> 8) & 0xff, - BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, wh_plus, table: egr_l2_cntxt_cache_0 */ - /* class_tid: 3, wh_plus, table: egr_l2_cntxt_tcam_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, wh_plus, table: ing_int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_VF_FUNC_VNIC >> 8) & 0xff, - BNXT_ULP_CF_IDX_VF_FUNC_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, wh_plus, table: ing_l2_cntxt_dtagged_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 3, wh_plus, table: ing_l2_cntxt_stagged_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 4, wh_plus, table: egr_l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, wh_plus, table: egr_l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - BNXT_ULP_SYM_VF_FUNC_PARIF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 4, wh_plus, table: egr_parif_def_lkup_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, wh_plus, table: egr_parif_def_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, wh_plus, table: egr_parif_def_err_arec_ptr_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 32, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 4, wh_plus, table: ing_int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_DRV_FUNC_VNIC >> 8) & 0xff, - BNXT_ULP_CF_IDX_DRV_FUNC_VNIC & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 4, wh_plus, table: ing_l2_cntxt_tcam_0 */ - { - .description = "act_record_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 5, wh_plus, table: int_full_act_record_0 */ - { - .description = "flow_cntr_ptr", - .field_bit_size = 14, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "age_enable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "agg_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "rate_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "flow_cntr_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_key", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_mir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcpflags_match", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "encap_ptr", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "dst_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_dst_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "src_ip_ptr", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tcp_src_port", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_rdir", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "l3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tl3_ttl_dec", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "decap_func", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "vnic_or_vport", - .field_bit_size = 12, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT >> 8) & 0xff, - BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pop_vlan", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "meter", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "mirror", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "drop", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "hit", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "type", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 6, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0005 >> 8) & 0xff, - 0x0005 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 6, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 6, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 7, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0005 >> 8) & 0xff, - 0x0005 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 7, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 7, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 8, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 8, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 8, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 9, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 9, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 9, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 10, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 10, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 10, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: l2_cntxt_cache_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 11, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 11, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 11, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 12, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 12, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 12, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 13, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 13, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 13, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 14, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 14, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 14, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 15, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00f9 >> 8) & 0xff, - 0x00f9 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 15, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 15, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 16, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0031 >> 8) & 0xff, - 0x0031 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 16, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 16, wh_plus, table: int_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x00c5 >> 8) & 0xff, - 0x00c5 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, wh_plus, table: l2_cntxt_tcam_0 */ - { - .description = "l2_cntxt_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "prof_func_id", - .field_bit_size = 7, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE, - .result_operand = { - (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff, - BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "l2_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "parif", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD, - .result_operand = { - (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff, - BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "allowed_pri", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_pri", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "allowed_tpid", - .field_bit_size = 6, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "default_tpid", - .field_bit_size = 3, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "bd_act_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "sp_rec_ptr", - .field_bit_size = 16, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "byp_sp_lkup", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pri_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "tpid_anti_spoof_ctl", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 17, wh_plus, table: profile_tcam_cache_0 */ - { - .description = "em_profile_id", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - /* class_tid: 17, wh_plus, table: profile_tcam_0 */ - { - .description = "wc_key_id", - .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "wc_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "em_key_mask", - .field_bit_size = 10, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0031 >> 8) & 0xff, - 0x0031 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_key_id", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_profile_id", - .field_bit_size = 8, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "em_search_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "pl_byp_lkup_en", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 17, wh_plus, table: ext_em_0 */ - { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} - }, - { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + { /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_cache.egr_wr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .key_start_idx = 259, + .blob_key_bit_size = 8, + .key_bit_size = 8, + .key_num_fields = 1, + .result_start_idx = 313, + .result_bit_size = 62, + .result_num_fields = 4, + .encap_num_fields = 0 }, - { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + { /* class_tid: 6, wh_plus, table: parif_def_lkup_arec_ptr.egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 317, + .result_bit_size = 32, + .result_num_fields = 1, + .encap_num_fields = 0 }, - { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + { /* class_tid: 6, wh_plus, table: parif_def_arec_ptr.egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 318, + .result_bit_size = 32, + .result_num_fields = 1, + .encap_num_fields = 0 }, - { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + { /* class_tid: 6, wh_plus, table: parif_def_err_arec_ptr.egr */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_IF_TABLE, + .resource_type = TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, + .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_PARIF, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .result_start_idx = 319, + .result_bit_size = 32, + .result_num_fields = 1, + .encap_num_fields = 0 }, - { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + { /* class_tid: 6, wh_plus, table: int_full_act_record.ing */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG, + .result_start_idx = 320, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 0 }, - { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + { /* class_tid: 6, wh_plus, table: l2_cntxt_tcam_bypass.ing */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE, + .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH, + .direction = TF_DIR_RX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, + .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH, + .pri_opcode = BNXT_ULP_PRI_OPC_CONST, + .pri_operand = 0, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, + .key_start_idx = 260, + .blob_key_bit_size = 167, + .key_bit_size = 167, + .key_num_fields = 13, + .result_start_idx = 346, + .result_bit_size = 64, + .result_num_fields = 13, + .encap_num_fields = 0, + .ident_start_idx = 14, + .ident_nums = 0 }, - /* class_tid: 17, wh_plus, table: int_em_0 */ + { /* class_tid: 7, wh_plus, table: int_full_act_record.0 */ + .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, + .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, + .resource_sub_type = + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_VFR_CFA_ACTION, + .direction = TF_DIR_TX, + .execute_info = { + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_start_idx = 10, + .cond_nums = 0 }, + .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, + .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, + .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, + .fdb_opcode = BNXT_ULP_FDB_OPC_NOP, + .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, + .result_start_idx = 359, + .result_bit_size = 128, + .result_num_fields = 26, + .encap_num_fields = 0 + } +}; + +struct bnxt_ulp_mapper_cond_info ulp_wh_plus_class_cond_list[] = { { - .description = "act_rec_ptr", - .field_bit_size = 33, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE, - .result_operand = { - (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "ext_flow_ctr", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "act_rec_int", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "act_rec_size", - .field_bit_size = 5, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "key_size", - .field_bit_size = 9, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = { - (0x0185 >> 8) & 0xff, - 0x0185 & 0xff, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET, + .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE }, { - .description = "reserved", - .field_bit_size = 11, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, + .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE }, { - .description = "strength", - .field_bit_size = 2, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, + .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE }, { - .description = "l1_cacheable", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT }, { - .description = "valid", - .field_bit_size = 1, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, - .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + .cond_opcode = BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET, + .cond_operand = BNXT_ULP_CF_IDX_VFR_MODE }, - /* class_tid: 18, wh_plus, table: int_flow_counter_tbl_0 */ { - .description = "count", - .field_bit_size = 64, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO - }, - /* class_tid: 18, wh_plus, table: l2_cntxt_tcam_0 */ + .cond_opcode = BNXT_ULP_COND_OPC_REGFILE_NOT_SET, + .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_HIT + } +}; + +struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { + /* class_tid: 1, wh_plus, table: l2_cntxt_tcam.0 */ + { + .field_info_mask = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_GLB_HF_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "l2_ivlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_OO_VLAN_VID >> 8) & 0xff, + BNXT_ULP_GLB_HF_OO_VLAN_VID & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + }, + .field_info_spec = { + .description = "l2_ovlan_vid", + .field_bit_size = 12, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_ZERO + } + }, + { + .field_info_mask = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + }, + .field_info_spec = { + .description = "mac0_addr", + .field_bit_size = 48, + .field_opcode = BNXT_ULP_FIELD_OPC_SET_TO_HDR_FIELD, + .field_operand = { + (BNXT_ULP_GLB_HF_O_ETH_DMAC >> 8) & 0xff, + BNXT_ULP_GLB_HF_O_ETH_DMAC & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + } + }, + { + .field_info_mask = { + .desc