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GET /api/patches/93247/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 93247,
    "url": "https://patches.dpdk.org/api/patches/93247/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210513080515.10644-1-suanmingm@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210513080515.10644-1-suanmingm@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210513080515.10644-1-suanmingm@nvidia.com",
    "date": "2021-05-13T08:05:15",
    "name": "net/mlx5: fix counter offset detection",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "bc30c713985932bdf4d30462710bfe2f4b3ff8c6",
    "submitter": {
        "id": 1887,
        "url": "https://patches.dpdk.org/api/people/1887/?format=api",
        "name": "Suanming Mou",
        "email": "suanmingm@nvidia.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210513080515.10644-1-suanmingm@nvidia.com/mbox/",
    "series": [
        {
            "id": 16979,
            "url": "https://patches.dpdk.org/api/series/16979/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16979",
            "date": "2021-05-13T08:05:15",
            "name": "net/mlx5: fix counter offset detection",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/16979/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/93247/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/93247/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Suanming Mou <suanmingm@nvidia.com>",
        "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>",
        "CC": "<rasland@nvidia.com>, <dev@dpdk.org>, <stable@dpdk.org>",
        "Date": "Thu, 13 May 2021 11:05:15 +0300",
        "Message-ID": "<20210513080515.10644-1-suanmingm@nvidia.com>",
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        "Subject": "[dpdk-dev] [PATCH] net/mlx5: fix counter offset detection",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
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        "Errors-To": "dev-bounces@dpdk.org",
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    },
    "content": "Currently, the counter offset support is discovered by creating the\nrule with invalid offset counter and drop action in root table. If\nthe rule creation fails with EINVAL errno, that mean counter offset\nis not supported in root table.\n\nHowever, drop action may not be supported in some rdma-core version\nin root table. In this case, the discover code will not work properly.\n\nThis commits changes flow attribute to egress. That removes all the\nextra fate actions in the flow to avoid any unsupported fate actions\nmake the discover code fail time to time.\n\nFixes: 994829e695c0 (\"net/mlx5: remove single counter container\")\nCc: stable@dpdk.org\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_dv.c | 8 +++-----\n 1 file changed, 3 insertions(+), 5 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 7fc7efbc5c..71d9f88a95 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -16081,7 +16081,7 @@ mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)\n \t\t.size = sizeof(value.buf),\n \t};\n \tstruct mlx5dv_flow_matcher_attr dv_attr = {\n-\t\t.type = IBV_FLOW_ATTR_NORMAL,\n+\t\t.type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,\n \t\t.priority = 0,\n \t\t.match_criteria_enable = 0,\n \t\t.match_mask = (void *)&mask,\n@@ -16093,7 +16093,7 @@ mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)\n \tvoid *flow = NULL;\n \tint ret = -1;\n \n-\ttbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,\n+\ttbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,\n \t\t\t\t\t0, 0, 0, NULL);\n \tif (!tbl)\n \t\tgoto err;\n@@ -16104,14 +16104,12 @@ mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)\n \t\t\t\t\t\t    &actions[0]);\n \tif (ret)\n \t\tgoto err;\n-\tactions[1] = sh->dr_drop_action ? sh->dr_drop_action :\n-\t\t\t\t\t  priv->drop_queue.hrxq->action;\n \tdv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);\n \tret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,\n \t\t\t\t\t       &matcher);\n \tif (ret)\n \t\tgoto err;\n-\tret = mlx5_flow_os_create_flow(matcher, (void *)&value, 2,\n+\tret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,\n \t\t\t\t       actions, &flow);\n err:\n \t/*\n",
    "prefixes": []
}