net/mlx5: fix counter offset detection

Message ID 20210513080515.10644-1-suanmingm@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series net/mlx5: fix counter offset detection |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/github-robot success github build: passed
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-mellanox-Functional success Functional Testing PASS

Commit Message

Suanming Mou May 13, 2021, 8:05 a.m. UTC
  Currently, the counter offset support is discovered by creating the
rule with invalid offset counter and drop action in root table. If
the rule creation fails with EINVAL errno, that mean counter offset
is not supported in root table.

However, drop action may not be supported in some rdma-core version
in root table. In this case, the discover code will not work properly.

This commits changes flow attribute to egress. That removes all the
extra fate actions in the flow to avoid any unsupported fate actions
make the discover code fail time to time.

Fixes: 994829e695c0 ("net/mlx5: remove single counter container")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)
  

Comments

Matan Azrad May 13, 2021, 9:55 a.m. UTC | #1
From: Suanming Mou
> Currently, the counter offset support is discovered by creating the rule with
> invalid offset counter and drop action in root table. If the rule creation fails
> with EINVAL errno, that mean counter offset is not supported in root table.
> 
> However, drop action may not be supported in some rdma-core version in
> root table. In this case, the discover code will not work properly.
> 
> This commits changes flow attribute to egress. That removes all the extra
> fate actions in the flow to avoid any unsupported fate actions make the
> discover code fail time to time.
> 
> Fixes: 994829e695c0 ("net/mlx5: remove single counter container")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
  
Thomas Monjalon May 13, 2021, 12:55 p.m. UTC | #2
> > Currently, the counter offset support is discovered by creating the rule with
> > invalid offset counter and drop action in root table. If the rule creation fails
> > with EINVAL errno, that mean counter offset is not supported in root table.
> > 
> > However, drop action may not be supported in some rdma-core version in
> > root table. In this case, the discover code will not work properly.
> > 
> > This commits changes flow attribute to egress. That removes all the extra
> > fate actions in the flow to avoid any unsupported fate actions make the
> > discover code fail time to time.
> > 
> > Fixes: 994829e695c0 ("net/mlx5: remove single counter container")
> > Cc: stable@dpdk.org
> > 
> > Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>

Applied in next-net-mlx, thanks.
  

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7fc7efbc5c..71d9f88a95 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -16081,7 +16081,7 @@  mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
 		.size = sizeof(value.buf),
 	};
 	struct mlx5dv_flow_matcher_attr dv_attr = {
-		.type = IBV_FLOW_ATTR_NORMAL,
+		.type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
 		.priority = 0,
 		.match_criteria_enable = 0,
 		.match_mask = (void *)&mask,
@@ -16093,7 +16093,7 @@  mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
 	void *flow = NULL;
 	int ret = -1;
 
-	tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
+	tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
 					0, 0, 0, NULL);
 	if (!tbl)
 		goto err;
@@ -16104,14 +16104,12 @@  mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
 						    &actions[0]);
 	if (ret)
 		goto err;
-	actions[1] = sh->dr_drop_action ? sh->dr_drop_action :
-					  priv->drop_queue.hrxq->action;
 	dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
 	ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
 					       &matcher);
 	if (ret)
 		goto err;
-	ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 2,
+	ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
 				       actions, &flow);
 err:
 	/*