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GET /api/patches/91271/?format=api
{ "id": 91271, "url": "https://patches.dpdk.org/api/patches/91271/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210413143038.2621294-11-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210413143038.2621294-11-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210413143038.2621294-11-qi.z.zhang@intel.com", "date": "2021-04-13T14:30:34", "name": "[v3,10/14] net/ice/base: add set/get GPIO helper functions", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "dafb12201edef052a603cffe0ce49c61d6808bd5", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210413143038.2621294-11-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 16337, "url": "https://patches.dpdk.org/api/series/16337/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16337", "date": "2021-04-13T14:30:24", "name": "ice: base code update batch 2", "version": 3, "mbox": "https://patches.dpdk.org/series/16337/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/91271/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/91271/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E180DA0524;\n\tTue, 13 Apr 2021 16:28:05 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 72394161080;\n\tTue, 13 Apr 2021 16:27:15 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 5712A16107B\n for <dev@dpdk.org>; Tue, 13 Apr 2021 16:27:13 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Apr 2021 07:27:12 -0700", "from dpdk51.sh.intel.com ([10.67.111.142])\n by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:11 -0700" ], "IronPort-SDR": [ "\n sJGiyE7BjKQtoeaa1U6HMwcvI9+5vrZtSMpJHQ9gUbMnJpbpZe60rCL2pY8c3TM+jTraYlGCWT\n u9hY0lqt07lA==", "\n xNnOTHY96X55hIGYlmxwjADqUne+ZZgqksakqVjT2zb9F1WPRIB/9+Zv8DKsEt1aGw3qUlHdP8\n mqMzhGm13nhw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,9953\"; a=\"214904273\"", "E=Sophos;i=\"5.82,219,1613462400\"; d=\"scan'208\";a=\"214904273\"", "E=Sophos;i=\"5.82,219,1613462400\"; d=\"scan'208\";a=\"417875243\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n Karol Kolacinski <karol.kolacinski@intel.com>", "Date": "Tue, 13 Apr 2021 22:30:34 +0800", "Message-Id": "<20210413143038.2621294-11-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20210413143038.2621294-1-qi.z.zhang@intel.com>", "References": "<20210329141411.2395069-1-qi.z.zhang@intel.com>\n <20210413143038.2621294-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3 10/14] net/ice/base: add set/get GPIO helper\n functions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add helper functions to set the GPIO pin state or get the value of a\nGPIO signal that's the part of the topology based on AQ commands.\nThis change is needed to setup GPIO pins state for PTP, SyncE etc.\n\nSigned-off-by: Karol Kolacinski <karol.kolacinski@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 11 +++++\n drivers/net/ice/base/ice_common.c | 58 +++++++++++++++++++++++++++\n drivers/net/ice/base/ice_common.h | 6 +++\n 3 files changed, 75 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex f9a741e99f..6b662b3889 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -1701,6 +1701,16 @@ struct ice_aqc_set_port_id_led {\n \tu8 rsvd[13];\n };\n \n+/* Set/Get GPIO (direct, 0x06EC/0x06ED) */\n+struct ice_aqc_gpio {\n+\t__le16 gpio_ctrl_handle;\n+#define ICE_AQC_GPIO_HANDLE_S\t0\n+#define ICE_AQC_GPIO_HANDLE_M\t(0x3FF << ICE_AQC_GPIO_HANDLE_S)\n+\tu8 gpio_num;\n+\tu8 gpio_val;\n+\tu8 rsvd[12];\n+};\n+\n /* Read/Write SFF EEPROM command (indirect 0x06EE) */\n struct ice_aqc_sff_eeprom {\n \tu8 lport_num;\n@@ -2865,6 +2875,7 @@ struct ice_aq_desc {\n \t\tstruct ice_aqc_restart_an restart_an;\n \t\tstruct ice_aqc_i2c read_write_i2c;\n \t\tstruct ice_aqc_read_i2c_resp read_i2c_resp;\n+\t\tstruct ice_aqc_gpio read_write_gpio;\n \t\tstruct ice_aqc_sff_eeprom read_write_sff_param;\n \t\tstruct ice_aqc_set_port_id_led set_port_id_led;\n \t\tstruct ice_aqc_get_sw_cfg get_sw_conf;\ndiff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex befaa83a4b..2424f3b4b3 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -4860,6 +4860,64 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,\n \treturn ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n }\n \n+/**\n+ * ice_aq_set_gpio\n+ * @hw: pointer to the hw struct\n+ * @gpio_ctrl_handle: GPIO controller node handle\n+ * @pin_idx: IO Number of the GPIO that needs to be set\n+ * @value: SW provide IO value to set in the LSB\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Sends 0x06EC AQ command to set the GPIO pin state that's part of the topology\n+ */\n+enum ice_status\n+ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,\n+\t\tstruct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_gpio *cmd;\n+\tstruct ice_aq_desc desc;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_gpio);\n+\tcmd = &desc.params.read_write_gpio;\n+\tcmd->gpio_ctrl_handle = gpio_ctrl_handle;\n+\tcmd->gpio_num = pin_idx;\n+\tcmd->gpio_val = value ? 1 : 0;\n+\n+\treturn ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n+}\n+\n+/**\n+ * ice_aq_get_gpio\n+ * @hw: pointer to the hw struct\n+ * @gpio_ctrl_handle: GPIO controller node handle\n+ * @pin_idx: IO Number of the GPIO that needs to be set\n+ * @value: IO value read\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Sends 0x06ED AQ command to get the value of a GPIO signal which is part of\n+ * the topology\n+ */\n+enum ice_status\n+ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,\n+\t\tbool *value, struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_gpio *cmd;\n+\tstruct ice_aq_desc desc;\n+\tenum ice_status status;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio);\n+\tcmd = &desc.params.read_write_gpio;\n+\tcmd->gpio_ctrl_handle = gpio_ctrl_handle;\n+\tcmd->gpio_num = pin_idx;\n+\n+\tstatus = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n+\tif (status)\n+\t\treturn status;\n+\n+\t*value = !!cmd->gpio_val;\n+\treturn ICE_SUCCESS;\n+}\n+\n /**\n * ice_fw_supports_link_override\n * @hw: pointer to the hardware structure\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex f9e3ed1d67..62b5052797 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -220,6 +220,12 @@ enum ice_status\n ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,\n \t\t struct ice_aqc_txsched_elem_data *buf);\n enum ice_status\n+ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,\n+\t\tstruct ice_sq_cd *cd);\n+enum ice_status\n+ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,\n+\t\tbool *value, struct ice_sq_cd *cd);\n+enum ice_status\n ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,\n \t\t struct ice_sq_cd *cd);\n bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);\n", "prefixes": [ "v3", "10/14" ] }