From patchwork Tue Apr 13 14:30:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91262 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 46425A0524; Tue, 13 Apr 2021 16:27:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A070F161040; Tue, 13 Apr 2021 16:26:59 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 2169216102C for ; Tue, 13 Apr 2021 16:26:56 +0200 (CEST) IronPort-SDR: GK9gTAT9B629Ncd0CADwpoNcF0ISjzNCfnZLLyNf6zF2dRbT+i6K9p/v9O0Ms9LgQ+CNd5YtD3 372h2EEgDtUw== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904185" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904185" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:26:56 -0700 IronPort-SDR: d1ms7hRhJIgXKKo4yaI5ijg/Ixw8BpdDzxLSONx7/ULNd7kyMXbXW4LCNmSPdzQgLGDzOwUAeF EJj2cbq1CkYw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875103" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:26:55 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Dave Ertman Date: Tue, 13 Apr 2021 22:30:25 +0800 Message-Id: <20210413143038.2621294-2-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 01/14] net/ice/base: code cleanup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 1. There are a lots of function header mismatch its function name. 2. remove unnecessary header file include. 3. remove unnecessary macro. 4. remove unnecessary comment. Signed-off-by: Dave Ertman Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_common.c | 4 ++-- drivers/net/ice/base/ice_dcb.c | 2 +- drivers/net/ice/base/ice_fdir.c | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 1 - drivers/net/ice/base/ice_sched.c | 11 +++++------ drivers/net/ice/base/ice_switch.c | 15 +++++++-------- drivers/net/ice/base/ice_type.h | 2 -- drivers/net/ice/base/ice_vlan_mode.c | 3 +-- drivers/net/ice/base/ice_vlan_mode.h | 1 - 9 files changed, 17 insertions(+), 24 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 1546309da1..65018690c2 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -638,7 +638,7 @@ ice_cleanup_fltr_mgmt_single(struct ice_hw *hw, struct ice_switch_info *sw) } /** - * ice_cleanup_all_fltr_mgmt - cleanup filter management list and locks + * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks * @hw: pointer to the HW struct */ void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) @@ -4903,7 +4903,7 @@ ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size, } /** - * ice_fw_supports_lldp_fltr - check NVM version supports lldp_fltr_ctrl + * ice_fw_supports_lldp_fltr_ctrl - check NVM version supports lldp_fltr_ctrl * @hw: pointer to HW struct */ bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw) diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c index 7a85e56abf..d5e2cb6e5d 100644 --- a/drivers/net/ice/base/ice_dcb.c +++ b/drivers/net/ice/base/ice_dcb.c @@ -857,7 +857,7 @@ ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg, } /** - * ice_get_ieee_dcb_cfg + * ice_get_ieee_or_cee_dcb_cfg * @pi: port information structure * @dcbx_mode: mode of DCBX (IEEE or CEE) * diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 2b39c13127..8f9c0d346b 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -1845,7 +1845,7 @@ bool ice_fdir_has_frag(enum ice_fltr_ptype flow) } /** - * ice_fdir_find_by_idx - find filter with idx + * ice_fdir_find_fltr_by_idx - find filter with idx * @hw: pointer to hardware structure * @fltr_idx: index to find. * diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index f429bfb0d1..90264240c4 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -357,7 +357,6 @@ ice_marker_ptype_tcam_handler(u32 sect_type, void *section, u32 index, if (sect_type != ICE_SID_RXPARSER_MARKER_PTYPE) return NULL; - /* cppcheck-suppress nullPointer */ if (index > ICE_MAX_MARKER_PTYPE_TCAMS_IN_BUF) return NULL; diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 38d1f2cc54..be3f56cdf6 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -1984,7 +1984,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs, } /** - * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry + * ice_sched_rm_agg_vsi_info - remove aggregator related VSI info entry * @pi: port information structure * @vsi_handle: software VSI handle * @@ -3360,7 +3360,7 @@ ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc, } /** - * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC + * ice_cfg_vsi_bw_dflt_lmt_per_tc - configure default VSI BW limit per TC * @pi: port information structure * @vsi_handle: software VSI handle * @tc: traffic class @@ -3515,7 +3515,7 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id) } /** - * ice_cfg_agg_bw_shared_lmt_per_tc - configure aggregator BW shared limit per tc + * ice_cfg_agg_bw_shared_lmt_per_tc - config aggregator BW shared limit per tc * @pi: port information structure * @agg_id: aggregator ID * @tc: traffic class @@ -3535,7 +3535,7 @@ ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, } /** - * ice_cfg_agg_bw_shared_lmt_per_tc - configure aggregator BW shared limit per tc + * ice_cfg_agg_bw_no_shared_lmt_per_tc - cfg aggregator BW shared limit per tc * @pi: port information structure * @agg_id: aggregator ID * @tc: traffic class @@ -3553,7 +3553,7 @@ ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc) } /** - * ice_config_vsi_queue_priority - config VSI queue priority of node + * ice_cfg_vsi_q_priority - config VSI queue priority of node * @pi: port information structure * @num_qs: number of VSI queues * @q_ids: queue IDs array @@ -3649,7 +3649,6 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id, LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list, ice_sched_agg_vsi_info, list_entry) if (agg_vsi_info->vsi_handle == vsi_handle) { - /* cppcheck-suppress unreadVariable */ vsi_handle_valid = true; break; } diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 9233c5fd2a..afc51d864d 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -2298,7 +2298,7 @@ enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 } /** - * ice_free_global_lut - free a RSS global LUT + * ice_free_rss_global_lut - free a RSS global LUT * @hw: pointer to the HW struct * @global_lut_id: ID of the RSS global LUT to free */ @@ -3174,7 +3174,6 @@ ice_aq_get_recipe(struct ice_hw *hw, buf_size = *num_recipes * sizeof(*s_recipe_list); status = ice_aq_send_cmd(hw, &desc, s_recipe_list, buf_size, cd); - /* cppcheck-suppress constArgument */ *num_recipes = LE16_TO_CPU(cmd->num_sub_recipes); return status; @@ -4979,7 +4978,7 @@ enum ice_status ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list) } /** - * ice_add_mac_vlan - Add MAC and VLAN pair based filter rule + * ice_add_mac_vlan_rule - Add MAC and VLAN pair based filter rule * @hw: pointer to the hardware structure * @mv_list: list of MAC and VLAN filters * @sw: pointer to switch info struct for which function add rule @@ -5671,7 +5670,7 @@ ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask, } /** - * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI + * _ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI * @hw: pointer to the hardware structure * @vsi_handle: VSI handle to retrieve info from * @promisc_mask: pointer to mask to be filled in @@ -6664,7 +6663,7 @@ static bool ice_prot_type_to_id(enum ice_protocol_type type, u8 *id) } /** - * ice_find_valid_words - count valid words + * ice_fill_valid_words - count valid words * @rule: advanced rule with lookup information * @lkup_exts: byte offset extractions of the words that are valid * @@ -7263,7 +7262,7 @@ ice_get_fv(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, } /** - * ice_tun_type_match_mask - determine if tun type needs a match mask + * ice_tun_type_match_word - determine if tun type needs a match mask * @tun_type: tunnel type * @mask: mask to be used for the tunnel */ @@ -8860,7 +8859,7 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw, } /** - * ice_rem_adv_for_vsi - removes existing advanced switch rules for a + * ice_rem_adv_rule_for_vsi - removes existing advanced switch rules for a * given VSI handle * @hw: pointer to the hardware structure * @vsi_handle: VSI handle for which we are supposed to remove all the rules. @@ -9142,7 +9141,7 @@ ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi, } /** - * ice_rm_all_sw_replay_rule - helper function to delete filter replay rules + * ice_rm_sw_replay_rule_info - helper function to delete filter replay rules * @hw: pointer to the HW struct * @sw: pointer to switch info struct for which function removes filters * diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index a6599363f9..3c534a7711 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -44,9 +44,7 @@ #define ice_struct_size(ptr, field, num) \ (sizeof(*(ptr)) + sizeof(*(ptr)->field) * (num)) -#ifndef FLEX_ARRAY_SIZE #define FLEX_ARRAY_SIZE(_ptr, _mem, cnt) ((cnt) * sizeof(_ptr->_mem[0])) -#endif /* FLEX_ARRAY_SIZE */ #include "ice_status.h" #include "ice_hw_autogen.h" diff --git a/drivers/net/ice/base/ice_vlan_mode.c b/drivers/net/ice/base/ice_vlan_mode.c index 4ba78ed4cd..ce150009c2 100644 --- a/drivers/net/ice/base/ice_vlan_mode.c +++ b/drivers/net/ice/base/ice_vlan_mode.c @@ -2,11 +2,10 @@ * Copyright(c) 2001-2021 Intel Corporation */ -#include "ice_vlan_mode.h" #include "ice_common.h" /** - * ice_pkg_supports_dvm - determine if DDP supports Double VLAN mode (DVM) + * ice_pkg_get_supported_vlan_mode - chk if DDP supports Double VLAN mode (DVM) * @hw: pointer to the HW struct * @dvm: output variable to determine if DDP supports DVM(true) or SVM(false) */ diff --git a/drivers/net/ice/base/ice_vlan_mode.h b/drivers/net/ice/base/ice_vlan_mode.h index bcb6ff7134..e9f13e7814 100644 --- a/drivers/net/ice/base/ice_vlan_mode.h +++ b/drivers/net/ice/base/ice_vlan_mode.h @@ -6,7 +6,6 @@ #define _ICE_VLAN_MODE_H_ #include "ice_osdep.h" -#include "ice_status.h" struct ice_hw; From patchwork Tue Apr 13 14:30:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91263 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 54FB3A0524; Tue, 13 Apr 2021 16:27:09 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D3978161048; Tue, 13 Apr 2021 16:27:00 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 46E1316103E for ; Tue, 13 Apr 2021 16:26:59 +0200 (CEST) IronPort-SDR: X99+b0DzfvgUMWHflKTHU6jXnFNxEYZb1TIR1R4VfjUpmDdMqsdb+qjvW8M3tq9zwVM9jxOGho 5e5Zmesp1YCQ== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904195" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904195" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:26:58 -0700 IronPort-SDR: Ft3xkTFbI3az8/L/Kc34RIXT0bNMFfaWISG2RehKqteM5snz/nP+9Zr52xUBx5DvgZmMvuvdLL Kzar0GxI5H6Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875116" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:26:56 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Vignesh Sridhar Date: Tue, 13 Apr 2021 22:30:26 +0800 Message-Id: <20210413143038.2621294-3-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 02/14] net/ice/base: support removing VSI from flow profile X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Adding a function ice_flow_rem_vsi_prof() to remove flow entries associated to the sw vsi handle. Once complete clear the vsi index from the flow profile bitmap. This will ensure that the a vsi once removed can be re-added and the package block rules will be added again. Signed-off-by: Vignesh Sridhar Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_flow.c | 55 +++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 2 ++ 2 files changed, 57 insertions(+) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index c12ddfa247..e462a8c542 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -3295,6 +3295,61 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, seg->raws_cnt++; } +/** + * ice_flow_rem_vsi_prof - remove vsi from flow profile + * @hw: pointer to the hardware structure + * @blk: classification stage + * @vsi_handle: software VSI handle + * @prof_id: unique ID to identify this flow profile + * + * This function removes the flow entries associated to the input + * vsi handle and disassociates the vsi from the flow profile. + */ +enum ice_status ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, + u64 prof_id) +{ + struct ice_flow_prof *prof = NULL; + enum ice_status status = ICE_SUCCESS; + + if (blk >= ICE_BLK_COUNT || !ice_is_vsi_valid(hw, vsi_handle)) + return ICE_ERR_PARAM; + + /* find flow profile pointer with input package block and profile id */ + prof = ice_flow_find_prof_id(hw, ICE_BLK_FD, prof_id); + if (!prof) { + ice_debug(hw, ICE_DBG_PKG, + "Cannot find flow profile id=%" PRIu64 "\n", prof_id); + return ICE_ERR_DOES_NOT_EXIST; + } + + /* Remove all remaining flow entries before removing the flow profile */ + if (!LIST_EMPTY(&prof->entries)) { + struct ice_flow_entry *e, *t; + + ice_acquire_lock(&prof->entries_lock); + LIST_FOR_EACH_ENTRY_SAFE(e, t, &prof->entries, ice_flow_entry, + l_entry) { + if (e->vsi_handle != vsi_handle) + continue; + + status = ice_flow_rem_entry_sync(hw, blk, e); + if (status) + break; + } + ice_release_lock(&prof->entries_lock); + } + if (status) + return status; + + /* disassociate the flow profile from sw vsi handle */ + status = ice_flow_disassoc_prof(hw, blk, prof, vsi_handle); + if (status) + ice_debug(hw, ICE_DBG_PKG, + "ice_flow_disassoc_prof() failed with status=%d\n", + status); + return status; +} + #define ICE_FLOW_RSS_SEG_HDR_L2_MASKS \ (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index af15ecb0ff..40a75f53f9 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -553,6 +553,8 @@ ice_flow_set_fld_prefix(struct ice_flow_seg_info *seg, enum ice_flow_field fld, void ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, u16 val_loc, u16 mask_loc); +enum ice_status ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk, + u16 vsi_handle, u64 prof_id); void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle); enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle); enum ice_status From patchwork Tue Apr 13 14:30:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91264 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E1F58A0524; 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13 Apr 2021 07:26:59 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Anirudh Venkataramanan Date: Tue, 13 Apr 2021 22:30:27 +0800 Message-Id: <20210413143038.2621294-4-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 03/14] net/ice/base: print link configure error X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Newer NVMs return link_cfg_err for get_link_status AQ. Print it for debug use. Signed-off-by: Anirudh Venkataramanan Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_common.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 65018690c2..5c21d71b70 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -460,6 +460,7 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse, (unsigned long long)li->phy_type_high); ice_debug(hw, ICE_DBG_LINK, " media_type = 0x%x\n", *hw_media_type); ice_debug(hw, ICE_DBG_LINK, " link_info = 0x%x\n", li->link_info); + ice_debug(hw, ICE_DBG_LINK, " link_cfg_err = 0x%x\n", li->link_cfg_err); ice_debug(hw, ICE_DBG_LINK, " an_info = 0x%x\n", li->an_info); ice_debug(hw, ICE_DBG_LINK, " ext_info = 0x%x\n", li->ext_info); ice_debug(hw, ICE_DBG_LINK, " fec_info = 0x%x\n", li->fec_info); From patchwork Tue Apr 13 14:30:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91265 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B354A0524; Tue, 13 Apr 2021 16:27:22 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3EFAD161054; Tue, 13 Apr 2021 16:27:05 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 01CE016104D for ; Tue, 13 Apr 2021 16:27:02 +0200 (CEST) IronPort-SDR: yTiGnFb7ebzNOzRHzREa/y/XvGtUsqGCfhN+KY2h48qSI6HwpL7OIT7YFKZrtWQ8/eWTc8r7Fi CORFx/xPUdcQ== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904209" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904209" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:02 -0700 IronPort-SDR: FsXZ4wInlLH3dVds/9U0KdLGY4hyhkP4qIN0j+rIAK5I2GpDLtbV7f2HFLl3oAOHNLcoE9ZTK0 8TYN67hN2FqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875147" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:00 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Jesse Brandeburg Date: Tue, 13 Apr 2021 22:30:28 +0800 Message-Id: <20210413143038.2621294-5-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 04/14] net/ice/base: remove unused ptype field in PTT definition X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove the unused ptype entry, and use the gcc extension for ranged initializers in arrays for Linux, and explicitly target each table entry by index when initializing under Linux. Signed-off-by: Jesse Brandeburg Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_lan_tx_rx.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index e24a1bb767..696c6a30ae 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -296,7 +296,6 @@ enum ice_rx_l2_ptype { }; struct ice_rx_ptype_decoded { - u32 ptype:10; u32 known:1; u32 outer_ip:1; u32 outer_ip_ver:2; @@ -1217,8 +1216,7 @@ struct ice_tx_drbell_q_ctx { /* macro to make the table lines short */ #define ICE_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\ - { PTYPE, \ - 1, \ + { 1, \ ICE_RX_PTYPE_OUTER_##OUTER_IP, \ ICE_RX_PTYPE_OUTER_##OUTER_IP_VER, \ ICE_RX_PTYPE_##OUTER_FRAG, \ @@ -1228,14 +1226,14 @@ struct ice_tx_drbell_q_ctx { ICE_RX_PTYPE_INNER_PROT_##I, \ ICE_RX_PTYPE_PAYLOAD_LAYER_##PL } -#define ICE_PTT_UNUSED_ENTRY(PTYPE) { PTYPE, 0, 0, 0, 0, 0, 0, 0, 0, 0 } +#define ICE_PTT_UNUSED_ENTRY(PTYPE) { 0, 0, 0, 0, 0, 0, 0, 0, 0 } /* shorter macros makes the table fit but are terse */ #define ICE_RX_PTYPE_NOF ICE_RX_PTYPE_NOT_FRAG #define ICE_RX_PTYPE_FRG ICE_RX_PTYPE_FRAG -/* Lookup table mapping the HW PTYPE to the bit field for decoding */ -static const struct ice_rx_ptype_decoded ice_ptype_lkup[] = { +/* Lookup table mapping the 10-bit HW PTYPE to the bit field for decoding */ +static const struct ice_rx_ptype_decoded ice_ptype_lkup[1024] = { /* L2 Packet types */ ICE_PTT_UNUSED_ENTRY(0), ICE_PTT(1, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2), From patchwork Tue Apr 13 14:30:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91266 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 97C7EA0524; Tue, 13 Apr 2021 16:27:28 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6919E16105C; Tue, 13 Apr 2021 16:27:06 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 653F8161054 for ; Tue, 13 Apr 2021 16:27:04 +0200 (CEST) IronPort-SDR: 08q6s7GBOnfP3sfgJCVbkzpj8KZlpKJid2ijw58/HwdXa5AkPEw0oae3QkbKjNOK6nAMofw/SA JC1NZBFib6ig== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904216" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904216" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:04 -0700 IronPort-SDR: 6k77zAwd8C/dABPJMOsdxJBKw9DT2QwIzs8dpRzv0QuQT+bYs0lWqTOBDBMuCvhrcQJb9xKHsa Temll2YDWJEQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875170" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:02 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Anirudh Venkataramanan Date: Tue, 13 Apr 2021 22:30:29 +0800 Message-Id: <20210413143038.2621294-6-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 05/14] net/ice/base: set MAC type for E823C device X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Set E823C device's MAC type as generic. Signed-off-by: Anirudh Venkataramanan Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_common.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 5c21d71b70..356a8b4d09 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -48,6 +48,11 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw) case ICE_DEV_ID_E823L_BACKPLANE: case ICE_DEV_ID_E823L_QSFP: case ICE_DEV_ID_E823L_SFP: + case ICE_DEV_ID_E823C_10G_BASE_T: + case ICE_DEV_ID_E823C_BACKPLANE: + case ICE_DEV_ID_E823C_QSFP: + case ICE_DEV_ID_E823C_SFP: + case ICE_DEV_ID_E823C_SGMII: hw->mac_type = ICE_MAC_GENERIC; break; default: From patchwork Tue Apr 13 14:30:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91267 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EF36BA0524; Tue, 13 Apr 2021 16:27:36 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0E7BF16106B; Tue, 13 Apr 2021 16:27:08 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 4B86416105A for ; Tue, 13 Apr 2021 16:27:06 +0200 (CEST) IronPort-SDR: Chr8X7T/2kICCR0IYjWgrqJitDiwciYGuRIKFQHtp4nULId/yVrzCPukOE5/SjLJKITrnSWJIn 5cOUc2QGwqfg== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904228" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904228" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:05 -0700 IronPort-SDR: HhHqzYbdDKMh/Y1Zax8IpcwNPMVQQ9kdgHpEo/ti0JL5FjBW8EZbZJc2p7OWW68RcvYPqDhsat xCgmvZ05nXRw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875199" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:04 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Ting Xu Date: Tue, 13 Apr 2021 22:30:30 +0800 Message-Id: <20210413143038.2621294-7-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 06/14] net/ice/base: add RSS support for PPPoL2TPv2oUDP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for PPPoL2TPv2oUDP RSS hash. L2TPv2 and PPP ptypes and flow headers are added. Prot id for PPP is added. Signed-off-by: Ting Xu Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_flow.c | 65 ++++++++++++++++++------ drivers/net/ice/base/ice_flow.h | 2 + drivers/net/ice/base/ice_protocol_type.h | 1 + 3 files changed, 52 insertions(+), 16 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index e462a8c542..6dba9e7b84 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -212,7 +212,7 @@ static const u32 ice_ptypes_mac_ofos[] = { 0xFDC00846, 0xBFBF7F7E, 0xF70001DF, 0xFEFDFDFB, 0x0000077E, 0x000003FF, 0x00000000, 0x00000000, 0x00400000, 0x03FFF000, 0xFFFFFFE0, 0x00100707, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xFFFFFF00, 0x0000003F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -238,7 +238,7 @@ static const u32 ice_ptypes_ipv4_ofos[] = { 0x1DC00000, 0x24000800, 0x00000000, 0x00000000, 0x00000000, 0x00000155, 0x00000000, 0x00000000, 0x00000000, 0x000FC000, 0x000002A0, 0x00100000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00001500, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -252,7 +252,7 @@ static const u32 ice_ptypes_ipv4_ofos_all[] = { 0x1DC00000, 0x24000800, 0x00000000, 0x00000000, 0x00000000, 0x00000155, 0x00000000, 0x00000000, 0x00000000, 0x000FC000, 0x83E0FAA0, 0x00000101, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x03FFD500, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -264,7 +264,7 @@ static const u32 ice_ptypes_ipv4_il[] = { 0xE0000000, 0xB807700E, 0x80000003, 0xE01DC03B, 0x0000000E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x001FF800, 0x00100000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xFC0FC000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -278,7 +278,7 @@ static const u32 ice_ptypes_ipv6_ofos[] = { 0x00000000, 0x00000000, 0x77000000, 0x10002000, 0x00000000, 0x000002AA, 0x00000000, 0x00000000, 0x00000000, 0x03F00000, 0x00000540, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00002A00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -292,7 +292,7 @@ static const u32 ice_ptypes_ipv6_ofos_all[] = { 0x00000000, 0x00000000, 0x77000000, 0x10002000, 0x00000000, 0x000002AA, 0x00000000, 0x00000000, 0x00000000, 0x03F00000, 0x7C1F0540, 0x00000206, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xFC002A00, 0x0000003F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -304,7 +304,7 @@ static const u32 ice_ptypes_ipv6_il[] = { 0x00000000, 0x03B80770, 0x000001DC, 0x0EE00000, 0x00000770, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7FE00000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x03F00000, 0x0000003F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -316,7 +316,7 @@ static const u32 ice_ptypes_ipv4_ofos_no_l4[] = { 0x10C00000, 0x04000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000cc000, 0x000002A0, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00001500, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -328,7 +328,7 @@ static const u32 ice_ptypes_ipv4_il_no_l4[] = { 0x60000000, 0x18043008, 0x80000002, 0x6010c021, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00139800, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x8C08C000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -340,7 +340,7 @@ static const u32 ice_ptypes_ipv6_ofos_no_l4[] = { 0x00000000, 0x00000000, 0x43000000, 0x10002000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02300000, 0x00000540, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00002A00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -352,7 +352,7 @@ static const u32 ice_ptypes_ipv6_il_no_l4[] = { 0x00000000, 0x02180430, 0x0000010c, 0x086010c0, 0x00000430, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4e600000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x02300000, 0x00000023, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -378,7 +378,7 @@ static const u32 ice_ptypes_udp_il[] = { 0x81000000, 0x20204040, 0x04000010, 0x80810102, 0x00000040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00410000, 0x908427E0, 0x00100007, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x10410000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -390,7 +390,7 @@ static const u32 ice_ptypes_tcp_il[] = { 0x04000000, 0x80810102, 0x10000040, 0x02040408, 0x00000102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x20820000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -402,7 +402,7 @@ static const u32 ice_ptypes_sctp_il[] = { 0x08000000, 0x01020204, 0x20000081, 0x04080810, 0x00000204, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01040000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x41040000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -426,7 +426,7 @@ static const u32 ice_ptypes_icmp_il[] = { 0x00000000, 0x02040408, 0x40000102, 0x08101020, 0x00000408, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x42108000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x82080000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -725,6 +725,28 @@ static const u32 ice_ptypes_udp_ecpri_tp0[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; +static const u32 ice_ptypes_l2tpv2[] = { + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xFFFFFF00, 0x0000003F, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; + +static const u32 ice_ptypes_ppp[] = { + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0xFFFFF000, 0x0000003F, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, +}; + /* Manage parameters and info. used during the creation of a flow profile */ struct ice_flow_prof_params { enum ice_block blk; @@ -750,7 +772,8 @@ struct ice_flow_prof_params { ICE_FLOW_SEG_HDR_PFCP_SESSION | ICE_FLOW_SEG_HDR_L2TPV3 | \ ICE_FLOW_SEG_HDR_ESP | ICE_FLOW_SEG_HDR_AH | \ ICE_FLOW_SEG_HDR_NAT_T_ESP | ICE_FLOW_SEG_HDR_GTPU_NON_IP | \ - ICE_FLOW_SEG_HDR_ECPRI_TP0 | ICE_FLOW_SEG_HDR_UDP_ECPRI_TP0) + ICE_FLOW_SEG_HDR_ECPRI_TP0 | ICE_FLOW_SEG_HDR_UDP_ECPRI_TP0 | \ + ICE_FLOW_SEG_HDR_L2TPV2 | ICE_FLOW_SEG_HDR_PPP) #define ICE_FLOW_SEG_HDRS_L2_MASK \ (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) @@ -1006,6 +1029,10 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) /* Attributes for GTP packet without Extension Header */ params->attr = ice_attr_gtpu_session; params->attr_cnt = ARRAY_SIZE(ice_attr_gtpu_session); + } else if (hdrs & ICE_FLOW_SEG_HDR_L2TPV2) { + src = (const ice_bitmap_t *)ice_ptypes_l2tpv2; + ice_and_bitmap(params->ptypes, params->ptypes, + src, ICE_FLOW_PTYPE_MAX); } else if (hdrs & ICE_FLOW_SEG_HDR_L2TPV3) { src = (const ice_bitmap_t *)ice_ptypes_l2tpv3; ice_and_bitmap(params->ptypes, params->ptypes, @@ -1032,6 +1059,12 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) src, ICE_FLOW_PTYPE_MAX); } + if (hdrs & ICE_FLOW_SEG_HDR_PPP) { + src = (const ice_bitmap_t *)ice_ptypes_ppp; + ice_and_bitmap(params->ptypes, params->ptypes, + src, ICE_FLOW_PTYPE_MAX); + } + if (hdrs & ICE_FLOW_SEG_HDR_PFCP) { if (hdrs & ICE_FLOW_SEG_HDR_PFCP_NODE) src = diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 40a75f53f9..448e06028a 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -185,6 +185,8 @@ enum ice_flow_seg_hdr { ICE_FLOW_SEG_HDR_VXLAN = 0x02000000, ICE_FLOW_SEG_HDR_ECPRI_TP0 = 0x04000000, ICE_FLOW_SEG_HDR_UDP_ECPRI_TP0 = 0x08000000, + ICE_FLOW_SEG_HDR_L2TPV2 = 0x10000000, + ICE_FLOW_SEG_HDR_PPP = 0x40000000, /* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs */ diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index ee1f29d41f..ffc887c7be 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -154,6 +154,7 @@ enum ice_prot_id { ICE_PROT_PPPOE = 103, ICE_PROT_L2TPV3 = 104, ICE_PROT_ECPRI = 105, + ICE_PROT_PPP = 106, ICE_PROT_ATAOE_OF = 114, ICE_PROT_CTRL_OF = 116, ICE_PROT_LLDP_OF = 117, From patchwork Tue Apr 13 14:30:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91268 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1DE51A0524; Tue, 13 Apr 2021 16:27:44 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 515F0161071; Tue, 13 Apr 2021 16:27:10 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 53D5A16106F for ; Tue, 13 Apr 2021 16:27:08 +0200 (CEST) IronPort-SDR: UNCZnOtayTLcvshZaVrLVQUOeHSXnvdRVk5ySTzM36/vtFRzfxtKn60eK22csT1+OdwhUukrx+ ZZdQ67gZzOWQ== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904236" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904236" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:07 -0700 IronPort-SDR: E1EhGMeDGdDFLMayUYPd6VJRbaUxmq+I5TO2JNAx8t5PizmluAVqIBjriKLXF9D5wW74Qh3gBA HGScu5mOyCOw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875219" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:06 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Michal Swiatkowski , Haiyue Wang Date: Tue, 13 Apr 2021 22:30:31 +0800 Message-Id: <20210413143038.2621294-8-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 07/14] net/ice/base: change protocol ID for VLAN in case of DVM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Protocol id for first vlan in Double VLAN Mode (DVM) should be ICE_VLAN_OF_HW = 16, but for Single VLAN Mode (SVM) this should be ICE_VLAN_OL_HW = 17. Change protocol id in type to id translation array for outer vlan to 17 when DVM is enabled, which means the driver, package, and firmware support DVM. Signed-off-by: Michal Swiatkowski Signed-off-by: Haiyue Wang Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_flex_pipe.c | 3 +++ drivers/net/ice/base/ice_switch.c | 19 ++++++++++++++++++- drivers/net/ice/base/ice_switch.h | 1 + 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 90264240c4..b489c8ddb2 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1244,6 +1244,9 @@ ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg) ice_cache_vlan_mode(hw); + if (ice_is_dvm_ena(hw)) + ice_change_proto_id_to_dvm(); + return status; } diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index afc51d864d..d4203f2730 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6538,7 +6538,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = { * following policy. */ -static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { +static struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, @@ -6643,6 +6643,23 @@ static u16 ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts, return ICE_MAX_NUM_RECIPES; } +/** + * ice_change_proto_id_to_dvm - change proto id in prot_id_tbl + * + * As protocol id for outer vlan is different in dvm and svm, if dvm is + * supported protocol array record for outer vlan has to be modified to + * reflect the value proper for DVM. + */ +void ice_change_proto_id_to_dvm(void) +{ + u8 i; + + for (i = 0; i < ARRAY_SIZE(ice_prot_id_tbl); i++) + if (ice_prot_id_tbl[i].type == ICE_VLAN_OFOS && + ice_prot_id_tbl[i].protocol_id != ICE_VLAN_OF_HW) + ice_prot_id_tbl[i].protocol_id = ICE_VLAN_OF_HW; +} + /** * ice_prot_type_to_id - get protocol ID from protocol type * @type: protocol type diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 04d3c31006..61be54f9c0 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -535,4 +535,5 @@ bool ice_is_prof_rule(enum ice_sw_tunnel_type type); enum ice_status ice_update_recipe_lkup_idx(struct ice_hw *hw, struct ice_update_recipe_lkup_idx_params *params); +void ice_change_proto_id_to_dvm(void); #endif /* _ICE_SWITCH_H_ */ From patchwork Tue Apr 13 14:30:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91269 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 23330A0524; Tue, 13 Apr 2021 16:27:50 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A0F62161073; Tue, 13 Apr 2021 16:27:12 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id D3AD8161065 for ; Tue, 13 Apr 2021 16:27:09 +0200 (CEST) IronPort-SDR: pnR6M03wmuDB7PgZLNJplhjkOwLMgUJfzNhDXWGEHgYL4wtYEQRjm6VukB4x6n7Xsiyshz0UwN yS8HbkQqn0kA== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904243" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904243" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:09 -0700 IronPort-SDR: QoD3zkxsnqre0eitKTRB4xZWNv+IsMc3yr2Z7F3VCY/V+/o++8nPg4Fba8QfCIjUqkwywiV6TI G9Bmg/JgTYgA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875225" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:08 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Yuying Zhang Date: Tue, 13 Apr 2021 22:30:32 +0800 Message-Id: <20210413143038.2621294-9-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 08/14] net/ice/base: add priority check of matching recipe X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Check priority when look for a recipe which matches our request to enable flow priority for switch filter. Signed-off-by: Yuying Zhang Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_switch.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index d4203f2730..db0cc03324 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6574,7 +6574,7 @@ static struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { * Returns index of matching recipe, or ICE_MAX_NUM_RECIPES if not found. */ static u16 ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts, - enum ice_sw_tunnel_type tun_type) + enum ice_sw_tunnel_type tun_type, u32 priority) { bool refresh_required = true; struct ice_sw_recipe *recp; @@ -6636,7 +6636,8 @@ static u16 ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts, /* If for "i"th recipe the found was never set to false * then it means we found our match */ - if (tun_type == recp[i].tun_type && found) + if (tun_type == recp[i].tun_type && found && + priority == recp[i].priority) return i; /* Return the recipe ID */ } } @@ -7650,7 +7651,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, } /* Look for a recipe which matches our requested fv / mask list */ - *rid = ice_find_recp(hw, lkup_exts, rinfo->tun_type); + *rid = ice_find_recp(hw, lkup_exts, rinfo->tun_type, rinfo->priority); if (*rid < ICE_MAX_NUM_RECIPES) /* Success if found a recipe that match the existing criteria */ goto err_unroll; @@ -8779,7 +8780,7 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, if (status) return status; - rid = ice_find_recp(hw, &lkup_exts, rinfo->tun_type); + rid = ice_find_recp(hw, &lkup_exts, rinfo->tun_type, rinfo->priority); /* If did not find a recipe that match the existing criteria */ if (rid == ICE_MAX_NUM_RECIPES) return ICE_ERR_PARAM; From patchwork Tue Apr 13 14:30:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91270 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BFB91A0524; Tue, 13 Apr 2021 16:27:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D132716107D; Tue, 13 Apr 2021 16:27:13 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 902ED161073 for ; Tue, 13 Apr 2021 16:27:11 +0200 (CEST) IronPort-SDR: cN0yvQmXwfYMw2iylTNsQnvVpz2gumy4M1h+6oyTO6pIlphy2oiCcP2m7GSV+2G8Ih9QJ+uMNq kaX/uGVcxukg== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904248" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904248" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:11 -0700 IronPort-SDR: vlVs0xtEGGFQSi65b9mWnzG55PuVijfmRkWo+R8CzuhdVBzrJkGpe70ytuMK3vFt6KOtcfgSb9 N1s9ZyrQH9Fw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875234" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:09 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Maciej Machnikowski Date: Tue, 13 Apr 2021 22:30:33 +0800 Message-Id: <20210413143038.2621294-10-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 09/14] net/ice/base: enable I2C read/write commands X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Enable I2C read/write AQ commands. They are now required for controlling the external physical connectors via external I2C port expander on E810-T adapters. Signed-off-by: Maciej Machnikowski Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_adminq_cmd.h | 29 +++++++++ drivers/net/ice/base/ice_common.c | 94 +++++++++++++++++++++++++++ drivers/net/ice/base/ice_common.h | 8 +++ 3 files changed, 131 insertions(+) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 4b78da92b5..f9a741e99f 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -1665,6 +1665,31 @@ struct ice_aqc_get_link_topo { u8 rsvd[9]; }; +/* Read/Write I2C (direct, 0x06E2/0x06E3) */ +struct ice_aqc_i2c { + struct ice_aqc_link_topo_addr topo_addr; + __le16 i2c_addr; + u8 i2c_params; +#define ICE_AQC_I2C_DATA_SIZE_S 0 +#define ICE_AQC_I2C_DATA_SIZE_M (0xF << ICE_AQC_I2C_DATA_SIZE_S) +#define ICE_AQC_I2C_ADDR_TYPE_M BIT(4) +#define ICE_AQC_I2C_ADDR_TYPE_7BIT 0 +#define ICE_AQC_I2C_ADDR_TYPE_10BIT ICE_AQC_I2C_ADDR_TYPE_M +#define ICE_AQC_I2C_DATA_OFFSET_S 5 +#define ICE_AQC_I2C_DATA_OFFSET_M (0x3 << ICE_AQC_I2C_DATA_OFFSET_S) +#define ICE_AQC_I2C_USE_REPEATED_START BIT(7) + u8 rsvd; + __le16 i2c_bus_addr; +#define ICE_AQC_I2C_ADDR_7BIT_MASK 0x7F +#define ICE_AQC_I2C_ADDR_10BIT_MASK 0x3FF + u8 i2c_data[4]; /* Used only by write command, reserved in read. */ +}; + +/* Read I2C Response (direct, 0x06E2) */ +struct ice_aqc_read_i2c_resp { + u8 i2c_data[16]; +}; + /* Set Port Identification LED (direct, 0x06E9) */ struct ice_aqc_set_port_id_led { u8 lport_num; @@ -2838,6 +2863,8 @@ struct ice_aq_desc { struct ice_aqc_get_phy_caps get_phy; struct ice_aqc_set_phy_cfg set_phy; struct ice_aqc_restart_an restart_an; + struct ice_aqc_i2c read_write_i2c; + struct ice_aqc_read_i2c_resp read_i2c_resp; struct ice_aqc_sff_eeprom read_write_sff_param; struct ice_aqc_set_port_id_led set_port_id_led; struct ice_aqc_get_sw_cfg get_sw_conf; @@ -3074,6 +3101,8 @@ enum ice_adminq_opc { ice_aqc_opc_set_event_mask = 0x0613, ice_aqc_opc_set_mac_lb = 0x0620, ice_aqc_opc_get_link_topo = 0x06E0, + ice_aqc_opc_read_i2c = 0x06E2, + ice_aqc_opc_write_i2c = 0x06E3, ice_aqc_opc_set_port_id_led = 0x06E9, ice_aqc_opc_get_port_options = 0x06EA, ice_aqc_opc_set_port_option = 0x06EB, diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 356a8b4d09..befaa83a4b 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -4766,6 +4766,100 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw) return ICE_FW_MODE_NORMAL; } +/** + * ice_aq_read_i2c + * @hw: pointer to the hw struct + * @topo_addr: topology address for a device to communicate with + * @bus_addr: 7-bit I2C bus address + * @addr: I2C memory address (I2C offset) with up to 16 bits + * @params: I2C parameters: bit [7] - Repeated start, bits [6:5] data offset size, + * bit [4] - I2C address type, bits [3:0] - data size to read (0-16 bytes) + * @data: pointer to data (0 to 16 bytes) to be read from the I2C device + * @cd: pointer to command details structure or NULL + * + * Read I2C (0x06E2) + */ +enum ice_status +ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr, + u16 bus_addr, __le16 addr, u8 params, u8 *data, + struct ice_sq_cd *cd) +{ + struct ice_aq_desc desc = { 0 }; + struct ice_aqc_i2c *cmd; + enum ice_status status; + u8 data_size; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_read_i2c); + cmd = &desc.params.read_write_i2c; + + if (!data) + return ICE_ERR_PARAM; + + data_size = (params & ICE_AQC_I2C_DATA_SIZE_M) >> ICE_AQC_I2C_DATA_SIZE_S; + + cmd->i2c_bus_addr = CPU_TO_LE16(bus_addr); + cmd->topo_addr = topo_addr; + cmd->i2c_params = params; + cmd->i2c_addr = addr; + + status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd); + if (!status) { + struct ice_aqc_read_i2c_resp *resp; + u8 i; + + resp = &desc.params.read_i2c_resp; + for (i = 0; i < data_size; i++) { + *data = resp->i2c_data[i]; + data++; + } + } + + return status; +} + +/** + * ice_aq_write_i2c + * @hw: pointer to the hw struct + * @topo_addr: topology address for a device to communicate with + * @bus_addr: 7-bit I2C bus address + * @addr: I2C memory address (I2C offset) with up to 16 bits + * @params: I2C parameters: bit [4] - I2C address type, bits [3:0] - data size to write (0-7 bytes) + * @data: pointer to data (0 to 4 bytes) to be written to the I2C device + * @cd: pointer to command details structure or NULL + * + * Write I2C (0x06E3) + */ +enum ice_status +ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr, + u16 bus_addr, __le16 addr, u8 params, u8 *data, + struct ice_sq_cd *cd) +{ + struct ice_aq_desc desc = { 0 }; + struct ice_aqc_i2c *cmd; + u8 i, data_size; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_write_i2c); + cmd = &desc.params.read_write_i2c; + + data_size = (params & ICE_AQC_I2C_DATA_SIZE_M) >> ICE_AQC_I2C_DATA_SIZE_S; + + /* data_size limited to 4 */ + if (data_size > 4) + return ICE_ERR_PARAM; + + cmd->i2c_bus_addr = CPU_TO_LE16(bus_addr); + cmd->topo_addr = topo_addr; + cmd->i2c_params = params; + cmd->i2c_addr = addr; + + for (i = 0; i < data_size; i++) { + cmd->i2c_data[i] = *data; + data++; + } + + return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); +} + /** * ice_fw_supports_link_override * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index 5b720c3b09..f9e3ed1d67 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -225,5 +225,13 @@ ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size, bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw); enum ice_status ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add); +enum ice_status +ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr, + u16 bus_addr, __le16 addr, u8 params, u8 *data, + struct ice_sq_cd *cd); +enum ice_status +ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr, + u16 bus_addr, __le16 addr, u8 params, u8 *data, + struct ice_sq_cd *cd); bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw); #endif /* _ICE_COMMON_H_ */ From patchwork Tue Apr 13 14:30:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91271 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E180DA0524; Tue, 13 Apr 2021 16:28:05 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 72394161080; Tue, 13 Apr 2021 16:27:15 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 5712A16107B for ; Tue, 13 Apr 2021 16:27:13 +0200 (CEST) IronPort-SDR: sJGiyE7BjKQtoeaa1U6HMwcvI9+5vrZtSMpJHQ9gUbMnJpbpZe60rCL2pY8c3TM+jTraYlGCWT u9hY0lqt07lA== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904273" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904273" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:12 -0700 IronPort-SDR: xNnOTHY96X55hIGYlmxwjADqUne+ZZgqksakqVjT2zb9F1WPRIB/9+Zv8DKsEt1aGw3qUlHdP8 mqMzhGm13nhw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875243" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:11 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Karol Kolacinski Date: Tue, 13 Apr 2021 22:30:34 +0800 Message-Id: <20210413143038.2621294-11-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 10/14] net/ice/base: add set/get GPIO helper functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add helper functions to set the GPIO pin state or get the value of a GPIO signal that's the part of the topology based on AQ commands. This change is needed to setup GPIO pins state for PTP, SyncE etc. Signed-off-by: Karol Kolacinski Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_adminq_cmd.h | 11 +++++ drivers/net/ice/base/ice_common.c | 58 +++++++++++++++++++++++++++ drivers/net/ice/base/ice_common.h | 6 +++ 3 files changed, 75 insertions(+) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index f9a741e99f..6b662b3889 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -1701,6 +1701,16 @@ struct ice_aqc_set_port_id_led { u8 rsvd[13]; }; +/* Set/Get GPIO (direct, 0x06EC/0x06ED) */ +struct ice_aqc_gpio { + __le16 gpio_ctrl_handle; +#define ICE_AQC_GPIO_HANDLE_S 0 +#define ICE_AQC_GPIO_HANDLE_M (0x3FF << ICE_AQC_GPIO_HANDLE_S) + u8 gpio_num; + u8 gpio_val; + u8 rsvd[12]; +}; + /* Read/Write SFF EEPROM command (indirect 0x06EE) */ struct ice_aqc_sff_eeprom { u8 lport_num; @@ -2865,6 +2875,7 @@ struct ice_aq_desc { struct ice_aqc_restart_an restart_an; struct ice_aqc_i2c read_write_i2c; struct ice_aqc_read_i2c_resp read_i2c_resp; + struct ice_aqc_gpio read_write_gpio; struct ice_aqc_sff_eeprom read_write_sff_param; struct ice_aqc_set_port_id_led set_port_id_led; struct ice_aqc_get_sw_cfg get_sw_conf; diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index befaa83a4b..2424f3b4b3 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -4860,6 +4860,64 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr, return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); } +/** + * ice_aq_set_gpio + * @hw: pointer to the hw struct + * @gpio_ctrl_handle: GPIO controller node handle + * @pin_idx: IO Number of the GPIO that needs to be set + * @value: SW provide IO value to set in the LSB + * @cd: pointer to command details structure or NULL + * + * Sends 0x06EC AQ command to set the GPIO pin state that's part of the topology + */ +enum ice_status +ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value, + struct ice_sq_cd *cd) +{ + struct ice_aqc_gpio *cmd; + struct ice_aq_desc desc; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_gpio); + cmd = &desc.params.read_write_gpio; + cmd->gpio_ctrl_handle = gpio_ctrl_handle; + cmd->gpio_num = pin_idx; + cmd->gpio_val = value ? 1 : 0; + + return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); +} + +/** + * ice_aq_get_gpio + * @hw: pointer to the hw struct + * @gpio_ctrl_handle: GPIO controller node handle + * @pin_idx: IO Number of the GPIO that needs to be set + * @value: IO value read + * @cd: pointer to command details structure or NULL + * + * Sends 0x06ED AQ command to get the value of a GPIO signal which is part of + * the topology + */ +enum ice_status +ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, + bool *value, struct ice_sq_cd *cd) +{ + struct ice_aqc_gpio *cmd; + struct ice_aq_desc desc; + enum ice_status status; + + ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio); + cmd = &desc.params.read_write_gpio; + cmd->gpio_ctrl_handle = gpio_ctrl_handle; + cmd->gpio_num = pin_idx; + + status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd); + if (status) + return status; + + *value = !!cmd->gpio_val; + return ICE_SUCCESS; +} + /** * ice_fw_supports_link_override * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index f9e3ed1d67..62b5052797 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -220,6 +220,12 @@ enum ice_status ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, struct ice_aqc_txsched_elem_data *buf); enum ice_status +ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value, + struct ice_sq_cd *cd); +enum ice_status +ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, + bool *value, struct ice_sq_cd *cd); +enum ice_status ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size, struct ice_sq_cd *cd); bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw); From patchwork Tue Apr 13 14:30:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91272 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B024FA0524; Tue, 13 Apr 2021 16:28:12 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CD3FC16108F; Tue, 13 Apr 2021 16:27:16 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 0CFA2161082 for ; Tue, 13 Apr 2021 16:27:14 +0200 (CEST) IronPort-SDR: 9WwWlVpNNi9FDXLKpkuNNy7UxdCWZmoEaLJRpR3SWu9Orb1rnaFFX5aERk1g5ZMllSljFa1NfU fhnJKPNRY65w== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904285" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904285" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:14 -0700 IronPort-SDR: 74zaLgtba8VfQnZkIJX2VfUDJs1v83fm2mI/mwSaAzNZkL4WO50ur+6zwSocwdEy9RH1pGYN1b khpiZV3zaasA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875254" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:13 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Haiyue Wang Date: Tue, 13 Apr 2021 22:30:35 +0800 Message-Id: <20210413143038.2621294-12-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 11/14] net/ice/base: add inner VLAN protocol type for QinQ filter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Since VLAN protocol type 'ICE_VLAN_OFOS' has been changed to map the hardware VLAN protocol ID to 'ICE_VLAN_OF_HW (16)' when in Double VLAN mode, and to 'ICE_VLAN_OL_HW (17)' when in Single VLAN mode. So 'ICE_VLAN_OFOS' can't be used with 'ICE_VLAN_EX' which is outer VLAN hardware protocol ID 'ICE_VLAN_OF_HW (16)' to do the QinQ VLAN pattern. Introduce the new inner VLAN protocol type 'ICE_VLAN_IN', which is inner VLAN hardware protocol ID 'ICE_VLAN_OL_HW (17)'. Now for QinQ VLAN pattern, the protocol 'ICE_VLAN_EX' and 'ICE_VLAN_IN' should be used to set the related protocol header fields like VLAN ID. Signed-off-by: Haiyue Wang Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_protocol_type.h | 1 + drivers/net/ice/base/ice_switch.c | 23 +++++++++++++---------- 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index ffc887c7be..d078061afb 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -53,6 +53,7 @@ enum ice_protocol_type { ICE_NAT_T, ICE_GTP_NO_PAY, ICE_VLAN_EX, + ICE_VLAN_IN, ICE_PROTOCOL_LAST }; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index db0cc03324..763c7b8224 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -1612,7 +1612,7 @@ static const struct ice_dummy_pkt_offsets dummy_qinq_ipv4_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_VLAN_EX, 14 }, - { ICE_VLAN_OFOS, 18 }, + { ICE_VLAN_IN, 18 }, { ICE_IPV4_OFOS, 22 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -1625,7 +1625,7 @@ static const u8 dummy_qinq_ipv4_pkt[] = { 0x91, 0x00, /* ICE_ETYPE_OL 12 */ 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ - 0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_OFOS 18 */ + 0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_IN 18 */ 0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 22 */ 0x00, 0x01, 0x00, 0x00, @@ -1643,7 +1643,7 @@ static const struct ice_dummy_pkt_offsets dummy_qinq_ipv6_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_VLAN_EX, 14 }, - { ICE_VLAN_OFOS, 18 }, + { ICE_VLAN_IN, 18 }, { ICE_IPV6_OFOS, 22 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -1656,7 +1656,7 @@ static const u8 dummy_qinq_ipv6_pkt[] = { 0x91, 0x00, /* ICE_ETYPE_OL 12 */ 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ - 0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_OFOS 18 */ + 0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_IN 18 */ 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 22 */ 0x00, 0x10, 0x11, 0x00, /* Next header UDP */ @@ -1682,7 +1682,7 @@ static const struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_VLAN_EX, 14 }, - { ICE_VLAN_OFOS, 18 }, + { ICE_VLAN_IN, 18 }, { ICE_PPPOE, 22 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -1692,7 +1692,7 @@ struct ice_dummy_pkt_offsets dummy_qinq_pppoe_ipv4_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_VLAN_EX, 14 }, - { ICE_VLAN_OFOS, 18 }, + { ICE_VLAN_IN, 18 }, { ICE_PPPOE, 22 }, { ICE_IPV4_OFOS, 30 }, { ICE_PROTOCOL_LAST, 0 }, @@ -1706,14 +1706,14 @@ static const u8 dummy_qinq_pppoe_ipv4_pkt[] = { 0x91, 0x00, /* ICE_ETYPE_OL 12 */ 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ - 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 18 */ + 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_IN 18 */ 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 22 */ 0x00, 0x16, 0x00, 0x21, /* PPP Link Layer 28 */ - 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 30 */ + 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_OFOS 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -1727,7 +1727,7 @@ struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_ipv6_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_VLAN_EX, 14}, - { ICE_VLAN_OFOS, 18 }, + { ICE_VLAN_IN, 18 }, { ICE_PPPOE, 22 }, { ICE_IPV6_OFOS, 30 }, { ICE_PROTOCOL_LAST, 0 }, @@ -1741,7 +1741,7 @@ static const u8 dummy_qinq_pppoe_ipv6_packet[] = { 0x91, 0x00, /* ICE_ETYPE_OL 12 */ 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ - 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 18 */ + 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_IN 18 */ 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 22 */ 0x00, 0x2a, @@ -6530,6 +6530,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = { { ICE_NAT_T, { 8, 10, 12, 14 } }, { ICE_GTP_NO_PAY, { 8, 10, 12, 14 } }, { ICE_VLAN_EX, { 0, 2 } }, + { ICE_VLAN_IN, { 0, 2 } }, }; /* The following table describes preferred grouping of recipes. @@ -6564,6 +6565,7 @@ static struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { { ICE_NAT_T, ICE_UDP_ILOS_HW }, { ICE_GTP_NO_PAY, ICE_UDP_ILOS_HW }, { ICE_VLAN_EX, ICE_VLAN_OF_HW }, + { ICE_VLAN_IN, ICE_VLAN_OL_HW }, }; /** @@ -8139,6 +8141,7 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, break; case ICE_VLAN_OFOS: case ICE_VLAN_EX: + case ICE_VLAN_IN: len = sizeof(struct ice_vlan_hdr); break; case ICE_IPV4_OFOS: From patchwork Tue Apr 13 14:30:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91273 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CF236A0524; Tue, 13 Apr 2021 16:28:18 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1390B161084; Tue, 13 Apr 2021 16:27:18 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 08F93161084; Tue, 13 Apr 2021 16:27:16 +0200 (CEST) IronPort-SDR: JJMW0+MjpIoLlystZlIJzf537EyCTA+ZiOfnvpgN/shkmggS1oosNjRsFKmZWKAjwFdbE1K80r oXpzrNOmTdhg== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904305" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904305" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:16 -0700 IronPort-SDR: xGKN4reatMEffvE4rTa6cet5iM4u7+A5C+bSWT5kQVw/VZ/aaVh4T2gt/w3jDzhm6BGjrJVw1q dRc7fg+fLS/w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875269" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:14 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , stable@dpdk.org, Yuying Zhang Date: Tue, 13 Apr 2021 22:30:36 +0800 Message-Id: <20210413143038.2621294-13-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 12/14] net/ice/base: fix QinQ PPPoE dummy pkt selection X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The dummy packet should be QinQ PPPoE ipv6 when ppp protocol is ipv6. Fixes: bb3386f348dd ("net/ice: enable QinQ filter for switch") Cc: stable@dpdk.org Signed-off-by: Yuying Zhang Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_switch.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 763c7b8224..a567b6de81 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -7808,6 +7808,11 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, *pkt_len = sizeof(dummy_qinq_pppoe_ipv4_pkt); *offsets = dummy_qinq_pppoe_ipv4_packet_offsets; return; + } else if (tun_type == ICE_SW_TUN_PPPOE_QINQ && ipv6) { + *pkt = dummy_qinq_pppoe_ipv6_packet; + *pkt_len = sizeof(dummy_qinq_pppoe_ipv6_packet); + *offsets = dummy_qinq_pppoe_packet_offsets; + return; } else if (tun_type == ICE_SW_TUN_PPPOE_QINQ || tun_type == ICE_SW_TUN_PPPOE_PAY_QINQ) { *pkt = dummy_qinq_pppoe_ipv4_pkt; From patchwork Tue Apr 13 14:30:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91274 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6E0A5A0524; Tue, 13 Apr 2021 16:28:25 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5995016109B; Tue, 13 Apr 2021 16:27:20 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 5FE7D161098 for ; Tue, 13 Apr 2021 16:27:19 +0200 (CEST) IronPort-SDR: KUqC9t32sTAM76wkbIZq1EP8eS7YW5n6Acfb6zWR7ssFLnyqyXcf7H1aOcHrzxRPIWO+dyGGJu GITMlcY2TW8A== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904318" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904318" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:19 -0700 IronPort-SDR: c+yWA3f8GZKSJHK76VcI+5Q2cC1YMdX468av76CKcranvgYr0YzuQ6m99aDyTqEwtuSIebzP2h c9Dw6tb8mpCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875280" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:16 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Ting Xu Date: Tue, 13 Apr 2021 22:30:37 +0800 Message-Id: <20210413143038.2621294-14-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 13/14] net/ice/base: add PTYPE values for PPPoL2TPv2oUDP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add some new macros of PTYPE values to support PPPoL2TPv2oUDP. Signed-off-by: Ting Xu Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_flex_type.h | 31 +++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index 63a2cb8bc4..8d2ba991e1 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -416,7 +416,36 @@ enum ice_sect { #define ICE_MAC_IPV6_PFCP_SESSION 354 #define ICE_MAC_IPV4_L2TPV3 360 #define ICE_MAC_IPV6_L2TPV3 361 - +#define ICE_MAC_IPV4_L2TPV2_CONTROL 392 +#define ICE_MAC_IPV6_L2TPV2_CONTROL 393 +#define ICE_MAC_IPV4_L2TPV2 394 +#define ICE_MAC_IPV6_L2TPV2 395 +#define ICE_MAC_IPV4_PPPOL2TPV2 396 +#define ICE_MAC_IPV6_PPPOL2TPV2 397 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV4_FRAG 398 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV4_PAY 399 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV4_UDP_PAY 400 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV4_TCP 401 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV4_SCTP 402 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV4_ICMP 403 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV6_FRAG 404 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV6_PAY 405 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV6_UDP_PAY 406 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV6_TCP 407 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV6_SCTP 408 +#define ICE_MAC_IPV4_PPPOL2TPV2_IPV6_ICMPV6 409 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV4_FRAG 410 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV4_PAY 411 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV4_UDP_PAY 412 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV4_TCP 413 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV4_SCTP 414 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV4_ICMP 415 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV6_FRAG 416 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV6_PAY 417 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV6_UDP_PAY 418 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV6_TCP 419 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV6_SCTP 420 +#define ICE_MAC_IPV6_PPPOL2TPV2_IPV6_ICMPV6 421 /* Attributes that can modify PTYPE definitions. * From patchwork Tue Apr 13 14:30:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 91275 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1982AA0524; Tue, 13 Apr 2021 16:28:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8BC8F161098; Tue, 13 Apr 2021 16:27:22 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id E1815161098 for ; Tue, 13 Apr 2021 16:27:20 +0200 (CEST) IronPort-SDR: nZhEzvj553DOQQvXNpQ7uzMO5NUYe6XVT34lqBVVj7JDDDg1imjjqCMqoOM18VtotIci13Aotm tm7fgxa05LbQ== X-IronPort-AV: E=McAfee;i="6200,9189,9953"; a="214904328" X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="214904328" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2021 07:27:20 -0700 IronPort-SDR: axwcpuD7+NlhHMH0BLRQ1f4+1PQHmjLj4Ol4CvJr8VNoiuMmLQkXGaGx35+kAWozom8NfPn2tE EnQNelMMALmw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,219,1613462400"; d="scan'208";a="417875285" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga008.fm.intel.com with ESMTP; 13 Apr 2021 07:27:19 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, ferruh.yigit@intel.com, Qi Zhang , Kiran Patil Date: Tue, 13 Apr 2021 22:30:38 +0800 Message-Id: <20210413143038.2621294-15-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210413143038.2621294-1-qi.z.zhang@intel.com> References: <20210329141411.2395069-1-qi.z.zhang@intel.com> <20210413143038.2621294-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 14/14] net/ice/base: allow support for GTP-U filter using only inner protocols X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Adds a support for switch filter: GTP-U using just inner fields. If user doesn't specify outer protocol and its fields but wants to add switch filter for GTP-U using inner protocols and related fields such as inner L3 and/or inner L4, this patch enables such filtering. Signed-off-by: Kiran Patil Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_protocol_type.h | 2 ++ drivers/net/ice/base/ice_switch.c | 6 ++++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index d078061afb..8c9d098e22 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -110,6 +110,8 @@ enum ice_sw_tunnel_type { ICE_SW_TUN_IPV4_GTPU_IPV6, ICE_SW_TUN_IPV6_GTPU_IPV4, ICE_SW_TUN_IPV6_GTPU_IPV6, + ICE_SW_TUN_GTP_IPV4, + ICE_SW_TUN_GTP_IPV6, ICE_ALL_TUNNELS /* All tunnel types including NVGRE */ }; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index a567b6de81..45f83cd10c 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -7980,13 +7980,15 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, } /* Support GTP tunnel + L3 */ - if (tun_type == ICE_SW_TUN_IPV4_GTPU_IPV4) { + if (tun_type == ICE_SW_TUN_IPV4_GTPU_IPV4 || + tun_type == ICE_SW_TUN_GTP_IPV4) { *pkt = dummy_ipv4_gtpu_ipv4_packet; *pkt_len = sizeof(dummy_ipv4_gtpu_ipv4_packet); *offsets = dummy_ipv4_gtpu_ipv4_packet_offsets; return; } - if (tun_type == ICE_SW_TUN_IPV4_GTPU_IPV6) { + if (tun_type == ICE_SW_TUN_IPV4_GTPU_IPV6 || + tun_type == ICE_SW_TUN_GTP_IPV6) { *pkt = dummy_ipv4_gtpu_ipv6_packet; *pkt_len = sizeof(dummy_ipv4_gtpu_ipv6_packet); *offsets = dummy_ipv4_gtpu_ipv6_packet_offsets;