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GET /api/patches/67304/?format=api
{ "id": 67304, "url": "https://patches.dpdk.org/api/patches/67304/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200327134239.23358-1-rnagadheeraj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200327134239.23358-1-rnagadheeraj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200327134239.23358-1-rnagadheeraj@marvell.com", "date": "2020-03-27T13:42:38", "name": "[v3,1/2] crypto/nitrox: fix invalid CSR register address generation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "cc74ceaa28427ffbb3a6cebb2f8db116f40c47a8", "submitter": { "id": 1365, "url": "https://patches.dpdk.org/api/people/1365/?format=api", "name": "Nagadheeraj Rottela", "email": "rnagadheeraj@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200327134239.23358-1-rnagadheeraj@marvell.com/mbox/", "series": [ { "id": 9078, "url": "https://patches.dpdk.org/api/series/9078/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=9078", "date": "2020-03-27T13:42:38", "name": "[v3,1/2] crypto/nitrox: fix invalid CSR register address generation", "version": 3, "mbox": "https://patches.dpdk.org/series/9078/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/67304/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/67304/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AC50DA057C;\n\tFri, 27 Mar 2020 14:42:49 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 031101C1CD;\n\tFri, 27 Mar 2020 14:42:49 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 8FDE31C1BD\n for <dev@dpdk.org>; Fri, 27 Mar 2020 14:42:47 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 02RDgWuV016659; Fri, 27 Mar 2020 06:42:46 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 300bpd19yb-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Fri, 27 Mar 2020 06:42:46 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 27 Mar\n 2020 06:42:44 -0700", "from hyd1399.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Fri, 27 Mar 2020 06:42:42 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0818; bh=E6U/RlGYzv5I90UpHwvKG0jPZ7MhE9KInEERAPDC+7U=;\n b=VPJq8NX1hnSltzUEZi1Whkrmz3aXDiCssicXJPt2um7dYI3wgGMWS8Jvhmrf0AJniHJY\n WUU78U8VUqaP92D3k5qrRU0IlxyBud4jha9nkkO/8WyiCu0q8IR9yYFfR6IZhGRodOEK\n 2wmElEIG/LHnyjK2y5VarE+lBkbPN5F6BZBKECPubQDrgQs+ImXx6BoDda2mNcGynfm6\n ntM0ljqI3CVD6BPjH8FiZEJHl8HWYJH4utHu1YnWghAtVtOKmoupTiXuJKFYHKBenW36\n V8STuR7Xmj4+O4mKDjn3sSEuYjmv8Gp/1vkoNITkLrlUZ2OxyEf7TGTjSL2zL/Ak3Kmh Xg==", "From": "Nagadheeraj Rottela <rnagadheeraj@marvell.com>", "To": "<akhil.goyal@nxp.com>", "CC": "<dev@dpdk.org>, <thomas@monjalon.net>, <jsrikanth@marvell.com>,\n Nagadheeraj Rottela <rnagadheeraj@marvell.com>", "Date": "Fri, 27 Mar 2020 19:12:38 +0530", "Message-ID": "<20200327134239.23358-1-rnagadheeraj@marvell.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "\n <VE1PR04MB6639CE605288D79F1122E18AE6CE0@VE1PR04MB6639.eurprd04.prod.outlook.com>", "References": "\n <VE1PR04MB6639CE605288D79F1122E18AE6CE0@VE1PR04MB6639.eurprd04.prod.outlook.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.645\n definitions=2020-03-27_04:2020-03-27,\n 2020-03-27 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 1/2] crypto/nitrox: fix invalid CSR register\n\taddress generation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will\nevaluate to incorrect values due to unintended sign extension from int\nto unsigned long. To fix this, add UL suffix to the constants in these\nmacros. The same problem is with AQMQ_QSZX() macro also.\n\nCoverity issue: 349899, 349905, 349911, 349921, 349923\n\nFixes: 32e4930d5a3b (\"crypto/nitrox: add hardware queue management\")\nFixes: 0a8fc2423bff (\"crypto/nitrox: introduce Nitrox driver\")\n\nSigned-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>\n---\n drivers/crypto/nitrox/nitrox_csr.h | 20 ++++++++++----------\n 1 file changed, 10 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/crypto/nitrox/nitrox_csr.h b/drivers/crypto/nitrox/nitrox_csr.h\nindex 8cd92e38b..de7a3c671 100644\n--- a/drivers/crypto/nitrox/nitrox_csr.h\n+++ b/drivers/crypto/nitrox/nitrox_csr.h\n@@ -12,18 +12,18 @@\n #define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset))\n \n /* NPS packet registers */\n-#define NPS_PKT_IN_INSTR_CTLX(_i)\t(0x10060 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_INSTR_BADDRX(_i)\t(0x10068 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_INSTR_RSIZEX(_i)\t(0x10070 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_DONE_CNTSX(_i)\t(0x10080 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i)\t(0x10078 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_INT_LEVELSX(_i)\t\t(0x10088 + ((_i) * 0x40000))\n-#define NPS_PKT_SLC_CTLX(_i)\t\t(0x10000 + ((_i) * 0x40000))\n-#define NPS_PKT_SLC_CNTSX(_i)\t\t(0x10008 + ((_i) * 0x40000))\n-#define NPS_PKT_SLC_INT_LEVELSX(_i)\t(0x10010 + ((_i) * 0x40000))\n+#define NPS_PKT_IN_INSTR_CTLX(_i)\t(0x10060UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_INSTR_BADDRX(_i)\t(0x10068UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_INSTR_RSIZEX(_i)\t(0x10070UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_DONE_CNTSX(_i)\t(0x10080UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i)\t(0x10078UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_INT_LEVELSX(_i)\t\t(0x10088UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_SLC_CTLX(_i)\t\t(0x10000UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_SLC_CNTSX(_i)\t\t(0x10008UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_SLC_INT_LEVELSX(_i)\t(0x10010UL + ((_i) * 0x40000UL))\n \n /* AQM Virtual Function Registers */\n-#define AQMQ_QSZX(_i)\t\t\t(0x20008 + ((_i)*0x40000))\n+#define AQMQ_QSZX(_i)\t\t\t(0x20008UL + ((_i) * 0x40000UL))\n \n static inline uint64_t\n nitrox_read_csr(uint8_t *bar_addr, uint64_t offset)\n", "prefixes": [ "v3", "1/2" ] }