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GET /api/patches/112318/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 112318,
    "url": "https://patches.dpdk.org/api/patches/112318/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220604162651.3503338-5-tduszynski@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220604162651.3503338-5-tduszynski@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220604162651.3503338-5-tduszynski@marvell.com",
    "date": "2022-06-04T16:26:45",
    "name": "[04/10] common/cnxk: don't switch affinity back and forth",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "808ceb66918f031d8fa669693cbedf1655c929da",
    "submitter": {
        "id": 2215,
        "url": "https://patches.dpdk.org/api/people/2215/?format=api",
        "name": "Tomasz Duszynski",
        "email": "tduszynski@marvell.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220604162651.3503338-5-tduszynski@marvell.com/mbox/",
    "series": [
        {
            "id": 23325,
            "url": "https://patches.dpdk.org/api/series/23325/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=23325",
            "date": "2022-06-04T16:26:41",
            "name": "Sync BPHY changes",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/23325/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/112318/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/112318/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
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            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CFC9542B6C;\n\tSat,  4 Jun 2022 18:27:26 +0200 (CEST)",
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            "from localhost.localdomain (unknown [10.28.34.39])\n by maili.marvell.com (Postfix) with ESMTP id 615623F7097;\n Sat,  4 Jun 2022 09:27:19 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=xUeP9GW2sneb/ayTg0EJaeq7K1mjwvCAkacovcaTUDU=;\n b=VgbWqUR7yz9z4avK0yoYYVRFu9G7S9xKN0ZGGRK1e1pcpOfU2TRQJpW4WinFItcNrbqC\n IxTc7M40nD7Fl+06HEe3EDs6qh558HazLlQlQo+ALyXS2ZnclmcFfyWulTAJZD9UlO6s\n qM97grw6TV6xDflQjjHEzgtJuGVYWhus6h3An/lhBvfMf0mJQxqUPGMlHsx92rPa1Y0U\n 0xx8gVWIAqp4bH2sT5aou6Djb3AANFhChxESyoej68Rhv3fvhe2NrYnyns/LvmJanmci\n Wr2B6bi6wz+JAx8v91Qxk5tl5kMfWYOktnk5PMVtmT1mrBO2NVkBO4Rjb6vkjMNlgvsm 0A==",
        "From": "Tomasz Duszynski <tduszynski@marvell.com>",
        "To": "<dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>",
        "CC": "<thomas@monjalon.net>, <jerinj@marvell.com>, Tomasz Duszynski\n <tduszynski@marvell.com>, Jakub Palider <jpalider@marvell.com>",
        "Subject": "[PATCH 04/10] common/cnxk: don't switch affinity back and forth",
        "Date": "Sat, 4 Jun 2022 18:26:45 +0200",
        "Message-ID": "<20220604162651.3503338-5-tduszynski@marvell.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20220604162651.3503338-1-tduszynski@marvell.com>",
        "References": "<20220604162651.3503338-1-tduszynski@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-ORIG-GUID": "uB29Bo8-6_OEmh1UQrmrgB79MLvoXGXT",
        "X-Proofpoint-GUID": "uB29Bo8-6_OEmh1UQrmrgB79MLvoXGXT",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514\n definitions=2022-06-04_05,2022-06-03_01,2022-02-23_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Switching affinity back and forth was used as a mean to pass cpu number\nto irq registration routine which is an overkill.\n\nSimplify current logic by extending irq registration routine parameter\nlist with a cpu which should run irq handler.\n\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\nReviewed-by: Jakub Palider <jpalider@marvell.com>\nReviewed-by: Jerin Jacob Kollanukkaran <jerinj@marvell.com>\n---\n drivers/common/cnxk/roc_bphy_irq.c | 103 +++--------------------------\n 1 file changed, 9 insertions(+), 94 deletions(-)",
    "diff": "diff --git a/drivers/common/cnxk/roc_bphy_irq.c b/drivers/common/cnxk/roc_bphy_irq.c\nindex f4954d2a28..7b39b61537 100644\n--- a/drivers/common/cnxk/roc_bphy_irq.c\n+++ b/drivers/common/cnxk/roc_bphy_irq.c\n@@ -11,8 +11,6 @@\n #include \"roc_api.h\"\n #include \"roc_bphy_irq.h\"\n \n-#define roc_cpuset_t cpu_set_t\n-\n struct roc_bphy_irq_usr_data {\n \tuint64_t isr_base;\n \tuint64_t sp;\n@@ -222,14 +220,13 @@ roc_bphy_intr_handler(unsigned int irq_num)\n }\n \n static int\n-roc_bphy_irq_handler_set(struct roc_bphy_irq_chip *chip, int irq_num,\n+roc_bphy_irq_handler_set(struct roc_bphy_irq_chip *chip, int cpu, int irq_num,\n \t\t\t void (*isr)(int irq_num, void *isr_data),\n \t\t\t void *isr_data)\n {\n-\troc_cpuset_t orig_cpuset, intr_cpuset;\n \tstruct roc_bphy_irq_usr_data irq_usr;\n \tconst struct plt_memzone *mz;\n-\tint i, retval, curr_cpu, rc;\n+\tint retval, rc;\n \tchar *env;\n \n \tmz = plt_memzone_lookup(chip->mz_name);\n@@ -244,38 +241,11 @@ roc_bphy_irq_handler_set(struct roc_bphy_irq_chip *chip, int irq_num,\n \tif (chip->irq_vecs[irq_num].handler != NULL)\n \t\treturn -EINVAL;\n \n-\trc = pthread_getaffinity_np(pthread_self(), sizeof(orig_cpuset),\n-\t\t\t\t    &orig_cpuset);\n-\tif (rc < 0) {\n-\t\tplt_err(\"Failed to get affinity mask\");\n-\t\treturn rc;\n-\t}\n-\n-\tfor (curr_cpu = -1, i = 0; i < CPU_SETSIZE; i++)\n-\t\tif (CPU_ISSET(i, &orig_cpuset))\n-\t\t\tcurr_cpu = i;\n-\tif (curr_cpu < 0)\n-\t\treturn -ENOENT;\n-\n-\tCPU_ZERO(&intr_cpuset);\n-\tCPU_SET(curr_cpu, &intr_cpuset);\n-\trc = pthread_setaffinity_np(pthread_self(), sizeof(intr_cpuset),\n-\t\t\t\t\t&intr_cpuset);\n-\tif (rc < 0) {\n-\t\tplt_err(\"Failed to set affinity mask\");\n-\t\treturn rc;\n-\t}\n-\n \tirq_usr.isr_base = (uint64_t)roc_bphy_intr_handler;\n-\tirq_usr.sp = (uint64_t)roc_bphy_irq_stack_get(curr_cpu);\n-\tirq_usr.cpu = curr_cpu;\n-\tif (irq_usr.sp == 0) {\n-\t\trc = pthread_setaffinity_np(pthread_self(), sizeof(orig_cpuset),\n-\t\t\t\t\t    &orig_cpuset);\n-\t\tif (rc < 0)\n-\t\t\tplt_err(\"Failed to restore affinity mask\");\n-\t\treturn rc;\n-\t}\n+\tirq_usr.sp = (uint64_t)roc_bphy_irq_stack_get(cpu);\n+\tirq_usr.cpu = cpu;\n+\tif (irq_usr.sp == 0)\n+\t\treturn -ENOMEM;\n \n \t/* On simulator memory locking operation takes much time. We want\n \t * to skip this when running in such an environment.\n@@ -289,23 +259,18 @@ roc_bphy_irq_handler_set(struct roc_bphy_irq_chip *chip, int irq_num,\n \n \t*((struct roc_bphy_irq_chip **)(mz->addr)) = chip;\n \tirq_usr.irq_num = irq_num;\n-\tchip->irq_vecs[irq_num].handler_cpu = curr_cpu;\n+\tchip->irq_vecs[irq_num].handler_cpu = cpu;\n \tchip->irq_vecs[irq_num].handler = isr;\n \tchip->irq_vecs[irq_num].isr_data = isr_data;\n \tretval = ioctl(chip->intfd, ROC_BPHY_IOC_SET_BPHY_HANDLER, &irq_usr);\n \tif (retval != 0) {\n-\t\troc_bphy_irq_stack_remove(curr_cpu);\n+\t\troc_bphy_irq_stack_remove(cpu);\n \t\tchip->irq_vecs[irq_num].handler = NULL;\n \t\tchip->irq_vecs[irq_num].handler_cpu = -1;\n \t} else {\n \t\tchip->n_handlers++;\n \t}\n \n-\trc = pthread_setaffinity_np(pthread_self(), sizeof(orig_cpuset),\n-\t\t\t\t    &orig_cpuset);\n-\tif (rc < 0)\n-\t\tplt_warn(\"Failed to restore affinity mask\");\n-\n \treturn retval;\n }\n \n@@ -327,7 +292,6 @@ roc_bphy_intr_max_get(struct roc_bphy_irq_chip *irq_chip)\n int\n roc_bphy_intr_clear(struct roc_bphy_irq_chip *chip, int irq_num)\n {\n-\troc_cpuset_t orig_cpuset, intr_cpuset;\n \tconst struct plt_memzone *mz;\n \tint retval;\n \n@@ -343,24 +307,6 @@ roc_bphy_intr_clear(struct roc_bphy_irq_chip *chip, int irq_num)\n \tif (mz == NULL)\n \t\treturn -ENXIO;\n \n-\tretval = pthread_getaffinity_np(pthread_self(), sizeof(orig_cpuset),\n-\t\t\t\t\t&orig_cpuset);\n-\tif (retval < 0) {\n-\t\tplt_warn(\"Failed to get affinity mask\");\n-\t\tCPU_ZERO(&orig_cpuset);\n-\t\tCPU_SET(0, &orig_cpuset);\n-\t}\n-\n-\tCPU_ZERO(&intr_cpuset);\n-\tCPU_SET(chip->irq_vecs[irq_num].handler_cpu, &intr_cpuset);\n-\tretval = pthread_setaffinity_np(pthread_self(), sizeof(intr_cpuset),\n-\t\t\t\t\t&intr_cpuset);\n-\tif (retval < 0) {\n-\t\tplt_warn(\"Failed to set affinity mask\");\n-\t\tCPU_ZERO(&orig_cpuset);\n-\t\tCPU_SET(0, &orig_cpuset);\n-\t}\n-\n \tretval = ioctl(chip->intfd, ROC_BPHY_IOC_CLR_BPHY_HANDLER, irq_num);\n \tif (retval == 0) {\n \t\troc_bphy_irq_stack_remove(chip->irq_vecs[irq_num].handler_cpu);\n@@ -378,14 +324,6 @@ roc_bphy_intr_clear(struct roc_bphy_irq_chip *chip, int irq_num)\n \t\tplt_err(\"Failed to clear bphy interrupt handler\");\n \t}\n \n-\tretval = pthread_setaffinity_np(pthread_self(), sizeof(orig_cpuset),\n-\t\t\t\t\t&orig_cpuset);\n-\tif (retval < 0) {\n-\t\tplt_warn(\"Failed to restore affinity mask\");\n-\t\tCPU_ZERO(&orig_cpuset);\n-\t\tCPU_SET(0, &orig_cpuset);\n-\t}\n-\n \treturn retval;\n }\n \n@@ -393,36 +331,13 @@ int\n roc_bphy_intr_register(struct roc_bphy_irq_chip *irq_chip,\n \t\t       struct roc_bphy_intr *intr)\n {\n-\troc_cpuset_t orig_cpuset, intr_cpuset;\n-\tint retval;\n \tint ret;\n \n \tif (!roc_bphy_intr_available(irq_chip, intr->irq_num))\n \t\treturn -ENOTSUP;\n \n-\tretval = pthread_getaffinity_np(pthread_self(), sizeof(orig_cpuset),\n-\t\t\t\t\t&orig_cpuset);\n-\tif (retval < 0) {\n-\t\tplt_err(\"Failed to get affinity mask\");\n-\t\treturn retval;\n-\t}\n-\n-\tCPU_ZERO(&intr_cpuset);\n-\tCPU_SET(intr->cpu, &intr_cpuset);\n-\tretval = pthread_setaffinity_np(pthread_self(), sizeof(intr_cpuset),\n-\t\t\t\t\t&intr_cpuset);\n-\tif (retval < 0) {\n-\t\tplt_err(\"Failed to set affinity mask\");\n-\t\treturn retval;\n-\t}\n-\n-\tret = roc_bphy_irq_handler_set(irq_chip, intr->irq_num,\n+\tret = roc_bphy_irq_handler_set(irq_chip, intr->cpu, intr->irq_num,\n \t\t\t\t       intr->intr_handler, intr->isr_data);\n \n-\tretval = pthread_setaffinity_np(pthread_self(), sizeof(orig_cpuset),\n-\t\t\t\t\t&orig_cpuset);\n-\tif (retval < 0)\n-\t\tplt_warn(\"Failed to restore affinity mask\");\n-\n \treturn ret;\n }\n",
    "prefixes": [
        "04/10"
    ]
}