[v2,5/8] crypto/cnxk: move metadata to second cacheline

Message ID 20240314131839.3362494-6-vvelumuri@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: akhil goyal
Headers
Series None |

Checks

Context Check Description
ci/Intel-compilation warning apply issues

Commit Message

Vidya Sagar Velumuri March 14, 2024, 1:18 p.m. UTC
  In security session, move PMD metadata to second cacheline. Also
optimize the fields to minimize the memory usage.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
---
 drivers/crypto/cnxk/cn10k_cryptodev_sec.h | 10 ++++++----
 drivers/crypto/cnxk/cn10k_ipsec.c         |  4 ++--
 drivers/crypto/cnxk/cn10k_tls.c           |  2 +-
 3 files changed, 9 insertions(+), 7 deletions(-)
  

Patch

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_sec.h b/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
index 881a0276cc..230c0f7c1c 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
@@ -5,6 +5,7 @@ 
 #ifndef __CN10K_CRYPTODEV_SEC_H__
 #define __CN10K_CRYPTODEV_SEC_H__
 
+#include <rte_common.h>
 #include <rte_security.h>
 
 #include "roc_constants.h"
@@ -19,23 +20,24 @@  struct cn10k_sec_session {
 	uint8_t rte_sess[SEC_SESS_SIZE];
 
 	/** PMD private space */
+	RTE_MARKER cacheline1 __rte_cache_aligned;
 
-	enum rte_security_session_protocol proto;
 	/** Pre-populated CPT inst words */
 	struct cnxk_cpt_inst_tmpl inst;
 	uint16_t max_extended_len;
 	uint16_t iv_offset;
+	uint8_t proto;
 	uint8_t iv_length;
 	union {
 		struct {
 			uint8_t ip_csum;
-			bool is_outbound;
+			uint8_t is_outbound : 1;
 		} ipsec;
 		struct {
 			uint8_t enable_padding : 1;
 			uint8_t tail_fetch_len : 2;
-			uint8_t rvsd : 5;
-			bool is_write;
+			uint8_t is_write : 1;
+			uint8_t rvsd : 4;
 		} tls;
 	};
 	/** Queue pair */
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c
index 74d6cd70d1..ef5f0ff4aa 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -76,7 +76,7 @@  cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
 	}
 #endif
 
-	sec_sess->ipsec.is_outbound = true;
+	sec_sess->ipsec.is_outbound = 1;
 
 	/* Get Rlen calculation data */
 	ret = cnxk_ipsec_outb_rlens_get(&rlens, ipsec_xfrm, crypto_xfrm);
@@ -177,7 +177,7 @@  cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
 		goto sa_dptr_free;
 	}
 
-	sec_sess->ipsec.is_outbound = false;
+	sec_sess->ipsec.is_outbound = 0;
 	sec_sess->inst.w7 = cpt_inst_w7_get(roc_cpt, in_sa);
 
 	/* Save index/SPI in cookie, specific required for Rx Inject */
diff --git a/drivers/crypto/cnxk/cn10k_tls.c b/drivers/crypto/cnxk/cn10k_tls.c
index 11279dac46..ae3ed3176c 100644
--- a/drivers/crypto/cnxk/cn10k_tls.c
+++ b/drivers/crypto/cnxk/cn10k_tls.c
@@ -739,7 +739,7 @@  cn10k_tls_write_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,
 		sec_sess->iv_length = crypto_xfrm->next->cipher.iv.length;
 	}
 
-	sec_sess->tls.is_write = true;
+	sec_sess->tls.is_write = 1;
 	sec_sess->tls.enable_padding = tls_xfrm->options.extra_padding_enable;
 	sec_sess->max_extended_len = tls_write_rlens_get(tls_xfrm, crypto_xfrm);
 	sec_sess->proto = RTE_SECURITY_PROTOCOL_TLS_RECORD;