diff mbox series

common/cnxk: fix pool buffer size in opaque mode

Message ID 20231013163548.2226503-1-asekhar@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series common/cnxk: fix pool buffer size in opaque mode |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/intel-Functional success Functional PASS
ci/github-robot: build success github build: passed
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS

Commit Message

Ashwin Sekhar T K Oct. 13, 2023, 4:35 p.m. UTC 
  From: Kommula Shiva Shankar <kshankar@marvell.com>

Pool buffer size in opaque mode must always be set to 0.

Fixes: f765f5611240 ("common/cnxk: add NPA pool HW operations")

Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
---
 drivers/common/cnxk/roc_npa.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Jerin Jacob Oct. 18, 2023, 4:29 a.m. UTC | #1 
On Fri, Oct 13, 2023 at 10:06 PM Ashwin Sekhar T K <asekhar@marvell.com> wrote:
>
> From: Kommula Shiva Shankar <kshankar@marvell.com>
>
> Pool buffer size in opaque mode must always be set to 0.
>
> Fixes: f765f5611240 ("common/cnxk: add NPA pool HW operations")
>
> Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
> Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>


Acked-by: Jerin Jacob <jerinj@marvell.com>


> ---
>  drivers/common/cnxk/roc_npa.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
> index b76b8e2342..6c14c49901 100644
> --- a/drivers/common/cnxk/roc_npa.c
> +++ b/drivers/common/cnxk/roc_npa.c
> @@ -517,7 +517,11 @@ npa_aura_pool_pair_alloc(struct npa_lf *lf, const uint32_t block_size,
>         /* Update pool fields */
>         pool->stack_base = mz->iova;
>         pool->ena = 1;
> -       pool->buf_size = block_size / ROC_ALIGN;
> +       /* In opaque mode buffer size must be 0 */
> +       if (!pool->nat_align)
> +               pool->buf_size = 0;
> +       else
> +               pool->buf_size = block_size / ROC_ALIGN;
>         pool->stack_max_pages = stack_size;
>         pool->shift = plt_log2_u32(block_count);
>         pool->shift = pool->shift < 8 ? 0 : pool->shift - 8;
> --
> 2.25.1
>
Jerin Jacob Oct. 18, 2023, 4:30 a.m. UTC | #2 
On Fri, Oct 13, 2023 at 10:06 PM Ashwin Sekhar T K <asekhar@marvell.com> wrote:
>
> From: Kommula Shiva Shankar <kshankar@marvell.com>
>
> Pool buffer size in opaque mode must always be set to 0.
>
> Fixes: f765f5611240 ("common/cnxk: add NPA pool HW operations")
>
> Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
> Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>


Applied to dpdk-next-net-mrvl/for-next-net. Thanks


> ---
>  drivers/common/cnxk/roc_npa.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
> index b76b8e2342..6c14c49901 100644
> --- a/drivers/common/cnxk/roc_npa.c
> +++ b/drivers/common/cnxk/roc_npa.c
> @@ -517,7 +517,11 @@ npa_aura_pool_pair_alloc(struct npa_lf *lf, const uint32_t block_size,
>         /* Update pool fields */
>         pool->stack_base = mz->iova;
>         pool->ena = 1;
> -       pool->buf_size = block_size / ROC_ALIGN;
> +       /* In opaque mode buffer size must be 0 */
> +       if (!pool->nat_align)
> +               pool->buf_size = 0;
> +       else
> +               pool->buf_size = block_size / ROC_ALIGN;
>         pool->stack_max_pages = stack_size;
>         pool->shift = plt_log2_u32(block_count);
>         pool->shift = pool->shift < 8 ? 0 : pool->shift - 8;
> --
> 2.25.1
>
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
index b76b8e2342..6c14c49901 100644
--- a/drivers/common/cnxk/roc_npa.c
+++ b/drivers/common/cnxk/roc_npa.c
@@ -517,7 +517,11 @@  npa_aura_pool_pair_alloc(struct npa_lf *lf, const uint32_t block_size,
 	/* Update pool fields */
 	pool->stack_base = mz->iova;
 	pool->ena = 1;
-	pool->buf_size = block_size / ROC_ALIGN;
+	/* In opaque mode buffer size must be 0 */
+	if (!pool->nat_align)
+		pool->buf_size = 0;
+	else
+		pool->buf_size = block_size / ROC_ALIGN;
 	pool->stack_max_pages = stack_size;
 	pool->shift = plt_log2_u32(block_count);
 	pool->shift = pool->shift < 8 ? 0 : pool->shift - 8;