[v1,1/1] baseband/acc: fix ACC100 HARQ input is alignment

Message ID 20230919182417.93374-2-hernan.vargas@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Maxime Coquelin
Headers
Series baseband/acc: fix for 23.11 |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/intel-Functional success Functional PASS
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS

Commit Message

Hernan Vargas Sept. 19, 2023, 6:24 p.m. UTC
  Some constraints are imposed onto the ACC100 HARQ input size,
but that value is incorrectly aligned down when getting close to
max (Ncb-F) which is not required.
The wireless performance impact is negligeable but still causes a
few LLRs no to be combined at the very end of the circular buffer.

Fixes: 5802f36dd492 ("baseband/acc100: enforce additional check on FCW")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Maxime Coquelin Oct. 3, 2023, 4:10 p.m. UTC | #1
On 9/19/23 20:24, Hernan Vargas wrote:
> Some constraints are imposed onto the ACC100 HARQ input size,
> but that value is incorrectly aligned down when getting close to
> max (Ncb-F) which is not required.
> The wireless performance impact is negligeable but still causes a
> few LLRs no to be combined at the very end of the circular buffer.
> 
> Fixes: 5802f36dd492 ("baseband/acc100: enforce additional check on FCW")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
> index 5362d39c302f..c736f3e4201c 100644
> --- a/drivers/baseband/acc/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc/rte_acc100_pmd.c
> @@ -1218,7 +1218,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
>   				- op->ldpc_dec.n_filler);
>   
>   		/* Alignment on next 64B - Already enforced from HC output */
> -		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC_HARQ_ALIGN_64B);
> +		harq_in_length = RTE_ALIGN_CEIL(harq_in_length, ACC_HARQ_ALIGN_64B);
>   
>   		/* Stronger alignment requirement when in decompression mode */
>   		if (fcw->hcin_decomp_mode > 0)

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime
  
Maxime Coquelin Oct. 12, 2023, 12:53 p.m. UTC | #2
On 9/19/23 20:24, Hernan Vargas wrote:
> Some constraints are imposed onto the ACC100 HARQ input size,
> but that value is incorrectly aligned down when getting close to
> max (Ncb-F) which is not required.
> The wireless performance impact is negligeable but still causes a
> few LLRs no to be combined at the very end of the circular buffer.
> 
> Fixes: 5802f36dd492 ("baseband/acc100: enforce additional check on FCW")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
> index 5362d39c302f..c736f3e4201c 100644
> --- a/drivers/baseband/acc/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc/rte_acc100_pmd.c
> @@ -1218,7 +1218,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
>   				- op->ldpc_dec.n_filler);
>   
>   		/* Alignment on next 64B - Already enforced from HC output */
> -		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC_HARQ_ALIGN_64B);
> +		harq_in_length = RTE_ALIGN_CEIL(harq_in_length, ACC_HARQ_ALIGN_64B);
>   
>   		/* Stronger alignment requirement when in decompression mode */
>   		if (fcw->hcin_decomp_mode > 0)

Applied to next-baseband/for-main.

Thanks,
Maxime
  

Patch

diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index 5362d39c302f..c736f3e4201c 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -1218,7 +1218,7 @@  acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
 				- op->ldpc_dec.n_filler);
 
 		/* Alignment on next 64B - Already enforced from HC output */
-		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC_HARQ_ALIGN_64B);
+		harq_in_length = RTE_ALIGN_CEIL(harq_in_length, ACC_HARQ_ALIGN_64B);
 
 		/* Stronger alignment requirement when in decompression mode */
 		if (fcw->hcin_decomp_mode > 0)