[13/36] net/enetc: fix Rx and Tx queue state

Message ID 20230908112901.1169869-14-haijie1@huawei.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series fix Rx and Tx queue state |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Jie Hai Sept. 8, 2023, 11:28 a.m. UTC
  The DPDK framework reports the queue state, which is stored in
dev->data->tx_queue_state and dev->data->rx_queue_state. The
state is maintained by the driver. Users may determine whether
a queue participates in packet forwarding based on the state.
Therefore, the driver needs to modify the queue state in time
according to the actual situation.

Fixes: 9ad9ff476cac ("ethdev: add queue state in queried queue information")
Cc: stable@dpdk.org

Signed-off-by: Jie Hai <haijie1@huawei.com>
---
 drivers/net/enetc/enetc_ethdev.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)
  

Patch

diff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c
index 1b4337bc488c..c9352f074683 100644
--- a/drivers/net/enetc/enetc_ethdev.c
+++ b/drivers/net/enetc/enetc_ethdev.c
@@ -17,6 +17,7 @@  enetc_dev_start(struct rte_eth_dev *dev)
 		ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	struct enetc_hw *enetc_hw = &hw->hw;
 	uint32_t val;
+	uint16_t i;
 
 	PMD_INIT_FUNC_TRACE();
 	if (hw->device_id == ENETC_DEV_ID_VF)
@@ -45,6 +46,11 @@  enetc_dev_start(struct rte_eth_dev *dev)
 			      ENETC_PM0_IFM_XGMII);
 	}
 
+	for (i = 0; i < dev->data->nb_rx_queues; i++)
+		dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
+	for (i = 0; i < dev->data->nb_tx_queues; i++)
+		dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
+
 	return 0;
 }
 
@@ -55,6 +61,7 @@  enetc_dev_stop(struct rte_eth_dev *dev)
 		ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	struct enetc_hw *enetc_hw = &hw->hw;
 	uint32_t val;
+	uint16_t i;
 
 	PMD_INIT_FUNC_TRACE();
 	dev->data->dev_started = 0;
@@ -69,6 +76,11 @@  enetc_dev_stop(struct rte_eth_dev *dev)
 	enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
 		      val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
 
+	for (i = 0; i < dev->data->nb_rx_queues; i++)
+		dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
+	for (i = 0; i < dev->data->nb_tx_queues; i++)
+		dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
+
 	return 0;
 }