pipeline: increase the pipeline instruction table size

Message ID 20230201075857.602848-1-harshad.suresh.narayane@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series pipeline: increase the pipeline instruction table size |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/iol-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-abi-testing warning Testing issues
ci/iol-aarch64-compile-testing success Testing PASS

Commit Message

Suresh Narayane, Harshad Feb. 1, 2023, 7:58 a.m. UTC
  The complex P4 programs requires more custom instructions, therefore
we increase the pipeline instruction table size from 256 to 1024.

Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
---
 lib/pipeline/rte_swx_pipeline_internal.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Thomas Monjalon Feb. 6, 2023, 8:41 a.m. UTC | #1
01/02/2023 08:58, Harshad Narayane:
> The complex P4 programs requires more custom instructions, therefore
> we increase the pipeline instruction table size from 256 to 1024.
> 
> Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
> Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
> Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

Applied, thanks.
  

Patch

diff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h
index 335506039b..345b32502c 100644
--- a/lib/pipeline/rte_swx_pipeline_internal.h
+++ b/lib/pipeline/rte_swx_pipeline_internal.h
@@ -1465,7 +1465,7 @@  instr_operand_nbo(struct thread *t, const struct instr_operand *x)
 #endif
 
 #ifndef RTE_SWX_PIPELINE_INSTRUCTION_TABLE_SIZE_MAX
-#define RTE_SWX_PIPELINE_INSTRUCTION_TABLE_SIZE_MAX 256
+#define RTE_SWX_PIPELINE_INSTRUCTION_TABLE_SIZE_MAX 1024
 #endif
 
 struct rte_swx_pipeline {