[v2,05/13] common/mlx5: read tunneling capabilities from DevX
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Commit Message
mlx5 in Windows needs the tunneling hca capabilities
to query the NIC for Inner TSO offloading support.
Added the capability as part of the capabilities
queried by the PMD using DevX.
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
---
drivers/common/mlx5/mlx5_devx_cmds.c | 6 ++++++
drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++
2 files changed, 8 insertions(+)
@@ -993,6 +993,12 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
hcattr, tunnel_lro_vxlan);
attr->swp = MLX5_GET(per_protocol_networking_offload_caps,
hcattr, swp);
+ attr->tunnel_stateless_gre =
+ MLX5_GET(per_protocol_networking_offload_caps,
+ hcattr, tunnel_stateless_gre);
+ attr->tunnel_stateless_vxlan =
+ MLX5_GET(per_protocol_networking_offload_caps,
+ hcattr, tunnel_stateless_vxlan);
attr->swp_csum = MLX5_GET(per_protocol_networking_offload_caps,
hcattr, swp_csum);
attr->swp_lso = MLX5_GET(per_protocol_networking_offload_caps,
@@ -116,6 +116,8 @@ struct mlx5_hca_attr {
uint32_t lro_cap:1;
uint32_t tunnel_lro_gre:1;
uint32_t tunnel_lro_vxlan:1;
+ uint32_t tunnel_stateless_gre:1;
+ uint32_t tunnel_stateless_vxlan:1;
uint32_t swp:1;
uint32_t swp_csum:1;
uint32_t swp_lso:1;