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{
    "id": 93597,
    "url": "http://patches.dpdk.org/api/patches/93597/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210530085929.29695-58-venkatkumar.duvvuru@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210530085929.29695-58-venkatkumar.duvvuru@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210530085929.29695-58-venkatkumar.duvvuru@broadcom.com",
    "date": "2021-05-30T08:59:28",
    "name": "[57/58] net/bnxt: reorganize ULP template directory structure",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "85c1c41e0a5cb8abddb3526c5459762b07a0f04f",
    "submitter": {
        "id": 1635,
        "url": "http://patches.dpdk.org/api/people/1635/?format=api",
        "name": "Venkat Duvvuru",
        "email": "venkatkumar.duvvuru@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "http://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210530085929.29695-58-venkatkumar.duvvuru@broadcom.com/mbox/",
    "series": [
        {
            "id": 17161,
            "url": "http://patches.dpdk.org/api/series/17161/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=17161",
            "date": "2021-05-30T08:58:31",
            "name": "enhancements to host based flow table management",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/17161/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/93597/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/93597/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A2689A0524;\n\tSun, 30 May 2021 11:08:00 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 91FEC411FD;\n\tSun, 30 May 2021 11:02:12 +0200 (CEST)",
            "from relay.smtp-ext.broadcom.com (relay.smtp-ext.broadcom.com\n [192.19.11.229]) by mails.dpdk.org (Postfix) with ESMTP id 326CB41124\n for <dev@dpdk.org>; Sun, 30 May 2021 11:02:10 +0200 (CEST)",
            "from S60.dhcp.broadcom.net (unknown [10.123.66.170])\n (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n (No client certificate requested)\n by relay.smtp-ext.broadcom.com (Postfix) with ESMTPS id EEABC7DAF;\n Sun, 30 May 2021 02:02:08 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com EEABC7DAF",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1622365329;\n bh=ra+QzUdcbwSyOcUKmh+NVfBarHxbCKWjV7NWHx0r7/s=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=ojkjUee51isyfbboEJY2YG8H/Xw00vOSFB8NlEHhkuYHp6JRLol9xSWMWV05geb12\n Spd6foZSGf+i19IsxlCZVFyAysQuReMOZj0Z3c/I9hzPAMyF5o0Zl6mR0rmtqv9sXt\n KT8HroatFYguVQtO0gB/7AUvbxx4Zr1tharxfvjQ=",
        "From": "Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>",
        "Date": "Sun, 30 May 2021 14:29:28 +0530",
        "Message-Id": "<20210530085929.29695-58-venkatkumar.duvvuru@broadcom.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com>",
        "References": "<20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com>",
        "Subject": "[dpdk-dev] [PATCH 57/58] net/bnxt: reorganize ULP template\n directory structure",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Reorganize ulp template directory structure and add meson.build\nfile to the respective directories.\n\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\n---\n .../bnxt/tf_ulp/generic_templates/meson.build |   13 +\n .../ulp_template_db_act.c                     |    0\n .../ulp_template_db_class.c                   |    0\n .../ulp_template_db_enum.h                    |    0\n .../ulp_template_db_field.h                   |    0\n .../ulp_template_db_tbl.c                     |    0\n .../ulp_template_db_tbl.h                     |    0\n .../ulp_template_db_thor_act.c                |    0\n .../ulp_template_db_thor_class.c              |    0\n .../ulp_template_db_wh_plus_act.c             |    0\n .../ulp_template_db_wh_plus_class.c           |    0\n drivers/net/bnxt/tf_ulp/meson.build           |   11 +-\n drivers/net/bnxt/tf_ulp/ulp_template_db.c     | 4622 -----------------\n drivers/net/bnxt/tf_ulp/ulp_template_db.h     |  614 ---\n .../net/bnxt/tf_ulp/ulp_template_field_db.h   |  224 -\n 15 files changed, 16 insertions(+), 5468 deletions(-)\n create mode 100644 drivers/net/bnxt/tf_ulp/generic_templates/meson.build\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_act.c (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_class.c (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_enum.h (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_field.h (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_tbl.c (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_tbl.h (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_thor_act.c (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_thor_class.c (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_wh_plus_act.c (100%)\n rename drivers/net/bnxt/tf_ulp/{ => generic_templates}/ulp_template_db_wh_plus_class.c (100%)\n delete mode 100644 drivers/net/bnxt/tf_ulp/ulp_template_db.c\n delete mode 100644 drivers/net/bnxt/tf_ulp/ulp_template_db.h\n delete mode 100644 drivers/net/bnxt/tf_ulp/ulp_template_field_db.h",
    "diff": "diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/meson.build b/drivers/net/bnxt/tf_ulp/generic_templates/meson.build\nnew file mode 100644\nindex 0000000000..e80dc3fb3f\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/meson.build\n@@ -0,0 +1,13 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright(c) 2018 Intel Corporation\n+# Copyright(c) 2020 Broadcom\n+\n+includes += include_directories('.')\n+sources += files(\n+\t'ulp_template_db_class.c',\n+\t'ulp_template_db_act.c',\n+\t'ulp_template_db_tbl.c',\n+\t'ulp_template_db_wh_plus_act.c',\n+\t'ulp_template_db_wh_plus_class.c',\n+\t'ulp_template_db_thor_act.c',\n+\t'ulp_template_db_thor_class.c')\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_act.c\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_class.c\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_field.h\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.h\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.h\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.h\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_thor_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_thor_act.c\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_thor_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_thor_class.c\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c\nsimilarity index 100%\nrename from drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c\nrename to drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c\ndiff --git a/drivers/net/bnxt/tf_ulp/meson.build b/drivers/net/bnxt/tf_ulp/meson.build\nindex 456d8ca7b6..25de7f3f3f 100644\n--- a/drivers/net/bnxt/tf_ulp/meson.build\n+++ b/drivers/net/bnxt/tf_ulp/meson.build\n@@ -10,9 +10,6 @@ sources += files(\n         'bnxt_ulp.c',\n         'ulp_mark_mgr.c',\n         'ulp_flow_db.c',\n-        'ulp_template_db_tbl.c',\n-        'ulp_template_db_class.c',\n-        'ulp_template_db_act.c',\n         'ulp_utils.c',\n         'ulp_mapper.c',\n         'ulp_matcher.c',\n@@ -26,8 +23,6 @@ sources += files(\n         'ulp_gen_tbl.c',\n \t'ulp_gen_hash.c',\n \t'ulp_ha_mgr.c',\n-\t'ulp_rte_handler_tbl.c',\n-        'ulp_template_db_wh_plus_act.c',\n-        'ulp_template_db_wh_plus_class.c',\n-\t'ulp_template_db_thor_act.c',\n-\t'ulp_template_db_thor_class.c')\n+\t'ulp_rte_handler_tbl.c')\n+\n+subdir('generic_templates')\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.c b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\ndeleted file mode 100644\nindex c7277938ef..0000000000\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n+++ /dev/null\n@@ -1,4622 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2014-2021 Broadcom\n- * All rights reserved.\n- */\n-\n-\n-#include \"ulp_template_db.h\"\n-#include \"ulp_template_field_db.h\"\n-#include \"ulp_template_struct.h\"\n-#include \"ulp_rte_parser.h\"\n-\n-uint32_t ulp_act_prop_map_table[] = {\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE,\n-\t[BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM,\n-\t[BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM,\n-\t[BNXT_ULP_ACT_PROP_IDX_PORT_ID] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_PORT_ID,\n-\t[BNXT_ULP_ACT_PROP_IDX_VNIC] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_VNIC,\n-\t[BNXT_ULP_ACT_PROP_IDX_VPORT] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_VPORT,\n-\t[BNXT_ULP_ACT_PROP_IDX_MARK] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_MARK,\n-\t[BNXT_ULP_ACT_PROP_IDX_COUNT] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_COUNT,\n-\t[BNXT_ULP_ACT_PROP_IDX_METER] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_METER,\n-\t[BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC,\n-\t[BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_SET_MAC_DST,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_VLAN] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_VLAN,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_PCP] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_PCP,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_VID] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_VID,\n-\t[BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC,\n-\t[BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST,\n-\t[BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC,\n-\t[BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST,\n-\t[BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_SET_TP_SRC,\n-\t[BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_SET_TP_DST,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6,\n-\t[BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_IP,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_UDP,\n-\t[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_TUN,\n-\t[BNXT_ULP_ACT_PROP_IDX_LAST] =\n-\t\tBNXT_ULP_ACT_PROP_SZ_LAST\n-};\n-\n-struct bnxt_ulp_rte_act_info ulp_act_info[] = {\n-\t[RTE_FLOW_ACTION_TYPE_END] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_END,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_VOID] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_void_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_PASSTHRU] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_JUMP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_MARK] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_mark_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_FLAG] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_QUEUE] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_DROP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_drop_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_COUNT] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_count_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_RSS] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_rss_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_PF] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_pf_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_VF] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_vf_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_PHY_PORT] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_phy_port_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_PORT_ID] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_port_id_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_METER] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SECURITY] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_vxlan_encap_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_SUPPORTED,\n-\t\t.proto_act_func          = ulp_rte_vxlan_decap_act_handler\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_RAW_DECAP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_TP_DST] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_MAC_SWAP] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_DEC_TTL] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_TTL] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t},\n-\t[RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = {\n-\t\t.act_type                = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,\n-\t\t.proto_act_func          = NULL\n-\t}\n-};\n-\n-struct bnxt_ulp_cache_tbl_params ulp_cache_tbl_params[] = {\n-};\n-\n-struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {\n-\t[BNXT_ULP_DEVICE_ID_WH_PLUS] = {\n-\t\t.global_fid_enable       = BNXT_ULP_SYM_YES,\n-\t\t.byte_order              = BNXT_ULP_BYTE_ORDER_LE,\n-\t\t.encap_byte_swap         = 1,\n-\t\t.lfid_entries            = 16384,\n-\t\t.lfid_entry_size         = 4,\n-\t\t.gfid_entries            = 65536,\n-\t\t.gfid_entry_size         = 4,\n-\t\t.num_flows               = 32768,\n-\t\t.num_resources_per_flow  = 8\n-\t}\n-};\n-\n-struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {\n-\t[0] = {\n-\t.resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.resource_type           = TF_IDENT_TYPE_PROF_FUNC,\n-\t.glb_regfile_index       = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID,\n-\t.direction               = TF_DIR_RX\n-\t},\n-\t[1] = {\n-\t.resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.resource_type           = TF_IDENT_TYPE_PROF_FUNC,\n-\t.glb_regfile_index       = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID,\n-\t.direction               = TF_DIR_TX\n-\t}\n-};\n-\n-struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {\n-\t[RTE_FLOW_ITEM_TYPE_END] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_END,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_VOID] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_void_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_INVERT] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ANY] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_PF] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_pf_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_VF] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_vf_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_PHY_PORT] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_phy_port_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_PORT_ID] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_port_id_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_RAW] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ETH] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_eth_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_VLAN] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_vlan_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_IPV4] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_ipv4_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_IPV6] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_ipv6_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ICMP] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_UDP] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_udp_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_TCP] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_tcp_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_SCTP] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_VXLAN] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_SUPPORTED,\n-\t\t.proto_hdr_func          = ulp_rte_vxlan_hdr_handler\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_E_TAG] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_NVGRE] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_MPLS] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_GRE] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_FUZZY] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_GTP] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_GTPC] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_GTPU] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ESP] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_GENEVE] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ICMP6] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_MARK] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_META] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_GRE_KEY] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_GTP_PSC] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_PPPOES] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_PPPOED] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_NSH] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_IGMP] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_AH] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t},\n-\t[RTE_FLOW_ITEM_TYPE_HIGIG2] = {\n-\t\t.hdr_type                = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n-\t\t.proto_hdr_func          = NULL\n-\t}\n-};\n-\n-uint32_t bnxt_ulp_encap_vtag_map[] = {\n-\t[0] = BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP,\n-\t[1] = BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI,\n-\t[2] = BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI\n-};\n-\n-uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {\n-\t[BNXT_ULP_CLASS_HID_0080] = 1,\n-\t[BNXT_ULP_CLASS_HID_0000] = 2,\n-\t[BNXT_ULP_CLASS_HID_0087] = 3\n-};\n-\n-struct bnxt_ulp_class_match_info ulp_class_match_list[] = {\n-\t[1] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0080,\n-\t.hdr_sig = { .bits =\n-\t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n-\t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF0_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF0_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF0_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF0_BITMASK_O_UDP_DST_PORT |\n-\t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 0,\n-\t.act_vnic = 0,\n-\t.wc_pri = 0\n-\t},\n-\t[2] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0000,\n-\t.hdr_sig = { .bits =\n-\t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n-\t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF1_BITMASK_O_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF1_BITMASK_O_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF1_BITMASK_O_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF1_BITMASK_O_UDP_DST_PORT |\n-\t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 1,\n-\t.act_vnic = 0,\n-\t.wc_pri = 0\n-\t},\n-\t[3] = {\n-\t.class_hid = BNXT_ULP_CLASS_HID_0087,\n-\t.hdr_sig = { .bits =\n-\t\tBNXT_ULP_HDR_BIT_O_ETH |\n-\t\tBNXT_ULP_HDR_BIT_O_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_O_UDP |\n-\t\tBNXT_ULP_HDR_BIT_T_VXLAN |\n-\t\tBNXT_ULP_HDR_BIT_I_ETH |\n-\t\tBNXT_ULP_HDR_BIT_I_IPV4 |\n-\t\tBNXT_ULP_HDR_BIT_I_UDP |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n-\t.field_sig = { .bits =\n-\t\tBNXT_ULP_HF2_BITMASK_I_IPV4_SRC_ADDR |\n-\t\tBNXT_ULP_HF2_BITMASK_I_IPV4_DST_ADDR |\n-\t\tBNXT_ULP_HF2_BITMASK_I_UDP_SRC_PORT |\n-\t\tBNXT_ULP_HF2_BITMASK_I_UDP_DST_PORT |\n-\t\tBNXT_ULP_MATCH_TYPE_BITMASK_EM },\n-\t.class_tid = 2,\n-\t.act_vnic = 0,\n-\t.wc_pri = 0\n-\t}\n-};\n-\n-uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {\n-\t[BNXT_ULP_ACT_HID_00a1] = 1,\n-\t[BNXT_ULP_ACT_HID_0040] = 2,\n-\t[BNXT_ULP_ACT_HID_0029] = 3\n-};\n-\n-struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n-\t[1] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_00a1,\n-\t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACTION_BIT_VXLAN_DECAP |\n-\t\tBNXT_ULP_ACTION_BIT_MARK |\n-\t\tBNXT_ULP_ACTION_BIT_VNIC |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n-\t.act_tid = 0\n-\t},\n-\t[2] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_0040,\n-\t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACTION_BIT_VPORT |\n-\t\tBNXT_ULP_ACTION_BIT_VXLAN_ENCAP |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n-\t.act_tid = 1\n-\t},\n-\t[3] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_0029,\n-\t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACTION_BIT_MARK |\n-\t\tBNXT_ULP_ACTION_BIT_RSS |\n-\t\tBNXT_ULP_ACTION_BIT_VNIC |\n-\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n-\t.act_tid = 2\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {\n-\t[((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n-\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n-\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 5,\n-\t.start_tbl_idx = 0\n-\t},\n-\t[((1 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n-\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n-\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 5,\n-\t.start_tbl_idx = 5\n-\t},\n-\t[((2 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n-\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n-\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 5,\n-\t.start_tbl_idx = 10\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_tbl_info ulp_class_tbl_list[] = {\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 0,\n-\t.blob_key_bit_size = 12,\n-\t.key_bit_size = 12,\n-\t.key_num_fields = 2,\n-\t.result_start_idx = 0,\n-\t.result_bit_size = 10,\n-\t.result_num_fields = 1,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 0,\n-\t.ident_nums = 1,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n-\t.regfile_wr_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 2,\n-\t.blob_key_bit_size = 167,\n-\t.key_bit_size = 167,\n-\t.key_num_fields = 13,\n-\t.result_start_idx = 1,\n-\t.result_bit_size = 64,\n-\t.result_num_fields = 13,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 1,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 15,\n-\t.blob_key_bit_size = 16,\n-\t.key_bit_size = 16,\n-\t.key_num_fields = 3,\n-\t.result_start_idx = 14,\n-\t.result_bit_size = 10,\n-\t.result_num_fields = 1,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 1,\n-\t.ident_nums = 1,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 18,\n-\t.blob_key_bit_size = 81,\n-\t.key_bit_size = 81,\n-\t.key_num_fields = 42,\n-\t.result_start_idx = 15,\n-\t.result_bit_size = 38,\n-\t.result_num_fields = 8,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 2,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t.vfr_flag = BNXT_ULP_VFR_FLAG_NO,\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,\n-\t.resource_type = TF_MEM_EXTERNAL,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 60,\n-\t.blob_key_bit_size = 448,\n-\t.key_bit_size = 448,\n-\t.key_num_fields = 11,\n-\t.result_start_idx = 23,\n-\t.result_bit_size = 64,\n-\t.result_num_fields = 9,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 2,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_YES,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n-\t.direction = TF_DIR_TX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 71,\n-\t.blob_key_bit_size = 12,\n-\t.key_bit_size = 12,\n-\t.key_num_fields = 2,\n-\t.result_start_idx = 32,\n-\t.result_bit_size = 10,\n-\t.result_num_fields = 1,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 2,\n-\t.ident_nums = 1,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n-\t.direction = TF_DIR_TX,\n-\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 73,\n-\t.blob_key_bit_size = 167,\n-\t.key_bit_size = 167,\n-\t.key_num_fields = 13,\n-\t.result_start_idx = 33,\n-\t.result_bit_size = 64,\n-\t.result_num_fields = 13,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 3,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n-\t.direction = TF_DIR_TX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 86,\n-\t.blob_key_bit_size = 16,\n-\t.key_bit_size = 16,\n-\t.key_num_fields = 3,\n-\t.result_start_idx = 46,\n-\t.result_bit_size = 10,\n-\t.result_num_fields = 1,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 3,\n-\t.ident_nums = 1,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n-\t.direction = TF_DIR_TX,\n-\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 89,\n-\t.blob_key_bit_size = 81,\n-\t.key_bit_size = 81,\n-\t.key_num_fields = 42,\n-\t.result_start_idx = 47,\n-\t.result_bit_size = 38,\n-\t.result_num_fields = 8,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 4,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,\n-\t.resource_type = TF_MEM_EXTERNAL,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n-\t.direction = TF_DIR_TX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 131,\n-\t.blob_key_bit_size = 448,\n-\t.key_bit_size = 448,\n-\t.key_num_fields = 11,\n-\t.result_start_idx = 55,\n-\t.result_bit_size = 64,\n-\t.result_num_fields = 9,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 4,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_YES,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 142,\n-\t.blob_key_bit_size = 12,\n-\t.key_bit_size = 12,\n-\t.key_num_fields = 2,\n-\t.result_start_idx = 64,\n-\t.result_bit_size = 10,\n-\t.result_num_fields = 1,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 4,\n-\t.ident_nums = 1,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 144,\n-\t.blob_key_bit_size = 167,\n-\t.key_bit_size = 167,\n-\t.key_num_fields = 13,\n-\t.result_start_idx = 65,\n-\t.result_bit_size = 64,\n-\t.result_num_fields = 13,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 5,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 157,\n-\t.blob_key_bit_size = 16,\n-\t.key_bit_size = 16,\n-\t.key_num_fields = 3,\n-\t.result_start_idx = 78,\n-\t.result_bit_size = 10,\n-\t.result_num_fields = 1,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 5,\n-\t.ident_nums = 1,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n-\t.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_LEVEL_0,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 160,\n-\t.blob_key_bit_size = 81,\n-\t.key_bit_size = 81,\n-\t.key_num_fields = 42,\n-\t.result_start_idx = 79,\n-\t.result_bit_size = 38,\n-\t.result_num_fields = 8,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 6,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_NO,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,\n-\t.resource_type = TF_MEM_EXTERNAL,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED,\n-\t.direction = TF_DIR_RX,\n-\t.priority = BNXT_ULP_PRIORITY_NOT_USED,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.key_start_idx = 202,\n-\t.blob_key_bit_size = 448,\n-\t.key_bit_size = 448,\n-\t.key_num_fields = 11,\n-\t.result_start_idx = 87,\n-\t.result_bit_size = 64,\n-\t.result_num_fields = 9,\n-\t.encap_num_fields = 0,\n-\t.ident_start_idx = 6,\n-\t.ident_nums = 0,\n-\t.mark_enable = BNXT_ULP_MARK_ENABLE_YES,\n-\t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_NOT_USED\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,\n-\t.mask_operand = {\n-\t\t(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF0_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF0_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_ISIP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_UC_MC_BC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_TYPE_DIX,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_VALID_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_VALID_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_VALID_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_HDR_VALID_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_HREC_NEXT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 9,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff,\n-\t\tBNXT_ULP_SYM_RESERVED_IGNORE & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_AGG_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_RECYCLE_CNT_ZERO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_PKT_TYPE_L2,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 251,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF0_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF0_IDX_O_UDP_DST_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF0_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF0_IDX_O_UDP_SRC_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 32,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 32,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 24,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,\n-\t.mask_operand = {\n-\t\t(BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF1_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF1_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_ISIP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_UC_MC_BC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_TYPE_DIX,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_VALID_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_VALID_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_VALID_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_HDR_VALID_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_HREC_NEXT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 9,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff,\n-\t\tBNXT_ULP_SYM_RESERVED_IGNORE & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_AGG_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_RECYCLE_CNT_ZERO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_PKT_TYPE_L2,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 251,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF1_IDX_O_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF1_IDX_O_UDP_DST_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF1_IDX_O_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF1_IDX_O_UDP_SRC_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 32,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 32,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 24,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD,\n-\t.mask_operand = {\n-\t\t(BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF2_IDX_SVIF_INDEX >> 8) & 0xff,\n-\t\tBNXT_ULP_HF2_IDX_SVIF_INDEX & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L4_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_ISIP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L3_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_UC_MC_BC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_TYPE_DIX,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_L2_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TUN_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_TYPE_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL4_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_TYPE_IPV4,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_ERROR_NO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL3_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_HDR_TYPE_DIX,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_TL2_HDR_VALID_YES,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_HREC_NEXT_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 9,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_SYM_RESERVED_IGNORE >> 8) & 0xff,\n-\t\tBNXT_ULP_SYM_RESERVED_IGNORE & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_AGG_ERROR_IGNORE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_RECYCLE_CNT_ZERO,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_PKT_TYPE_L2,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n-\t\t0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 251,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_ADD_PAD,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF2_IDX_I_UDP_DST_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF2_IDX_I_UDP_DST_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF2_IDX_I_UDP_SRC_PORT >> 8) & 0xff,\n-\t\tBNXT_ULP_HF2_IDX_I_UDP_SRC_PORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {\n-\t\tBNXT_ULP_SYM_IP_PROTO_UDP,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 32,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 32,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR >> 8) & 0xff,\n-\t\tBNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 24,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,\n-\t.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n-\t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_REGFILE,\n-\t.spec_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = {\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 6,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\t(0x00f9 >> 8) & 0xff,\n-\t\t0x00f9 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 5,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 33,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 5,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 9,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\t(0x00c5 >> 8) & 0xff,\n-\t\t0x00c5 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 11,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 6,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\t(0x00f9 >> 8) & 0xff,\n-\t\t0x00f9 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 5,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 33,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 5,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 9,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\t(0x00c5 >> 8) & 0xff,\n-\t\t0x00c5 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 11,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 7,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID >> 8) & 0xff,\n-\t\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 6,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\t(0x00f9 >> 8) & 0xff,\n-\t\t0x00f9 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 5,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 33,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_REGFILE,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,\n-\t\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 5,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 9,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\t(0x00c5 >> 8) & 0xff,\n-\t\t0x00c5 & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 11,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_ident_info ulp_ident_list[] = {\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.ident_type = TF_IDENT_TYPE_L2_CTXT,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n-\t.ident_bit_size = 10,\n-\t.ident_bit_pos = 0\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n-\t.ident_bit_size = 10,\n-\t.ident_bit_pos = 0\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.ident_type = TF_IDENT_TYPE_L2_CTXT,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n-\t.ident_bit_size = 10,\n-\t.ident_bit_pos = 0\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n-\t.ident_bit_size = 10,\n-\t.ident_bit_pos = 0\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.ident_type = TF_IDENT_TYPE_L2_CTXT,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,\n-\t.ident_bit_size = 10,\n-\t.ident_bit_pos = 0\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,\n-\t.ident_type = TF_IDENT_TYPE_EM_PROF,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,\n-\t.ident_bit_size = 10,\n-\t.ident_bit_pos = 0\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_tbl_list_info ulp_act_tmpl_list[] = {\n-\t[((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n-\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n-\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 1,\n-\t.start_tbl_idx = 0\n-\t},\n-\t[((1 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n-\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n-\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 1,\n-\t.start_tbl_idx = 1\n-\t},\n-\t[((2 << BNXT_ULP_LOG2_MAX_NUM_DEV) |\n-\t\tBNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n-\t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 1,\n-\t.start_tbl_idx = 2\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_tbl_info ulp_act_tbl_list[] = {\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n-\t.resource_type = TF_TBL_TYPE_EXT,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n-\t.direction = TF_DIR_RX,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.result_start_idx = 0,\n-\t.result_bit_size = 128,\n-\t.result_num_fields = 26,\n-\t.encap_num_fields = 0,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n-\t.resource_type = TF_TBL_TYPE_EXT,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n-\t.direction = TF_DIR_TX,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.result_start_idx = 26,\n-\t.result_bit_size = 128,\n-\t.result_num_fields = 26,\n-\t.encap_num_fields = 12,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR\n-\t},\n-\t{\n-\t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n-\t.resource_type = TF_TBL_TYPE_EXT,\n-\t.resource_sub_type =\n-\t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,\n-\t.direction = TF_DIR_RX,\n-\t.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,\n-\t.result_start_idx = 64,\n-\t.result_bit_size = 128,\n-\t.result_num_fields = 26,\n-\t.encap_num_fields = 0,\n-\t.regfile_idx = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR\n-\t}\n-};\n-\n-struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = {\n-\t{\n-\t.field_bit_size = 14,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 11,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TUN,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 14,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 11,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\tBNXT_ULP_SYM_DECAP_FUNC_NONE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_VPORT & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\tBNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 3,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 48,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 0,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff,\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 0,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff,\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 32,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 0,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff,\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 14,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 8,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 11,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 16,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 10,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 4,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {\n-\t\tBNXT_ULP_SYM_DECAP_FUNC_NONE,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 12,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP,\n-\t.result_operand = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_VNIC & 0xff,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 2,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t},\n-\t{\n-\t.field_bit_size = 1,\n-\t.result_opcode = BNXT_ULP_RESULT_OPC_SET_TO_CONSTANT,\n-\t.result_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n-\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n-\t}\n-};\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\ndeleted file mode 100644\nindex ca0910ebf4..0000000000\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n+++ /dev/null\n@@ -1,614 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2014-2021 Broadcom\n- * All rights reserved.\n- */\n-\n-\n-#ifndef ULP_TEMPLATE_DB_H_\n-#define ULP_TEMPLATE_DB_H_\n-\n-#define BNXT_ULP_REGFILE_MAX_SZ 15\n-#define BNXT_ULP_MAX_NUM_DEVICES 4\n-#define BNXT_ULP_LOG2_MAX_NUM_DEV 2\n-#define BNXT_ULP_CACHE_TBL_MAX_SZ 4\n-#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 256\n-#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 4\n-#define BNXT_ULP_CLASS_HID_LOW_PRIME 7919\n-#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907\n-#define BNXT_ULP_CLASS_HID_SHFTR 16\n-#define BNXT_ULP_CLASS_HID_SHFTL 23\n-#define BNXT_ULP_CLASS_HID_MASK 255\n-#define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 256\n-#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 4\n-#define BNXT_ULP_ACT_HID_LOW_PRIME 7919\n-#define BNXT_ULP_ACT_HID_HIGH_PRIME 7919\n-#define BNXT_ULP_ACT_HID_SHFTR 0\n-#define BNXT_ULP_ACT_HID_SHFTL 23\n-#define BNXT_ULP_ACT_HID_MASK 255\n-#define BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM 2\n-#define BNXT_ULP_GLB_RESOURCE_INFO_TBL_MAX_SZ 2\n-\n-enum bnxt_ulp_action_bit {\n-\tBNXT_ULP_ACTION_BIT_MARK             = 0x0000000000000001,\n-\tBNXT_ULP_ACTION_BIT_DROP             = 0x0000000000000002,\n-\tBNXT_ULP_ACTION_BIT_COUNT            = 0x0000000000000004,\n-\tBNXT_ULP_ACTION_BIT_RSS              = 0x0000000000000008,\n-\tBNXT_ULP_ACTION_BIT_METER            = 0x0000000000000010,\n-\tBNXT_ULP_ACTION_BIT_VNIC             = 0x0000000000000020,\n-\tBNXT_ULP_ACTION_BIT_VPORT            = 0x0000000000000040,\n-\tBNXT_ULP_ACTION_BIT_VXLAN_DECAP      = 0x0000000000000080,\n-\tBNXT_ULP_ACTION_BIT_NVGRE_DECAP      = 0x0000000000000100,\n-\tBNXT_ULP_ACTION_BIT_POP_MPLS         = 0x0000000000000200,\n-\tBNXT_ULP_ACTION_BIT_PUSH_MPLS        = 0x0000000000000400,\n-\tBNXT_ULP_ACTION_BIT_MAC_SWAP         = 0x0000000000000800,\n-\tBNXT_ULP_ACTION_BIT_SET_MAC_SRC      = 0x0000000000001000,\n-\tBNXT_ULP_ACTION_BIT_SET_MAC_DST      = 0x0000000000002000,\n-\tBNXT_ULP_ACTION_BIT_POP_VLAN         = 0x0000000000004000,\n-\tBNXT_ULP_ACTION_BIT_PUSH_VLAN        = 0x0000000000008000,\n-\tBNXT_ULP_ACTION_BIT_SET_VLAN_PCP     = 0x0000000000010000,\n-\tBNXT_ULP_ACTION_BIT_SET_VLAN_VID     = 0x0000000000020000,\n-\tBNXT_ULP_ACTION_BIT_SET_IPV4_SRC     = 0x0000000000040000,\n-\tBNXT_ULP_ACTION_BIT_SET_IPV4_DST     = 0x0000000000080000,\n-\tBNXT_ULP_ACTION_BIT_SET_IPV6_SRC     = 0x0000000000100000,\n-\tBNXT_ULP_ACTION_BIT_SET_IPV6_DST     = 0x0000000000200000,\n-\tBNXT_ULP_ACTION_BIT_DEC_TTL          = 0x0000000000400000,\n-\tBNXT_ULP_ACTION_BIT_SET_TP_SRC       = 0x0000000000800000,\n-\tBNXT_ULP_ACTION_BIT_SET_TP_DST       = 0x0000000001000000,\n-\tBNXT_ULP_ACTION_BIT_VXLAN_ENCAP      = 0x0000000002000000,\n-\tBNXT_ULP_ACTION_BIT_NVGRE_ENCAP      = 0x0000000004000000,\n-\tBNXT_ULP_ACTION_BIT_LAST             = 0x0000000008000000\n-};\n-\n-enum bnxt_ulp_hdr_bit {\n-\tBNXT_ULP_HDR_BIT_O_ETH               = 0x0000000000000001,\n-\tBNXT_ULP_HDR_BIT_O_IPV4              = 0x0000000000000002,\n-\tBNXT_ULP_HDR_BIT_O_IPV6              = 0x0000000000000004,\n-\tBNXT_ULP_HDR_BIT_O_TCP               = 0x0000000000000008,\n-\tBNXT_ULP_HDR_BIT_O_UDP               = 0x0000000000000010,\n-\tBNXT_ULP_HDR_BIT_T_VXLAN             = 0x0000000000000020,\n-\tBNXT_ULP_HDR_BIT_T_GRE               = 0x0000000000000040,\n-\tBNXT_ULP_HDR_BIT_I_ETH               = 0x0000000000000080,\n-\tBNXT_ULP_HDR_BIT_I_IPV4              = 0x0000000000000100,\n-\tBNXT_ULP_HDR_BIT_I_IPV6              = 0x0000000000000200,\n-\tBNXT_ULP_HDR_BIT_I_TCP               = 0x0000000000000400,\n-\tBNXT_ULP_HDR_BIT_I_UDP               = 0x0000000000000800,\n-\tBNXT_ULP_HDR_BIT_LAST                = 0x0000000000001000\n-};\n-\n-enum bnxt_ulp_act_type {\n-\tBNXT_ULP_ACT_TYPE_NOT_SUPPORTED = 0,\n-\tBNXT_ULP_ACT_TYPE_SUPPORTED = 1,\n-\tBNXT_ULP_ACT_TYPE_END = 2,\n-\tBNXT_ULP_ACT_TYPE_LAST = 3\n-};\n-\n-enum bnxt_ulp_byte_order {\n-\tBNXT_ULP_BYTE_ORDER_BE = 0,\n-\tBNXT_ULP_BYTE_ORDER_LE = 1,\n-\tBNXT_ULP_BYTE_ORDER_LAST = 2\n-};\n-\n-enum bnxt_ulp_cf_idx {\n-\tBNXT_ULP_CF_IDX_MPLS_TAG_NUM = 0,\n-\tBNXT_ULP_CF_IDX_O_VTAG_NUM = 1,\n-\tBNXT_ULP_CF_IDX_O_VTAG_PRESENT = 2,\n-\tBNXT_ULP_CF_IDX_O_TWO_VTAGS = 3,\n-\tBNXT_ULP_CF_IDX_I_VTAG_NUM = 4,\n-\tBNXT_ULP_CF_IDX_I_VTAG_PRESENT = 5,\n-\tBNXT_ULP_CF_IDX_I_TWO_VTAGS = 6,\n-\tBNXT_ULP_CF_IDX_INCOMING_IF = 7,\n-\tBNXT_ULP_CF_IDX_DIRECTION = 8,\n-\tBNXT_ULP_CF_IDX_SVIF_FLAG = 9,\n-\tBNXT_ULP_CF_IDX_O_L3 = 10,\n-\tBNXT_ULP_CF_IDX_I_L3 = 11,\n-\tBNXT_ULP_CF_IDX_O_L4 = 12,\n-\tBNXT_ULP_CF_IDX_I_L4 = 13,\n-\tBNXT_ULP_CF_IDX_DEV_PORT_ID = 14,\n-\tBNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 15,\n-\tBNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 16,\n-\tBNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 17,\n-\tBNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 18,\n-\tBNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 19,\n-\tBNXT_ULP_CF_IDX_VF_FUNC_SVIF = 20,\n-\tBNXT_ULP_CF_IDX_VF_FUNC_SPIF = 21,\n-\tBNXT_ULP_CF_IDX_VF_FUNC_PARIF = 22,\n-\tBNXT_ULP_CF_IDX_VF_FUNC_VNIC = 23,\n-\tBNXT_ULP_CF_IDX_PHY_PORT_SVIF = 24,\n-\tBNXT_ULP_CF_IDX_PHY_PORT_SPIF = 25,\n-\tBNXT_ULP_CF_IDX_PHY_PORT_PARIF = 26,\n-\tBNXT_ULP_CF_IDX_PHY_PORT_VPORT = 27,\n-\tBNXT_ULP_CF_IDX_LAST = 28\n-};\n-\n-enum bnxt_ulp_critical_resource {\n-\tBNXT_ULP_CRITICAL_RESOURCE_NO = 0,\n-\tBNXT_ULP_CRITICAL_RESOURCE_YES = 1,\n-\tBNXT_ULP_CRITICAL_RESOURCE_LAST = 2\n-};\n-\n-enum bnxt_ulp_device_id {\n-\tBNXT_ULP_DEVICE_ID_WH_PLUS = 0,\n-\tBNXT_ULP_DEVICE_ID_THOR = 1,\n-\tBNXT_ULP_DEVICE_ID_STINGRAY = 2,\n-\tBNXT_ULP_DEVICE_ID_STINGRAY2 = 3,\n-\tBNXT_ULP_DEVICE_ID_LAST = 4\n-};\n-\n-enum bnxt_ulp_direction {\n-\tBNXT_ULP_DIRECTION_INGRESS = 0,\n-\tBNXT_ULP_DIRECTION_EGRESS = 1,\n-\tBNXT_ULP_DIRECTION_LAST = 2\n-};\n-\n-enum bnxt_ulp_glb_regfile_index {\n-\tBNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 0,\n-\tBNXT_ULP_GLB_REGFILE_INDEX_LAST = 1\n-};\n-\n-enum bnxt_ulp_hdr_type {\n-\tBNXT_ULP_HDR_TYPE_NOT_SUPPORTED = 0,\n-\tBNXT_ULP_HDR_TYPE_SUPPORTED = 1,\n-\tBNXT_ULP_HDR_TYPE_END = 2,\n-\tBNXT_ULP_HDR_TYPE_LAST = 3\n-};\n-\n-enum bnxt_ulp_mark_enable {\n-\tBNXT_ULP_MARK_ENABLE_NO = 0,\n-\tBNXT_ULP_MARK_ENABLE_YES = 1,\n-\tBNXT_ULP_MARK_ENABLE_LAST = 2\n-};\n-\n-enum bnxt_ulp_mask_opc {\n-\tBNXT_ULP_MASK_OPC_SET_TO_CONSTANT = 0,\n-\tBNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD = 1,\n-\tBNXT_ULP_MASK_OPC_SET_TO_REGFILE = 2,\n-\tBNXT_ULP_MASK_OPC_SET_TO_GLB_REGFILE = 3,\n-\tBNXT_ULP_MASK_OPC_ADD_PAD = 4,\n-\tBNXT_ULP_MASK_OPC_LAST = 5\n-};\n-\n-enum bnxt_ulp_match_type {\n-\tBNXT_ULP_MATCH_TYPE_EM = 0,\n-\tBNXT_ULP_MATCH_TYPE_WC = 1,\n-\tBNXT_ULP_MATCH_TYPE_LAST = 2\n-};\n-\n-enum bnxt_ulp_priority {\n-\tBNXT_ULP_PRIORITY_LEVEL_0 = 0,\n-\tBNXT_ULP_PRIORITY_LEVEL_1 = 1,\n-\tBNXT_ULP_PRIORITY_LEVEL_2 = 2,\n-\tBNXT_ULP_PRIORITY_LEVEL_3 = 3,\n-\tBNXT_ULP_PRIORITY_LEVEL_4 = 4,\n-\tBNXT_ULP_PRIORITY_LEVEL_5 = 5,\n-\tBNXT_ULP_PRIORITY_LEVEL_6 = 6,\n-\tBNXT_ULP_PRIORITY_LEVEL_7 = 7,\n-\tBNXT_ULP_PRIORITY_NOT_USED = 8,\n-\tBNXT_ULP_PRIORITY_LAST = 9\n-};\n-\n-enum bnxt_ulp_regfile_index {\n-\tBNXT_ULP_REGFILE_INDEX_CLASS_TID = 0,\n-\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 1,\n-\tBNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 2,\n-\tBNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 3,\n-\tBNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 4,\n-\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 5,\n-\tBNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 6,\n-\tBNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 7,\n-\tBNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 8,\n-\tBNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 9,\n-\tBNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 10,\n-\tBNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11,\n-\tBNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12,\n-\tBNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13,\n-\tBNXT_ULP_REGFILE_INDEX_NOT_USED = 14,\n-\tBNXT_ULP_REGFILE_INDEX_LAST = 15\n-};\n-\n-enum bnxt_ulp_result_opc {\n-\tBNXT_ULP_RESULT_OPC_SET_TO_CONSTANT = 0,\n-\tBNXT_ULP_RESULT_OPC_SET_TO_ACT_PROP = 1,\n-\tBNXT_ULP_RESULT_OPC_SET_TO_ACT_BIT = 2,\n-\tBNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 3,\n-\tBNXT_ULP_RESULT_OPC_SET_TO_REGFILE = 4,\n-\tBNXT_ULP_RESULT_OPC_SET_TO_GLB_REGFILE = 5,\n-\tBNXT_ULP_RESULT_OPC_SET_TO_COMP_FIELD = 6,\n-\tBNXT_ULP_RESULT_OPC_LAST = 7\n-};\n-\n-enum bnxt_ulp_search_before_alloc {\n-\tBNXT_ULP_SEARCH_BEFORE_ALLOC_NO = 0,\n-\tBNXT_ULP_SEARCH_BEFORE_ALLOC_YES = 1,\n-\tBNXT_ULP_SEARCH_BEFORE_ALLOC_LAST = 2\n-};\n-\n-enum bnxt_ulp_spec_opc {\n-\tBNXT_ULP_SPEC_OPC_SET_TO_CONSTANT = 0,\n-\tBNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD = 1,\n-\tBNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD = 2,\n-\tBNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 3,\n-\tBNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE = 4,\n-\tBNXT_ULP_SPEC_OPC_ADD_PAD = 5,\n-\tBNXT_ULP_SPEC_OPC_LAST = 6\n-};\n-\n-enum bnxt_ulp_vfr_flag {\n-\tBNXT_ULP_VFR_FLAG_NO = 0,\n-\tBNXT_ULP_VFR_FLAG_YES = 1,\n-\tBNXT_ULP_VFR_FLAG_LAST = 2\n-};\n-\n-enum bnxt_ulp_encap_vtag_encoding {\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI = 4,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_REMAP_DIFFSERV = 5,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_ECAP_PRI = 6,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_DIFFSERV = 7,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_0 = 8,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_1 = 9,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_2 = 10,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_3 = 11,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_4 = 12,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_5 = 13,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_6 = 14,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_7 = 15,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_NOP = 0,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI = 1,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_STAG_IVLAN_PRI = 2,\n-\tBNXT_ULP_ENCAP_VTAG_ENCODING_STAG_REMAP_DIFFSERV = 3\n-};\n-\n-enum bnxt_ulp_vfr_flag {\n-\tBNXT_ULP_VFR_FLAG_NO = 0,\n-\tBNXT_ULP_VFR_FLAG_YES = 1,\n-\tBNXT_ULP_VFR_FLAG_LAST = 2\n-};\n-\n-enum bnxt_ulp_fdb_resource_flags {\n-\tBNXT_ULP_FDB_RESOURCE_FLAGS_DIR_EGR = 0x01,\n-\tBNXT_ULP_FDB_RESOURCE_FLAGS_DIR_INGR = 0x00\n-};\n-\n-enum bnxt_ulp_fdb_type {\n-\tBNXT_ULP_FDB_TYPE_DEFAULT = 1,\n-\tBNXT_ULP_FDB_TYPE_REGULAR = 0\n-};\n-\n-enum bnxt_ulp_flow_dir_bitmask {\n-\tBNXT_ULP_FLOW_DIR_BITMASK_EGR = 0x8000000000000000,\n-\tBNXT_ULP_FLOW_DIR_BITMASK_ING = 0x0000000000000000\n-};\n-\n-enum bnxt_ulp_match_type_bitmask {\n-\tBNXT_ULP_MATCH_TYPE_BITMASK_EM = 0x0000000000000000,\n-\tBNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x0000000000000001\n-};\n-\n-enum bnxt_ulp_resource_func {\n-\tBNXT_ULP_RESOURCE_FUNC_INVALID = 0x00,\n-\tBNXT_ULP_RESOURCE_FUNC_EM_TABLE = 0x20,\n-\tBNXT_ULP_RESOURCE_FUNC_RSVD1 = 0x40,\n-\tBNXT_ULP_RESOURCE_FUNC_RSVD2 = 0x60,\n-\tBNXT_ULP_RESOURCE_FUNC_TCAM_TABLE = 0x80,\n-\tBNXT_ULP_RESOURCE_FUNC_INDEX_TABLE = 0x81,\n-\tBNXT_ULP_RESOURCE_FUNC_CACHE_TABLE = 0x82,\n-\tBNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 0x83,\n-\tBNXT_ULP_RESOURCE_FUNC_IF_TABLE = 0x84,\n-\tBNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85\n-};\n-\n-enum bnxt_ulp_resource_sub_type {\n-\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM = 0,\n-\tBNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM = 1,\n-\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_CNT_IDX = 3,\n-\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_CNT_IDX = 2,\n-\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL = 0,\n-\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_ACT_IDX = 1,\n-\tBNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED = 0\n-};\n-\n-enum bnxt_ulp_sym {\n-\tBNXT_ULP_SYM_AGG_ERROR_IGNORE = 0,\n-\tBNXT_ULP_SYM_AGG_ERROR_NO = 0,\n-\tBNXT_ULP_SYM_AGG_ERROR_YES = 1,\n-\tBNXT_ULP_SYM_BIG_ENDIAN = 0,\n-\tBNXT_ULP_SYM_DECAP_FUNC_NONE = 0,\n-\tBNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11,\n-\tBNXT_ULP_SYM_DECAP_FUNC_THRU_L3 = 12,\n-\tBNXT_ULP_SYM_DECAP_FUNC_THRU_L4 = 13,\n-\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TL2 = 3,\n-\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TL3 = 8,\n-\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TL4 = 9,\n-\tBNXT_ULP_SYM_DECAP_FUNC_THRU_TUN = 10,\n-\tBNXT_ULP_SYM_ECV_CUSTOM_EN_NO = 0,\n-\tBNXT_ULP_SYM_ECV_CUSTOM_EN_YES = 1,\n-\tBNXT_ULP_SYM_ECV_L2_EN_NO = 0,\n-\tBNXT_ULP_SYM_ECV_L2_EN_YES = 1,\n-\tBNXT_ULP_SYM_ECV_L3_TYPE_IPV4 = 4,\n-\tBNXT_ULP_SYM_ECV_L3_TYPE_IPV6 = 5,\n-\tBNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8847 = 6,\n-\tBNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8848 = 7,\n-\tBNXT_ULP_SYM_ECV_L3_TYPE_NONE = 0,\n-\tBNXT_ULP_SYM_ECV_L4_TYPE_NONE = 0,\n-\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP = 4,\n-\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM = 5,\n-\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6,\n-\tBNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7,\n-\tBNXT_ULP_SYM_ECV_TUN_TYPE_GENERIC = 1,\n-\tBNXT_ULP_SYM_ECV_TUN_TYPE_GRE = 5,\n-\tBNXT_ULP_SYM_ECV_TUN_TYPE_NGE = 3,\n-\tBNXT_ULP_SYM_ECV_TUN_TYPE_NONE = 0,\n-\tBNXT_ULP_SYM_ECV_TUN_TYPE_NVGRE = 4,\n-\tBNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2,\n-\tBNXT_ULP_SYM_ECV_VALID_NO = 0,\n-\tBNXT_ULP_SYM_ECV_VALID_YES = 1,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5,\n-\tBNXT_ULP_SYM_ECV_VTAG_TYPE_NOP = 0,\n-\tBNXT_ULP_SYM_HREC_NEXT_IGNORE = 0,\n-\tBNXT_ULP_SYM_HREC_NEXT_NO = 0,\n-\tBNXT_ULP_SYM_HREC_NEXT_YES = 1,\n-\tBNXT_ULP_SYM_IP_PROTO_ICMP = 1,\n-\tBNXT_ULP_SYM_IP_PROTO_IGMP = 2,\n-\tBNXT_ULP_SYM_IP_PROTO_IP_IN_IP = 4,\n-\tBNXT_ULP_SYM_IP_PROTO_TCP = 6,\n-\tBNXT_ULP_SYM_IP_PROTO_UDP = 17,\n-\tBNXT_ULP_SYM_L2_HDR_ERROR_IGNORE = 0,\n-\tBNXT_ULP_SYM_L2_HDR_ERROR_NO = 0,\n-\tBNXT_ULP_SYM_L2_HDR_ERROR_YES = 1,\n-\tBNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0,\n-\tBNXT_ULP_SYM_L2_HDR_TYPE_IGNORE = 0,\n-\tBNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2,\n-\tBNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1,\n-\tBNXT_ULP_SYM_L2_HDR_VALID_IGNORE = 0,\n-\tBNXT_ULP_SYM_L2_HDR_VALID_NO = 0,\n-\tBNXT_ULP_SYM_L2_HDR_VALID_YES = 1,\n-\tBNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE = 0,\n-\tBNXT_ULP_SYM_L2_TWO_VTAGS_NO = 0,\n-\tBNXT_ULP_SYM_L2_TWO_VTAGS_YES = 1,\n-\tBNXT_ULP_SYM_L2_UC_MC_BC_BC = 3,\n-\tBNXT_ULP_SYM_L2_UC_MC_BC_IGNORE = 0,\n-\tBNXT_ULP_SYM_L2_UC_MC_BC_MC = 2,\n-\tBNXT_ULP_SYM_L2_UC_MC_BC_UC = 0,\n-\tBNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE = 0,\n-\tBNXT_ULP_SYM_L2_VTAG_PRESENT_NO = 0,\n-\tBNXT_ULP_SYM_L2_VTAG_PRESENT_YES = 1,\n-\tBNXT_ULP_SYM_L3_HDR_ERROR_IGNORE = 0,\n-\tBNXT_ULP_SYM_L3_HDR_ERROR_NO = 0,\n-\tBNXT_ULP_SYM_L3_HDR_ERROR_YES = 1,\n-\tBNXT_ULP_SYM_L3_HDR_ISIP_IGNORE = 0,\n-\tBNXT_ULP_SYM_L3_HDR_ISIP_NO = 0,\n-\tBNXT_ULP_SYM_L3_HDR_ISIP_YES = 1,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_IGNORE = 0,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7,\n-\tBNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8,\n-\tBNXT_ULP_SYM_L3_HDR_VALID_IGNORE = 0,\n-\tBNXT_ULP_SYM_L3_HDR_VALID_NO = 0,\n-\tBNXT_ULP_SYM_L3_HDR_VALID_YES = 1,\n-\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE = 0,\n-\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_NO = 0,\n-\tBNXT_ULP_SYM_L3_IPV6_CMP_DST_YES = 1,\n-\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE = 0,\n-\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_NO = 0,\n-\tBNXT_ULP_SYM_L3_IPV6_CMP_SRC_YES = 1,\n-\tBNXT_ULP_SYM_L4_HDR_ERROR_IGNORE = 0,\n-\tBNXT_ULP_SYM_L4_HDR_ERROR_NO = 0,\n-\tBNXT_ULP_SYM_L4_HDR_ERROR_YES = 1,\n-\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0,\n-\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_NO = 0,\n-\tBNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_YES = 1,\n-\tBNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5,\n-\tBNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2,\n-\tBNXT_ULP_SYM_L4_HDR_TYPE_IGNORE = 0,\n-\tBNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0,\n-\tBNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1,\n-\tBNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3,\n-\tBNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4,\n-\tBNXT_ULP_SYM_L4_HDR_VALID_IGNORE = 0,\n-\tBNXT_ULP_SYM_L4_HDR_VALID_NO = 0,\n-\tBNXT_ULP_SYM_L4_HDR_VALID_YES = 1,\n-\tBNXT_ULP_SYM_LITTLE_ENDIAN = 1,\n-\tBNXT_ULP_SYM_MATCH_TYPE_EM = 0,\n-\tBNXT_ULP_SYM_MATCH_TYPE_WM = 1,\n-\tBNXT_ULP_SYM_NO = 0,\n-\tBNXT_ULP_SYM_PKT_TYPE_IGNORE = 0,\n-\tBNXT_ULP_SYM_PKT_TYPE_L2 = 0,\n-\tBNXT_ULP_SYM_POP_VLAN_NO = 0,\n-\tBNXT_ULP_SYM_POP_VLAN_YES = 1,\n-\tBNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0,\n-\tBNXT_ULP_SYM_RECYCLE_CNT_ONE = 1,\n-\tBNXT_ULP_SYM_RECYCLE_CNT_THREE = 3,\n-\tBNXT_ULP_SYM_RECYCLE_CNT_TWO = 2,\n-\tBNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0,\n-\tBNXT_ULP_SYM_RESERVED_IGNORE = 0,\n-\tBNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3,\n-\tBNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 3,\n-\tBNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3,\n-\tBNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0,\n-\tBNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL2_HDR_VALID_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL2_HDR_VALID_NO = 0,\n-\tBNXT_ULP_SYM_TL2_HDR_VALID_YES = 1,\n-\tBNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL2_TWO_VTAGS_NO = 0,\n-\tBNXT_ULP_SYM_TL2_TWO_VTAGS_YES = 1,\n-\tBNXT_ULP_SYM_TL2_UC_MC_BC_BC = 3,\n-\tBNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL2_UC_MC_BC_MC = 2,\n-\tBNXT_ULP_SYM_TL2_UC_MC_BC_UC = 0,\n-\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_NO = 0,\n-\tBNXT_ULP_SYM_TL2_VTAG_PRESENT_YES = 1,\n-\tBNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL3_HDR_ERROR_NO = 0,\n-\tBNXT_ULP_SYM_TL3_HDR_ERROR_YES = 1,\n-\tBNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL3_HDR_ISIP_NO = 0,\n-\tBNXT_ULP_SYM_TL3_HDR_ISIP_YES = 1,\n-\tBNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0,\n-\tBNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1,\n-\tBNXT_ULP_SYM_TL3_HDR_VALID_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL3_HDR_VALID_NO = 0,\n-\tBNXT_ULP_SYM_TL3_HDR_VALID_YES = 1,\n-\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_NO = 0,\n-\tBNXT_ULP_SYM_TL3_IPV6_CMP_DST_YES = 1,\n-\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_NO = 0,\n-\tBNXT_ULP_SYM_TL3_IPV6_CMP_SRC_YES = 1,\n-\tBNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL4_HDR_ERROR_NO = 0,\n-\tBNXT_ULP_SYM_TL4_HDR_ERROR_YES = 1,\n-\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_NO = 0,\n-\tBNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_YES = 1,\n-\tBNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0,\n-\tBNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1,\n-\tBNXT_ULP_SYM_TL4_HDR_VALID_IGNORE = 0,\n-\tBNXT_ULP_SYM_TL4_HDR_VALID_NO = 0,\n-\tBNXT_ULP_SYM_TL4_HDR_VALID_YES = 1,\n-\tBNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE = 0,\n-\tBNXT_ULP_SYM_TUN_HDR_ERROR_NO = 0,\n-\tBNXT_ULP_SYM_TUN_HDR_ERROR_YES = 1,\n-\tBNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE = 0,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE = 0,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_NONE = 15,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_NVGRE = 2,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_PPPOE = 6,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9,\n-\tBNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0,\n-\tBNXT_ULP_SYM_TUN_HDR_VALID_IGNORE = 0,\n-\tBNXT_ULP_SYM_TUN_HDR_VALID_NO = 0,\n-\tBNXT_ULP_SYM_TUN_HDR_VALID_YES = 1,\n-\tBNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 3,\n-\tBNXT_ULP_SYM_YES = 1\n-};\n-\n-enum bnxt_ulp_act_prop_sz {\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_PORT_ID = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_VNIC = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_VPORT = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_MARK = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_COUNT = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_METER = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC = 8,\n-\tBNXT_ULP_ACT_PROP_SZ_SET_MAC_DST = 8,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_VLAN = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_PCP = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_SET_VLAN_VID = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC = 16,\n-\tBNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST = 16,\n-\tBNXT_ULP_ACT_PROP_SZ_SET_TP_SRC = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_SET_TP_DST = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0 = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1 = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2 = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3 = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4 = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5 = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6 = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7 = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC = 6,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC = 6,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG = 8,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_IP = 32,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC = 16,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_UDP = 4,\n-\tBNXT_ULP_ACT_PROP_SZ_ENCAP_TUN = 32,\n-\tBNXT_ULP_ACT_PROP_SZ_LAST = 4\n-};\n-\n-enum bnxt_ulp_act_prop_idx {\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ = 0,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ = 4,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ = 8,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE = 12,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM = 16,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE = 20,\n-\tBNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM = 24,\n-\tBNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM = 28,\n-\tBNXT_ULP_ACT_PROP_IDX_PORT_ID = 32,\n-\tBNXT_ULP_ACT_PROP_IDX_VNIC = 36,\n-\tBNXT_ULP_ACT_PROP_IDX_VPORT = 40,\n-\tBNXT_ULP_ACT_PROP_IDX_MARK = 44,\n-\tBNXT_ULP_ACT_PROP_IDX_COUNT = 48,\n-\tBNXT_ULP_ACT_PROP_IDX_METER = 52,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC = 56,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_MAC_DST = 64,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_VLAN = 72,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_PCP = 76,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_SET_VLAN_VID = 80,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC = 84,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST = 88,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC = 92,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST = 108,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_TP_SRC = 124,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_TP_DST = 128,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0 = 132,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1 = 136,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2 = 140,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3 = 144,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4 = 148,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5 = 152,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6 = 156,\n-\tBNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7 = 160,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC = 164,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC = 170,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG = 176,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP = 184,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC = 216,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 232,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 236,\n-\tBNXT_ULP_ACT_PROP_IDX_LAST = 268\n-};\n-\n-enum bnxt_ulp_class_hid {\n-\tBNXT_ULP_CLASS_HID_0080 = 0x0080,\n-\tBNXT_ULP_CLASS_HID_0000 = 0x0000,\n-\tBNXT_ULP_CLASS_HID_0087 = 0x0087\n-};\n-\n-enum bnxt_ulp_act_hid {\n-\tBNXT_ULP_ACT_HID_00a1 = 0x00a1,\n-\tBNXT_ULP_ACT_HID_0040 = 0x0040,\n-\tBNXT_ULP_ACT_HID_0029 = 0x0029\n-};\n-\n-#endif\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\ndeleted file mode 100644\nindex b05d223db8..0000000000\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h\n+++ /dev/null\n@@ -1,224 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2014-2021 Broadcom\n- * All rights reserved.\n- */\n-\n-#ifndef ULP_HDR_FIELD_ENUMS_H_\n-#define ULP_HDR_FIELD_ENUMS_H_\n-\n-enum bnxt_ulp_hf0 {\n-\tBNXT_ULP_HF0_IDX_SVIF_INDEX              = 0,\n-\tBNXT_ULP_HF0_IDX_O_ETH_DMAC              = 1,\n-\tBNXT_ULP_HF0_IDX_O_ETH_SMAC              = 2,\n-\tBNXT_ULP_HF0_IDX_O_ETH_TYPE              = 3,\n-\tBNXT_ULP_HF0_IDX_OO_VLAN_CFI_PRI         = 4,\n-\tBNXT_ULP_HF0_IDX_OO_VLAN_VID             = 5,\n-\tBNXT_ULP_HF0_IDX_OO_VLAN_TYPE            = 6,\n-\tBNXT_ULP_HF0_IDX_OI_VLAN_CFI_PRI         = 7,\n-\tBNXT_ULP_HF0_IDX_OI_VLAN_VID             = 8,\n-\tBNXT_ULP_HF0_IDX_OI_VLAN_TYPE            = 9,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_VER              = 10,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_TOS              = 11,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_LEN              = 12,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_FRAG_ID          = 13,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_FRAG_OFF         = 14,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_TTL              = 15,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_NEXT_PID         = 16,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_CSUM             = 17,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_SRC_ADDR         = 18,\n-\tBNXT_ULP_HF0_IDX_O_IPV4_DST_ADDR         = 19,\n-\tBNXT_ULP_HF0_IDX_O_UDP_SRC_PORT          = 20,\n-\tBNXT_ULP_HF0_IDX_O_UDP_DST_PORT          = 21,\n-\tBNXT_ULP_HF0_IDX_O_UDP_LENGTH            = 22,\n-\tBNXT_ULP_HF0_IDX_O_UDP_CSUM              = 23\n-};\n-\n-enum bnxt_ulp_hf1 {\n-\tBNXT_ULP_HF1_IDX_SVIF_INDEX              = 0,\n-\tBNXT_ULP_HF1_IDX_O_ETH_DMAC              = 1,\n-\tBNXT_ULP_HF1_IDX_O_ETH_SMAC              = 2,\n-\tBNXT_ULP_HF1_IDX_O_ETH_TYPE              = 3,\n-\tBNXT_ULP_HF1_IDX_OO_VLAN_CFI_PRI         = 4,\n-\tBNXT_ULP_HF1_IDX_OO_VLAN_VID             = 5,\n-\tBNXT_ULP_HF1_IDX_OO_VLAN_TYPE            = 6,\n-\tBNXT_ULP_HF1_IDX_OI_VLAN_CFI_PRI         = 7,\n-\tBNXT_ULP_HF1_IDX_OI_VLAN_VID             = 8,\n-\tBNXT_ULP_HF1_IDX_OI_VLAN_TYPE            = 9,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_VER              = 10,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_TOS              = 11,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_LEN              = 12,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_FRAG_ID          = 13,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_FRAG_OFF         = 14,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_TTL              = 15,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_NEXT_PID         = 16,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_CSUM             = 17,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_SRC_ADDR         = 18,\n-\tBNXT_ULP_HF1_IDX_O_IPV4_DST_ADDR         = 19,\n-\tBNXT_ULP_HF1_IDX_O_UDP_SRC_PORT          = 20,\n-\tBNXT_ULP_HF1_IDX_O_UDP_DST_PORT          = 21,\n-\tBNXT_ULP_HF1_IDX_O_UDP_LENGTH            = 22,\n-\tBNXT_ULP_HF1_IDX_O_UDP_CSUM              = 23\n-};\n-\n-enum bnxt_ulp_hf2 {\n-\tBNXT_ULP_HF2_IDX_SVIF_INDEX              = 0,\n-\tBNXT_ULP_HF2_IDX_O_ETH_DMAC              = 1,\n-\tBNXT_ULP_HF2_IDX_O_ETH_SMAC              = 2,\n-\tBNXT_ULP_HF2_IDX_O_ETH_TYPE              = 3,\n-\tBNXT_ULP_HF2_IDX_OO_VLAN_CFI_PRI         = 4,\n-\tBNXT_ULP_HF2_IDX_OO_VLAN_VID             = 5,\n-\tBNXT_ULP_HF2_IDX_OO_VLAN_TYPE            = 6,\n-\tBNXT_ULP_HF2_IDX_OI_VLAN_CFI_PRI         = 7,\n-\tBNXT_ULP_HF2_IDX_OI_VLAN_VID             = 8,\n-\tBNXT_ULP_HF2_IDX_OI_VLAN_TYPE            = 9,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_VER              = 10,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_TOS              = 11,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_LEN              = 12,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_FRAG_ID          = 13,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_FRAG_OFF         = 14,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_TTL              = 15,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_NEXT_PID         = 16,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_CSUM             = 17,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_SRC_ADDR         = 18,\n-\tBNXT_ULP_HF2_IDX_O_IPV4_DST_ADDR         = 19,\n-\tBNXT_ULP_HF2_IDX_O_UDP_SRC_PORT          = 20,\n-\tBNXT_ULP_HF2_IDX_O_UDP_DST_PORT          = 21,\n-\tBNXT_ULP_HF2_IDX_O_UDP_LENGTH            = 22,\n-\tBNXT_ULP_HF2_IDX_O_UDP_CSUM              = 23,\n-\tBNXT_ULP_HF2_IDX_T_VXLAN_FLAGS           = 24,\n-\tBNXT_ULP_HF2_IDX_T_VXLAN_RSVD0           = 25,\n-\tBNXT_ULP_HF2_IDX_T_VXLAN_VNI             = 26,\n-\tBNXT_ULP_HF2_IDX_T_VXLAN_RSVD1           = 27,\n-\tBNXT_ULP_HF2_IDX_I_ETH_DMAC              = 28,\n-\tBNXT_ULP_HF2_IDX_I_ETH_SMAC              = 29,\n-\tBNXT_ULP_HF2_IDX_I_ETH_TYPE              = 30,\n-\tBNXT_ULP_HF2_IDX_IO_VLAN_CFI_PRI         = 31,\n-\tBNXT_ULP_HF2_IDX_IO_VLAN_VID             = 32,\n-\tBNXT_ULP_HF2_IDX_IO_VLAN_TYPE            = 33,\n-\tBNXT_ULP_HF2_IDX_II_VLAN_CFI_PRI         = 34,\n-\tBNXT_ULP_HF2_IDX_II_VLAN_VID             = 35,\n-\tBNXT_ULP_HF2_IDX_II_VLAN_TYPE            = 36,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_VER              = 37,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_TOS              = 38,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_LEN              = 39,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_FRAG_ID          = 40,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_FRAG_OFF         = 41,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_TTL              = 42,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_NEXT_PID         = 43,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_CSUM             = 44,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_SRC_ADDR         = 45,\n-\tBNXT_ULP_HF2_IDX_I_IPV4_DST_ADDR         = 46,\n-\tBNXT_ULP_HF2_IDX_I_UDP_SRC_PORT          = 47,\n-\tBNXT_ULP_HF2_IDX_I_UDP_DST_PORT          = 48,\n-\tBNXT_ULP_HF2_IDX_I_UDP_LENGTH            = 49,\n-\tBNXT_ULP_HF2_IDX_I_UDP_CSUM              = 50\n-};\n-\n-enum bnxt_ulp_hf_bitmask0 {\n-\tBNXT_ULP_HF0_BITMASK_SVIF_INDEX          = 0x8000000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_ETH_DMAC          = 0x4000000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_ETH_SMAC          = 0x2000000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_ETH_TYPE          = 0x1000000000000000,\n-\tBNXT_ULP_HF0_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,\n-\tBNXT_ULP_HF0_BITMASK_OO_VLAN_VID         = 0x0400000000000000,\n-\tBNXT_ULP_HF0_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,\n-\tBNXT_ULP_HF0_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,\n-\tBNXT_ULP_HF0_BITMASK_OI_VLAN_VID         = 0x0080000000000000,\n-\tBNXT_ULP_HF0_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_VER          = 0x0020000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_TOS          = 0x0010000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_LEN          = 0x0008000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_TTL          = 0x0001000000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_NEXT_PID     = 0x0000800000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_UDP_SRC_PORT      = 0x0000080000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_UDP_DST_PORT      = 0x0000040000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,\n-\tBNXT_ULP_HF0_BITMASK_O_UDP_CSUM          = 0x0000010000000000\n-};\n-enum bnxt_ulp_hf_bitmask1 {\n-\tBNXT_ULP_HF1_BITMASK_SVIF_INDEX          = 0x8000000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_ETH_DMAC          = 0x4000000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_ETH_SMAC          = 0x2000000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_ETH_TYPE          = 0x1000000000000000,\n-\tBNXT_ULP_HF1_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,\n-\tBNXT_ULP_HF1_BITMASK_OO_VLAN_VID         = 0x0400000000000000,\n-\tBNXT_ULP_HF1_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,\n-\tBNXT_ULP_HF1_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,\n-\tBNXT_ULP_HF1_BITMASK_OI_VLAN_VID         = 0x0080000000000000,\n-\tBNXT_ULP_HF1_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_VER          = 0x0020000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_TOS          = 0x0010000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_LEN          = 0x0008000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_TTL          = 0x0001000000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_NEXT_PID     = 0x0000800000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_UDP_SRC_PORT      = 0x0000080000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_UDP_DST_PORT      = 0x0000040000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,\n-\tBNXT_ULP_HF1_BITMASK_O_UDP_CSUM          = 0x0000010000000000\n-};\n-\n-enum bnxt_ulp_hf_bitmask2 {\n-\tBNXT_ULP_HF2_BITMASK_SVIF_INDEX          = 0x8000000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_ETH_DMAC          = 0x4000000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_ETH_SMAC          = 0x2000000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_ETH_TYPE          = 0x1000000000000000,\n-\tBNXT_ULP_HF2_BITMASK_OO_VLAN_CFI_PRI     = 0x0800000000000000,\n-\tBNXT_ULP_HF2_BITMASK_OO_VLAN_VID         = 0x0400000000000000,\n-\tBNXT_ULP_HF2_BITMASK_OO_VLAN_TYPE        = 0x0200000000000000,\n-\tBNXT_ULP_HF2_BITMASK_OI_VLAN_CFI_PRI     = 0x0100000000000000,\n-\tBNXT_ULP_HF2_BITMASK_OI_VLAN_VID         = 0x0080000000000000,\n-\tBNXT_ULP_HF2_BITMASK_OI_VLAN_TYPE        = 0x0040000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_VER          = 0x0020000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_TOS          = 0x0010000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_LEN          = 0x0008000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_FRAG_ID      = 0x0004000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_FRAG_OFF     = 0x0002000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_TTL          = 0x0001000000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_NEXT_PID     = 0x0000800000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_CSUM         = 0x0000400000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_SRC_ADDR     = 0x0000200000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_IPV4_DST_ADDR     = 0x0000100000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_UDP_SRC_PORT      = 0x0000080000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_UDP_DST_PORT      = 0x0000040000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_UDP_LENGTH        = 0x0000020000000000,\n-\tBNXT_ULP_HF2_BITMASK_O_UDP_CSUM          = 0x0000010000000000,\n-\tBNXT_ULP_HF2_BITMASK_T_VXLAN_FLAGS       = 0x0000008000000000,\n-\tBNXT_ULP_HF2_BITMASK_T_VXLAN_RSVD0       = 0x0000004000000000,\n-\tBNXT_ULP_HF2_BITMASK_T_VXLAN_VNI         = 0x0000002000000000,\n-\tBNXT_ULP_HF2_BITMASK_T_VXLAN_RSVD1       = 0x0000001000000000,\n-\tBNXT_ULP_HF2_BITMASK_I_ETH_DMAC          = 0x0000000800000000,\n-\tBNXT_ULP_HF2_BITMASK_I_ETH_SMAC          = 0x0000000400000000,\n-\tBNXT_ULP_HF2_BITMASK_I_ETH_TYPE          = 0x0000000200000000,\n-\tBNXT_ULP_HF2_BITMASK_IO_VLAN_CFI_PRI     = 0x0000000100000000,\n-\tBNXT_ULP_HF2_BITMASK_IO_VLAN_VID         = 0x0000000080000000,\n-\tBNXT_ULP_HF2_BITMASK_IO_VLAN_TYPE        = 0x0000000040000000,\n-\tBNXT_ULP_HF2_BITMASK_II_VLAN_CFI_PRI     = 0x0000000020000000,\n-\tBNXT_ULP_HF2_BITMASK_II_VLAN_VID         = 0x0000000010000000,\n-\tBNXT_ULP_HF2_BITMASK_II_VLAN_TYPE        = 0x0000000008000000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_VER          = 0x0000000004000000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_TOS          = 0x0000000002000000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_LEN          = 0x0000000001000000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_FRAG_ID      = 0x0000000000800000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_FRAG_OFF     = 0x0000000000400000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_TTL          = 0x0000000000200000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_NEXT_PID     = 0x0000000000100000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_CSUM         = 0x0000000000080000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_SRC_ADDR     = 0x0000000000040000,\n-\tBNXT_ULP_HF2_BITMASK_I_IPV4_DST_ADDR     = 0x0000000000020000,\n-\tBNXT_ULP_HF2_BITMASK_I_UDP_SRC_PORT      = 0x0000000000010000,\n-\tBNXT_ULP_HF2_BITMASK_I_UDP_DST_PORT      = 0x0000000000008000,\n-\tBNXT_ULP_HF2_BITMASK_I_UDP_LENGTH        = 0x0000000000004000,\n-\tBNXT_ULP_HF2_BITMASK_I_UDP_CSUM          = 0x0000000000002000\n-};\n-\n-#endif\n",
    "prefixes": [
        "57/58"
    ]
}