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GET /api/patches/93543/?format=api
{ "id": 93543, "url": "http://patches.dpdk.org/api/patches/93543/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210528132524.32451-2-jiaweiw@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210528132524.32451-2-jiaweiw@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210528132524.32451-2-jiaweiw@nvidia.com", "date": "2021-05-28T13:25:24", "name": "[2/2] net/mlx5: control rules with identical pattern behavior", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b2c15070ba69dde74eb19af9d4208f374bb34298", "submitter": { "id": 1939, "url": "http://patches.dpdk.org/api/people/1939/?format=api", "name": "Jiawei Wang", "email": "jiaweiw@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210528132524.32451-2-jiaweiw@nvidia.com/mbox/", "series": [ { "id": 17157, "url": "http://patches.dpdk.org/api/series/17157/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=17157", "date": "2021-05-28T13:25:23", "name": "[1/2] common/mlx5: add glue function for duplicate rule ability", "version": 1, "mbox": "http://patches.dpdk.org/series/17157/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/93543/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/93543/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6C532A0547;\n\tFri, 28 May 2021 15:25:54 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 56F0F410FC;\n\tFri, 28 May 2021 15:25:54 +0200 (CEST)", "from NAM10-BN7-obe.outbound.protection.outlook.com\n (mail-bn7nam10on2050.outbound.protection.outlook.com [40.107.92.50])\n by mails.dpdk.org (Postfix) with ESMTP id 8EDB2410F2\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Jiawei Wang <jiaweiw@nvidia.com>", "To": "<matan@nvidia.com>, <viacheslavo@nvidia.com>, <orika@nvidia.com>,\n <thomas@monjalon.net>, Shahaf Shuler <shahafs@nvidia.com>", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>", "Date": "Fri, 28 May 2021 16:25:24 +0300", "Message-ID": "<20210528132524.32451-2-jiaweiw@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20210528132524.32451-1-jiaweiw@nvidia.com>", "References": "<20210528132524.32451-1-jiaweiw@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.145.6]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "e903aa3c-1735-4f0c-ca3d-08d921dc1d1b", "X-MS-TrafficTypeDiagnostic": "DM8PR12MB5462:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <DM8PR12MB5462ADF62ABB9B79097CB12CC6229@DM8PR12MB5462.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:9508;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n sAEklFb0k7nUAw3AKMEIr/mFG4jurz9dzkL08zzAMKSIgZN9Ikr1/4rtxvntqHjNrG/yNwVFiofMdGvMdOzdkDR/Wkg+NA9n2qJEsvnwbTfr+cc3YF3P8kKSgiZuDRmXVHJTfgUC65GZW3cpSzUx/N5iUoUM8j1j1KCAR1HoxKFB+FyV/06lVRZNrU5PUlbuhvS9sjnTA0PK62sMurZNFXhlRlG4tHADMGMkchrTvWYwxfEUQ/PBVT0H/2BFqsPdD2EniPKywJRr4zhHG/Res595upCJ7bKTBkgZL8uFJKxmPWo2l054gPrgLve1orgXtV2whq8dKGiHhOmM4/GYKeOezJuNaQqnb9LHKXMYKsixkkiEhnrBN5Y6dqS4XXPnxKZedpy6fllx8KAx3Ue9E2JkduKhTN71nGfyhMywlnBfiCO7zMkvmEeUidOpfNu+BgoR6IcA4FtzzsOiB+B2vgShPvbDNm1YcwjvLGPwMrT8RKDZDDnDn68p50cDIMUUVoODHfT3gUuTTSAcg5K1X1URdLlecY4GGq5wdNYzi9LczMV9GAkHo2imA5xmdFJ0EkVxBtJFBAMVndIjVVFQsMQ9m7auhytL7wEXi1+rC0gkYh0fSJ98+fdCkowOZttxKOyQcoAfFGRXp+UtmdPtLtoDpfQECYIJ/3KEgsK3K66PSpmtK+xqS9/Jv1C0SHon", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(136003)(39860400002)(396003)(376002)(346002)(46966006)(36840700001)(70206006)(70586007)(2906002)(356005)(5660300002)(6666004)(7636003)(36860700001)(82740400003)(82310400003)(1076003)(86362001)(426003)(55016002)(8936002)(316002)(336012)(8676002)(110136005)(478600001)(36906005)(2616005)(54906003)(83380400001)(26005)(6636002)(107886003)(47076005)(4326008)(6286002)(36756003)(7696005)(186003)(16526019)(309714004);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "28 May 2021 13:25:51.2639 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n e903aa3c-1735-4f0c-ca3d-08d921dc1d1b", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT059.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM8PR12MB5462", "Subject": "[dpdk-dev] [PATCH 2/2] net/mlx5: control rules with identical\n pattern behavior", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "In order to allow\\disallow configuring rules with identical\npatterns, the new device argument 'allow_duplicate_pattern'\nis introduced.\nIf allow, these rules be inserted successfully and only the\nfirst rule take affect.\nIf disallow, the first rule will be inserted and other rules\nbe rejected.\n\nThe default is to allow.\nSet it to 0 if disallow, for example:\n\t-a <PCI_BDF>,allow_duplicate_pattern=0\n\nSigned-off-by: Jiawei Wang <jiaweiw@nvidia.com>\n---\n doc/guides/nics/mlx5.rst | 10 ++++++++++\n doc/guides/rel_notes/release_21_08.rst | 6 ++++++\n drivers/net/mlx5/linux/mlx5_os.c | 7 +++++++\n drivers/net/mlx5/mlx5.c | 6 ++++++\n drivers/net/mlx5/mlx5.h | 2 ++\n drivers/net/mlx5/mlx5_flow_dv.c | 3 +++\n 6 files changed, 34 insertions(+)", "diff": "diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst\nindex 83299646dd..26f4a25441 100644\n--- a/doc/guides/nics/mlx5.rst\n+++ b/doc/guides/nics/mlx5.rst\n@@ -1058,6 +1058,16 @@ Driver options\n \n By default, the PMD will set this value to 1.\n \n+- ``allow_duplicate_pattern`` parameter [int]\n+\n+ There are two options to choose:\n+\n+ - 0. Prevent insertion of rules with the same pattern items on non-root table.\n+\n+ - 1. Allow insertion of rules with the same pattern items.\n+\n+ By default, the PMD will set this value to 1.\n+\n .. _mlx5_firmware_config:\n \n Firmware configuration\ndiff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst\nindex a6ecfdf3ce..e6f696a71d 100644\n--- a/doc/guides/rel_notes/release_21_08.rst\n+++ b/doc/guides/rel_notes/release_21_08.rst\n@@ -55,6 +55,12 @@ New Features\n Also, make sure to start the actual text at the margin.\n =======================================================\n \n+* **Updated Mellanox mlx5 net driver and common layer.**\n+\n+ Updated Mellanox mlx5 driver with new features and improvements, including:\n+\n+ * Added devargs options ``allow_duplicate_pattern``.\n+\n \n Removed Items\n -------------\ndiff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 534a56a555..7c4384ca77 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -355,6 +355,12 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)\n \t\t\tmlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);\n \t}\n \tsh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();\n+\tif (!priv->config.allow_duplicate_pattern) {\n+\t\tmlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);\n+\t\tmlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);\n+\t\tif (sh->fdb_domain)\n+\t\t\tmlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);\n+\t}\n #endif /* HAVE_MLX5DV_DR */\n \tsh->default_miss_action =\n \t\t\tmlx5_glue->dr_create_flow_action_default_miss();\n@@ -2359,6 +2365,7 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,\n \t\tdev_config.dv_flow_en = 1;\n \t\tdev_config.decap_en = 1;\n \t\tdev_config.log_hp_size = MLX5_ARG_UNSET;\n+\t\tdev_config.allow_duplicate_pattern = 1;\n \t\tlist[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,\n \t\t\t\t\t\t &list[i],\n \t\t\t\t\t\t &dev_config,\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex cf1815cb74..ef15b115d8 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -175,6 +175,9 @@\n /* Decap will be used or not. */\n #define MLX5_DECAP_EN \"decap_en\"\n \n+/* Device parameter to configure allow or prevent duplicate rules pattern. */\n+#define MLX5_ALLOW_DUPLICATE_PATTERN \"allow_duplicate_pattern\"\n+\n /* Shared memory between primary and secondary processes. */\n struct mlx5_shared_data *mlx5_shared_data;\n \n@@ -1948,6 +1951,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \t\tconfig->sys_mem_en = !!tmp;\n \t} else if (strcmp(MLX5_DECAP_EN, key) == 0) {\n \t\tconfig->decap_en = !!tmp;\n+\t} else if (strcmp(MLX5_ALLOW_DUPLICATE_PATTERN, key) == 0) {\n+\t\tconfig->allow_duplicate_pattern = !!tmp;\n \t} else {\n \t\tDRV_LOG(WARNING, \"%s: unknown parameter\", key);\n \t\trte_errno = EINVAL;\n@@ -2007,6 +2012,7 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)\n \t\tMLX5_RECLAIM_MEM,\n \t\tMLX5_SYS_MEM_EN,\n \t\tMLX5_DECAP_EN,\n+\t\tMLX5_ALLOW_DUPLICATE_PATTERN,\n \t\tNULL,\n \t};\n \tstruct rte_kvargs *kvlist;\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 32b2817bf2..63e7779d6f 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -244,6 +244,8 @@ struct mlx5_dev_config {\n \tunsigned int sys_mem_en:1; /* The default memory allocator. */\n \tunsigned int decap_en:1; /* Whether decap will be used or not. */\n \tunsigned int dv_miss_info:1; /* restore packet after partial hw miss */\n+\tunsigned int allow_duplicate_pattern:1;\n+\t/* Allow/Prevent the duplicate rules pattern. */\n \tstruct {\n \t\tunsigned int enabled:1; /* Whether MPRQ is enabled. */\n \t\tunsigned int stride_num_n; /* Number of strides. */\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex c50649a107..17d5a942d8 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -13299,6 +13299,9 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,\n \t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n \t\t\t\t\t NULL,\n \t\t\t\t\t \"hardware refuses to create flow\");\n+\t\t\tif (!priv->config.allow_duplicate_pattern &&\n+\t\t\t errno == EEXIST)\n+\t\t\t\tDRV_LOG(INFO, \"duplicate rules not supported\");\n \t\t\tgoto error;\n \t\t}\n \t\tif (priv->vmwa_context &&\n", "prefixes": [ "2/2" ] }