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GET /api/patches/63158/?format=api
{ "id": 63158, "url": "http://patches.dpdk.org/api/patches/63158/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1574244727-6003-5-git-send-email-joyce.kong@arm.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1574244727-6003-5-git-send-email-joyce.kong@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1574244727-6003-5-git-send-email-joyce.kong@arm.com", "date": "2019-11-20T10:12:05", "name": "[v4,4/6] net/bnx2x: use common rte bit operation APIs instead", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7e34da8a70f463003d95ae606eb1738dbb3ef777", "submitter": { "id": 970, "url": "http://patches.dpdk.org/api/people/970/?format=api", "name": "Joyce Kong", "email": "joyce.kong@arm.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1574244727-6003-5-git-send-email-joyce.kong@arm.com/mbox/", "series": [ { "id": 7544, "url": "http://patches.dpdk.org/api/series/7544/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7544", "date": "2019-11-20T10:12:01", "name": "implement common rte bit operation APIs in PMDs", "version": 4, "mbox": "http://patches.dpdk.org/series/7544/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/63158/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/63158/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0D570A04C1;\n\tWed, 20 Nov 2019 11:13:02 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id CB2EA5F13;\n\tWed, 20 Nov 2019 11:12:43 +0100 (CET)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id 267D02BA3\n for <dev@dpdk.org>; Wed, 20 Nov 2019 11:12:42 +0100 (CET)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A82A331B;\n Wed, 20 Nov 2019 02:12:41 -0800 (PST)", "from net-arm-thunderx2-01.test.ast.arm.com\n (net-arm-thunderx2-01.shanghai.arm.com [10.169.40.40])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 39FB23F52E;\n Wed, 20 Nov 2019 02:12:36 -0800 (PST)" ], "From": "Joyce Kong <joyce.kong@arm.com>", "To": "dev@dpdk.org", "Cc": "nd@arm.com, thomas@monjalon.net, jerinj@marvell.com,\n stephen@networkplumber.org, mb@smartsharesystems.com,\n david.marchand@redhat.com, honnappa.nagarahalli@arm.com, gavin.hu@arm.com,\n ravi1.kumar@amd.com, rmody@marvell.com, shshaikh@marvell.com,\n xuanziyang2@huawei.com, cloud.wangxiaoyun@huawei.com,\n zhouguoyang@huawei.com", "Date": "Wed, 20 Nov 2019 18:12:05 +0800", "Message-Id": "<1574244727-6003-5-git-send-email-joyce.kong@arm.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": [ "<1574244727-6003-1-git-send-email-joyce.kong@arm.com>", "<1571125801-45773-1-git-send-email-joyce.kong@arm.com>" ], "References": [ "<1574244727-6003-1-git-send-email-joyce.kong@arm.com>", "<1571125801-45773-1-git-send-email-joyce.kong@arm.com>" ], "Subject": "[dpdk-dev] [PATCH v4 4/6] net/bnx2x: use common rte bit operation\n\tAPIs instead", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Remove its own bit operation APIs and use the common one,\nthis can reduce the code duplication largely.\n\nSigned-off-by: Joyce Kong <joyce.kong@arm.com>\nReviewed-by: Gavin Hu <gavin.hu@arm.com>\n---\n drivers/net/bnx2x/bnx2x.c | 209 +++++++++++++++++++------------------------\n drivers/net/bnx2x/bnx2x.h | 4 -\n drivers/net/bnx2x/ecore_sp.h | 9 +-\n 3 files changed, 98 insertions(+), 124 deletions(-)", "diff": "diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c\nindex ed31335..1c00a67 100644\n--- a/drivers/net/bnx2x/bnx2x.c\n+++ b/drivers/net/bnx2x/bnx2x.c\n@@ -26,6 +26,7 @@\n #include <fcntl.h>\n #include <zlib.h>\n #include <rte_string_fns.h>\n+#include <rte_bitops.h>\n \n #define BNX2X_PMD_VER_PREFIX \"BNX2X PMD\"\n #define BNX2X_PMD_VERSION_MAJOR 1\n@@ -129,32 +130,6 @@ static void bnx2x_ack_sb(struct bnx2x_softc *sc, uint8_t igu_sb_id,\n \t\t\t uint8_t storm, uint16_t index, uint8_t op,\n \t\t\t uint8_t update);\n \n-int bnx2x_test_bit(int nr, volatile unsigned long *addr)\n-{\n-\tint res;\n-\n-\tmb();\n-\tres = ((*addr) & (1UL << nr)) != 0;\n-\tmb();\n-\treturn res;\n-}\n-\n-void bnx2x_set_bit(unsigned int nr, volatile unsigned long *addr)\n-{\n-\t__sync_fetch_and_or(addr, (1UL << nr));\n-}\n-\n-void bnx2x_clear_bit(int nr, volatile unsigned long *addr)\n-{\n-\t__sync_fetch_and_and(addr, ~(1UL << nr));\n-}\n-\n-int bnx2x_test_and_clear_bit(int nr, volatile unsigned long *addr)\n-{\n-\tunsigned long mask = (1UL << nr);\n-\treturn __sync_fetch_and_and(addr, ~mask) & mask;\n-}\n-\n int bnx2x_cmpxchg(volatile int *addr, int old, int new)\n {\n \treturn __sync_val_compare_and_swap(addr, old, new);\n@@ -1427,11 +1402,11 @@ bnx2x_del_all_macs(struct bnx2x_softc *sc, struct ecore_vlan_mac_obj *mac_obj,\n \n \t/* wait for completion of requested */\n \tif (wait_for_comp) {\n-\t\tbnx2x_set_bit(RAMROD_COMP_WAIT, &ramrod_flags);\n+\t\trte_set_bit64(RAMROD_COMP_WAIT, &ramrod_flags);\n \t}\n \n \t/* Set the mac type of addresses we want to clear */\n-\tbnx2x_set_bit(mac_type, &vlan_mac_flags);\n+\trte_set_bit64(mac_type, &vlan_mac_flags);\n \n \trc = mac_obj->delete_all(sc, mac_obj, &vlan_mac_flags, &ramrod_flags);\n \tif (rc < 0)\n@@ -1458,26 +1433,26 @@ bnx2x_fill_accept_flags(struct bnx2x_softc *sc, uint32_t rx_mode,\n \t\tbreak;\n \n \tcase BNX2X_RX_MODE_NORMAL:\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_UNICAST, rx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_MULTICAST, rx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_BROADCAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_UNICAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_MULTICAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_BROADCAST, rx_accept_flags);\n \n \t\t/* internal switching mode */\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_UNICAST, tx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_MULTICAST, tx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_BROADCAST, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_UNICAST, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_MULTICAST, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_BROADCAST, tx_accept_flags);\n \n \t\tbreak;\n \n \tcase BNX2X_RX_MODE_ALLMULTI:\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_UNICAST, rx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_ALL_MULTICAST, rx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_BROADCAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_UNICAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_ALL_MULTICAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_BROADCAST, rx_accept_flags);\n \n \t\t/* internal switching mode */\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_UNICAST, tx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_ALL_MULTICAST, tx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_BROADCAST, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_UNICAST, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_ALL_MULTICAST, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_BROADCAST, tx_accept_flags);\n \n \t\tbreak;\n \n@@ -1488,19 +1463,20 @@ bnx2x_fill_accept_flags(struct bnx2x_softc *sc, uint32_t rx_mode,\n \t\t * should receive matched and unmatched (in resolution of port)\n \t\t * unicast packets.\n \t\t */\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_UNMATCHED, rx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_UNICAST, rx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_ALL_MULTICAST, rx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_BROADCAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_UNMATCHED, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_UNICAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_ALL_MULTICAST, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_BROADCAST, rx_accept_flags);\n \n \t\t/* internal switching mode */\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_ALL_MULTICAST, tx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_BROADCAST, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_ALL_MULTICAST, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_BROADCAST, tx_accept_flags);\n \n \t\tif (IS_MF_SI(sc)) {\n-\t\t\tbnx2x_set_bit(ECORE_ACCEPT_ALL_UNICAST, tx_accept_flags);\n+\t\t\trte_set_bit64(ECORE_ACCEPT_ALL_UNICAST,\n+\t\t\t\t\ttx_accept_flags);\n \t\t} else {\n-\t\t\tbnx2x_set_bit(ECORE_ACCEPT_UNICAST, tx_accept_flags);\n+\t\t\trte_set_bit64(ECORE_ACCEPT_UNICAST, tx_accept_flags);\n \t\t}\n \n \t\tbreak;\n@@ -1512,8 +1488,8 @@ bnx2x_fill_accept_flags(struct bnx2x_softc *sc, uint32_t rx_mode,\n \n \t/* Set ACCEPT_ANY_VLAN as we do not enable filtering by VLAN */\n \tif (rx_mode != BNX2X_RX_MODE_NONE) {\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_ANY_VLAN, rx_accept_flags);\n-\t\tbnx2x_set_bit(ECORE_ACCEPT_ANY_VLAN, tx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_ANY_VLAN, rx_accept_flags);\n+\t\trte_set_bit64(ECORE_ACCEPT_ANY_VLAN, tx_accept_flags);\n \t}\n \n \treturn 0;\n@@ -1542,7 +1518,7 @@ bnx2x_set_q_rx_mode(struct bnx2x_softc *sc, uint8_t cl_id,\n \tramrod_param.rdata = BNX2X_SP(sc, rx_mode_rdata);\n \tramrod_param.rdata_mapping =\n \t (rte_iova_t)BNX2X_SP_MAPPING(sc, rx_mode_rdata),\n-\t bnx2x_set_bit(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state);\n+\t rte_set_bit64(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state);\n \n \tramrod_param.ramrod_flags = ramrod_flags;\n \tramrod_param.rx_mode_flags = rx_mode_flags;\n@@ -1571,9 +1547,9 @@ int bnx2x_set_storm_rx_mode(struct bnx2x_softc *sc)\n \t\treturn rc;\n \t}\n \n-\tbnx2x_set_bit(RAMROD_RX, &ramrod_flags);\n-\tbnx2x_set_bit(RAMROD_TX, &ramrod_flags);\n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &ramrod_flags);\n+\trte_set_bit64(RAMROD_RX, &ramrod_flags);\n+\trte_set_bit64(RAMROD_TX, &ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &ramrod_flags);\n \n \treturn bnx2x_set_q_rx_mode(sc, sc->fp[0].cl_id, rx_mode_flags,\n \t\t\t\t rx_accept_flags, tx_accept_flags,\n@@ -1698,7 +1674,7 @@ static int bnx2x_func_wait_started(struct bnx2x_softc *sc)\n \t\t\t \"Forcing STARTED-->TX_STOPPED-->STARTED\");\n \n \t\tfunc_params.f_obj = &sc->func_obj;\n-\t\tbnx2x_set_bit(RAMROD_DRV_CLR_ONLY, &func_params.ramrod_flags);\n+\t\trte_set_bit64(RAMROD_DRV_CLR_ONLY, &func_params.ramrod_flags);\n \n \t\t/* STARTED-->TX_STOPPED */\n \t\tfunc_params.cmd = ECORE_F_CMD_TX_STOP;\n@@ -1722,7 +1698,7 @@ static int bnx2x_stop_queue(struct bnx2x_softc *sc, int index)\n \n \tq_params.q_obj = &sc->sp_objs[fp->index].q_obj;\n \t/* We want to wait for completion in this context */\n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &q_params.ramrod_flags);\n \n \t/* Stop the primary connection: */\n \n@@ -1783,7 +1759,7 @@ static int bnx2x_func_stop(struct bnx2x_softc *sc)\n \tint rc;\n \n \t/* prepare parameters for function state transitions */\n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &func_params.ramrod_flags);\n \tfunc_params.f_obj = &sc->func_obj;\n \tfunc_params.cmd = ECORE_F_CMD_STOP;\n \n@@ -1797,7 +1773,7 @@ static int bnx2x_func_stop(struct bnx2x_softc *sc)\n \tif (rc) {\n \t\tPMD_DRV_LOG(NOTICE, sc, \"FUNC_STOP ramrod failed. \"\n \t\t\t \"Running a dry transaction\");\n-\t\tbnx2x_set_bit(RAMROD_DRV_CLR_ONLY, &func_params.ramrod_flags);\n+\t\trte_set_bit64(RAMROD_DRV_CLR_ONLY, &func_params.ramrod_flags);\n \t\treturn ecore_func_state_change(sc, &func_params);\n \t}\n \n@@ -1809,7 +1785,7 @@ static int bnx2x_reset_hw(struct bnx2x_softc *sc, uint32_t load_code)\n \tstruct ecore_func_state_params func_params = { NULL };\n \n \t/* Prepare parameters for function state transitions */\n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &func_params.ramrod_flags);\n \n \tfunc_params.f_obj = &sc->func_obj;\n \tfunc_params.cmd = ECORE_F_CMD_HW_RESET;\n@@ -1866,11 +1842,10 @@ bnx2x_chip_cleanup(struct bnx2x_softc *sc, uint32_t unload_mode, uint8_t keep_li\n \t * a race between the completion code and this code.\n \t */\n \n-\tif (bnx2x_test_bit(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state)) {\n-\t\tbnx2x_set_bit(ECORE_FILTER_RX_MODE_SCHED, &sc->sp_state);\n-\t} else {\n+\tif (rte_get_bit64(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state))\n+\t\trte_set_bit64(ECORE_FILTER_RX_MODE_SCHED, &sc->sp_state);\n+\telse\n \t\tbnx2x_set_storm_rx_mode(sc);\n-\t}\n \n \t/* Clean up multicast configuration */\n \trparam.mcast_obj = &sc->mcast_obj;\n@@ -1960,12 +1935,12 @@ static void bnx2x_squeeze_objects(struct bnx2x_softc *sc)\n \t/* Cleanup MACs' object first... */\n \n \t/* Wait for completion of requested */\n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &ramrod_flags);\n \t/* Perform a dry cleanup */\n-\tbnx2x_set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags);\n+\trte_set_bit64(RAMROD_DRV_CLR_ONLY, &ramrod_flags);\n \n \t/* Clean ETH primary MAC */\n-\tbnx2x_set_bit(ECORE_ETH_MAC, &vlan_mac_flags);\n+\trte_set_bit64(ECORE_ETH_MAC, &vlan_mac_flags);\n \trc = mac_obj->delete_all(sc, &sc->sp_objs->mac_obj, &vlan_mac_flags,\n \t\t\t\t &ramrod_flags);\n \tif (rc != 0) {\n@@ -1974,7 +1949,7 @@ static void bnx2x_squeeze_objects(struct bnx2x_softc *sc)\n \n \t/* Cleanup UC list */\n \tvlan_mac_flags = 0;\n-\tbnx2x_set_bit(ECORE_UC_LIST_MAC, &vlan_mac_flags);\n+\trte_set_bit64(ECORE_UC_LIST_MAC, &vlan_mac_flags);\n \trc = mac_obj->delete_all(sc, mac_obj, &vlan_mac_flags, &ramrod_flags);\n \tif (rc != 0) {\n \t\tPMD_DRV_LOG(NOTICE, sc,\n@@ -1984,7 +1959,7 @@ static void bnx2x_squeeze_objects(struct bnx2x_softc *sc)\n \t/* Now clean mcast object... */\n \n \trparam.mcast_obj = &sc->mcast_obj;\n-\tbnx2x_set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags);\n+\trte_set_bit64(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags);\n \n \t/* Add a DEL command... */\n \trc = ecore_config_mcast(sc, &rparam, ECORE_MCAST_CMD_DEL);\n@@ -4288,7 +4263,7 @@ bnx2x_handle_classification_eqe(struct bnx2x_softc *sc, union event_ring_elem *e\n \tstruct ecore_vlan_mac_obj *vlan_mac_obj;\n \n \t/* always push next commands out, don't wait here */\n-\tbnx2x_set_bit(RAMROD_CONT, &ramrod_flags);\n+\trte_set_bit64(RAMROD_CONT, &ramrod_flags);\n \n \tswitch (le32toh(elem->message.data.eth_event.echo) >> BNX2X_SWCID_SHIFT) {\n \tcase ECORE_FILTER_MAC_PENDING:\n@@ -4319,12 +4294,12 @@ bnx2x_handle_classification_eqe(struct bnx2x_softc *sc, union event_ring_elem *e\n \n static void bnx2x_handle_rx_mode_eqe(struct bnx2x_softc *sc)\n {\n-\tbnx2x_clear_bit(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state);\n+\trte_clear_bit64(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state);\n \n \t/* send rx_mode command again if was requested */\n-\tif (bnx2x_test_and_clear_bit(ECORE_FILTER_RX_MODE_SCHED, &sc->sp_state)) {\n+\tif (rte_test_and_clear_bit64(ECORE_FILTER_RX_MODE_SCHED,\n+\t\t\t\t\t\t&sc->sp_state))\n \t\tbnx2x_set_storm_rx_mode(sc);\n-\t}\n }\n \n static void bnx2x_update_eq_prod(struct bnx2x_softc *sc, uint16_t prod)\n@@ -4693,7 +4668,7 @@ static int bnx2x_init_hw(struct bnx2x_softc *sc, uint32_t load_code)\n \tPMD_INIT_FUNC_TRACE(sc);\n \n \t/* prepare the parameters for function state transitions */\n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &func_params.ramrod_flags);\n \n \tfunc_params.f_obj = &sc->func_obj;\n \tfunc_params.cmd = ECORE_F_CMD_HW_INIT;\n@@ -4988,8 +4963,8 @@ static void bnx2x_init_eth_fp(struct bnx2x_softc *sc, int idx)\n \tbnx2x_update_fp_sb_idx(fp);\n \n \t/* Configure Queue State object */\n-\tbnx2x_set_bit(ECORE_Q_TYPE_HAS_RX, &q_type);\n-\tbnx2x_set_bit(ECORE_Q_TYPE_HAS_TX, &q_type);\n+\trte_set_bit64(ECORE_Q_TYPE_HAS_RX, &q_type);\n+\trte_set_bit64(ECORE_Q_TYPE_HAS_TX, &q_type);\n \n \tecore_init_queue_obj(sc,\n \t\t\t &sc->sp_objs[idx].q_obj,\n@@ -5803,7 +5778,7 @@ static int bnx2x_func_start(struct bnx2x_softc *sc)\n \t &func_params.params.start;\n \n \t/* Prepare parameters for function state transitions */\n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &func_params.ramrod_flags);\n \n \tfunc_params.f_obj = &sc->func_obj;\n \tfunc_params.cmd = ECORE_F_CMD_START;\n@@ -6379,11 +6354,11 @@ bnx2x_pf_q_prep_init(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp,\n \tuint8_t cos;\n \tint cxt_index, cxt_offset;\n \n-\tbnx2x_set_bit(ECORE_Q_FLG_HC, &init_params->rx.flags);\n-\tbnx2x_set_bit(ECORE_Q_FLG_HC, &init_params->tx.flags);\n+\trte_set_bit64(ECORE_Q_FLG_HC, &init_params->rx.flags);\n+\trte_set_bit64(ECORE_Q_FLG_HC, &init_params->tx.flags);\n \n-\tbnx2x_set_bit(ECORE_Q_FLG_HC_EN, &init_params->rx.flags);\n-\tbnx2x_set_bit(ECORE_Q_FLG_HC_EN, &init_params->tx.flags);\n+\trte_set_bit64(ECORE_Q_FLG_HC_EN, &init_params->rx.flags);\n+\trte_set_bit64(ECORE_Q_FLG_HC_EN, &init_params->tx.flags);\n \n \t/* HC rate */\n \tinit_params->rx.hc_rate =\n@@ -6417,7 +6392,7 @@ bnx2x_get_common_flags(struct bnx2x_softc *sc, uint8_t zero_stats)\n \tunsigned long flags = 0;\n \n \t/* PF driver will always initialize the Queue to an ACTIVE state */\n-\tbnx2x_set_bit(ECORE_Q_FLG_ACTIVE, &flags);\n+\trte_set_bit64(ECORE_Q_FLG_ACTIVE, &flags);\n \n \t/*\n \t * tx only connections collect statistics (on the same index as the\n@@ -6425,9 +6400,9 @@ bnx2x_get_common_flags(struct bnx2x_softc *sc, uint8_t zero_stats)\n \t * connection is initialized.\n \t */\n \n-\tbnx2x_set_bit(ECORE_Q_FLG_STATS, &flags);\n+\trte_set_bit64(ECORE_Q_FLG_STATS, &flags);\n \tif (zero_stats) {\n-\t\tbnx2x_set_bit(ECORE_Q_FLG_ZERO_STATS, &flags);\n+\t\trte_set_bit64(ECORE_Q_FLG_ZERO_STATS, &flags);\n \t}\n \n \t/*\n@@ -6435,10 +6410,10 @@ bnx2x_get_common_flags(struct bnx2x_softc *sc, uint8_t zero_stats)\n \t * CoS-ness doesn't survive the loopback\n \t */\n \tif (sc->flags & BNX2X_TX_SWITCHING) {\n-\t\tbnx2x_set_bit(ECORE_Q_FLG_TX_SWITCH, &flags);\n+\t\trte_set_bit64(ECORE_Q_FLG_TX_SWITCH, &flags);\n \t}\n \n-\tbnx2x_set_bit(ECORE_Q_FLG_PCSUM_ON_PKT, &flags);\n+\trte_set_bit64(ECORE_Q_FLG_PCSUM_ON_PKT, &flags);\n \n \treturn flags;\n }\n@@ -6448,15 +6423,15 @@ static unsigned long bnx2x_get_q_flags(struct bnx2x_softc *sc, uint8_t leading)\n \tunsigned long flags = 0;\n \n \tif (IS_MF_SD(sc)) {\n-\t\tbnx2x_set_bit(ECORE_Q_FLG_OV, &flags);\n+\t\trte_set_bit64(ECORE_Q_FLG_OV, &flags);\n \t}\n \n \tif (leading) {\n-\t\tbnx2x_set_bit(ECORE_Q_FLG_LEADING_RSS, &flags);\n-\t\tbnx2x_set_bit(ECORE_Q_FLG_MCAST, &flags);\n+\t\trte_set_bit64(ECORE_Q_FLG_LEADING_RSS, &flags);\n+\t\trte_set_bit64(ECORE_Q_FLG_MCAST, &flags);\n \t}\n \n-\tbnx2x_set_bit(ECORE_Q_FLG_VLAN, &flags);\n+\trte_set_bit64(ECORE_Q_FLG_VLAN, &flags);\n \n \t/* merge with common flags */\n \treturn flags | bnx2x_get_common_flags(sc, TRUE);\n@@ -6577,7 +6552,7 @@ bnx2x_setup_queue(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp, uint8_t lea\n \tq_params.q_obj = &BNX2X_SP_OBJ(sc, fp).q_obj;\n \n \t/* we want to wait for completion in this context */\n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &q_params.ramrod_flags);\n \n \t/* prepare the INIT parameters */\n \tbnx2x_pf_q_prep_init(sc, fp, &q_params.params.init);\n@@ -6645,20 +6620,20 @@ bnx2x_config_rss_pf(struct bnx2x_softc *sc, struct ecore_rss_config_obj *rss_obj\n \n \tparams.rss_obj = rss_obj;\n \n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, ¶ms.ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, ¶ms.ramrod_flags);\n \n-\tbnx2x_set_bit(ECORE_RSS_MODE_REGULAR, ¶ms.rss_flags);\n+\trte_set_bit64(ECORE_RSS_MODE_REGULAR, ¶ms.rss_flags);\n \n \t/* RSS configuration */\n-\tbnx2x_set_bit(ECORE_RSS_IPV4, ¶ms.rss_flags);\n-\tbnx2x_set_bit(ECORE_RSS_IPV4_TCP, ¶ms.rss_flags);\n-\tbnx2x_set_bit(ECORE_RSS_IPV6, ¶ms.rss_flags);\n-\tbnx2x_set_bit(ECORE_RSS_IPV6_TCP, ¶ms.rss_flags);\n+\trte_set_bit64(ECORE_RSS_IPV4, ¶ms.rss_flags);\n+\trte_set_bit64(ECORE_RSS_IPV4_TCP, ¶ms.rss_flags);\n+\trte_set_bit64(ECORE_RSS_IPV6, ¶ms.rss_flags);\n+\trte_set_bit64(ECORE_RSS_IPV6_TCP, ¶ms.rss_flags);\n \tif (rss_obj->udp_rss_v4) {\n-\t\tbnx2x_set_bit(ECORE_RSS_IPV4_UDP, ¶ms.rss_flags);\n+\t\trte_set_bit64(ECORE_RSS_IPV4_UDP, ¶ms.rss_flags);\n \t}\n \tif (rss_obj->udp_rss_v6) {\n-\t\tbnx2x_set_bit(ECORE_RSS_IPV6_UDP, ¶ms.rss_flags);\n+\t\trte_set_bit64(ECORE_RSS_IPV6_UDP, ¶ms.rss_flags);\n \t}\n \n \t/* Hash bits */\n@@ -6673,7 +6648,7 @@ bnx2x_config_rss_pf(struct bnx2x_softc *sc, struct ecore_rss_config_obj *rss_obj\n \t\t\tparams.rss_key[i] = (uint32_t) rte_rand();\n \t\t}\n \n-\t\tbnx2x_set_bit(ECORE_RSS_SET_SRCH, ¶ms.rss_flags);\n+\t\trte_set_bit64(ECORE_RSS_SET_SRCH, ¶ms.rss_flags);\n \t}\n \n \tif (IS_PF(sc))\n@@ -6730,11 +6705,11 @@ bnx2x_set_mac_one(struct bnx2x_softc *sc, uint8_t * mac,\n \tramrod_param.ramrod_flags = *ramrod_flags;\n \n \t/* fill a user request section if needed */\n-\tif (!bnx2x_test_bit(RAMROD_CONT, ramrod_flags)) {\n+\tif (!rte_get_bit64(RAMROD_CONT, ramrod_flags)) {\n \t\trte_memcpy(ramrod_param.user_req.u.mac.mac, mac,\n \t\t\t\t ETH_ALEN);\n \n-\t\tbnx2x_set_bit(mac_type, &ramrod_param.user_req.vlan_mac_flags);\n+\t\trte_set_bit64(mac_type, &ramrod_param.user_req.vlan_mac_flags);\n \n /* Set the command: ADD or DEL */\n \t\tramrod_param.user_req.cmd = (set) ? ECORE_VLAN_MAC_ADD :\n@@ -6761,7 +6736,7 @@ static int bnx2x_set_eth_mac(struct bnx2x_softc *sc, uint8_t set)\n \n \tPMD_DRV_LOG(DEBUG, sc, \"Adding Ethernet MAC\");\n \n-\tbnx2x_set_bit(RAMROD_COMP_WAIT, &ramrod_flags);\n+\trte_set_bit64(RAMROD_COMP_WAIT, &ramrod_flags);\n \n \t/* Eth MAC is set on RSS leading client (fp[0]) */\n \treturn bnx2x_set_mac_one(sc, sc->link_params.mac_addr,\n@@ -6893,24 +6868,26 @@ bnx2x_fill_report_data(struct bnx2x_softc *sc, struct bnx2x_link_report_data *da\n \n \t/* Link is down */\n \tif (!sc->link_vars.link_up || (sc->flags & BNX2X_MF_FUNC_DIS)) {\n-\t\tbnx2x_set_bit(BNX2X_LINK_REPORT_LINK_DOWN,\n+\t\trte_set_bit64(BNX2X_LINK_REPORT_LINK_DOWN,\n \t\t\t &data->link_report_flags);\n \t}\n \n \t/* Full DUPLEX */\n \tif (sc->link_vars.duplex == DUPLEX_FULL) {\n-\t\tbnx2x_set_bit(BNX2X_LINK_REPORT_FULL_DUPLEX,\n+\t\trte_set_bit64(BNX2X_LINK_REPORT_FULL_DUPLEX,\n \t\t\t &data->link_report_flags);\n \t}\n \n \t/* Rx Flow Control is ON */\n \tif (sc->link_vars.flow_ctrl & ELINK_FLOW_CTRL_RX) {\n-\t\tbnx2x_set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags);\n+\t\trte_set_bit64(BNX2X_LINK_REPORT_RX_FC_ON,\n+\t\t\t\t&data->link_report_flags);\n \t}\n \n \t/* Tx Flow Control is ON */\n \tif (sc->link_vars.flow_ctrl & ELINK_FLOW_CTRL_TX) {\n-\t\tbnx2x_set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags);\n+\t\trte_set_bit64(BNX2X_LINK_REPORT_TX_FC_ON,\n+\t\t\t\t&data->link_report_flags);\n \t}\n }\n \n@@ -6929,9 +6906,9 @@ static void bnx2x_link_report_locked(struct bnx2x_softc *sc)\n \n \t/* Don't report link down or exactly the same link status twice */\n \tif (!memcmp(&cur_data, &sc->last_reported_link, sizeof(cur_data)) ||\n-\t (bnx2x_test_bit(BNX2X_LINK_REPORT_LINK_DOWN,\n+\t (rte_get_bit64(BNX2X_LINK_REPORT_LINK_DOWN,\n \t\t\t &sc->last_reported_link.link_report_flags) &&\n-\t bnx2x_test_bit(BNX2X_LINK_REPORT_LINK_DOWN,\n+\t rte_get_bit64(BNX2X_LINK_REPORT_LINK_DOWN,\n \t\t\t &cur_data.link_report_flags))) {\n \t\treturn;\n \t}\n@@ -6946,14 +6923,14 @@ static void bnx2x_link_report_locked(struct bnx2x_softc *sc)\n \t/* report new link params and remember the state for the next time */\n \trte_memcpy(&sc->last_reported_link, &cur_data, sizeof(cur_data));\n \n-\tif (bnx2x_test_bit(BNX2X_LINK_REPORT_LINK_DOWN,\n+\tif (rte_get_bit64(BNX2X_LINK_REPORT_LINK_DOWN,\n \t\t\t &cur_data.link_report_flags)) {\n \t\tELINK_DEBUG_P0(sc, \"NIC Link is Down\");\n \t} else {\n \t\t__rte_unused const char *duplex;\n \t\t__rte_unused const char *flow;\n \n-\t\tif (bnx2x_test_and_clear_bit(BNX2X_LINK_REPORT_FULL_DUPLEX,\n+\t\tif (rte_test_and_clear_bit64(BNX2X_LINK_REPORT_FULL_DUPLEX,\n \t\t\t\t\t &cur_data.link_report_flags)) {\n \t\t\tduplex = \"full\";\n \t\t\t\tELINK_DEBUG_P0(sc, \"link set to full duplex\");\n@@ -6968,19 +6945,19 @@ static void bnx2x_link_report_locked(struct bnx2x_softc *sc)\n * enabled.\n */\n \t\tif (cur_data.link_report_flags) {\n-\t\t\tif (bnx2x_test_bit(BNX2X_LINK_REPORT_RX_FC_ON,\n+\t\t\tif (rte_get_bit64(BNX2X_LINK_REPORT_RX_FC_ON,\n \t\t\t\t\t &cur_data.link_report_flags) &&\n-\t\t\t bnx2x_test_bit(BNX2X_LINK_REPORT_TX_FC_ON,\n+\t\t\t rte_get_bit64(BNX2X_LINK_REPORT_TX_FC_ON,\n \t\t\t\t\t &cur_data.link_report_flags)) {\n \t\t\t\tflow = \"ON - receive & transmit\";\n-\t\t\t} else if (bnx2x_test_bit(BNX2X_LINK_REPORT_RX_FC_ON,\n+\t\t\t} else if (rte_get_bit64(BNX2X_LINK_REPORT_RX_FC_ON,\n \t\t\t\t\t\t&cur_data.link_report_flags) &&\n-\t\t\t\t !bnx2x_test_bit(BNX2X_LINK_REPORT_TX_FC_ON,\n+\t\t\t\t !rte_get_bit64(BNX2X_LINK_REPORT_TX_FC_ON,\n \t\t\t\t\t\t &cur_data.link_report_flags)) {\n \t\t\t\tflow = \"ON - receive\";\n-\t\t\t} else if (!bnx2x_test_bit(BNX2X_LINK_REPORT_RX_FC_ON,\n+\t\t\t} else if (!rte_get_bit64(BNX2X_LINK_REPORT_RX_FC_ON,\n \t\t\t\t\t\t &cur_data.link_report_flags) &&\n-\t\t\t\t bnx2x_test_bit(BNX2X_LINK_REPORT_TX_FC_ON,\n+\t\t\t\t rte_get_bit64(BNX2X_LINK_REPORT_TX_FC_ON,\n \t\t\t\t\t\t&cur_data.link_report_flags)) {\n \t\t\t\tflow = \"ON - transmit\";\n \t\t\t} else {\ndiff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h\nindex 3383c76..e6e66e8 100644\n--- a/drivers/net/bnx2x/bnx2x.h\n+++ b/drivers/net/bnx2x/bnx2x.h\n@@ -1809,10 +1809,6 @@ static const uint32_t dmae_reg_go_c[] = {\n #define PCI_PM_D0 1\n #define PCI_PM_D3hot 2\n \n-int bnx2x_test_bit(int nr, volatile unsigned long * addr);\n-void bnx2x_set_bit(unsigned int nr, volatile unsigned long * addr);\n-void bnx2x_clear_bit(int nr, volatile unsigned long * addr);\n-int bnx2x_test_and_clear_bit(int nr, volatile unsigned long * addr);\n int bnx2x_cmpxchg(volatile int *addr, int old, int new);\n \n int bnx2x_dma_alloc(struct bnx2x_softc *sc, size_t size,\ndiff --git a/drivers/net/bnx2x/ecore_sp.h b/drivers/net/bnx2x/ecore_sp.h\nindex cc1db37..efbfdad 100644\n--- a/drivers/net/bnx2x/ecore_sp.h\n+++ b/drivers/net/bnx2x/ecore_sp.h\n@@ -15,6 +15,7 @@\n #define ECORE_SP_H\n \n #include <rte_byteorder.h>\n+#include <rte_bitops.h>\n \n #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN\n #ifndef __LITTLE_ENDIAN\n@@ -73,10 +74,10 @@ typedef rte_spinlock_t ECORE_MUTEX_SPIN;\n #define ECORE_SET_BIT_NA(bit, var) (*var |= (1 << bit))\n #define ECORE_CLEAR_BIT_NA(bit, var) (*var &= ~(1 << bit))\n \n-#define ECORE_TEST_BIT(bit, var) bnx2x_test_bit(bit, var)\n-#define ECORE_SET_BIT(bit, var) bnx2x_set_bit(bit, var)\n-#define ECORE_CLEAR_BIT(bit, var) bnx2x_clear_bit(bit, var)\n-#define ECORE_TEST_AND_CLEAR_BIT(bit, var) bnx2x_test_and_clear_bit(bit, var)\n+#define ECORE_TEST_BIT(bit, var) rte_get_bit64(bit, var)\n+#define ECORE_SET_BIT(bit, var) rte_set_bit64(bit, var)\n+#define ECORE_CLEAR_BIT(bit, var) rte_clear_bit64(bit, var)\n+#define ECORE_TEST_AND_CLEAR_BIT(bit, var) rte_test_and_clear_bit64(bit, var)\n \n #define atomic_load_acq_int (int)*\n #define atomic_store_rel_int(a, v) (*a = v)\n", "prefixes": [ "v4", "4/6" ] }