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GET /api/patches/31823/?format=api
{ "id": 31823, "url": "http://patches.dpdk.org/api/patches/31823/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1512047553-118101-7-git-send-email-Ravi1.kumar@amd.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1512047553-118101-7-git-send-email-Ravi1.kumar@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1512047553-118101-7-git-send-email-Ravi1.kumar@amd.com", "date": "2017-11-30T13:12:29", "name": "[dpdk-dev,07/11] doc: add document for AMD CCP crypto PMD", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "acb259ba3311836b115fe17b099046fe904d8c5b", "submitter": { "id": 819, "url": "http://patches.dpdk.org/api/people/819/?format=api", "name": "Kumar, Ravi1", "email": "ravi1.kumar@amd.com" }, "delegate": { "id": 22, "url": "http://patches.dpdk.org/api/users/22/?format=api", "username": "pdelarag", "first_name": "Pablo", "last_name": "de Lara Guarch", "email": "pablo.de.lara.guarch@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1512047553-118101-7-git-send-email-Ravi1.kumar@amd.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/31823/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/31823/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9A56E1B1ED;\n\tThu, 30 Nov 2017 14:13:12 +0100 (CET)", "from NAM02-BL2-obe.outbound.protection.outlook.com\n\t(mail-bl2nam02on0071.outbound.protection.outlook.com [104.47.38.71])\n\tby dpdk.org (Postfix) with ESMTP id BC5EA1B1AB\n\tfor <dev@dpdk.org>; Thu, 30 Nov 2017 14:13:09 +0100 (CET)", "from wallaby-smavila.amd.com (202.56.249.162) by\n\tBN6PR12MB1508.namprd12.prod.outlook.com (10.172.24.149) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.282.5; Thu, 30 Nov 2017 13:13:07 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amdcloud.onmicrosoft.com; s=selector1-amd-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=AHBTkxnHczT5lefXUVLd/WBl9ZOaunExW1HO2cm98WA=;\n\tb=EMnzthr4Ed0UqlOdQ4fILs4iUZA5XA+POFjOuHepPUZyvdwNx49LMZWhTd3ZkoEU9V+g40HSWxCiLfwlhbW1m//KDpeVlkI/jKP6IgBiX9z/8w18cygv5+yIuLuTQZ7EUnyfyouOWgh4xk3pY4FB7BDPVPjOFVoAG6nV7GLk0EU=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Ravi1.Kumar@amd.com; ", "From": "Ravi Kumar <Ravi1.kumar@amd.com>", "To": "dev@dpdk.org", "Date": "Thu, 30 Nov 2017 08:12:29 -0500", "Message-Id": "<1512047553-118101-7-git-send-email-Ravi1.kumar@amd.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1512047553-118101-1-git-send-email-Ravi1.kumar@amd.com>", "References": "<1512047553-118101-1-git-send-email-Ravi1.kumar@amd.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; 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FPR:; \n\tSPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; ", "Received-SPF": "None (protection.outlook.com: amd.com does not designate\n\tpermitted sender hosts)", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Nov 2017 13:13:07.1273\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "4e531e0d-8cec-4158-2a8e-08d537f41964", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN6PR12MB1508", "Subject": "[dpdk-dev] [PATCH 07/11] doc: add document for AMD CCP crypto PMD", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>\n---\n doc/guides/cryptodevs/ccp.rst | 124 +++++++++++++++++++++++++++++++++\n doc/guides/cryptodevs/features/ccp.ini | 57 +++++++++++++++\n doc/guides/cryptodevs/index.rst | 1 +\n 3 files changed, 182 insertions(+)\n create mode 100644 doc/guides/cryptodevs/ccp.rst\n create mode 100644 doc/guides/cryptodevs/features/ccp.ini", "diff": "diff --git a/doc/guides/cryptodevs/ccp.rst b/doc/guides/cryptodevs/ccp.rst\nnew file mode 100644\nindex 0000000..b39af1d\n--- /dev/null\n+++ b/doc/guides/cryptodevs/ccp.rst\n@@ -0,0 +1,124 @@\n+.. Copyright(c) 2017 Advanced Micro Devices, Inc.\n+ All rights reserved.\n+\n+ Redistribution and use in source and binary forms, with or without\n+ modification, are permitted provided that the following conditions\n+ are met:\n+\n+ * Redistributions of source code must retain the above copyright\n+ notice, this list of conditions and the following disclaimer.\n+ * Redistributions in binary form must reproduce the above copyright\n+ notice, this list of conditions and the following disclaimer in the\n+ documentation and/or other materials provided with the distribution.\n+ * Neither the name of the copyright holder nor the names of its\n+ contributors may be used to endorse or promote products derived from\n+ this software without specific prior written permission.\n+\n+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+\n+AMD CCP Poll Mode Driver\n+========================\n+\n+This code provides the initial implementation of the ccp poll mode driver.\n+The CCP poll mode driver library (librte_pmd_ccp) implements support for\n+AMD’s cryptographic co-processor (CCP). The CCP PMD is a virtual crypto\n+poll mode driver which schedules crypto operations to one or more available\n+CCP hardware engines on the platform. The CCP PMD provides poll mode crypto\n+driver support for the following hardware accelerator devices::\n+\n+\tAMD Cryptographic Co-processor (0x1456)\n+\tAMD Cryptographic Co-processor (0x1468)\n+\n+Features\n+--------\n+\n+CCP PMD has support for:\n+\n+Supported cipher algorithms:\n+* ``RTE_CRYPTO_CIPHER_AES_CBC``\n+* ``RTE_CRYPTO_CIPHER_AES_ECB``\n+* ``RTE_CRYPTO_CIPHER_AES_CTR``\n+* ``RTE_CRYPTO_CIPHER_3DES_CBC``\n+\n+Supported authentication algorithms:\n+* ``RTE_CRYPTO_AUTH_SHA1``\n+* ``RTE_CRYPTO_AUTH_SHA1_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA224``\n+* ``RTE_CRYPTO_AUTH_SHA224_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA256``\n+* ``RTE_CRYPTO_AUTH_SHA256_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA384``\n+* ``RTE_CRYPTO_AUTH_SHA384_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA512``\n+* ``RTE_CRYPTO_AUTH_SHA512_HMAC``\n+* ``RTE_CRYPTO_AUTH_MD5_HMAC``\n+* ``RTE_CRYPTO_AUTH_AES_CMAC``\n+* ``RTE_CRYPTO_AUTH_SHA3_224``\n+* ``RTE_CRYPTO_AUTH_SHA3_224_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA3_256``\n+* ``RTE_CRYPTO_AUTH_SHA3_256_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA3_384``\n+* ``RTE_CRYPTO_AUTH_SHA3_384_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA3_512``\n+* ``RTE_CRYPTO_AUTH_SHA3_512_HMAC``\n+\n+Supported AEAD algorithms:\n+* ``RTE_CRYPTO_AEAD_AES_GCM``\n+\n+Installation\n+------------\n+\n+To compile CCP PMD, it has to be enabled in the config/common_base file.\n+* ``CONFIG_RTE_LIBRTE_PMD_CCP=y``\n+\n+The CCP PMD also supports computing authentication over CPU with cipher offloaded\n+to CCP. To enable this feature, enable following in the configuration.\n+* ``CONFIG_RTE_LIBRTE_PMD_CCP_CPU_AUTH=y``\n+\n+This code was verified on Ubuntu 16.04.\n+\n+Initialization\n+--------------\n+\n+Bind the CCP devices to DPDK UIO driver module before running the CCP PMD stack.\n+e.g. for the 0x1456 device::\n+\n+\tcd to the top-level DPDK directory\n+\tmodprobe uio\n+\tinsmod ./build/kmod/igb_uio.ko\n+\techo \"1022 1456\" > /sys/bus/pci/drivers/igb_uio/new_id\n+\n+Another way to bind the CCP devices to DPDK UIO driver is by using the ``dpdk-devbind.py`` script.\n+The following command assumes ``BFD`` of ``0000:09:00.2``::\n+\n+\tcd to the top-level DPDK directory\n+\t./usertools/dpdk-devbind.py -b igb_uio 0000:09:00.2\n+\n+To verify real traffic l2fwd-crypto example can be used with following command:\n+\n+.. code-block:: console\n+\n+\tsudo ./build/l2fwd-crypto -l 1 -n 4 --vdev \"crypto_ccp\" -- -p 0x1\n+\t--chain CIPHER_HASH --cipher_op ENCRYPT --cipher_algo AES_CBC\n+\t--cipher_key 00:01:02:03:04:05:06:07:08:09:0a:0b:0c:0d:0e:0f\n+\t--iv 00:01:02:03:04:05:06:07:08:09:0a:0b:0c:0d:0e:ff\n+\t--auth_op GENERATE --auth_algo SHA1_HMAC\n+\t--auth_key 11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11\n+\t:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11\n+\t:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11\n+\n+Limitations\n+-----------\n+\n+* Chained mbufs are not supported\n+* MD5_HMAC is supported only if ``CONFIG_RTE_LIBRTE_PMD_CCP_CPU_AUTH=y`` is enabled in configuration\ndiff --git a/doc/guides/cryptodevs/features/ccp.ini b/doc/guides/cryptodevs/features/ccp.ini\nnew file mode 100644\nindex 0000000..6184a67\n--- /dev/null\n+++ b/doc/guides/cryptodevs/features/ccp.ini\n@@ -0,0 +1,57 @@\n+;\n+; Supported features of the 'ccp' crypto driver.\n+;\n+; Refer to default.ini for the full list of available PMD features.\n+;\n+[Features]\n+Symmetric crypto = Y\n+Sym operation chaining = Y\n+HW Accelerated = Y\n+\n+;\n+; Supported crypto algorithms of the 'ccp' crypto driver.\n+;\n+[Cipher]\n+AES CBC (128) = Y\n+AES CBC (192) = Y\n+AES CBC (256) = Y\n+AES ECB (128) = Y\n+AES ECB (192) = Y\n+AES ECB (256) = Y\n+AES CTR (128) = Y\n+AES CTR (192) = Y\n+AES CTR (256) = Y\n+3DES CBC = Y\n+\n+;\n+; Supported authentication algorithms of the 'ccp' crypto driver.\n+;\n+[Auth]\n+MD5 HMAC = Y\n+SHA1 = Y\n+SHA1 HMAC = Y\n+SHA224\t = Y\n+SHA224 HMAC = Y\n+SHA256 = Y\n+SHA256 HMAC = Y\n+SHA384 = Y\n+SHA384 HMAC = Y\n+SHA512 = Y\n+SHA512 HMAC = Y\n+AES CMAC = Y\n+SHA3_224 = Y\n+SHA3_224 HMAC = Y\n+SHA3_256 = Y\n+SHA3_256 HMAC = Y\n+SHA3_384 = Y\n+SHA3_384 HMAC = Y\n+SHA3_512 = Y\n+SHA3_512 HMAC = Y\n+\n+;\n+; Supported AEAD algorithms of the 'ccp' crypto driver.\n+;\n+[AEAD]\n+AES GCM (128) = Y\n+AES GCM (192) = Y\n+AES GCM (256) = Y\ndiff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst\nindex 6d4e15b..3202b48 100644\n--- a/doc/guides/cryptodevs/index.rst\n+++ b/doc/guides/cryptodevs/index.rst\n@@ -39,6 +39,7 @@ Crypto Device Drivers\n aesni_mb\n aesni_gcm\n armv8\n+ ccp\n dpaa2_sec\n dpaa_sec\n kasumi\n", "prefixes": [ "dpdk-dev", "07/11" ] }