[dpdk-dev,07/11] doc: add document for AMD CCP crypto PMD

Message ID 1512047553-118101-7-git-send-email-Ravi1.kumar@amd.com (mailing list archive)
State Changes Requested, archived
Delegated to: Pablo de Lara Guarch
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Kumar, Ravi1 Nov. 30, 2017, 1:12 p.m. UTC
  Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
---
 doc/guides/cryptodevs/ccp.rst          | 124 +++++++++++++++++++++++++++++++++
 doc/guides/cryptodevs/features/ccp.ini |  57 +++++++++++++++
 doc/guides/cryptodevs/index.rst        |   1 +
 3 files changed, 182 insertions(+)
 create mode 100644 doc/guides/cryptodevs/ccp.rst
 create mode 100644 doc/guides/cryptodevs/features/ccp.ini
  

Comments

De Lara Guarch, Pablo Dec. 11, 2017, 7:36 p.m. UTC | #1
Hi Ravi,

> -----Original Message-----

> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Ravi Kumar

> Sent: Thursday, November 30, 2017 1:12 PM

> To: dev@dpdk.org

> Subject: [dpdk-dev] [PATCH 07/11] doc: add document for AMD CCP crypto

> PMD

> 

> Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>

> ---

>  doc/guides/cryptodevs/ccp.rst          | 124

> +++++++++++++++++++++++++++++++++

>  doc/guides/cryptodevs/features/ccp.ini |  57 +++++++++++++++

>  doc/guides/cryptodevs/index.rst        |   1 +

>  3 files changed, 182 insertions(+)

>  create mode 100644 doc/guides/cryptodevs/ccp.rst  create mode 100644

> doc/guides/cryptodevs/features/ccp.ini

> 

> diff --git a/doc/guides/cryptodevs/ccp.rst b/doc/guides/cryptodevs/ccp.rst

> new file mode 100644 index 0000000..b39af1d

> --- /dev/null

> +++ b/doc/guides/cryptodevs/ccp.rst

> @@ -0,0 +1,124 @@

> +.. Copyright(c) 2017 Advanced Micro Devices, Inc.

> +   All rights reserved.

> +

> +   Redistribution and use in source and binary forms, with or without

> +   modification, are permitted provided that the following conditions

> +   are met:

> +

> +   * Redistributions of source code must retain the above copyright

> +   notice, this list of conditions and the following disclaimer.

> +   * Redistributions in binary form must reproduce the above copyright

> +   notice, this list of conditions and the following disclaimer in the

> +   documentation and/or other materials provided with the distribution.

> +   * Neither the name of the copyright holder nor the names of its

> +   contributors may be used to endorse or promote products derived from

> +   this software without specific prior written permission.

> +

> +   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND

> CONTRIBUTORS

> +   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT

> NOT

> +   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND

> FITNESS FOR

> +   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

> COPYRIGHT

> +   HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

> INCIDENTAL,

> +   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT

> NOT

> +   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

> OF USE,

> +   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

> AND ON ANY

> +   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

> +   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF

> THE USE

> +   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH

> DAMAGE.

> +

> +AMD CCP Poll Mode Driver

> +========================

> +

> +This code provides the initial implementation of the ccp poll mode driver.

> +The CCP poll mode driver library (librte_pmd_ccp) implements support

> +for AMD’s cryptographic co-processor (CCP). The CCP PMD is a virtual

> +crypto poll mode driver which schedules crypto operations to one or

> +more available CCP hardware engines on the platform. The CCP PMD

> +provides poll mode crypto driver support for the following hardware

> accelerator devices::

> +

> +	AMD Cryptographic Co-processor (0x1456)

> +	AMD Cryptographic Co-processor (0x1468)

> +

> +Features

> +--------

> +

> +CCP PMD has support for:

> +

> +Supported cipher algorithms:


A blank line is required before starting a list
(same for the other two lists).

> +* ``RTE_CRYPTO_CIPHER_AES_CBC``

> +* ``RTE_CRYPTO_CIPHER_AES_ECB``

> +* ``RTE_CRYPTO_CIPHER_AES_CTR``

> +* ``RTE_CRYPTO_CIPHER_3DES_CBC``

> +
  

Patch

diff --git a/doc/guides/cryptodevs/ccp.rst b/doc/guides/cryptodevs/ccp.rst
new file mode 100644
index 0000000..b39af1d
--- /dev/null
+++ b/doc/guides/cryptodevs/ccp.rst
@@ -0,0 +1,124 @@ 
+.. Copyright(c) 2017 Advanced Micro Devices, Inc.
+   All rights reserved.
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions
+   are met:
+
+   * Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+   * Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+   * Neither the name of the copyright holder nor the names of its
+   contributors may be used to endorse or promote products derived from
+   this software without specific prior written permission.
+
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+   HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+AMD CCP Poll Mode Driver
+========================
+
+This code provides the initial implementation of the ccp poll mode driver.
+The CCP poll mode driver library (librte_pmd_ccp) implements support for
+AMD’s cryptographic co-processor (CCP). The CCP PMD is a virtual crypto
+poll mode driver which schedules crypto operations to one or more available
+CCP hardware engines on the platform. The CCP PMD provides poll mode crypto
+driver support for the following hardware accelerator devices::
+
+	AMD Cryptographic Co-processor (0x1456)
+	AMD Cryptographic Co-processor (0x1468)
+
+Features
+--------
+
+CCP PMD has support for:
+
+Supported cipher algorithms:
+* ``RTE_CRYPTO_CIPHER_AES_CBC``
+* ``RTE_CRYPTO_CIPHER_AES_ECB``
+* ``RTE_CRYPTO_CIPHER_AES_CTR``
+* ``RTE_CRYPTO_CIPHER_3DES_CBC``
+
+Supported authentication algorithms:
+* ``RTE_CRYPTO_AUTH_SHA1``
+* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA224``
+* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA256``
+* ``RTE_CRYPTO_AUTH_SHA256_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA384``
+* ``RTE_CRYPTO_AUTH_SHA384_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA512``
+* ``RTE_CRYPTO_AUTH_SHA512_HMAC``
+* ``RTE_CRYPTO_AUTH_MD5_HMAC``
+* ``RTE_CRYPTO_AUTH_AES_CMAC``
+* ``RTE_CRYPTO_AUTH_SHA3_224``
+* ``RTE_CRYPTO_AUTH_SHA3_224_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA3_256``
+* ``RTE_CRYPTO_AUTH_SHA3_256_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA3_384``
+* ``RTE_CRYPTO_AUTH_SHA3_384_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA3_512``
+* ``RTE_CRYPTO_AUTH_SHA3_512_HMAC``
+
+Supported AEAD algorithms:
+* ``RTE_CRYPTO_AEAD_AES_GCM``
+
+Installation
+------------
+
+To compile CCP PMD, it has to be enabled in the config/common_base file.
+* ``CONFIG_RTE_LIBRTE_PMD_CCP=y``
+
+The CCP PMD also supports computing authentication over CPU with cipher offloaded
+to CCP. To enable this feature, enable following in the configuration.
+* ``CONFIG_RTE_LIBRTE_PMD_CCP_CPU_AUTH=y``
+
+This code was verified on Ubuntu 16.04.
+
+Initialization
+--------------
+
+Bind the CCP devices to DPDK UIO driver module before running the CCP PMD stack.
+e.g. for the 0x1456 device::
+
+	cd to the top-level DPDK directory
+	modprobe uio
+	insmod ./build/kmod/igb_uio.ko
+	echo "1022 1456" > /sys/bus/pci/drivers/igb_uio/new_id
+
+Another way to bind the CCP devices to DPDK UIO driver is by using the ``dpdk-devbind.py`` script.
+The following command assumes ``BFD`` of ``0000:09:00.2``::
+
+	cd to the top-level DPDK directory
+	./usertools/dpdk-devbind.py -b igb_uio 0000:09:00.2
+
+To verify real traffic l2fwd-crypto example can be used with following command:
+
+.. code-block:: console
+
+	sudo ./build/l2fwd-crypto -l 1 -n 4 --vdev "crypto_ccp" -- -p 0x1
+	--chain CIPHER_HASH --cipher_op ENCRYPT --cipher_algo AES_CBC
+	--cipher_key 00:01:02:03:04:05:06:07:08:09:0a:0b:0c:0d:0e:0f
+	--iv 00:01:02:03:04:05:06:07:08:09:0a:0b:0c:0d:0e:ff
+	--auth_op GENERATE --auth_algo SHA1_HMAC
+	--auth_key 11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11
+	:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11
+	:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11:11
+
+Limitations
+-----------
+
+* Chained mbufs are not supported
+* MD5_HMAC is supported only if ``CONFIG_RTE_LIBRTE_PMD_CCP_CPU_AUTH=y`` is enabled in configuration
diff --git a/doc/guides/cryptodevs/features/ccp.ini b/doc/guides/cryptodevs/features/ccp.ini
new file mode 100644
index 0000000..6184a67
--- /dev/null
+++ b/doc/guides/cryptodevs/features/ccp.ini
@@ -0,0 +1,57 @@ 
+;
+; Supported features of the 'ccp' crypto driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Symmetric crypto       = Y
+Sym operation chaining = Y
+HW Accelerated         = Y
+
+;
+; Supported crypto algorithms of the 'ccp' crypto driver.
+;
+[Cipher]
+AES CBC (128)  = Y
+AES CBC (192)  = Y
+AES CBC (256)  = Y
+AES ECB (128)  = Y
+AES ECB (192)  = Y
+AES ECB (256)  = Y
+AES CTR (128)  = Y
+AES CTR (192)  = Y
+AES CTR (256)  = Y
+3DES CBC       = Y
+
+;
+; Supported authentication algorithms of the 'ccp' crypto driver.
+;
+[Auth]
+MD5 HMAC       = Y
+SHA1           = Y
+SHA1 HMAC      = Y
+SHA224	       = Y
+SHA224 HMAC    = Y
+SHA256         = Y
+SHA256 HMAC    = Y
+SHA384         = Y
+SHA384 HMAC    = Y
+SHA512         = Y
+SHA512 HMAC    = Y
+AES CMAC       = Y
+SHA3_224       = Y
+SHA3_224 HMAC  = Y
+SHA3_256       = Y
+SHA3_256 HMAC  = Y
+SHA3_384       = Y
+SHA3_384 HMAC  = Y
+SHA3_512       = Y
+SHA3_512 HMAC  = Y
+
+;
+; Supported AEAD algorithms of the 'ccp' crypto driver.
+;
+[AEAD]
+AES GCM (128) = Y
+AES GCM (192) = Y
+AES GCM (256) = Y
diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst
index 6d4e15b..3202b48 100644
--- a/doc/guides/cryptodevs/index.rst
+++ b/doc/guides/cryptodevs/index.rst
@@ -39,6 +39,7 @@  Crypto Device Drivers
     aesni_mb
     aesni_gcm
     armv8
+    ccp
     dpaa2_sec
     dpaa_sec
     kasumi