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GET /api/patches/15469/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 15469,
    "url": "http://patches.dpdk.org/api/patches/15469/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1472312902-16963-4-git-send-email-xiao.w.wang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1472312902-16963-4-git-send-email-xiao.w.wang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1472312902-16963-4-git-send-email-xiao.w.wang@intel.com",
    "date": "2016-08-27T15:47:46",
    "name": "[dpdk-dev,03/39] net/ixgbe/base: change endianness of PHY data",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "ed4cefe5b067aca55193db2bf9e3f5b19847c67b",
    "submitter": {
        "id": 281,
        "url": "http://patches.dpdk.org/api/people/281/?format=api",
        "name": "Xiao Wang",
        "email": "xiao.w.wang@intel.com"
    },
    "delegate": {
        "id": 10,
        "url": "http://patches.dpdk.org/api/users/10/?format=api",
        "username": "bruce",
        "first_name": "Bruce",
        "last_name": "Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1472312902-16963-4-git-send-email-xiao.w.wang@intel.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/15469/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/15469/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 7000A592F;\n\tSat, 27 Aug 2016 17:48:52 +0200 (CEST)",
            "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n\tby dpdk.org (Postfix) with ESMTP id EF9425908\n\tfor <dev@dpdk.org>; Sat, 27 Aug 2016 17:48:42 +0200 (CEST)",
            "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby orsmga104.jf.intel.com with ESMTP; 27 Aug 2016 08:48:40 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga004.fm.intel.com with ESMTP; 27 Aug 2016 08:48:40 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id u7RFmc7j007347;\n\tSat, 27 Aug 2016 23:48:38 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid u7RFmZ2x017018; Sat, 27 Aug 2016 23:48:37 +0800",
            "(from xiaowan1@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id u7RFmZM7017014; \n\tSat, 27 Aug 2016 23:48:35 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.28,587,1464678000\"; d=\"scan'208\";a=\"161600989\"",
        "From": "Xiao Wang <xiao.w.wang@intel.com>",
        "To": "wenzhuo.lu@intel.com",
        "Cc": "dev@dpdk.org, Xiao Wang <xiao.w.wang@intel.com>",
        "Date": "Sat, 27 Aug 2016 23:47:46 +0800",
        "Message-Id": "<1472312902-16963-4-git-send-email-xiao.w.wang@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1472312902-16963-1-git-send-email-xiao.w.wang@intel.com>",
        "References": "<1472312902-16963-1-git-send-email-xiao.w.wang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 03/39] net/ixgbe/base: change endianness of PHY\n\tdata",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The latest firmware reverses the endianness of the PHY data read and\nwritten via host interface command, so make corresponding changes\nto that.\n\nSigned-off-by: Xiao Wang <xiao.w.wang@intel.com>\n---\n drivers/net/ixgbe/base/ixgbe_osdep.h | 1 +\n drivers/net/ixgbe/base/ixgbe_type.h  | 4 ++--\n drivers/net/ixgbe/base/ixgbe_x550.c  | 4 ++--\n 3 files changed, 5 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/net/ixgbe/base/ixgbe_osdep.h b/drivers/net/ixgbe/base/ixgbe_osdep.h\nindex 06d1ee1..77f0af5 100644\n--- a/drivers/net/ixgbe/base/ixgbe_osdep.h\n+++ b/drivers/net/ixgbe/base/ixgbe_osdep.h\n@@ -100,6 +100,7 @@ enum {\n #define IXGBE_LE32_TO_CPUS(_i) rte_le_to_cpu_32(_i)\n #define IXGBE_CPU_TO_BE16(_i)  rte_cpu_to_be_16(_i)\n #define IXGBE_CPU_TO_BE32(_i)  rte_cpu_to_be_32(_i)\n+#define IXGBE_BE32_TO_CPU(_i)  rte_be_to_cpu_32(_i)\n \n typedef uint8_t\t\tu8;\n typedef int8_t\t\ts8;\ndiff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h\nindex 83818a9..b2fdfcd 100644\n--- a/drivers/net/ixgbe/base/ixgbe_type.h\n+++ b/drivers/net/ixgbe/base/ixgbe_type.h\n@@ -3136,13 +3136,13 @@ struct ixgbe_hic_internal_phy_req {\n \tu8 command_type;\n \t__be16 address;\n \tu16 rsv1;\n-\t__le32 write_data;\n+\t__be32 write_data;\n \tu16 pad;\n };\n \n struct ixgbe_hic_internal_phy_resp {\n \tstruct ixgbe_hic_hdr hdr;\n-\t__le32 read_data;\n+\t__be32 read_data;\n };\n \n #ifdef C99\ndiff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c\nindex b8fdb00..2c80a9b 100644\n--- a/drivers/net/ixgbe/base/ixgbe_x550.c\n+++ b/drivers/net/ixgbe/base/ixgbe_x550.c\n@@ -1278,7 +1278,7 @@ s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n \twrite_cmd.port_number = hw->bus.lan_id;\n \twrite_cmd.command_type = FW_INT_PHY_REQ_WRITE;\n \twrite_cmd.address = IXGBE_CPU_TO_BE16(reg_addr);\n-\twrite_cmd.write_data = IXGBE_CPU_TO_LE32(data);\n+\twrite_cmd.write_data = IXGBE_CPU_TO_BE32(data);\n \n \tstatus = ixgbe_host_interface_command(hw, (u32 *)&write_cmd,\n \t\t\t\t\t      sizeof(write_cmd),\n@@ -1318,7 +1318,7 @@ s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,\n \t\t\t\t\t      IXGBE_HI_COMMAND_TIMEOUT, true);\n \n \t/* Extract the register value from the response. */\n-\t*data = IXGBE_LE32_TO_CPU(hic.rsp.read_data);\n+\t*data = IXGBE_BE32_TO_CPU(hic.rsp.read_data);\n \n \treturn status;\n }\n",
    "prefixes": [
        "dpdk-dev",
        "03/39"
    ]
}