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GET /api/patches/138269/?format=api
{ "id": 138269, "url": "http://patches.dpdk.org/api/patches/138269/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240312180716.8515-15-shaibran@amazon.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240312180716.8515-15-shaibran@amazon.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240312180716.8515-15-shaibran@amazon.com", "date": "2024-03-12T18:06:59", "name": "[v4,14/31] net/ena/base: phc feature modifications", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3fc203a2a682796a7538627bf365e6e1ef967119", "submitter": { "id": 2930, "url": "http://patches.dpdk.org/api/people/2930/?format=api", "name": "Brandes, Shai", "email": "shaibran@amazon.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240312180716.8515-15-shaibran@amazon.com/mbox/", "series": [ { "id": 31487, "url": "http://patches.dpdk.org/api/series/31487/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31487", "date": "2024-03-12T18:06:45", "name": "net/ena: v2.9.0 driver release", "version": 4, "mbox": "http://patches.dpdk.org/series/31487/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138269/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/138269/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D040943C94;\n\tTue, 12 Mar 2024 19:09:31 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 954B042E6F;\n\tTue, 12 Mar 2024 19:08:13 +0100 (CET)", "from smtp-fw-9105.amazon.com (smtp-fw-9105.amazon.com\n [207.171.188.204])\n by mails.dpdk.org (Postfix) with ESMTP id 7C4A142E2A\n for <dev@dpdk.org>; Tue, 12 Mar 2024 19:08:09 +0100 (CET)", "from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO\n smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.25.36.210])\n by smtp-border-fw-9105.sea19.amazon.com with\n ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2024 18:07:57 +0000", "from EX19MTAEUC001.ant.amazon.com [10.0.10.100:25396]\n by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.0.5:2525] with\n esmtp (Farcaster)\n id 73530508-3703-494a-bc3c-747ffcd93c52;\n Tue, 12 Mar 2024 18:07:56 +0000 (UTC)", "from EX19D007EUA002.ant.amazon.com (10.252.50.68) by\n EX19MTAEUC001.ant.amazon.com (10.252.51.193) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1258.28; Tue, 12 Mar 2024 18:07:55 +0000", "from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by\n EX19D007EUA002.ant.amazon.com (10.252.50.68) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1258.28; Tue, 12 Mar 2024 18:07:54 +0000", "from HFA15-CG15235BS.amazon.com (10.85.143.174) by\n mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id\n 15.2.1258.28 via Frontend Transport; Tue, 12 Mar 2024 18:07:53 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209;\n t=1710266889; x=1741802889;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version;\n bh=wg+kuFpAhOsMOiHCWL5UpR8Q3whikiP6EqMAEE3yDUA=;\n b=cO6U1NY0eXh0AYQuEC5dK5jf8B/Nh8jSur1WLU8uGN5muXuZwWkM9lu6\n DOBfP9B2S5AG86Pp9Uv+ahXkuDco5IRgeL4nlBuUHNhLSOsMFtfWKZCjP\n Ld+5/NNEgGdaxMCJ3r1SuBjpD7ebC3DCW8SZ7HOLol7jA1fP8yB/D0DZT 4=;", "X-IronPort-AV": "E=Sophos;i=\"6.07,119,1708387200\"; d=\"scan'208\";a=\"711121136\"", "X-Farcaster-Flow-ID": "73530508-3703-494a-bc3c-747ffcd93c52", "From": "<shaibran@amazon.com>", "To": "<ferruh.yigit@amd.com>", "CC": "<dev@dpdk.org>, Shai Brandes <shaibran@amazon.com>", "Subject": "[PATCH v4 14/31] net/ena/base: phc feature modifications", "Date": "Tue, 12 Mar 2024 20:06:59 +0200", "Message-ID": "<20240312180716.8515-15-shaibran@amazon.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20240312180716.8515-1-shaibran@amazon.com>", "References": "<20240312180716.8515-1-shaibran@amazon.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Shai Brandes <shaibran@amazon.com>\n\n1. PHC algorithm is updated to support reading new PHC values.\n2. Update default PHC expiration timeout.\n3. Fix a theoretical PHC destroy race.\n4. Adjust PHC for multiple devices.\n5. PHC activation version check point.\n\nSigned-off-by: Shai Brandes <shaibran@amazon.com>\nReviewed-by: Amit Bernstein <amitbern@amazon.com>\n---\n drivers/net/ena/base/ena_com.c | 111 ++++++++++++------\n drivers/net/ena/base/ena_com.h | 31 +++--\n .../net/ena/base/ena_defs/ena_admin_defs.h | 45 +++++--\n 3 files changed, 135 insertions(+), 52 deletions(-)", "diff": "diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c\nindex 31c37b0ab3..fb3ad27d0a 100644\n--- a/drivers/net/ena/base/ena_com.c\n+++ b/drivers/net/ena/base/ena_com.c\n@@ -41,10 +41,12 @@\n #define ENA_MAX_ADMIN_POLL_US 5000\n \n /* PHC definitions */\n-#define ENA_PHC_DEFAULT_EXPIRE_TIMEOUT_USEC 20\n+#define ENA_PHC_DEFAULT_EXPIRE_TIMEOUT_USEC 10\n #define ENA_PHC_DEFAULT_BLOCK_TIMEOUT_USEC 1000\n-#define ENA_PHC_TIMESTAMP_ERROR 0xFFFFFFFFFFFFFFFF\n+#define ENA_PHC_MAX_ERROR_BOUND 0xFFFFFFFF\n #define ENA_PHC_REQ_ID_OFFSET 0xDEAD\n+#define ENA_PHC_ERROR_FLAGS (ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP | \\\n+\t\t\t ENA_ADMIN_PHC_ERROR_FLAG_ERROR_BOUND)\n \n /*****************************************************************************/\n /*****************************************************************************/\n@@ -1778,16 +1780,21 @@ int ena_com_phc_config(struct ena_com_dev *ena_dev)\n \tstruct ena_admin_set_feat_cmd set_feat_cmd;\n \tint ret = 0;\n \n-\t/* Get device PHC default configuration */\n-\tret = ena_com_get_feature(ena_dev, &get_feat_resp, ENA_ADMIN_PHC_CONFIG, 0);\n+\t/* Get default device PHC configuration */\n+\tret = ena_com_get_feature(ena_dev,\n+\t\t\t\t &get_feat_resp,\n+\t\t\t\t ENA_ADMIN_PHC_CONFIG,\n+\t\t\t\t ENA_ADMIN_PHC_FEATURE_VERSION_0);\n \tif (unlikely(ret)) {\n \t\tena_trc_err(ena_dev, \"Failed to get PHC feature configuration, error: %d\\n\", ret);\n \t\treturn ret;\n \t}\n \n-\t/* Supporting only readless PHC retrieval */\n-\tif (get_feat_resp.u.phc.type != ENA_ADMIN_PHC_TYPE_READLESS) {\n-\t\tena_trc_err(ena_dev, \"Unsupported PHC type, error: %d\\n\", ENA_COM_UNSUPPORTED);\n+\t/* Supporting only PHC V0 (readless mode with error bound) */\n+\tif (get_feat_resp.u.phc.version != ENA_ADMIN_PHC_FEATURE_VERSION_0) {\n+\t\tena_trc_err(ena_dev, \"Unsupported PHC version (0x%X), error: %d\\n\",\n+\t\t\t get_feat_resp.u.phc.version,\n+\t\t\t ENA_COM_UNSUPPORTED);\n \t\treturn ENA_COM_UNSUPPORTED;\n \t}\n \n@@ -1804,11 +1811,11 @@ int ena_com_phc_config(struct ena_com_dev *ena_dev)\n \t\t\t\t get_feat_resp.u.phc.block_timeout_usec :\n \t\t\t\t ENA_PHC_DEFAULT_BLOCK_TIMEOUT_USEC;\n \n-\t/* Sanity check - expire timeout must not be above skip timeout */\n+\t/* Sanity check - expire timeout must not exceed block timeout */\n \tif (phc->expire_timeout_usec > phc->block_timeout_usec)\n \t\tphc->expire_timeout_usec = phc->block_timeout_usec;\n \n-\t/* Prepare PHC feature command with PHC output address */\n+\t/* Prepare PHC config feature command */\n \tmemset(&set_feat_cmd, 0x0, sizeof(set_feat_cmd));\n \tset_feat_cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;\n \tset_feat_cmd.feat_common.feature_id = ENA_ADMIN_PHC_CONFIG;\n@@ -1840,13 +1847,16 @@ int ena_com_phc_config(struct ena_com_dev *ena_dev)\n void ena_com_phc_destroy(struct ena_com_dev *ena_dev)\n {\n \tstruct ena_com_phc_info *phc = &ena_dev->phc;\n-\n-\tphc->active = false;\n+\tunsigned long flags = 0;\n \n \t/* In case PHC is not supported by the device, silently exiting */\n \tif (!phc->virt_addr)\n \t\treturn;\n \n+\tENA_SPINLOCK_LOCK(phc->lock, flags);\n+\tphc->active = false;\n+\tENA_SPINLOCK_UNLOCK(phc->lock, flags);\n+\n \tENA_MEM_FREE_COHERENT(ena_dev->dmadev,\n \t\t\t sizeof(*phc->virt_addr),\n \t\t\t phc->virt_addr,\n@@ -1857,15 +1867,14 @@ void ena_com_phc_destroy(struct ena_com_dev *ena_dev)\n \tENA_SPINLOCK_DESTROY(phc->lock);\n }\n \n-int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp)\n+int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp)\n {\n \tvolatile struct ena_admin_phc_resp *read_resp = ena_dev->phc.virt_addr;\n+\tconst ena_time_high_res_t zero_system_time = ENA_TIME_INIT_HIGH_RES();\n \tstruct ena_com_phc_info *phc = &ena_dev->phc;\n-\tena_time_high_res_t initial_time = ENA_TIME_INIT_HIGH_RES();\n-\tstatic ena_time_high_res_t start_time;\n-\tunsigned long flags = 0;\n \tena_time_high_res_t expire_time;\n \tena_time_high_res_t block_time;\n+\tunsigned long flags = 0;\n \tint ret = ENA_COM_OK;\n \n \tif (!phc->active) {\n@@ -1876,9 +1885,10 @@ int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp)\n \tENA_SPINLOCK_LOCK(phc->lock, flags);\n \n \t/* Check if PHC is in blocked state */\n-\tif (unlikely(ENA_TIME_COMPARE_HIGH_RES(start_time, initial_time))) {\n+\tif (unlikely(ENA_TIME_COMPARE_HIGH_RES(phc->system_time, zero_system_time))) {\n \t\t/* Check if blocking time expired */\n-\t\tblock_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(start_time, phc->block_timeout_usec);\n+\t\tblock_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(phc->system_time,\n+\t\t\t\t\t\t\t phc->block_timeout_usec);\n \t\tif (!ENA_TIME_EXPIRE_HIGH_RES(block_time)) {\n \t\t\t/* PHC is still in blocked state, skip PHC request */\n \t\t\tphc->stats.phc_skp++;\n@@ -1886,22 +1896,23 @@ int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp)\n \t\t\tgoto skip;\n \t\t}\n \n-\t\t/* PHC is in active state, update statistics according to req_id and timestamp */\n+\t\t/* PHC is in active state, update statistics according to req_id and error_flags */\n \t\tif ((READ_ONCE16(read_resp->req_id) != phc->req_id) ||\n-\t\t\t\tread_resp->timestamp == ENA_PHC_TIMESTAMP_ERROR)\n+\t\t (read_resp->error_flags & ENA_PHC_ERROR_FLAGS)) {\n \t\t\t/* Device didn't update req_id during blocking time or timestamp is invalid,\n \t\t\t * this indicates on a device error\n \t\t\t */\n \t\t\tphc->stats.phc_err++;\n-\t\telse\n+\t\t} else {\n \t\t\t/* Device updated req_id during blocking time with valid timestamp */\n \t\t\tphc->stats.phc_exp++;\n+\t\t}\n \t}\n \n \t/* Setting relative timeouts */\n-\tstart_time = ENA_GET_SYSTEM_TIME_HIGH_RES();\n-\tblock_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(start_time, phc->block_timeout_usec);\n-\texpire_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(start_time, phc->expire_timeout_usec);\n+\tphc->system_time = ENA_GET_SYSTEM_TIME_HIGH_RES();\n+\tblock_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(phc->system_time, phc->block_timeout_usec);\n+\texpire_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(phc->system_time, phc->expire_timeout_usec);\n \n \t/* We expect the device to return this req_id once the new PHC timestamp is updated */\n \tphc->req_id++;\n@@ -1918,35 +1929,45 @@ int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp)\n \twhile (1) {\n \t\tif (unlikely(ENA_TIME_EXPIRE_HIGH_RES(expire_time))) {\n \t\t\t/* Gave up waiting for updated req_id, PHC enters into blocked state until\n-\t\t\t * passing blocking time\n+\t\t\t * passing blocking time, during this time any get PHC timestamp or\n+\t\t\t * error bound requests will fail with device busy error\n \t\t\t */\n+\t\t\tphc->error_bound = ENA_PHC_MAX_ERROR_BOUND;\n \t\t\tret = ENA_COM_DEVICE_BUSY;\n \t\t\tbreak;\n \t\t}\n \n \t\t/* Check if req_id was updated by the device */\n \t\tif (READ_ONCE16(read_resp->req_id) != phc->req_id) {\n-\t\t\t/* req_id was not updated by the device, check again on next loop */\n+\t\t\t/* req_id was not updated by the device yet, check again on next loop */\n \t\t\tcontinue;\n \t\t}\n \n-\t\t/* req_id was updated which indicates that PHC timestamp was updated too */\n-\t\t*timestamp = read_resp->timestamp;\n-\n-\t\t/* PHC timestamp validty check */\n-\t\tif (unlikely(*timestamp == ENA_PHC_TIMESTAMP_ERROR)) {\n-\t\t\t/* Retrieved invalid PHC timestamp, PHC enters into blocked state until\n-\t\t\t * passing blocking time\n+\t\t/* req_id was updated by the device which indicates that PHC timestamp, error_bound\n+\t\t * and error_flags are updated too, checking errors before retrieving timestamp and\n+\t\t * error_bound values\n+\t\t */\n+\t\tif (unlikely(read_resp->error_flags & ENA_PHC_ERROR_FLAGS)) {\n+\t\t\t/* Retrieved timestamp or error bound errors, PHC enters into blocked state\n+\t\t\t * until passing blocking time, during this time any get PHC timestamp or\n+\t\t\t * error bound requests will fail with device busy error\n \t\t\t */\n+\t\t\tphc->error_bound = ENA_PHC_MAX_ERROR_BOUND;\n \t\t\tret = ENA_COM_DEVICE_BUSY;\n \t\t\tbreak;\n \t\t}\n \n-\t\t/* Retrieved valid PHC timestamp */\n+\t\t/* PHC timestamp value is returned to the caller */\n+\t\t*timestamp = read_resp->timestamp;\n+\n+\t\t/* Error bound value is cached for future retrieval by caller */\n+\t\tphc->error_bound = read_resp->error_bound;\n+\n+\t\t/* Update statistic on valid PHC timestamp retrieval */\n \t\tphc->stats.phc_cnt++;\n \n \t\t/* This indicates PHC state is active */\n-\t\tstart_time = initial_time;\n+\t\tphc->system_time = zero_system_time;\n \t\tbreak;\n \t}\n \n@@ -1956,6 +1977,24 @@ int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp)\n \treturn ret;\n }\n \n+int ena_com_phc_get_error_bound(struct ena_com_dev *ena_dev, u32 *error_bound)\n+{\n+\tstruct ena_com_phc_info *phc = &ena_dev->phc;\n+\tu32 local_error_bound = phc->error_bound;\n+\n+\tif (!phc->active) {\n+\t\tena_trc_err(ena_dev, \"PHC feature is not active in the device\\n\");\n+\t\treturn ENA_COM_UNSUPPORTED;\n+\t}\n+\n+\tif (local_error_bound == ENA_PHC_MAX_ERROR_BOUND)\n+\t\treturn ENA_COM_DEVICE_BUSY;\n+\n+\t*error_bound = local_error_bound;\n+\n+\treturn ENA_COM_OK;\n+}\n+\n int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev)\n {\n \tstruct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read;\n@@ -2453,9 +2492,9 @@ int ena_com_dev_reset(struct ena_com_dev *ena_dev,\n \n \treset_val |= reset_reason_lsb << ENA_REGS_DEV_CTL_RESET_REASON_SHIFT;\n \n-\tif (ena_com_get_cap(ena_dev, ENA_ADMIN_EXTENDED_RESET_REASONS)) {\n+\tif (ena_com_get_cap(ena_dev, ENA_ADMIN_EXTENDED_RESET_REASONS))\n \t\treset_val |= reset_reason_msb << ENA_REGS_DEV_CTL_RESET_REASON_EXT_SHIFT;\n-\t} else if (reset_reason_msb) {\n+\telse if (reset_reason_msb) {\n \t\t/* In case the device does not support intended\n \t\t * extended reset reason fallback to generic\n \t\t */\ndiff --git a/drivers/net/ena/base/ena_com.h b/drivers/net/ena/base/ena_com.h\nindex cd054595d7..c62016cc06 100644\n--- a/drivers/net/ena/base/ena_com.h\n+++ b/drivers/net/ena/base/ena_com.h\n@@ -274,6 +274,9 @@ struct ena_com_phc_info {\n \t/* PHC shared memory - virtual address */\n \tstruct ena_admin_phc_resp *virt_addr;\n \n+\t/* System time of last PHC request */\n+\tena_time_high_res_t system_time;\n+\n \t/* Spin lock to ensure a single outstanding PHC read */\n \tena_spinlock_t lock;\n \n@@ -293,17 +296,20 @@ struct ena_com_phc_info {\n \t */\n \tu32 block_timeout_usec;\n \n+\t/* PHC shared memory - physical address */\n+\tdma_addr_t phys_addr;\n+\n+\t/* PHC shared memory handle */\n+\tena_mem_handle_t mem_handle;\n+\n+\t/* Cached error bound per timestamp sample */\n+\tu32 error_bound;\n+\n \t/* Request id sent to the device */\n \tu16 req_id;\n \n \t/* True if PHC is active in the device */\n \tbool active;\n-\n-\t/* PHC shared memory - memory handle */\n-\tena_mem_handle_t mem_handle;\n-\n-\t/* PHC shared memory - physical address */\n-\tdma_addr_t phys_addr;\n };\n \n struct ena_rss {\n@@ -468,12 +474,19 @@ int ena_com_phc_config(struct ena_com_dev *ena_dev);\n */\n void ena_com_phc_destroy(struct ena_com_dev *ena_dev);\n \n-/* ena_com_phc_get - Retrieve PHC timestamp\n+/* ena_com_phc_get_timestamp - Retrieve PHC timestamp\n+ * @ena_dev: ENA communication layer struct\n+ * @timestamp: Retrieved PHC timestamp\n+ * @return - 0 on success, negative value on failure\n+ */\n+int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp);\n+\n+/* ena_com_phc_get_error_bound - Retrieve cached PHC error bound\n * @ena_dev: ENA communication layer struct\n- * @timestamp: Retrieve PHC timestamp\n+ * @error_bound: Cached PHC error bound\n * @return - 0 on success, negative value on failure\n */\n-int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp);\n+int ena_com_phc_get_error_bound(struct ena_com_dev *ena_dev, u32 *error_bound);\n \n /* ena_com_set_mmio_read_mode - Enable/disable the indirect mmio reg read mechanism\n * @ena_dev: ENA communication layer struct\ndiff --git a/drivers/net/ena/base/ena_defs/ena_admin_defs.h b/drivers/net/ena/base/ena_defs/ena_admin_defs.h\nindex 438e4a1085..ce8a26721e 100644\n--- a/drivers/net/ena/base/ena_defs/ena_admin_defs.h\n+++ b/drivers/net/ena/base/ena_defs/ena_admin_defs.h\n@@ -144,8 +144,14 @@ enum ena_admin_get_stats_scope {\n \tENA_ADMIN_ETH_TRAFFIC = 1,\n };\n \n-enum ena_admin_get_phc_type {\n-\tENA_ADMIN_PHC_TYPE_READLESS = 0,\n+enum ena_admin_phc_feature_version {\n+\t/* Readless with error_bound */\n+\tENA_ADMIN_PHC_FEATURE_VERSION_0 = 0,\n+};\n+\n+enum ena_admin_phc_error_flags {\n+\tENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP = BIT(0),\n+\tENA_ADMIN_PHC_ERROR_FLAG_ERROR_BOUND = BIT(1),\n };\n \n /* ENA SRD configuration for ENI */\n@@ -987,7 +993,8 @@ struct ena_admin_host_info {\n \t * 5 : reserved\n \t * 6 : rx_page_reuse\n \t * 7 : tx_ipv6_csum_offload\n-\t * 31:8 : reserved\n+\t * 8 : phc\n+\t * 31:9 : reserved\n \t */\n \tuint32_t driver_supported_features;\n };\n@@ -1073,10 +1080,10 @@ struct ena_admin_queue_ext_feature_desc {\n };\n \n struct ena_admin_feature_phc_desc {\n-\t/* PHC type as defined in enum ena_admin_get_phc_type,\n-\t * used only for GET command.\n+\t/* PHC version as defined in enum ena_admin_phc_feature_version,\n+\t * used only for GET command as max supported PHC version by the device.\n \t */\n-\tuint8_t type;\n+\tuint8_t version;\n \n \t/* Reserved - MBZ */\n \tuint8_t reserved1[3];\n@@ -1272,13 +1279,23 @@ struct ena_admin_ena_mmio_req_read_less_resp {\n };\n \n struct ena_admin_phc_resp {\n+\t/* Request Id, received from DB register */\n \tuint16_t req_id;\n \n \tuint8_t reserved1[6];\n \n+\t/* PHC timestamp (nsec) */\n \tuint64_t timestamp;\n \n-\tuint8_t reserved2[48];\n+\tuint8_t reserved2[8];\n+\n+\t/* Timestamp error limit (nsec) */\n+\tuint32_t error_bound;\n+\n+\t/* Bit field of enum ena_admin_phc_error_flags */\n+\tuint32_t error_flags;\n+\n+\tuint8_t reserved3[32];\n };\n \n /* aq_common_desc */\n@@ -1381,6 +1398,8 @@ struct ena_admin_phc_resp {\n #define ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK BIT(6)\n #define ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_SHIFT 7\n #define ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_MASK BIT(7)\n+#define ENA_ADMIN_HOST_INFO_PHC_SHIFT 8\n+#define ENA_ADMIN_HOST_INFO_PHC_MASK BIT(8)\n \n /* feature_rss_ind_table */\n #define ENA_ADMIN_FEATURE_RSS_IND_TABLE_ONE_ENTRY_UPDATE_MASK BIT(0)\n@@ -1879,6 +1898,18 @@ static inline void set_ena_admin_feature_rss_ind_table_one_entry_update(struct e\n \tp->flags |= val & ENA_ADMIN_FEATURE_RSS_IND_TABLE_ONE_ENTRY_UPDATE_MASK;\n }\n \n+static inline uint32_t get_ena_admin_host_info_phc(const struct ena_admin_host_info *p)\n+{\n+\treturn (p->driver_supported_features &\n+\t\tENA_ADMIN_HOST_INFO_PHC_MASK) >> ENA_ADMIN_HOST_INFO_PHC_SHIFT;\n+}\n+\n+static inline void set_ena_admin_host_info_phc(struct ena_admin_host_info *p, uint32_t val)\n+{\n+\tp->driver_supported_features |= (val << ENA_ADMIN_HOST_INFO_PHC_SHIFT) &\n+\t\t\t\t\t ENA_ADMIN_HOST_INFO_PHC_MASK;\n+}\n+\n static inline uint8_t get_ena_admin_aenq_common_desc_phase(const struct ena_admin_aenq_common_desc *p)\n {\n \treturn p->flags & ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK;\n", "prefixes": [ "v4", "14/31" ] }