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GET /api/patches/126986/?format=api
{ "id": 126986, "url": "http://patches.dpdk.org/api/patches/126986/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230518112944.32276-5-liudongdong3@huawei.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230518112944.32276-5-liudongdong3@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230518112944.32276-5-liudongdong3@huawei.com", "date": "2023-05-18T11:29:43", "name": "[4/5] net/hns3: fix receive multiple firmware reset interrupts", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "50ddab3f5a744cdd251352c29d88fbdb96858cdf", "submitter": { "id": 2718, "url": "http://patches.dpdk.org/api/people/2718/?format=api", "name": "Dongdong Liu", "email": "liudongdong3@huawei.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230518112944.32276-5-liudongdong3@huawei.com/mbox/", "series": [ { "id": 28060, "url": "http://patches.dpdk.org/api/series/28060/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28060", "date": "2023-05-18T11:29:39", "name": "] net/hns3: add some features and bugfixes", "version": 1, "mbox": "http://patches.dpdk.org/series/28060/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/126986/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/126986/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AB50742B3A;\n\tThu, 18 May 2023 13:32:22 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B384542D44;\n\tThu, 18 May 2023 13:32:05 +0200 (CEST)", "from szxga03-in.huawei.com (szxga03-in.huawei.com [45.249.212.189])\n by mails.dpdk.org (Postfix) with ESMTP id 53E0442B71;\n Thu, 18 May 2023 13:32:01 +0200 (CEST)", "from kwepemi500017.china.huawei.com (unknown [172.30.72.54])\n by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4QMST92mgdzLmNV;\n Thu, 18 May 2023 19:30:37 +0800 (CST)", "from localhost.localdomain (10.28.79.22) by\n kwepemi500017.china.huawei.com (7.221.188.110) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.1.2507.23; Thu, 18 May 2023 19:31:58 +0800" ], "From": "Dongdong Liu <liudongdong3@huawei.com>", "To": "<dev@dpdk.org>, <ferruh.yigit@amd.com>, <thomas@monjalon.net>,\n <andrew.rybchenko@oktetlabs.ru>, <fengchengwen@huawei.com>", "CC": "<stable@dpdk.org>, <lihuisong@huawei.com>, <liudongdong3@huawei.com>,\n <yisen.zhuang@huawei.com>", "Subject": "[PATCH 4/5] net/hns3: fix receive multiple firmware reset interrupts", "Date": "Thu, 18 May 2023 19:29:43 +0800", "Message-ID": "<20230518112944.32276-5-liudongdong3@huawei.com>", "X-Mailer": "git-send-email 2.22.0", "In-Reply-To": "<20230518112944.32276-1-liudongdong3@huawei.com>", "References": "<20230518112944.32276-1-liudongdong3@huawei.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.28.79.22]", "X-ClientProxiedBy": "dggems703-chm.china.huawei.com (10.3.19.180) To\n kwepemi500017.china.huawei.com (7.221.188.110)", "X-CFilter-Loop": "Reflected", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Chengwen Feng <fengchengwen@huawei.com>\n\nIn the firmware (also known as IMP) reset scenario, driver interrupt\nprocessing and firmware watchdog initialization are asynchronous.\n\nIf the driver interrupt processing is faster than firmware watchdog\ninitialization (that is, the driver clears the firmware reset\ninterrupt source before the firmware watchdog is initialized), the\ndriver will receive multiple firmware reset interrupts.\n\nIn the Kunpeng 920 platform, the above situation does not exist. But\nit does on the newer platforms. So we add 5ms delay before drivers\nclears the IMP reset interrupt source.\n\nAs for the impact of 5ms, the number of PFs managed by a firmware is\nlimited. Therefore, even if a DPDK process takes over all the PFs\nwhich managed by the firmware, the delay is controllable.\n\nCc: stable@dpdk.org\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\nSigned-off-by: Dongdong Liu <liudongdong3@huawei.com>\n---\n drivers/net/hns3/hns3_ethdev.c | 14 ++++++++++++++\n 1 file changed, 14 insertions(+)", "diff": "diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c\nindex 5ef66f96c6..664226a6ef 100644\n--- a/drivers/net/hns3/hns3_ethdev.c\n+++ b/drivers/net/hns3/hns3_ethdev.c\n@@ -286,6 +286,19 @@ hns3_handle_mac_tnl(struct hns3_hw *hw)\n \t}\n }\n \n+static void\n+hns3_delay_before_clear_event_cause(struct hns3_hw *hw, uint32_t event_type, uint32_t regclr)\n+{\n+#define IMPRESET_WAIT_MS_TIME\t5\n+\n+\tif (event_type == HNS3_VECTOR0_EVENT_RST &&\n+\t regclr & BIT(HNS3_VECTOR0_IMPRESET_INT_B) &&\n+\t hw->revision >= PCI_REVISION_ID_HIP09_A) {\n+\t\trte_delay_ms(IMPRESET_WAIT_MS_TIME);\n+\t\thns3_dbg(hw, \"wait firmware watchdog initialization completed.\");\n+\t}\n+}\n+\n static void\n hns3_interrupt_handler(void *param)\n {\n@@ -305,6 +318,7 @@ hns3_interrupt_handler(void *param)\n \tvector0_int = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);\n \tras_int = hns3_read_dev(hw, HNS3_RAS_PF_OTHER_INT_STS_REG);\n \tcmdq_int = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG);\n+\thns3_delay_before_clear_event_cause(hw, event_cause, clearval);\n \thns3_clear_event_cause(hw, event_cause, clearval);\n \t/* vector 0 interrupt is shared with reset and mailbox source events. */\n \tif (event_cause == HNS3_VECTOR0_EVENT_ERR) {\n", "prefixes": [ "4/5" ] }