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GET /api/patches/126951/?format=api
{ "id": 126951, "url": "http://patches.dpdk.org/api/patches/126951/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230517202446.535778-3-dsosnowski@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230517202446.535778-3-dsosnowski@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230517202446.535778-3-dsosnowski@nvidia.com", "date": "2023-05-17T20:24:46", "name": "[2/2] net/mlx5: add modify field actions number validation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "27bbf5a3ff12f297a3b148869aeae48b796a12db", "submitter": { "id": 2386, "url": "http://patches.dpdk.org/api/people/2386/?format=api", "name": "Dariusz Sosnowski", "email": "dsosnowski@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230517202446.535778-3-dsosnowski@nvidia.com/mbox/", "series": [ { "id": 28039, "url": "http://patches.dpdk.org/api/series/28039/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28039", "date": "2023-05-17T20:24:45", "name": "net/mlx5: add modify field actions number validation", "version": 1, "mbox": "http://patches.dpdk.org/series/28039/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/126951/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/126951/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 179B942B2F;\n\tWed, 17 May 2023 22:25:38 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7534742D37;\n\tWed, 17 May 2023 22:25:26 +0200 (CEST)", "from NAM11-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam11on2074.outbound.protection.outlook.com [40.107.223.74])\n by mails.dpdk.org (Postfix) with ESMTP id 9FBBC42B8B\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Dariusz Sosnowski <dsosnowski@nvidia.com>", "To": "Ori Kam <orika@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>, \"Matan\n Azrad\" <matan@nvidia.com>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 2/2] net/mlx5: add modify field actions number validation", "Date": "Wed, 17 May 2023 20:24:46 +0000", "Message-ID": "<20230517202446.535778-3-dsosnowski@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230517202446.535778-1-dsosnowski@nvidia.com>", "References": "<20230517202446.535778-1-dsosnowski@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN8NAM11FT036:EE_|MN2PR12MB4221:EE_", "X-MS-Office365-Filtering-Correlation-Id": "f6380ae1-d314-49b3-fc4a-08db5714d7ce", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n bgsXINsY05cch7CfIjwQ73LMY5abNO6tTsbD6h/qNj/fZrSDq2cjMrJEAHcrArCwUiUCDjEmkcHPj3xjPTjkzhyU26Be89OGkNMtw/r7XGH7UDsqvgOdviO+NMBtYGhXOEhH+ufEfl2qu+4ueeoVDbTdURy6D0vKwaKfWWy17fIjMmJUjVxaNlwmoEfayQhaM8nIE1iYAQXvYFndY8Fw6zO1Sz04Q/5sUMc6jpa+FAFiimXqJj2pV3jYOxwzxoaXxKpvXDIjon1BXKnLn0xyhDvnV7or4c6J7oesdbSee8JMPTM8CzwOHBcX9YlY2f8WmlsWJ0cIq+ocuToCdJ5d6zx7jNKsejQ+0pXKHtxJnF4lfL6HyzRchz+zevsXIevNIxO7me1zn+dMr08v3jpcUG6Od1RQbpAV4vUpgF/PWy6VZooSN9sqVYfeTyxM1jXB2HNrRsY/mEqztwqMDfCJB7ka/twqf+74e6Ew6Hn6lTHuYsgLxoWKaqLeKt6EwjUcz9uO4K2vkKTet6d8ssa7Z7a6rYkNsxSquqnse1im4tCbZKi7bTISIfbAPI5VPP4acgb36d8qVE1CaiCFqL+hvhO/yrmgbezqXWdjaHYJaSB1vFLqOoRA9Qg6sy3c8VIGX8NmIEE4fvLjEXd8eyVVJcNy/j2AdkoyFB2rTBv/PPhDgx6ZIshS4RPqw1C2iqqdrC2LBoQ+jOsvuB3jSonYcMqqZu0EGqW+cxFqRnWjMpLyOtuoEhnLe+TWO1sosFBl", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230028)(4636009)(396003)(39860400002)(136003)(376002)(346002)(451199021)(40470700004)(36840700001)(46966006)(36756003)(86362001)(110136005)(70586007)(4326008)(6636002)(70206006)(316002)(478600001)(6666004)(55016003)(82310400005)(40480700001)(8676002)(8936002)(5660300002)(2906002)(41300700001)(356005)(7636003)(82740400003)(426003)(2616005)(36860700001)(6286002)(1076003)(186003)(7696005)(26005)(16526019)(83380400001)(47076005)(336012)(40460700003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "17 May 2023 20:25:23.2967 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n f6380ae1-d314-49b3-fc4a-08db5714d7ce", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT036.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR12MB4221", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch adds validation for the number of modify field actions,\nwhen working with HW Steering.\n\nIf translation of modify field actions generated more HW commands\nthan supported by the FW, then proper error is returned.\nAdditionally, number of generated commands is logged,\nalong with a number of NOP commands added.\nThis validation is only valid for HWS template tables, in groups > 0.\n\nSigned-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_hw.c | 51 +++++++++++++++++++++++++++++++++\n 1 file changed, 51 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 7e0ee8d883..0a7416c7a1 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -1086,6 +1086,53 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+static uint32_t\n+flow_hw_count_nop_modify_field(struct mlx5_hw_modify_header_action *mhdr)\n+{\n+\tuint32_t i;\n+\tuint32_t nops = 0;\n+\n+\tfor (i = 0; i < mhdr->mhdr_cmds_num; ++i) {\n+\t\tstruct mlx5_modification_cmd cmd = mhdr->mhdr_cmds[i];\n+\n+\t\tcmd.data0 = rte_be_to_cpu_32(cmd.data0);\n+\t\tif (cmd.action_type == MLX5_MODIFICATION_TYPE_NOP)\n+\t\t\t++nops;\n+\t}\n+\treturn nops;\n+}\n+\n+static int\n+flow_hw_validate_compiled_modify_field(struct rte_eth_dev *dev,\n+\t\t\t\t const struct mlx5_flow_template_table_cfg *cfg,\n+\t\t\t\t struct mlx5_hw_modify_header_action *mhdr,\n+\t\t\t\t struct rte_flow_error *error)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_hca_attr *hca_attr = &priv->sh->cdev->config.hca_attr;\n+\n+\t/*\n+\t * Header modify pattern length limitation is only valid for HWS groups, i.e. groups > 0.\n+\t * In group 0, MODIFY_FIELD actions are handled with header modify actions\n+\t * managed by rdma-core.\n+\t */\n+\tif (cfg->attr.flow_attr.group != 0 &&\n+\t mhdr->mhdr_cmds_num > hca_attr->max_header_modify_pattern_length) {\n+\t\tuint32_t nops = flow_hw_count_nop_modify_field(mhdr);\n+\n+\t\tDRV_LOG(ERR, \"Too many modify header commands generated from \"\n+\t\t\t \"MODIFY_FIELD actions. \"\n+\t\t\t \"Generated HW commands = %u (amount of NOP commands = %u). \"\n+\t\t\t \"Maximum supported = %u.\",\n+\t\t\t mhdr->mhdr_cmds_num, nops,\n+\t\t\t hca_attr->max_header_modify_pattern_length);\n+\t\treturn rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, NULL,\n+\t\t\t\t\t \"Number of MODIFY_FIELD actions exceeds maximum \"\n+\t\t\t\t\t \"supported limit of actions\");\n+\t}\n+\treturn 0;\n+}\n+\n static int\n flow_hw_represented_port_compile(struct rte_eth_dev *dev,\n \t\t\t\t const struct rte_flow_attr *attr,\n@@ -1704,6 +1751,10 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\tuint32_t bulk_size;\n \t\tsize_t mhdr_len;\n \n+\t\tif (flow_hw_validate_compiled_modify_field(dev, cfg, &mhdr, error)) {\n+\t\t\t__flow_hw_action_template_destroy(dev, acts);\n+\t\t\treturn -rte_errno;\n+\t\t}\n \t\tacts->mhdr = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*acts->mhdr),\n \t\t\t\t\t 0, SOCKET_ID_ANY);\n \t\tif (!acts->mhdr)\n", "prefixes": [ "2/2" ] }