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GET /api/patches/105618/?format=api
{ "id": 105618, "url": "http://patches.dpdk.org/api/patches/105618/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211212143520.2356157-1-kevinx.liu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211212143520.2356157-1-kevinx.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211212143520.2356157-1-kevinx.liu@intel.com", "date": "2021-12-12T14:35:20", "name": "[v2] net/ice: fix Tx Checksum offload", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "cdeafc58c7bab10c408e3286f71c10d79cf72452", "submitter": { "id": 2440, "url": "http://patches.dpdk.org/api/people/2440/?format=api", "name": "Kevin Liu", "email": "kevinx.liu@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211212143520.2356157-1-kevinx.liu@intel.com/mbox/", "series": [ { "id": 21061, "url": "http://patches.dpdk.org/api/series/21061/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=21061", "date": "2021-12-12T14:35:20", "name": "[v2] net/ice: fix Tx Checksum offload", "version": 2, "mbox": "http://patches.dpdk.org/series/21061/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/105618/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/105618/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 91FB1A00C5;\n\tTue, 4 Jan 2022 09:59:30 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6124C40040;\n\tTue, 4 Jan 2022 09:59:30 +0100 (CET)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id 167DF4003C;\n Tue, 4 Jan 2022 09:59:27 +0100 (CET)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 04 Jan 2022 00:59:26 -0800", "from unknown (HELO intel-cd-odc-kevin.cd.intel.com)\n ([10.240.178.136])\n by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 04 Jan 2022 00:59:22 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1641286768; x=1672822768;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=FGJMmrFT2sAtzhmkDU2H5cndVK4RbMr9irWJrM9g8C4=;\n b=kjBUJgN0er6av3o1z9KrEDLAJTngLrp7/+Rg3s0xV+UlMInzlKKm/sBr\n AOHUSvJMUMx9wpDsD5rIub+WHnwpBcSuYZzUscdHQ8W/X+i7HtHwvYJkv\n flg1P58xvRDi6YQ1O4+pOJcCifQ74Ex3tU9XSiGKokATuaB7yrtbu3JtM\n GKJEuC+p6c7qwOlAB8ha9Oy7C3yzguOnaAwtQL+vf1YK5dUlismo9zu18\n nztXDxdVhUEHM289Jkg0DN031bH1h2dX6dHczPZw/EVMI/lmV6zPHWxFM\n PYQnOPkE4eFIsjjwDcbPKaak2lgRO//MzFM7W4IucjI37zGydUX1xyKGh w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10216\"; a=\"328528647\"", "E=Sophos;i=\"5.88,260,1635231600\"; d=\"scan'208\";a=\"328528647\"", "E=Sophos;i=\"5.88,260,1635231600\"; d=\"scan'208\";a=\"525948788\"" ], "From": "Kevin Liu <kevinx.liu@intel.com>", "To": "dev@dpdk.org", "Cc": "qiming.yang@intel.com, qi.z.zhang@intel.com, stevex.yang@intel.com,\n Kevin Liu <kevinx.liu@intel.com>, stable@dpdk.org", "Subject": "[PATCH v2] net/ice: fix Tx Checksum offload", "Date": "Sun, 12 Dec 2021 14:35:20 +0000", "Message-Id": "<20211212143520.2356157-1-kevinx.liu@intel.com>", "X-Mailer": "git-send-email 2.33.1", "In-Reply-To": "<20211208095626.85026-1-kevinx.liu@intel.com>", "References": "<20211208095626.85026-1-kevinx.liu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The tunnel packets is missing some information after Tx forwarding.\n\nIn ice_txd_enable_offload, when set tunnel packet Tx checksum\noffload enable, td_offset should be set with outer l2/l3 len instead\nof inner l2/l3 len.\n\nIn ice_txd_enable_checksum, td_offset should also be set with outer\nl3 len.\n\nThis patch fix the bug that the checksum engine can forward Ipv4/Ipv6\ntunnel packets.\n\nFixes: 28f9002ab67f (\"net/ice: add Tx AVX512 offload path\")\nFixes: 17c7d0f9d6a4 (\"net/ice: support basic Rx/Tx\")\nCc: stable@dpdk.org\n\nSigned-off-by: Kevin Liu <kevinx.liu@intel.com>\n---\nv2:\n- Refine the title and fix code in ice_txd_enable_checksum.\n---\n drivers/net/ice/ice_rxtx.c | 41 ++++++++++++++-------\n drivers/net/ice/ice_rxtx_vec_common.h | 52 +++++++++++++++++++--------\n 2 files changed, 66 insertions(+), 27 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex f6d8564ab8..d50acf5391 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -2490,18 +2490,35 @@ ice_txd_enable_checksum(uint64_t ol_flags,\n \t\t\t<< ICE_TX_DESC_LEN_MACLEN_S;\n \n \t/* Enable L3 checksum offloads */\n-\tif (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {\n-\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;\n-\t\t*td_offset |= (tx_offload.l3_len >> 2) <<\n-\t\t\t ICE_TX_DESC_LEN_IPLEN_S;\n-\t} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {\n-\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;\n-\t\t*td_offset |= (tx_offload.l3_len >> 2) <<\n-\t\t\t ICE_TX_DESC_LEN_IPLEN_S;\n-\t} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {\n-\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;\n-\t\t*td_offset |= (tx_offload.l3_len >> 2) <<\n-\t\t\t ICE_TX_DESC_LEN_IPLEN_S;\n+\t/*Tunnel package usage outer len enable L3 checksum offload*/\n+\tif (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {\n+\t\tif (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {\n+\t\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;\n+\t\t\t*td_offset |= (tx_offload.outer_l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {\n+\t\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;\n+\t\t\t*td_offset |= (tx_offload.outer_l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {\n+\t\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;\n+\t\t\t*td_offset |= (tx_offload.outer_l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t}\n+\t} else {\n+\t\tif (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {\n+\t\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;\n+\t\t\t*td_offset |= (tx_offload.l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {\n+\t\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;\n+\t\t\t*td_offset |= (tx_offload.l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {\n+\t\t\t*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;\n+\t\t\t*td_offset |= (tx_offload.l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t}\n \t}\n \n \tif (ol_flags & RTE_MBUF_F_TX_TCP_SEG) {\ndiff --git a/drivers/net/ice/ice_rxtx_vec_common.h b/drivers/net/ice/ice_rxtx_vec_common.h\nindex dfe60c81d9..8ff01046e1 100644\n--- a/drivers/net/ice/ice_rxtx_vec_common.h\n+++ b/drivers/net/ice/ice_rxtx_vec_common.h\n@@ -364,23 +364,45 @@ ice_txd_enable_offload(struct rte_mbuf *tx_pkt,\n \tuint32_t td_offset = 0;\n \n \t/* Tx Checksum Offload */\n-\t/* SET MACLEN */\n-\ttd_offset |= (tx_pkt->l2_len >> 1) <<\n+\t/*Tunnel package usage outer len enable L2/L3 checksum offload*/\n+\tif (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {\n+\t\t/* SET MACLEN */\n+\t\ttd_offset |= (tx_pkt->outer_l2_len >> 1) <<\n \t\t\tICE_TX_DESC_LEN_MACLEN_S;\n \n-\t/* Enable L3 checksum offload */\n-\tif (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {\n-\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;\n-\t\ttd_offset |= (tx_pkt->l3_len >> 2) <<\n-\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n-\t} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {\n-\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;\n-\t\ttd_offset |= (tx_pkt->l3_len >> 2) <<\n-\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n-\t} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {\n-\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;\n-\t\ttd_offset |= (tx_pkt->l3_len >> 2) <<\n-\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t/* Enable L3 checksum offload */\n+\t\tif (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {\n+\t\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;\n+\t\t\ttd_offset |= (tx_pkt->outer_l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {\n+\t\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;\n+\t\t\ttd_offset |= (tx_pkt->outer_l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {\n+\t\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;\n+\t\t\ttd_offset |= (tx_pkt->outer_l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t}\n+\t} else {\n+\t\t/* SET MACLEN */\n+\t\ttd_offset |= (tx_pkt->l2_len >> 1) <<\n+\t\t\tICE_TX_DESC_LEN_MACLEN_S;\n+\n+\t\t/* Enable L3 checksum offload */\n+\t\tif (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {\n+\t\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;\n+\t\t\ttd_offset |= (tx_pkt->l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {\n+\t\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;\n+\t\t\ttd_offset |= (tx_pkt->l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {\n+\t\t\ttd_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;\n+\t\t\ttd_offset |= (tx_pkt->l3_len >> 2) <<\n+\t\t\t\tICE_TX_DESC_LEN_IPLEN_S;\n+\t\t}\n \t}\n \n \t/* Enable L4 checksum offloads */\n", "prefixes": [ "v2" ] }