diff mbox series

[v2] net/ice: fix Tx Checksum offload

Message ID 20211212143520.2356157-1-kevinx.liu@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series [v2] net/ice: fix Tx Checksum offload |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-intel-Functional fail Functional Testing issues
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Performance fail Performance Testing issues
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS

Commit Message

Kevin Liu Dec. 12, 2021, 2:35 p.m. UTC 
  The tunnel packets is missing some information after Tx forwarding.

In ice_txd_enable_offload, when set tunnel packet Tx checksum
offload enable, td_offset should be set with outer l2/l3 len instead
of inner l2/l3 len.

In ice_txd_enable_checksum, td_offset should also be set with outer
l3 len.

This patch fix the bug that the checksum engine can forward Ipv4/Ipv6
tunnel packets.

Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path")
Fixes: 17c7d0f9d6a4 ("net/ice: support basic Rx/Tx")
Cc: stable@dpdk.org

Signed-off-by: Kevin Liu <kevinx.liu@intel.com>
---
v2:
- Refine the title and fix code in ice_txd_enable_checksum.
---
 drivers/net/ice/ice_rxtx.c            | 41 ++++++++++++++-------
 drivers/net/ice/ice_rxtx_vec_common.h | 52 +++++++++++++++++++--------
 2 files changed, 66 insertions(+), 27 deletions(-)

Comments

Qi Zhang Jan. 10, 2022, 9:36 a.m. UTC | #1 
> -----Original Message-----
> From: Liu, KevinX <kevinx.liu@intel.com>
> Sent: Sunday, December 12, 2021 10:35 PM
> To: dev@dpdk.org
> Cc: Yang, Qiming <qiming.yang@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>; Yang, SteveX <stevex.yang@intel.com>; Liu, KevinX
> <kevinx.liu@intel.com>; stable@dpdk.org
> Subject: [PATCH v2] net/ice: fix Tx Checksum offload
> 
> The tunnel packets is missing some information after Tx forwarding.
> 
> In ice_txd_enable_offload, when set tunnel packet Tx checksum offload enable,
> td_offset should be set with outer l2/l3 len instead of inner l2/l3 len.
> 
> In ice_txd_enable_checksum, td_offset should also be set with outer
> l3 len.
> 
> This patch fix the bug that the checksum engine can forward Ipv4/Ipv6 tunnel
> packets.
> 
> Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path")
> Fixes: 17c7d0f9d6a4 ("net/ice: support basic Rx/Tx")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Kevin Liu <kevinx.liu@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
diff mbox series

Patch

diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index f6d8564ab8..d50acf5391 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -2490,18 +2490,35 @@  ice_txd_enable_checksum(uint64_t ol_flags,
 			<< ICE_TX_DESC_LEN_MACLEN_S;
 
 	/* Enable L3 checksum offloads */
-	if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
-		*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
-		*td_offset |= (tx_offload.l3_len >> 2) <<
-			      ICE_TX_DESC_LEN_IPLEN_S;
-	} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
-		*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
-		*td_offset |= (tx_offload.l3_len >> 2) <<
-			      ICE_TX_DESC_LEN_IPLEN_S;
-	} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
-		*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
-		*td_offset |= (tx_offload.l3_len >> 2) <<
-			      ICE_TX_DESC_LEN_IPLEN_S;
+	/*Tunnel package usage outer len enable L3 checksum offload*/
+	if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
+		if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
+			*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
+			*td_offset |= (tx_offload.outer_l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
+			*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
+			*td_offset |= (tx_offload.outer_l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
+			*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
+			*td_offset |= (tx_offload.outer_l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		}
+	} else {
+		if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
+			*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
+			*td_offset |= (tx_offload.l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
+			*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
+			*td_offset |= (tx_offload.l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
+			*td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
+			*td_offset |= (tx_offload.l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		}
 	}
 
 	if (ol_flags & RTE_MBUF_F_TX_TCP_SEG) {
diff --git a/drivers/net/ice/ice_rxtx_vec_common.h b/drivers/net/ice/ice_rxtx_vec_common.h
index dfe60c81d9..8ff01046e1 100644
--- a/drivers/net/ice/ice_rxtx_vec_common.h
+++ b/drivers/net/ice/ice_rxtx_vec_common.h
@@ -364,23 +364,45 @@  ice_txd_enable_offload(struct rte_mbuf *tx_pkt,
 	uint32_t td_offset = 0;
 
 	/* Tx Checksum Offload */
-	/* SET MACLEN */
-	td_offset |= (tx_pkt->l2_len >> 1) <<
+	/*Tunnel package usage outer len enable L2/L3 checksum offload*/
+	if (ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) {
+		/* SET MACLEN */
+		td_offset |= (tx_pkt->outer_l2_len >> 1) <<
 			ICE_TX_DESC_LEN_MACLEN_S;
 
-	/* Enable L3 checksum offload */
-	if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
-		td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
-		td_offset |= (tx_pkt->l3_len >> 2) <<
-			ICE_TX_DESC_LEN_IPLEN_S;
-	} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
-		td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
-		td_offset |= (tx_pkt->l3_len >> 2) <<
-			ICE_TX_DESC_LEN_IPLEN_S;
-	} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
-		td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
-		td_offset |= (tx_pkt->l3_len >> 2) <<
-			ICE_TX_DESC_LEN_IPLEN_S;
+		/* Enable L3 checksum offload */
+		if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
+			td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
+			td_offset |= (tx_pkt->outer_l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
+			td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
+			td_offset |= (tx_pkt->outer_l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
+			td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
+			td_offset |= (tx_pkt->outer_l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		}
+	} else {
+		/* SET MACLEN */
+		td_offset |= (tx_pkt->l2_len >> 1) <<
+			ICE_TX_DESC_LEN_MACLEN_S;
+
+		/* Enable L3 checksum offload */
+		if (ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
+			td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
+			td_offset |= (tx_pkt->l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		} else if (ol_flags & RTE_MBUF_F_TX_IPV4) {
+			td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
+			td_offset |= (tx_pkt->l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		} else if (ol_flags & RTE_MBUF_F_TX_IPV6) {
+			td_cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
+			td_offset |= (tx_pkt->l3_len >> 2) <<
+				ICE_TX_DESC_LEN_IPLEN_S;
+		}
 	}
 
 	/* Enable L4 checksum offloads */