diff mbox series

[v2,3/3] event/cnxk: add option to update links via mbox

Message ID 20231211132320.1254-3-pbhagavatula@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [v2,1/3] common/cnxk: update timer base code |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/github-robot: build success github build: passed
ci/intel-Functional success Functional PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS

Commit Message

Pavan Nikhilesh Bhagavatula Dec. 11, 2023, 1:23 p.m. UTC 
  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Add option to update event queue to event port links via
mailbox.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/common/cnxk/roc_sso.c       | 87 +++++++++++++++++++++++++----
 drivers/common/cnxk/roc_sso.h       |  4 +-
 drivers/event/cnxk/cn10k_eventdev.c |  6 +-
 drivers/event/cnxk/cn9k_eventdev.c  | 18 +++---
 4 files changed, 90 insertions(+), 25 deletions(-)

Comments

Jerin Jacob Dec. 12, 2023, 5:03 a.m. UTC | #1 
On Tue, Dec 12, 2023 at 3:13 AM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Add option to update event queue to event port links via
> mailbox.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

Updated the git commit as follows and series applied to
dpdk-next-net-eventdev/for-main. Thanks

commit 43b0ec0db7eabae40b60d0d29b7eee69531228f3 (HEAD -> for-main)
Author: Pavan Nikhilesh <pbhagavatula@marvell.com>
Date:   Mon Dec 11 18:53:20 2023 +0530

    event/cnxk: add option to update links via mbox

    Add option to update event queue to event port links via
    mailbox.

    Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

commit e638054cc0a0b7b320d1c4554fd78c96ca95f514
Author: Pavan Nikhilesh <pbhagavatula@marvell.com>
Date:   Mon Dec 11 18:53:19 2023 +0530

    common/cnxk: update scheduler base code

    Updated event scheduler base code to add checks to avoid
    sending unnecessary mbox requests.

    Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

commit d6601056e30156339ba972d1b9ca568867037484
Author: Pavan Nikhilesh <pbhagavatula@marvell.com>
Date:   Mon Dec 11 18:53:18 2023 +0530

    common/cnxk: update timer base code

    Updated event timer base code to add mailbox to capture multiple
    clock sources also additional supported clock sources SYNCE,
    BTS, EXT_MIO, EXT_GTI.

    Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c
index e5c16b2a05..293b0c81a1 100644
--- a/drivers/common/cnxk/roc_sso.c
+++ b/drivers/common/cnxk/roc_sso.c
@@ -235,6 +235,47 @@  sso_hws_link_modify(uint8_t hws, uintptr_t base, struct plt_bitmap *bmp, uint16_
 	}
 }
 
+static int
+sso_hws_link_modify_af(struct dev *dev, uint8_t hws, struct plt_bitmap *bmp, uint16_t hwgrp[],
+		       uint16_t n, uint8_t set, uint16_t enable)
+{
+	struct mbox *mbox = mbox_get(dev->mbox);
+	struct ssow_chng_mship *req;
+	int rc, i;
+
+	req = mbox_alloc_msg_ssow_chng_mship(mbox);
+	if (req == NULL) {
+		rc = mbox_process(mbox);
+		if (rc) {
+			mbox_put(mbox);
+			return -EIO;
+		}
+		req = mbox_alloc_msg_ssow_chng_mship(mbox);
+		if (req == NULL) {
+			mbox_put(mbox);
+			return -ENOSPC;
+		}
+	}
+	req->enable = enable;
+	req->set = set;
+	req->hws = hws;
+	req->nb_hwgrps = n;
+	for (i = 0; i < n; i++)
+		req->hwgrps[i] = hwgrp[i];
+	rc = mbox_process(mbox);
+	mbox_put(mbox);
+	if (rc == MBOX_MSG_INVALID)
+		return rc;
+	if (rc)
+		return -EIO;
+
+	for (i = 0; i < n; i++)
+		enable ? plt_bitmap_set(bmp, hwgrp[i]) :
+			 plt_bitmap_clear(bmp, hwgrp[i]);
+
+	return 0;
+}
+
 static int
 sso_msix_fill(struct roc_sso *roc_sso, uint16_t nb_hws, uint16_t nb_hwgrp)
 {
@@ -300,31 +341,55 @@  roc_sso_ns_to_gw(uint64_t base, uint64_t ns)
 
 int
 roc_sso_hws_link(struct roc_sso *roc_sso, uint8_t hws, uint16_t hwgrp[], uint16_t nb_hwgrp,
-		 uint8_t set)
+		 uint8_t set, bool use_mbox)
 {
-	struct dev *dev = &roc_sso_to_sso_priv(roc_sso)->dev;
-	struct sso *sso;
+	struct sso *sso = roc_sso_to_sso_priv(roc_sso);
+	struct dev *dev = &sso->dev;
 	uintptr_t base;
+	int rc;
 
-	sso = roc_sso_to_sso_priv(roc_sso);
+	if (!nb_hwgrp)
+		return 0;
+
+	if (use_mbox && roc_model_is_cn10k()) {
+		rc = sso_hws_link_modify_af(dev, hws, sso->link_map[hws], hwgrp, nb_hwgrp, set, 1);
+		if (rc == MBOX_MSG_INVALID)
+			goto lf_access;
+		if (rc < 0)
+			return 0;
+		goto done;
+	}
+lf_access:
 	base = dev->bar2 + (RVU_BLOCK_ADDR_SSOW << 20 | hws << 12);
 	sso_hws_link_modify(hws, base, sso->link_map[hws], hwgrp, nb_hwgrp, set, 1);
-
+done:
 	return nb_hwgrp;
 }
 
 int
-roc_sso_hws_unlink(struct roc_sso *roc_sso, uint8_t hws, uint16_t hwgrp[], uint16_t nb_hwgrp,
-		   uint8_t set)
+roc_sso_hws_unlink(struct roc_sso *roc_sso, uint8_t hws, uint16_t hwgrp[],
+		   uint16_t nb_hwgrp, uint8_t set, bool use_mbox)
 {
-	struct dev *dev = &roc_sso_to_sso_priv(roc_sso)->dev;
-	struct sso *sso;
+	struct sso *sso = roc_sso_to_sso_priv(roc_sso);
+	struct dev *dev = &sso->dev;
 	uintptr_t base;
+	int rc;
 
-	sso = roc_sso_to_sso_priv(roc_sso);
+	if (!nb_hwgrp)
+		return 0;
+
+	if (use_mbox && roc_model_is_cn10k()) {
+		rc = sso_hws_link_modify_af(dev, hws, sso->link_map[hws], hwgrp, nb_hwgrp, set, 0);
+		if (rc == MBOX_MSG_INVALID)
+			goto lf_access;
+		if (rc < 0)
+			return 0;
+		goto done;
+	}
+lf_access:
 	base = dev->bar2 + (RVU_BLOCK_ADDR_SSOW << 20 | hws << 12);
 	sso_hws_link_modify(hws, base, sso->link_map[hws], hwgrp, nb_hwgrp, set, 0);
-
+done:
 	return nb_hwgrp;
 }
 
diff --git a/drivers/common/cnxk/roc_sso.h b/drivers/common/cnxk/roc_sso.h
index 26061f25f8..4ac901762e 100644
--- a/drivers/common/cnxk/roc_sso.h
+++ b/drivers/common/cnxk/roc_sso.h
@@ -85,9 +85,9 @@  int __roc_api roc_sso_hwgrp_set_priority(struct roc_sso *roc_sso,
 					 uint8_t affinity, uint8_t priority);
 uint64_t __roc_api roc_sso_ns_to_gw(uint64_t base, uint64_t ns);
 int __roc_api roc_sso_hws_link(struct roc_sso *roc_sso, uint8_t hws, uint16_t hwgrp[],
-			       uint16_t nb_hwgrp, uint8_t set);
+			       uint16_t nb_hwgrp, uint8_t set, bool use_mbox);
 int __roc_api roc_sso_hws_unlink(struct roc_sso *roc_sso, uint8_t hws, uint16_t hwgrp[],
-				 uint16_t nb_hwgrp, uint8_t set);
+				 uint16_t nb_hwgrp, uint8_t set, bool use_mbox);
 int __roc_api roc_sso_hwgrp_hws_link_status(struct roc_sso *roc_sso,
 					    uint8_t hws, uint16_t hwgrp);
 uintptr_t __roc_api roc_sso_hws_base_get(struct roc_sso *roc_sso, uint8_t hws);
diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
index bb0c910553..221f419055 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -71,7 +71,7 @@  cn10k_sso_hws_link(void *arg, void *port, uint16_t *map, uint16_t nb_link, uint8
 	struct cnxk_sso_evdev *dev = arg;
 	struct cn10k_sso_hws *ws = port;
 
-	return roc_sso_hws_link(&dev->sso, ws->hws_id, map, nb_link, profile);
+	return roc_sso_hws_link(&dev->sso, ws->hws_id, map, nb_link, profile, 0);
 }
 
 static int
@@ -80,7 +80,7 @@  cn10k_sso_hws_unlink(void *arg, void *port, uint16_t *map, uint16_t nb_link, uin
 	struct cnxk_sso_evdev *dev = arg;
 	struct cn10k_sso_hws *ws = port;
 
-	return roc_sso_hws_unlink(&dev->sso, ws->hws_id, map, nb_link, profile);
+	return roc_sso_hws_unlink(&dev->sso, ws->hws_id, map, nb_link, profile, 0);
 }
 
 static void
@@ -111,7 +111,7 @@  cn10k_sso_hws_release(void *arg, void *hws)
 
 	for (i = 0; i < CNXK_SSO_MAX_PROFILES; i++)
 		for (j = 0; j < dev->nb_event_queues; j++)
-			roc_sso_hws_unlink(&dev->sso, ws->hws_id, &j, 1, i);
+			roc_sso_hws_unlink(&dev->sso, ws->hws_id, &j, 1, i, 0);
 	memset(ws, 0, sizeof(*ws));
 }
 
diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c
index 9fb9ca0d63..5e6305947b 100644
--- a/drivers/event/cnxk/cn9k_eventdev.c
+++ b/drivers/event/cnxk/cn9k_eventdev.c
@@ -25,12 +25,12 @@  cn9k_sso_hws_link(void *arg, void *port, uint16_t *map, uint16_t nb_link, uint8_
 	if (dev->dual_ws) {
 		dws = port;
 		rc = roc_sso_hws_link(&dev->sso, CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0), map, nb_link,
-				      profile);
+				      profile, 0);
 		rc |= roc_sso_hws_link(&dev->sso, CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1), map,
-				       nb_link, profile);
+				       nb_link, profile, 0);
 	} else {
 		ws = port;
-		rc = roc_sso_hws_link(&dev->sso, ws->hws_id, map, nb_link, profile);
+		rc = roc_sso_hws_link(&dev->sso, ws->hws_id, map, nb_link, profile, 0);
 	}
 
 	return rc;
@@ -47,12 +47,12 @@  cn9k_sso_hws_unlink(void *arg, void *port, uint16_t *map, uint16_t nb_link, uint
 	if (dev->dual_ws) {
 		dws = port;
 		rc = roc_sso_hws_unlink(&dev->sso, CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0), map,
-					nb_link, profile);
+					nb_link, profile, 0);
 		rc |= roc_sso_hws_unlink(&dev->sso, CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1), map,
-					 nb_link, profile);
+					 nb_link, profile, 0);
 	} else {
 		ws = port;
-		rc = roc_sso_hws_unlink(&dev->sso, ws->hws_id, map, nb_link, profile);
+		rc = roc_sso_hws_unlink(&dev->sso, ws->hws_id, map, nb_link, profile, 0);
 	}
 
 	return rc;
@@ -100,9 +100,9 @@  cn9k_sso_hws_release(void *arg, void *hws)
 		for (i = 0; i < dev->nb_event_queues; i++) {
 			for (k = 0; k < CNXK_SSO_MAX_PROFILES; k++) {
 				roc_sso_hws_unlink(&dev->sso, CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0),
-						   &i, 1, k);
+						   &i, 1, k, 0);
 				roc_sso_hws_unlink(&dev->sso, CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1),
-						   &i, 1, k);
+						   &i, 1, k, 0);
 			}
 		}
 		memset(dws, 0, sizeof(*dws));
@@ -110,7 +110,7 @@  cn9k_sso_hws_release(void *arg, void *hws)
 		ws = hws;
 		for (i = 0; i < dev->nb_event_queues; i++)
 			for (k = 0; k < CNXK_SSO_MAX_PROFILES; k++)
-				roc_sso_hws_unlink(&dev->sso, ws->hws_id, &i, 1, k);
+				roc_sso_hws_unlink(&dev->sso, ws->hws_id, &i, 1, k, 0);
 		memset(ws, 0, sizeof(*ws));
 	}
 }