diff mbox series

[21/31] net/cnxk: fix issue with GCC 4.8

Message ID 20230811085805.441256-21-ndabilpuram@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [01/31] common/cnxk: add aura ref count mechanism |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Nithin Dabilpuram Aug. 11, 2023, 8:57 a.m. UTC 
  Fix issue with GCC 4.8 cross compilation of ARM64 for
flexible vector conversions.

Fixes: ec28231ed260 ("net/cnxk: support reassembly of multi-segment packets")

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
 drivers/net/cnxk/cn10k_rx.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h
index 8148866e44..0dc0b0595c 100644
--- a/drivers/net/cnxk/cn10k_rx.h
+++ b/drivers/net/cnxk/cn10k_rx.h
@@ -164,9 +164,9 @@  nix_sec_reass_frags_get(const struct cpt_parse_hdr_s *hdr, struct rte_mbuf **nex
 	next_mbufs[1] = ((struct rte_mbuf *)vgetq_lane_u64(frags23, 0) - 1);
 	next_mbufs[2] = ((struct rte_mbuf *)vgetq_lane_u64(frags23, 1) - 1);
 
-	fsz_w1 = vdup_n_u64(finfo->w1.u64);
+	fsz_w1 = vreinterpret_u16_u64(vdup_n_u64(finfo->w1.u64));
 	fsz_w1 = vrev16_u8(fsz_w1);
-	return vget_lane_u64(fsz_w1, 0);
+	return vget_lane_u64(vreinterpret_u64_u16(fsz_w1), 0);
 }
 
 static __rte_always_inline void
@@ -174,7 +174,7 @@  nix_sec_reass_first_frag_update(struct rte_mbuf *head, const uint8_t *m_ipptr,
 				uint64_t fsz, uint64_t cq_w1, uint16_t *ihl)
 {
 	union nix_rx_parse_u *rx = (union nix_rx_parse_u *)((uintptr_t)(head + 1) + 8);
-	uint16_t fragx_sum = vaddv_u16(vdup_n_u64(fsz));
+	uint16_t fragx_sum = vaddv_u16(vreinterpret_u16_u64(vdup_n_u64(fsz)));
 	uint8_t lcptr = rx->lcptr;
 	uint16_t tot_len;
 	uint32_t cksum;