diff mbox series

[12/31] common/cnxk: remove unnecessory ROC API calls

Message ID	20230811085805.441256-12-ndabilpuram@marvell.com (mailing list archive)
State	Accepted, archived
Delegated to:	Jerin Jacob
Headers	From: Nithin Dabilpuram <ndabilpuram@marvell.com> To: Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao <skoteshwar@marvell.com> CC: <jerinj@marvell.com>, <dev@dpdk.org>, Akhil Goyal <gakhil@marvell.com> Subject: [PATCH 12/31] common/cnxk: remove unnecessory ROC API calls Date: Fri, 11 Aug 2023 14:27:46 +0530 Message-ID: <20230811085805.441256-12-ndabilpuram@marvell.com> In-Reply-To: <20230811085805.441256-1-ndabilpuram@marvell.com> References: <20230811085805.441256-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: list Errors-To: dev-bounces@dpdk.org
Series	[01/31] common/cnxk: add aura ref count mechanism \| [01/31] common/cnxk: add aura ref count mechanism [02/31] common/cnxk: optimize time while configuring fc on VF [03/31] common/cnxk: use only user sqb slack when provided [04/31] common/cnxk: add workaround for CPT ctx fetch issue [05/31] common/cnxk: support rate limit on PFC TM tree [06/31] common/cnxk: fixes CGX promisc toggling [07/31] common/cnxk: fix xstats for different packet sizes [08/31] common/cnxk: disable BP on SDP link while closing SQ [09/31] common/cnxk: fix leak in error path [10/31] common/cnxk: fix different size bit operations [11/31] common/cnxk: fix different size bit operations [12/31] common/cnxk: remove unnecessory ROC API calls [13/31] common/cnxk: sync MAC addr set mailbox structure [14/31] common/cnxk: add API to get Rx chan count from NIX [15/31] common/cnxk: fix BP threshold calculation [16/31] common/cnxk: allow same TC on multiple RQs [17/31] common/cnxk: expose different params for bp config [18/31] common/cnxk: enable CQ stashing [19/31] common/cnxk: fix incorrect aura ID [20/31] net/cnxk: fix CQ allocation [21/31] net/cnxk: fix issue with GCC 4.8 [22/31] net/cnxk: add mapping of DMAC address indexes [23/31] net/cnxk: support rate limit in PFC TM tree [24/31] net/cnxk: move MAC address set from init to configure [25/31] net/cnxk: update different size bit operations [26/31] net/cnxk: fix uninitialized variable [27/31] net/cnxk: fix usage of mbuf rearm data [28/31] net/cnxk: fix uninitialized variable [29/31] net/cnxk: check returned value for null [30/31] net/cnxk: add flag check for extension header when used [31/31] net/cnxk: fixes for IPv6 header in reassembly

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK

Commit Message

Nithin Dabilpuram Aug. 11, 2023, 8:57 a.m. UTC

  From: Akhil Goyal <gakhil@marvell.com>

Removed the calls to roc_nix_num_rx[tx]_xstats which
does a model check again for cn9k/cn10k.
The model check is already done before the call in the
same leg, hence not needed to call these APIs.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
---
 drivers/common/cnxk/roc_nix_stats.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_nix_stats.c b/drivers/common/cnxk/roc_nix_stats.c
index 1e93191a07..7a9619b39d 100644
--- a/drivers/common/cnxk/roc_nix_stats.c
+++ b/drivers/common/cnxk/roc_nix_stats.c
@@ -400,14 +400,14 @@  roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats,
 		if (rc)
 			goto exit;
 
-		for (i = 0; i < roc_nix_num_rx_xstats(); i++) {
+		for (i = 0; i < CNXK_NIX_NUM_RX_XSTATS_CGX; i++) {
 			xstats[count].value =
 				cgx_resp->rx_stats[nix_rx_xstats_cgx[i].offset];
 			xstats[count].id = count;
 			count++;
 		}
 
-		for (i = 0; i < roc_nix_num_tx_xstats(); i++) {
+		for (i = 0; i < CNXK_NIX_NUM_TX_XSTATS_CGX; i++) {
 			xstats[count].value =
 				cgx_resp->tx_stats[nix_tx_xstats_cgx[i].offset];
 			xstats[count].id = count;
@@ -426,14 +426,14 @@  roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats,
 		if (rc)
 			goto exit;
 
-		for (i = 0; i < roc_nix_num_rx_xstats(); i++) {
+		for (i = 0; i < CNXK_NIX_NUM_RX_XSTATS_RPM; i++) {
 			xstats[count].value =
 				rpm_resp->rx_stats[nix_rx_xstats_rpm[i].offset];
 			xstats[count].id = count;
 			count++;
 		}
 
-		for (i = 0; i < roc_nix_num_tx_xstats(); i++) {
+		for (i = 0; i < CNXK_NIX_NUM_TX_XSTATS_RPM; i++) {
 			xstats[count].value =
 				rpm_resp->tx_stats[nix_tx_xstats_rpm[i].offset];
 			xstats[count].id = count;
@@ -504,26 +504,26 @@  roc_nix_xstats_names_get(struct roc_nix *roc_nix,
 		return count;
 
 	if (roc_model_is_cn9k()) {
-		for (i = 0; i < roc_nix_num_rx_xstats(); i++) {
+		for (i = 0; i < CNXK_NIX_NUM_RX_XSTATS_CGX; i++) {
 			NIX_XSTATS_NAME_PRINT(xstats_names, count,
 					      nix_rx_xstats_cgx, i);
 			count++;
 		}
 
-		for (i = 0; i < roc_nix_num_tx_xstats(); i++) {
+		for (i = 0; i < CNXK_NIX_NUM_TX_XSTATS_CGX; i++) {
 			NIX_XSTATS_NAME_PRINT(xstats_names, count,
 					      nix_tx_xstats_cgx, i);
 			count++;
 		}
 
 	} else {
-		for (i = 0; i < roc_nix_num_rx_xstats(); i++) {
+		for (i = 0; i < CNXK_NIX_NUM_RX_XSTATS_RPM; i++) {
 			NIX_XSTATS_NAME_PRINT(xstats_names, count,
 					      nix_rx_xstats_rpm, i);
 			count++;
 		}
 
-		for (i = 0; i < roc_nix_num_tx_xstats(); i++) {
+		for (i = 0; i < CNXK_NIX_NUM_TX_XSTATS_RPM; i++) {
 			NIX_XSTATS_NAME_PRINT(xstats_names, count,
 					      nix_tx_xstats_rpm, i);
 			count++;