[v1,2/9] baseband/acc: add support for 4GUL with SO and TB
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Commit Message
Implementation to support the case when using LTE
decoder with soft output and transport block mode.
Fixes: bec597b78a0 ("baseband/acc200: add LTE processing")
Cc: stable@dpdk.org
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
drivers/baseband/acc/rte_vrb_pmd.c | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
Comments
On 2/9/23 23:19, Nicolas Chautru wrote:
> Implementation to support the case when using LTE
> decoder with soft output and transport block mode.
>
> Fixes: bec597b78a0 ("baseband/acc200: add LTE processing")
> Cc: stable@dpdk.org
Should it really be a fix and be backported?
It looks like a new feature.
>
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
> drivers/baseband/acc/rte_vrb_pmd.c | 21 +++++++++++----------
> 1 file changed, 11 insertions(+), 10 deletions(-)
>
Thanks,
Maxime
Hi Maxime,
> -----Original Message-----
> From: Maxime Coquelin <maxime.coquelin@redhat.com>
> Sent: Friday, February 10, 2023 12:31 AM
> To: Chautru, Nicolas <nicolas.chautru@intel.com>; dev@dpdk.org
> Cc: Vargas, Hernan <hernan.vargas@intel.com>; stable@dpdk.org
> Subject: Re: [PATCH v1 2/9] baseband/acc: add support for 4GUL with SO and
> TB
>
>
>
> On 2/9/23 23:19, Nicolas Chautru wrote:
> > Implementation to support the case when using LTE decoder with soft
> > output and transport block mode.
> >
> > Fixes: bec597b78a0 ("baseband/acc200: add LTE processing")
> > Cc: stable@dpdk.org
>
> Should it really be a fix and be backported?
> It looks like a new feature.
I was on a fence. The capability exposed would imply this should be supported already, but indeed no need to backport.
I will remove the Fixes in v2, and reorder accordingly the series.
>
> >
> > Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> > ---
> > drivers/baseband/acc/rte_vrb_pmd.c | 21 +++++++++++----------
> > 1 file changed, 11 insertions(+), 10 deletions(-)
> >
>
> Thanks,
> Maxime
@@ -1190,15 +1190,12 @@ vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)
fcw->bypass_sb_deint = !check_bit(op->turbo_dec.op_flags,
RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE);
if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {
- /* FIXME for TB block */
+ fcw->c = op->turbo_dec.tb_params.c;
fcw->k_pos = op->turbo_dec.tb_params.k_pos;
- fcw->k_neg = op->turbo_dec.tb_params.k_neg;
} else {
+ fcw->c = 1;
fcw->k_pos = op->turbo_dec.cb_params.k;
- fcw->k_neg = op->turbo_dec.cb_params.k;
}
- fcw->c = 1;
- fcw->c_neg = 1;
if (check_bit(op->turbo_dec.op_flags, RTE_BBDEV_TURBO_SOFT_OUTPUT)) {
fcw->soft_output_en = 1;
fcw->sw_soft_out_dis = 0;
@@ -1209,8 +1206,14 @@ vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)
if (check_bit(op->turbo_dec.op_flags,
RTE_BBDEV_TURBO_EQUALIZER)) {
fcw->bypass_teq = 0;
- fcw->ea = op->turbo_dec.cb_params.e;
- fcw->eb = op->turbo_dec.cb_params.e;
+ if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {
+ fcw->cab = op->turbo_dec.tb_params.cab;
+ fcw->ea = op->turbo_dec.tb_params.ea;
+ fcw->eb = op->turbo_dec.tb_params.eb;
+ } else {
+ fcw->ea = op->turbo_dec.cb_params.e;
+ fcw->eb = op->turbo_dec.cb_params.e;
+ }
if (op->turbo_dec.rv_index == 0)
fcw->k0_start_col = ACC_FCW_TD_RVIDX_0;
else if (op->turbo_dec.rv_index == 1)
@@ -1387,9 +1390,7 @@ vrb_dma_desc_td_fill(struct rte_bbdev_dec_op *op,
desc->numCBs = 1;
if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {
- k = (r < op->turbo_dec.tb_params.c_neg)
- ? op->turbo_dec.tb_params.k_neg
- : op->turbo_dec.tb_params.k_pos;
+ k = op->turbo_dec.tb_params.k_pos;
e = (r < op->turbo_dec.tb_params.cab)
? op->turbo_dec.tb_params.ea
: op->turbo_dec.tb_params.eb;