diff mbox series

[06/38] net/sfc/base: define max desc number for every EF10 NIC

Message ID 1549556983-10896-7-git-send-email-arybchenko@solarflare.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series net/sfc: update base driver |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Andrew Rybchenko Feb. 7, 2019, 4:29 p.m. UTC 
  From: Igor Romanov <igor.romanov@oktetlabs.ru>

For consistency with defines of min descriptor number, define max
descriptor number for Huntington, Medford and Medford2.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/hunt_impl.h     | 3 +++
 drivers/net/sfc/base/hunt_nic.c      | 4 +++-
 drivers/net/sfc/base/medford2_impl.h | 2 ++
 drivers/net/sfc/base/medford2_nic.c  | 2 +-
 drivers/net/sfc/base/medford_impl.h  | 2 ++
 drivers/net/sfc/base/medford_nic.c   | 2 +-
 6 files changed, 12 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/sfc/base/hunt_impl.h b/drivers/net/sfc/base/hunt_impl.h
index d8dddce8d..0e9a1e280 100644
--- a/drivers/net/sfc/base/hunt_impl.h
+++ b/drivers/net/sfc/base/hunt_impl.h
@@ -16,6 +16,9 @@ 
 extern "C" {
 #endif
 
+#define	HUNT_TXQ_MAXNDESCS			4096
+#define	HUNT_TXQ_MAXNDESCS_BUG35388_WORKAROUND	2048
+
 /* Missing register definitions */
 #ifndef	ER_DZ_TX_PIOBUF_OFST
 #define	ER_DZ_TX_PIOBUF_OFST 0x00001000
diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index adb2b17eb..6605cfce4 100644
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -194,7 +194,9 @@  hunt_board_cfg(
 	 * The workaround for bug35388 uses the top bit of transmit queue
 	 * descriptor writes, preventing the use of 4096 descriptor TXQs.
 	 */
-	encp->enc_txq_max_ndescs = encp->enc_bug35388_workaround ? 2048 : 4096;
+	encp->enc_txq_max_ndescs = encp->enc_bug35388_workaround ?
+	    HUNT_TXQ_MAXNDESCS_BUG35388_WORKAROUND :
+	    HUNT_TXQ_MAXNDESCS;
 	encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
 
 	EFX_STATIC_ASSERT(HUNT_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
diff --git a/drivers/net/sfc/base/medford2_impl.h b/drivers/net/sfc/base/medford2_impl.h
index 6259a700b..87af5f686 100644
--- a/drivers/net/sfc/base/medford2_impl.h
+++ b/drivers/net/sfc/base/medford2_impl.h
@@ -12,6 +12,8 @@  extern "C" {
 #endif
 
 
+#define	MEDFORD2_TXQ_MAXNDESCS	2048
+
 #ifndef	ER_EZ_TX_PIOBUF_SIZE
 #define	ER_EZ_TX_PIOBUF_SIZE	4096
 #endif
diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c
index 2cc87e3a9..020c37fd9 100644
--- a/drivers/net/sfc/base/medford2_nic.c
+++ b/drivers/net/sfc/base/medford2_nic.c
@@ -119,7 +119,7 @@  medford2_board_cfg(
 	 * descriptors are not supported as the top bit is used for vfifo
 	 * stuffing.
 	 */
-	encp->enc_txq_max_ndescs = 2048;
+	encp->enc_txq_max_ndescs = MEDFORD2_TXQ_MAXNDESCS;
 	encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
 
 	EFX_STATIC_ASSERT(MEDFORD2_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);
diff --git a/drivers/net/sfc/base/medford_impl.h b/drivers/net/sfc/base/medford_impl.h
index d076afa2d..1afedc7f3 100644
--- a/drivers/net/sfc/base/medford_impl.h
+++ b/drivers/net/sfc/base/medford_impl.h
@@ -12,6 +12,8 @@  extern "C" {
 #endif
 
 
+#define	MEDFORD_TXQ_MAXNDESCS	2048
+
 #ifndef	ER_EZ_TX_PIOBUF_SIZE
 #define	ER_EZ_TX_PIOBUF_SIZE	4096
 #endif
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index b72881179..171e39b03 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -117,7 +117,7 @@  medford_board_cfg(
 	 * descriptors are not supported as the top bit is used for vfifo
 	 * stuffing.
 	 */
-	encp->enc_txq_max_ndescs = 2048;
+	encp->enc_txq_max_ndescs = MEDFORD_TXQ_MAXNDESCS;
 	encp->enc_txq_min_ndescs = EF10_TXQ_MINNDESCS;
 
 	EFX_STATIC_ASSERT(MEDFORD_PIOBUF_NBUFS <= EF10_MAX_PIOBUF_NBUFS);