[dpdk-dev,1/3] qat: remove atomics
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Commit Message
From: "Burakov, Anatoly" <anatoly.burakov@intel.com>
Replacing atomics in the qat driver with simple 16-bit integers for
number of inflight packets.
This adds a new limitation to the QAT driver: each queue pair is
now explicitly single-threaded.
Signed-off-by: Burakov, Anatoly <anatoly.burakov@intel.com>
---
doc/guides/cryptodevs/qat.rst | 1 +
doc/guides/rel_notes/release_17_11.rst | 6 ++++++
drivers/crypto/qat/qat_crypto.c | 12 +++++-------
drivers/crypto/qat/qat_crypto.h | 2 +-
drivers/crypto/qat/qat_qp.c | 4 ++--
5 files changed, 15 insertions(+), 10 deletions(-)
Comments
> -----Original Message-----
> From: Burakov, Anatoly
> Sent: Friday, August 25, 2017 10:31 AM
> To: dev@dpdk.org
> Cc: Griffin, John <john.griffin@intel.com>; Trahe, Fiona
> <fiona.trahe@intel.com>; Jain, Deepak K <deepak.k.jain@intel.com>; De
> Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>; Burakov, Anatoly
> <anatoly.burakov@intel.com>
> Subject: [DPDK] [PATCH 1/3] qat: remove atomics
Title should be "crypto/qat: remove..."
>
> From: "Burakov, Anatoly" <anatoly.burakov@intel.com>
>
> Replacing atomics in the qat driver with simple 16-bit integers for number
> of inflight packets.
>
> This adds a new limitation to the QAT driver: each queue pair is now
> explicitly single-threaded.
>
> Signed-off-by: Burakov, Anatoly <anatoly.burakov@intel.com>
> ---
> doc/guides/cryptodevs/qat.rst | 1 +
> doc/guides/rel_notes/release_17_11.rst | 6 ++++++
> drivers/crypto/qat/qat_crypto.c | 12 +++++-------
> drivers/crypto/qat/qat_crypto.h | 2 +-
> drivers/crypto/qat/qat_qp.c | 4 ++--
> 5 files changed, 15 insertions(+), 10 deletions(-)
>
...
> diff --git a/doc/guides/rel_notes/release_17_11.rst
> b/doc/guides/rel_notes/release_17_11.rst
> index 170f4f9..67b6f68 100644
> --- a/doc/guides/rel_notes/release_17_11.rst
> +++ b/doc/guides/rel_notes/release_17_11.rst
> @@ -41,6 +41,12 @@ New Features
> Also, make sure to start the actual text at the margin.
>
> =========================================================
>
> +* **Updated qat crypto PMD.**
"qat" should be in capital letters.
> +
> + Performance enhancements:
> +
> + * Removed atomics from the internal queue pair structure.
> +
>
A few performance enhancements for QAT crypto driver. These include:
- Removing reliance on atomics on hot path
- This adds a new limitation, making queue pairs single-threaded
- Coalesce RX and TX CSR writes
v2: added cover letter
fixed commit messages
fixed documentation
Anatoly Burakov (3):
crypto/qat: remove atomics
crypto/qat: enable RX head writes coalescing
crypto/qat: enable TX tail writes coalescing
doc/guides/cryptodevs/qat.rst | 1 +
doc/guides/rel_notes/release_17_11.rst | 8 ++++
drivers/crypto/qat/qat_crypto.c | 84 +++++++++++++++++++++++++---------
drivers/crypto/qat/qat_crypto.h | 15 +++++-
drivers/crypto/qat/qat_qp.c | 4 +-
5 files changed, 88 insertions(+), 24 deletions(-)
> -----Original Message-----
> From: Burakov, Anatoly
> Sent: Tuesday, September 12, 2017 10:31 AM
> To: dev@dpdk.org
> Cc: Trahe, Fiona <fiona.trahe@intel.com>; Griffin, John
> <john.griffin@intel.com>; Jain, Deepak K <deepak.k.jain@intel.com>; De
> Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>
> Subject: [PATCH v2 0/3] performance enhancements for QAT driver
>
> A few performance enhancements for QAT crypto driver. These include:
> - Removing reliance on atomics on hot path
> - This adds a new limitation, making queue pairs single-threaded
> - Coalesce RX and TX CSR writes
>
> v2: added cover letter
> fixed commit messages
> fixed documentation
>
> Anatoly Burakov (3):
> crypto/qat: remove atomics
> crypto/qat: enable RX head writes coalescing
> crypto/qat: enable TX tail writes coalescing
>
> doc/guides/cryptodevs/qat.rst | 1 +
> doc/guides/rel_notes/release_17_11.rst | 8 ++++
> drivers/crypto/qat/qat_crypto.c | 84 +++++++++++++++++++++++++-
> --------
> drivers/crypto/qat/qat_crypto.h | 15 +++++-
> drivers/crypto/qat/qat_qp.c | 4 +-
> 5 files changed, 88 insertions(+), 24 deletions(-)
>
> --
> 2.7.4
Applied to dpdk-next-crypto.
Thanks,
Pablo
@@ -90,6 +90,7 @@ Limitations
* No BSD support as BSD QAT kernel driver not available.
* ZUC EEA3/EIA3 is not supported by dh895xcc devices
* Maximum additional authenticated data (AAD) for GCM is 240 bytes long.
+* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
Installation
@@ -41,6 +41,12 @@ New Features
Also, make sure to start the actual text at the margin.
=========================================================
+* **Updated qat crypto PMD.**
+
+ Performance enhancements:
+
+ * Removed atomics from the internal queue pair structure.
+
Resolved Issues
---------------
@@ -52,7 +52,6 @@
#include <rte_eal.h>
#include <rte_per_lcore.h>
#include <rte_lcore.h>
-#include <rte_atomic.h>
#include <rte_branch_prediction.h>
#include <rte_mempool.h>
#include <rte_mbuf.h>
@@ -946,10 +945,10 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
tail = queue->tail;
/* Find how many can actually fit on the ring */
- overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
- - queue->max_inflights;
+ tmp_qp->inflights16 += nb_ops;
+ overflow = tmp_qp->inflights16 - queue->max_inflights;
if (overflow > 0) {
- rte_atomic16_sub(&tmp_qp->inflights16, overflow);
+ tmp_qp->inflights16 -= overflow;
nb_ops_possible = nb_ops - overflow;
if (nb_ops_possible == 0)
return 0;
@@ -964,8 +963,7 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
* This message cannot be enqueued,
* decrease number of ops that wasn't sent
*/
- rte_atomic16_sub(&tmp_qp->inflights16,
- nb_ops_possible - nb_ops_sent);
+ tmp_qp->inflights16 -= nb_ops_possible - nb_ops_sent;
if (nb_ops_sent == 0)
return 0;
goto kick_tail;
@@ -1037,7 +1035,7 @@ qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
queue->hw_bundle_number,
queue->hw_queue_number, queue->head);
- rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
+ tmp_qp->inflights16 -= msg_counter;
tmp_qp->stats.dequeued_count += msg_counter;
}
return msg_counter;
@@ -77,7 +77,7 @@ struct qat_queue {
struct qat_qp {
void *mmap_bar_addr;
- rte_atomic16_t inflights16;
+ uint16_t inflights16;
struct qat_queue tx_q;
struct qat_queue rx_q;
struct rte_cryptodev_stats stats;
@@ -186,7 +186,7 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
RTE_CACHE_LINE_SIZE);
qp->mmap_bar_addr = pci_dev->mem_resource[0].addr;
- rte_atomic16_init(&qp->inflights16);
+ qp->inflights16 = 0;
if (qat_tx_queue_create(dev, &(qp->tx_q),
queue_pair_id, qp_conf->nb_descriptors, socket_id) != 0) {
@@ -269,7 +269,7 @@ int qat_crypto_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
}
/* Don't free memory if there are still responses to be processed */
- if (rte_atomic16_read(&(qp->inflights16)) == 0) {
+ if (qp->inflights16 == 0) {
qat_queue_delete(&(qp->tx_q));
qat_queue_delete(&(qp->rx_q));
} else {