diff mbox series

[v2] net/ice: fix flow validation for unsupported patterns

Message ID 20200908031505.73237-1-guinanx.sun@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series [v2] net/ice: fix flow validation for unsupported patterns |

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/travis-robot success Travis build: passed
ci/iol-testing success Testing PASS
ci/checkpatch success coding style OK

Commit Message

Guinan Sun Sept. 8, 2020, 3:15 a.m. UTC 
  When loading the OS default package and the pipeline mode is enabled
by the "pipeline-mode-support=1" operation. In this case, the wrong
parser is selected for processing and it will cause the unsupported
patterns(pppoes/pfcp/l2tpv3/esp/ah) to be validated successfully.
This patch corrects the parser selection issue.

Fixes: 47d460d63233 ("net/ice: rework switch filter")
Cc: stable@dpdk.org

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
v2:
* Add parser selector in pipline-mode.
---
 drivers/net/ice/ice_switch_filter.c | 100 ++++++++++++++++++++++------
 1 file changed, 81 insertions(+), 19 deletions(-)

Comments

Qi Zhang Sept. 9, 2020, 8:48 a.m. UTC | #1 
> -----Original Message-----
> From: Sun, GuinanX <guinanx.sun@intel.com>
> Sent: Tuesday, September 8, 2020 11:15 AM
> To: dev@dpdk.org
> Cc: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>; Sun, GuinanX <guinanx.sun@intel.com>;
> stable@dpdk.org
> Subject: [PATCH v2] net/ice: fix flow validation for unsupported patterns
> 
> When loading the OS default package and the pipeline mode is enabled by the
> "pipeline-mode-support=1" operation. In this case, the wrong parser is selected
> for processing and it will cause the unsupported
> patterns(pppoes/pfcp/l2tpv3/esp/ah) to be validated successfully.
> This patch corrects the parser selection issue.
> 
> Fixes: 47d460d63233 ("net/ice: rework switch filter")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Guinan Sun <guinanx.sun@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
diff mbox series

Patch

diff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c
index 24320ac7d..4dfeeef50 100644
--- a/drivers/net/ice/ice_switch_filter.c
+++ b/drivers/net/ice/ice_switch_filter.c
@@ -139,7 +139,42 @@  struct sw_meta {
 
 static struct ice_flow_parser ice_switch_dist_parser_os;
 static struct ice_flow_parser ice_switch_dist_parser_comms;
-static struct ice_flow_parser ice_switch_perm_parser;
+static struct ice_flow_parser ice_switch_perm_parser_os;
+static struct ice_flow_parser ice_switch_perm_parser_comms;
+
+static struct
+ice_pattern_match_item ice_switch_pattern_dist_os[] = {
+	{pattern_ethertype,
+			ICE_SW_INSET_ETHER, ICE_INSET_NONE},
+	{pattern_ethertype_vlan,
+			ICE_SW_INSET_MAC_VLAN, ICE_INSET_NONE},
+	{pattern_eth_arp,
+			ICE_INSET_NONE, ICE_INSET_NONE},
+	{pattern_eth_ipv4,
+			ICE_SW_INSET_MAC_IPV4, ICE_INSET_NONE},
+	{pattern_eth_ipv4_udp,
+			ICE_SW_INSET_MAC_IPV4_UDP, ICE_INSET_NONE},
+	{pattern_eth_ipv4_tcp,
+			ICE_SW_INSET_MAC_IPV4_TCP, ICE_INSET_NONE},
+	{pattern_eth_ipv6,
+			ICE_SW_INSET_MAC_IPV6, ICE_INSET_NONE},
+	{pattern_eth_ipv6_udp,
+			ICE_SW_INSET_MAC_IPV6_UDP, ICE_INSET_NONE},
+	{pattern_eth_ipv6_tcp,
+			ICE_SW_INSET_MAC_IPV6_TCP, ICE_INSET_NONE},
+	{pattern_eth_ipv4_udp_vxlan_eth_ipv4,
+			ICE_SW_INSET_DIST_VXLAN_IPV4, ICE_INSET_NONE},
+	{pattern_eth_ipv4_udp_vxlan_eth_ipv4_udp,
+			ICE_SW_INSET_DIST_VXLAN_IPV4_UDP, ICE_INSET_NONE},
+	{pattern_eth_ipv4_udp_vxlan_eth_ipv4_tcp,
+			ICE_SW_INSET_DIST_VXLAN_IPV4_TCP, ICE_INSET_NONE},
+	{pattern_eth_ipv4_nvgre_eth_ipv4,
+			ICE_SW_INSET_DIST_NVGRE_IPV4, ICE_INSET_NONE},
+	{pattern_eth_ipv4_nvgre_eth_ipv4_udp,
+			ICE_SW_INSET_DIST_NVGRE_IPV4_UDP, ICE_INSET_NONE},
+	{pattern_eth_ipv4_nvgre_eth_ipv4_tcp,
+			ICE_SW_INSET_DIST_NVGRE_IPV4_TCP, ICE_INSET_NONE},
+};
 
 static struct
 ice_pattern_match_item ice_switch_pattern_dist_comms[] = {
@@ -147,6 +182,8 @@  ice_pattern_match_item ice_switch_pattern_dist_comms[] = {
 			ICE_SW_INSET_ETHER, ICE_INSET_NONE},
 	{pattern_ethertype_vlan,
 			ICE_SW_INSET_MAC_VLAN, ICE_INSET_NONE},
+	{pattern_eth_arp,
+			ICE_INSET_NONE, ICE_INSET_NONE},
 	{pattern_eth_ipv4,
 			ICE_SW_INSET_MAC_IPV4, ICE_INSET_NONE},
 	{pattern_eth_ipv4_udp,
@@ -228,7 +265,7 @@  ice_pattern_match_item ice_switch_pattern_dist_comms[] = {
 };
 
 static struct
-ice_pattern_match_item ice_switch_pattern_dist_os[] = {
+ice_pattern_match_item ice_switch_pattern_perm_os[] = {
 	{pattern_ethertype,
 			ICE_SW_INSET_ETHER, ICE_INSET_NONE},
 	{pattern_ethertype_vlan,
@@ -248,25 +285,27 @@  ice_pattern_match_item ice_switch_pattern_dist_os[] = {
 	{pattern_eth_ipv6_tcp,
 			ICE_SW_INSET_MAC_IPV6_TCP, ICE_INSET_NONE},
 	{pattern_eth_ipv4_udp_vxlan_eth_ipv4,
-			ICE_SW_INSET_DIST_VXLAN_IPV4, ICE_INSET_NONE},
+			ICE_SW_INSET_PERM_TUNNEL_IPV4, ICE_INSET_NONE},
 	{pattern_eth_ipv4_udp_vxlan_eth_ipv4_udp,
-			ICE_SW_INSET_DIST_VXLAN_IPV4_UDP, ICE_INSET_NONE},
+			ICE_SW_INSET_PERM_TUNNEL_IPV4_UDP, ICE_INSET_NONE},
 	{pattern_eth_ipv4_udp_vxlan_eth_ipv4_tcp,
-			ICE_SW_INSET_DIST_VXLAN_IPV4_TCP, ICE_INSET_NONE},
+			ICE_SW_INSET_PERM_TUNNEL_IPV4_TCP, ICE_INSET_NONE},
 	{pattern_eth_ipv4_nvgre_eth_ipv4,
-			ICE_SW_INSET_DIST_NVGRE_IPV4, ICE_INSET_NONE},
+			ICE_SW_INSET_PERM_TUNNEL_IPV4, ICE_INSET_NONE},
 	{pattern_eth_ipv4_nvgre_eth_ipv4_udp,
-			ICE_SW_INSET_DIST_NVGRE_IPV4_UDP, ICE_INSET_NONE},
+			ICE_SW_INSET_PERM_TUNNEL_IPV4_UDP, ICE_INSET_NONE},
 	{pattern_eth_ipv4_nvgre_eth_ipv4_tcp,
-			ICE_SW_INSET_DIST_NVGRE_IPV4_TCP, ICE_INSET_NONE},
+			ICE_SW_INSET_PERM_TUNNEL_IPV4_TCP, ICE_INSET_NONE},
 };
 
 static struct
-ice_pattern_match_item ice_switch_pattern_perm[] = {
+ice_pattern_match_item ice_switch_pattern_perm_comms[] = {
 	{pattern_ethertype,
 			ICE_SW_INSET_ETHER, ICE_INSET_NONE},
 	{pattern_ethertype_vlan,
 			ICE_SW_INSET_MAC_VLAN, ICE_INSET_NONE},
+	{pattern_eth_arp,
+		ICE_INSET_NONE, ICE_INSET_NONE},
 	{pattern_eth_ipv4,
 			ICE_SW_INSET_MAC_IPV4, ICE_INSET_NONE},
 	{pattern_eth_ipv4_udp,
@@ -1813,7 +1852,7 @@  ice_switch_init(struct ice_adapter *ad)
 {
 	int ret = 0;
 	struct ice_flow_parser *dist_parser;
-	struct ice_flow_parser *perm_parser = &ice_switch_perm_parser;
+	struct ice_flow_parser *perm_parser;
 
 	if (ad->active_pkg_type == ICE_PKG_TYPE_COMMS)
 		dist_parser = &ice_switch_dist_parser_comms;
@@ -1822,10 +1861,16 @@  ice_switch_init(struct ice_adapter *ad)
 	else
 		return -EINVAL;
 
-	if (ad->devargs.pipe_mode_support)
+	if (ad->devargs.pipe_mode_support) {
+		if (ad->active_pkg_type == ICE_PKG_TYPE_COMMS)
+			perm_parser = &ice_switch_perm_parser_comms;
+		else
+			perm_parser = &ice_switch_perm_parser_os;
+
 		ret = ice_register_parser(perm_parser, ad);
-	else
+	} else {
 		ret = ice_register_parser(dist_parser, ad);
+	}
 	return ret;
 }
 
@@ -1833,17 +1878,25 @@  static void
 ice_switch_uninit(struct ice_adapter *ad)
 {
 	struct ice_flow_parser *dist_parser;
-	struct ice_flow_parser *perm_parser = &ice_switch_perm_parser;
+	struct ice_flow_parser *perm_parser;
 
 	if (ad->active_pkg_type == ICE_PKG_TYPE_COMMS)
 		dist_parser = &ice_switch_dist_parser_comms;
-	else
+	else if (ad->active_pkg_type == ICE_PKG_TYPE_OS_DEFAULT)
 		dist_parser = &ice_switch_dist_parser_os;
+	else
+		return;
+
+	if (ad->devargs.pipe_mode_support) {
+		if (ad->active_pkg_type == ICE_PKG_TYPE_COMMS)
+			perm_parser = &ice_switch_perm_parser_comms;
+		else
+			perm_parser = &ice_switch_perm_parser_os;
 
-	if (ad->devargs.pipe_mode_support)
 		ice_unregister_parser(perm_parser, ad);
-	else
+	} else {
 		ice_unregister_parser(dist_parser, ad);
+	}
 }
 
 static struct
@@ -1877,10 +1930,19 @@  ice_flow_parser ice_switch_dist_parser_comms = {
 };
 
 static struct
-ice_flow_parser ice_switch_perm_parser = {
+ice_flow_parser ice_switch_perm_parser_os = {
+	.engine = &ice_switch_engine,
+	.array = ice_switch_pattern_perm_os,
+	.array_len = RTE_DIM(ice_switch_pattern_perm_os),
+	.parse_pattern_action = ice_switch_parse_pattern_action,
+	.stage = ICE_FLOW_STAGE_PERMISSION,
+};
+
+static struct
+ice_flow_parser ice_switch_perm_parser_comms = {
 	.engine = &ice_switch_engine,
-	.array = ice_switch_pattern_perm,
-	.array_len = RTE_DIM(ice_switch_pattern_perm),
+	.array = ice_switch_pattern_perm_comms,
+	.array_len = RTE_DIM(ice_switch_pattern_perm_comms),
 	.parse_pattern_action = ice_switch_parse_pattern_action,
 	.stage = ICE_FLOW_STAGE_PERMISSION,
 };