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GET /api/patches/97740/?format=api
{ "id": 97740, "url": "https://patches.dpdk.org/api/patches/97740/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210902021505.17607-15-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210902021505.17607-15-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210902021505.17607-15-ndabilpuram@marvell.com", "date": "2021-09-02T02:14:52", "name": "[14/27] common/cnxk: add inline IPsec support in rte flow", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f7b53e3a891f9cbe962779fb8d895ab2d055a6da", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210902021505.17607-15-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 18612, "url": "https://patches.dpdk.org/api/series/18612/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=18612", "date": "2021-09-02T02:14:38", "name": "net/cnxk: support for inline ipsec", "version": 1, "mbox": "https://patches.dpdk.org/series/18612/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/97740/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/97740/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4BFE3A0C4C;\n\tThu, 2 Sep 2021 04:18:21 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DFBCA41176;\n\tThu, 2 Sep 2021 04:17:27 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 217E741144\n for <dev@dpdk.org>; Thu, 2 Sep 2021 04:17:27 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 181HQCpm011801\n for <dev@dpdk.org>; Wed, 1 Sep 2021 19:17:26 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 3atdwq9ht5-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 01 Sep 2021 19:17:26 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Wed, 1 Sep 2021 19:17:24 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Wed, 1 Sep 2021 19:17:24 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id F331B3F704D;\n Wed, 1 Sep 2021 19:17:21 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=bGE2mtAAGFuYtVYQ+swggPOmR0vd/9apncuXPZ7/bKc=;\n b=HMejgsT0WnLr+++WRmfAOkD948snczHnUwM2nTcobVu1BPF7whmpJzg3R+XJFG572sGu\n aX+XcqmKt0naa4pzRcTRuv2PwW2IPRHMUDCPFLrtPP8YR6748Tc2QK/8VbKfPWQ5Q2uz\n R5/P3S8VLKBlGL+qNxn6X3d445v5TBwDjH2JLJjzAxwYIHMmxUSh2jrUuK3Bvvey9Kp+\n uLPqUKTSgAeJBCJRu8Su9Z2iqFLbnnM4bLQoCWUYSi+JBIfKFsWQ5BVesn83q4UJHHzZ\n 5SvI/kwkhFKem1bu6MbAl0U65WmxG7Qss1JQY7QKbtGS88+7ZZeGSs0UUtdRqcgL24lQ rA==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<jerinj@marvell.com>, <schalla@marvell.com>, <dev@dpdk.org>, Satheesh Paul\n <psatheesh@marvell.com>", "Date": "Thu, 2 Sep 2021 07:44:52 +0530", "Message-ID": "<20210902021505.17607-15-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210902021505.17607-1-ndabilpuram@marvell.com>", "References": "<20210902021505.17607-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "5R18UrpMCxQNS-P7t8KLXab1CnFniXEs", "X-Proofpoint-GUID": "5R18UrpMCxQNS-P7t8KLXab1CnFniXEs", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-01_05,2021-09-01_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH 14/27] common/cnxk: add inline IPsec support in\n rte flow", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Satheesh Paul <psatheesh@marvell.com>\n\nAdd support to configure flow rules with inline IPsec action.\n\nSigned-off-by: Satheesh Paul <psatheesh@marvell.com>\n---\n drivers/common/cnxk/roc_nix_inl.h | 4 ++++\n drivers/common/cnxk/roc_nix_inl_dev.c | 3 +++\n drivers/common/cnxk/roc_nix_inl_priv.h | 3 +++\n drivers/common/cnxk/roc_npc_mcam.c | 28 ++++++++++++++++++++++++++--\n 4 files changed, 36 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h\nindex efc5a19..1f7ec4f 100644\n--- a/drivers/common/cnxk/roc_nix_inl.h\n+++ b/drivers/common/cnxk/roc_nix_inl.h\n@@ -107,6 +107,10 @@ struct roc_nix_inl_dev {\n \tstruct plt_pci_device *pci_dev;\n \tuint16_t ipsec_in_max_spi;\n \tbool selftest;\n+\tbool is_multi_channel;\n+\tuint16_t channel;\n+\tuint16_t chan_mask;\n+\n \t/* End of input parameters */\n \n #define ROC_NIX_INL_MEM_SZ (1024)\ndiff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c\nindex 214f183..2dc2188 100644\n--- a/drivers/common/cnxk/roc_nix_inl_dev.c\n+++ b/drivers/common/cnxk/roc_nix_inl_dev.c\n@@ -461,6 +461,9 @@ roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev)\n \tinl_dev->pci_dev = pci_dev;\n \tinl_dev->ipsec_in_max_spi = roc_inl_dev->ipsec_in_max_spi;\n \tinl_dev->selftest = roc_inl_dev->selftest;\n+\tinl_dev->is_multi_channel = roc_inl_dev->is_multi_channel;\n+\tinl_dev->channel = roc_inl_dev->channel;\n+\tinl_dev->chan_mask = roc_inl_dev->chan_mask;\n \n \t/* Initialize base device */\n \trc = dev_init(&inl_dev->dev, pci_dev);\ndiff --git a/drivers/common/cnxk/roc_nix_inl_priv.h b/drivers/common/cnxk/roc_nix_inl_priv.h\nindex ab38062..a302118 100644\n--- a/drivers/common/cnxk/roc_nix_inl_priv.h\n+++ b/drivers/common/cnxk/roc_nix_inl_priv.h\n@@ -45,6 +45,9 @@ struct nix_inl_dev {\n \n \t/* Device arguments */\n \tuint8_t selftest;\n+\tuint16_t channel;\n+\tuint16_t chan_mask;\n+\tbool is_multi_channel;\n \tuint16_t ipsec_in_max_spi;\n };\n \ndiff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c\nindex 8ccaaad..4985d22 100644\n--- a/drivers/common/cnxk/roc_npc_mcam.c\n+++ b/drivers/common/cnxk/roc_npc_mcam.c\n@@ -503,8 +503,11 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,\n {\n \tint use_ctr = (flow->ctr_id == NPC_COUNTER_NONE ? 0 : 1);\n \tstruct npc_mcam_write_entry_req *req;\n+\tstruct nix_inl_dev *inl_dev = NULL;\n \tstruct mbox *mbox = npc->mbox;\n \tstruct mbox_msghdr *rsp;\n+\tstruct idev_cfg *idev;\n+\tuint16_t pf_func = 0;\n \tuint16_t ctr = ~(0);\n \tint rc, idx;\n \tint entry;\n@@ -553,9 +556,30 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow,\n \t\treq->entry_data.kw_mask[idx] = flow->mcam_mask[idx];\n \t}\n \n+\tidev = idev_get_cfg();\n+\tif (idev)\n+\t\tinl_dev = idev->nix_inl_dev;\n+\n \tif (flow->nix_intf == NIX_INTF_RX) {\n-\t\treq->entry_data.kw[0] |= (uint64_t)npc->channel;\n-\t\treq->entry_data.kw_mask[0] |= (BIT_ULL(12) - 1);\n+\t\tif (inl_dev && inl_dev->is_multi_channel &&\n+\t\t (flow->npc_action & NIX_RX_ACTIONOP_UCAST_IPSEC)) {\n+\t\t\treq->entry_data.kw[0] |= (uint64_t)inl_dev->channel;\n+\t\t\treq->entry_data.kw_mask[0] |=\n+\t\t\t\t(uint64_t)inl_dev->chan_mask;\n+\t\t\tpf_func = nix_inl_dev_pffunc_get();\n+\t\t\treq->entry_data.action &= ~(GENMASK(19, 4));\n+\t\t\treq->entry_data.action |= (uint64_t)pf_func << 4;\n+\n+\t\t\tflow->npc_action &= ~(GENMASK(19, 4));\n+\t\t\tflow->npc_action |= (uint64_t)pf_func << 4;\n+\t\t\tflow->mcam_data[0] |= (uint64_t)inl_dev->channel;\n+\t\t\tflow->mcam_mask[0] |= (uint64_t)inl_dev->chan_mask;\n+\t\t} else {\n+\t\t\treq->entry_data.kw[0] |= (uint64_t)npc->channel;\n+\t\t\treq->entry_data.kw_mask[0] |= (BIT_ULL(12) - 1);\n+\t\t\tflow->mcam_data[0] |= (uint64_t)npc->channel;\n+\t\t\tflow->mcam_mask[0] |= (BIT_ULL(12) - 1);\n+\t\t}\n \t} else {\n \t\tuint16_t pf_func = (flow->npc_action >> 4) & 0xffff;\n \n", "prefixes": [ "14/27" ] }