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GET /api/patches/97642/?format=api
{ "id": 97642, "url": "https://patches.dpdk.org/api/patches/97642/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210831203732.3411134-6-michaelba@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210831203732.3411134-6-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210831203732.3411134-6-michaelba@nvidia.com", "date": "2021-08-31T20:37:31", "name": "[5/6] common/mlx5: fix device list operation concurrency", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "be4a915deb5af4d3ea239c66961dea749e10937a", "submitter": { "id": 1949, "url": "https://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210831203732.3411134-6-michaelba@nvidia.com/mbox/", "series": [ { "id": 18580, "url": "https://patches.dpdk.org/api/series/18580/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=18580", "date": "2021-08-31T20:37:26", "name": "mlx5: some independent fixes", "version": 1, "mbox": "https://patches.dpdk.org/series/18580/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/97642/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/97642/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5FBC9A0C58;\n\tTue, 31 Aug 2021 22:38:37 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id F064C41154;\n\tTue, 31 Aug 2021 22:38:11 +0200 (CEST)", "from NAM12-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam12on2051.outbound.protection.outlook.com [40.107.237.51])\n by mails.dpdk.org (Postfix) with ESMTP id 89F784113F;\n Tue, 31 Aug 2021 22:38:10 +0200 (CEST)", "from BN9PR03CA0870.namprd03.prod.outlook.com (2603:10b6:408:13d::35)\n by DM5PR1201MB0217.namprd12.prod.outlook.com (2603:10b6:4:54::7) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4457.24; 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helo=mail.nvidia.com;", "From": "Michael Baum <michaelba@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, <stable@dpdk.org>", "Date": "Tue, 31 Aug 2021 23:37:31 +0300", "Message-ID": "<20210831203732.3411134-6-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210831203732.3411134-1-michaelba@nvidia.com>", "References": "<20210831203732.3411134-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n DRHQMAIL107.nvidia.com (10.27.9.16)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "09ff88f3-7f9a-4602-e794-08d96cbf3dca", "X-MS-TrafficTypeDiagnostic": "DM5PR1201MB0217:", "X-Microsoft-Antispam-PRVS": "\n <DM5PR1201MB021725775243BC8F8D99B33CCCCC9@DM5PR1201MB0217.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:8882;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n NPgmSbCdHgLex6tsw5GKMDvBhM9WlvmQq0l/oeRVeWtCW7je1yhY7mZHZAm5dRdDb/u4Ose6La4uM8FiOnrzsoLS4dJgwNguLH1odCoK4OrAuf11H0AFJTXhrkxGKuVH2HpmvhMHXpFimuLCTDYVXYDj5Hzz3WX/FLShBFqYDmRVkWxVSu0HiEjxrCHdFpd1iJAuBw5VMU0bn2wS+F5H09b2saMSGXH1dHIFAhD2r2+NbNQjPUcS1/w5u9wHE8KKLjel6JN7QYGSckrpG4+yJYv0GR+GCgZgYWVd0Ld64/sN4NSA3FtKL68KYdJM2jtKCn5eRIDP28iEZamS+Jx+SMBtFaWnwjtCbIcjTb2mQ9iu5ZRumnEeD+etO8Zg0eKsefwIlv0CE9qRV68lRfG0C82xIv5SWgtkHOLnfIVYVEOglihpizPKmUI9yqvzQx08nLo0/fsknXgwRTH0OmGSL1iEsdO+85lZL5Id2JJx4RN1y75lEFLejXcy9w185ZS7+NWiG+yGjM8UQE+7GjoZ02lZqtrzE17a0CCaOAcxN1bVwEQhRcCTlj/zcgFi6xgzu4gzckFei+Rx86betP4LlKvkXsFH0PDWk7gttwzoLXxKtdDfiC+GlHevt/oSVn5QCFs3gx8xrM2mIAQBMFuQqFQCmidRajbRqHppLjsQqcPevIlj1aO24yf+wBgef6rQiOM3Q5E+eNYuvYBDvbheog==", "X-Forefront-Antispam-Report": "CIP:216.228.112.35; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid04.nvidia.com; CAT:NONE;\n SFS:(4636009)(39860400002)(346002)(376002)(136003)(396003)(36840700001)(46966006)(8936002)(6916009)(6286002)(6666004)(47076005)(4326008)(450100002)(36860700001)(36756003)(426003)(186003)(1076003)(336012)(2906002)(2616005)(26005)(83380400001)(86362001)(478600001)(8676002)(7696005)(316002)(7636003)(5660300002)(82740400003)(356005)(70586007)(70206006)(16526019)(36906005)(55016002)(82310400003)(54906003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "31 Aug 2021 20:38:07.9257 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 09ff88f3-7f9a-4602-e794-08d96cbf3dca", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.35];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT031.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM5PR1201MB0217", "Subject": "[dpdk-dev] [PATCH 5/6] common/mlx5: fix device list operation\n concurrency", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The MLX5 common driver has a global list of mlx5 devices which are\nprobed.\n\nIn probe function it create one and insert it to the list. Similarly it\nremoves the device in remove function.\nThese operations are not safe as there can be such operations in\nparallel, by different threads.\n\nAdd global lock for the list and use it to insert or remove.\n\nFixes: 8a41f4deccc3 (\"common/mlx5: introduce layer for multiple class drivers\")\nCc: stable@dpdk.org\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\n---\n drivers/common/mlx5/mlx5_common.c | 6 ++++++\n 1 file changed, 6 insertions(+)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c\nindex f6e440dca1..4321cb3a9c 100644\n--- a/drivers/common/mlx5/mlx5_common.c\n+++ b/drivers/common/mlx5/mlx5_common.c\n@@ -50,6 +50,7 @@ static TAILQ_HEAD(mlx5_drivers, mlx5_class_driver) drivers_list =\n /* Head of devices. */\n static TAILQ_HEAD(mlx5_devices, mlx5_common_device) devices_list =\n \t\t\t\tTAILQ_HEAD_INITIALIZER(devices_list);\n+static pthread_mutex_t devices_list_lock;\n \n static const struct {\n \tconst char *name;\n@@ -222,7 +223,9 @@ mlx5_dev_to_pci_str(const struct rte_device *dev, char *addr, size_t size)\n static void\n dev_release(struct mlx5_common_device *dev)\n {\n+\tpthread_mutex_lock(&devices_list_lock);\n \tTAILQ_REMOVE(&devices_list, dev, next);\n+\tpthread_mutex_unlock(&devices_list_lock);\n \trte_free(dev);\n }\n \n@@ -315,7 +318,9 @@ mlx5_common_dev_probe(struct rte_device *eal_dev)\n \t\tif (!dev)\n \t\t\treturn -ENOMEM;\n \t\tdev->dev = eal_dev;\n+\t\tpthread_mutex_lock(&devices_list_lock);\n \t\tTAILQ_INSERT_HEAD(&devices_list, dev, next);\n+\t\tpthread_mutex_unlock(&devices_list_lock);\n \t\tnew_device = true;\n \t}\n \t/*\n@@ -440,6 +445,7 @@ mlx5_common_init(void)\n \tif (mlx5_common_initialized)\n \t\treturn;\n \n+\tpthread_mutex_init(&devices_list_lock, NULL);\n \tmlx5_glue_constructor();\n \tmlx5_common_driver_init();\n \tmlx5_common_initialized = true;\n", "prefixes": [ "5/6" ] }