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GET /api/patches/95410/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 95410,
    "url": "https://patches.dpdk.org/api/patches/95410/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210706133257.3353-24-suanmingm@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210706133257.3353-24-suanmingm@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210706133257.3353-24-suanmingm@nvidia.com",
    "date": "2021-07-06T13:32:54",
    "name": "[v4,23/26] net/mlx5: optimize hash list table allocate on demand",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "a905e84779df00410783406a3dce6367c009419f",
    "submitter": {
        "id": 1887,
        "url": "https://patches.dpdk.org/api/people/1887/?format=api",
        "name": "Suanming Mou",
        "email": "suanmingm@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "https://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210706133257.3353-24-suanmingm@nvidia.com/mbox/",
    "series": [
        {
            "id": 17668,
            "url": "https://patches.dpdk.org/api/series/17668/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17668",
            "date": "2021-07-06T13:32:31",
            "name": "net/mlx5: insertion rate optimization",
            "version": 4,
            "mbox": "https://patches.dpdk.org/series/17668/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/95410/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/95410/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Suanming Mou <suanmingm@nvidia.com>",
        "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>",
        "CC": "<rasland@nvidia.com>, <orika@nvidia.com>, <dev@dpdk.org>",
        "Date": "Tue, 6 Jul 2021 16:32:54 +0300",
        "Message-ID": "<20210706133257.3353-24-suanmingm@nvidia.com>",
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        "Subject": "[dpdk-dev] [PATCH v4 23/26] net/mlx5: optimize hash list table\n allocate on demand",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Currently, all the hash list tables are allocated during start up.\nSince different applications may only use dedicated limited actions,\noptimized the hash list table allocate on demand will save initial\nmemory.\n\nThis commit optimizes hash list table allocate on demand.\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c   | 44 +----------------\n drivers/net/mlx5/mlx5_defs.h       |  6 +++\n drivers/net/mlx5/mlx5_flow_dv.c    | 79 ++++++++++++++++++++++++++++--\n drivers/net/mlx5/windows/mlx5_os.c |  2 -\n 4 files changed, 82 insertions(+), 49 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex cfb33251cf..38c5672436 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -50,8 +50,6 @@\n #include \"mlx5_nl.h\"\n #include \"mlx5_devx.h\"\n \n-#define MLX5_TAGS_HLIST_ARRAY_SIZE\t(1 << 15)\n-\n #ifndef HAVE_IBV_MLX5_MOD_MPW\n #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)\n #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)\n@@ -312,46 +310,6 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)\n \t\t\t\t\t      flow_dv_dest_array_clone_free_cb);\n \tif (!sh->dest_array_list)\n \t\tgoto error;\n-\t/* Create tags hash list table. */\n-\tsnprintf(s, sizeof(s), \"%s_tags\", sh->ibdev_name);\n-\tsh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, false,\n-\t\t\t\t\t  false, sh, flow_dv_tag_create_cb,\n-\t\t\t\t\t  flow_dv_tag_match_cb,\n-\t\t\t\t\t  flow_dv_tag_remove_cb,\n-\t\t\t\t\t  flow_dv_tag_clone_cb,\n-\t\t\t\t\t  flow_dv_tag_clone_free_cb);\n-\tif (!sh->tag_table) {\n-\t\tDRV_LOG(ERR, \"tags with hash creation failed.\");\n-\t\terr = ENOMEM;\n-\t\tgoto error;\n-\t}\n-\tsnprintf(s, sizeof(s), \"%s_hdr_modify\", sh->ibdev_name);\n-\tsh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,\n-\t\t\t\t\t    true, false, sh,\n-\t\t\t\t\t    flow_dv_modify_create_cb,\n-\t\t\t\t\t    flow_dv_modify_match_cb,\n-\t\t\t\t\t    flow_dv_modify_remove_cb,\n-\t\t\t\t\t    flow_dv_modify_clone_cb,\n-\t\t\t\t\t    flow_dv_modify_clone_free_cb);\n-\tif (!sh->modify_cmds) {\n-\t\tDRV_LOG(ERR, \"hdr modify hash creation failed\");\n-\t\terr = ENOMEM;\n-\t\tgoto error;\n-\t}\n-\tsnprintf(s, sizeof(s), \"%s_encaps_decaps\", sh->ibdev_name);\n-\tsh->encaps_decaps = mlx5_hlist_create(s,\n-\t\t\t\t\t      MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,\n-\t\t\t\t\t      true, true, sh,\n-\t\t\t\t\t      flow_dv_encap_decap_create_cb,\n-\t\t\t\t\t      flow_dv_encap_decap_match_cb,\n-\t\t\t\t\t      flow_dv_encap_decap_remove_cb,\n-\t\t\t\t\t      flow_dv_encap_decap_clone_cb,\n-\t\t\t\t\t     flow_dv_encap_decap_clone_free_cb);\n-\tif (!sh->encaps_decaps) {\n-\t\tDRV_LOG(ERR, \"encap decap hash creation failed\");\n-\t\terr = ENOMEM;\n-\t\tgoto error;\n-\t}\n #endif\n #ifdef HAVE_MLX5DV_DR\n \tvoid *domain;\n@@ -396,7 +354,7 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)\n \t\tgoto error;\n \t}\n #endif\n-\tif (!sh->tunnel_hub)\n+\tif (!sh->tunnel_hub && priv->config.dv_miss_info)\n \t\terr = mlx5_alloc_tunnel_hub(sh);\n \tif (err) {\n \t\tDRV_LOG(ERR, \"mlx5_alloc_tunnel_hub failed err=%d\", err);\ndiff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h\nindex ca67ce8213..fe86bb40d3 100644\n--- a/drivers/net/mlx5/mlx5_defs.h\n+++ b/drivers/net/mlx5/mlx5_defs.h\n@@ -188,6 +188,12 @@\n /* Size of the simple hash table for encap decap table. */\n #define MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ (1 << 12)\n \n+/* Size of the hash table for tag table. */\n+#define MLX5_TAGS_HLIST_ARRAY_SIZE\t(1 << 15)\n+\n+/* Size fo the hash table for SFT table. */\n+#define MLX5_FLOW_SFT_HLIST_ARRAY_SIZE\t4096\n+\n /* Hairpin TX/RX queue configuration parameters. */\n #define MLX5_HAIRPIN_QUEUE_STRIDE 6\n #define MLX5_HAIRPIN_JUMBO_LOG_SIZE (14 + 2)\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex b30e5a82ce..9fc50a5daa 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -310,6 +310,41 @@ mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,\n \t}\n }\n \n+static inline struct mlx5_hlist *\n+flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,\n+\t\t     const char *name, uint32_t size, bool direct_key,\n+\t\t     bool lcores_share, void *ctx,\n+\t\t     mlx5_list_create_cb cb_create,\n+\t\t     mlx5_list_match_cb cb_match,\n+\t\t     mlx5_list_remove_cb cb_remove,\n+\t\t     mlx5_list_clone_cb cb_clone,\n+\t\t     mlx5_list_clone_free_cb cb_clone_free)\n+{\n+\tstruct mlx5_hlist *hl;\n+\tstruct mlx5_hlist *expected = NULL;\n+\tchar s[MLX5_NAME_SIZE];\n+\n+\thl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);\n+\tif (likely(hl))\n+\t\treturn hl;\n+\tsnprintf(s, sizeof(s), \"%s_%s\", sh->ibdev_name, name);\n+\thl = mlx5_hlist_create(s, size, direct_key, lcores_share,\n+\t\t\tctx, cb_create, cb_match, cb_remove, cb_clone,\n+\t\t\tcb_clone_free);\n+\tif (!hl) {\n+\t\tDRV_LOG(ERR, \"%s hash creation failed\", name);\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\tif (!__atomic_compare_exchange_n(phl, &expected, hl, false,\n+\t\t\t\t\t __ATOMIC_SEQ_CST,\n+\t\t\t\t\t __ATOMIC_SEQ_CST)) {\n+\t\tmlx5_hlist_destroy(hl);\n+\t\thl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);\n+\t}\n+\treturn hl;\n+}\n+\n /* Update VLAN's VID/PCP based on input rte_flow_action.\n  *\n  * @param[in] action\n@@ -3724,8 +3759,20 @@ flow_dv_encap_decap_resource_register\n \t\t.error = error,\n \t\t.data = resource,\n \t};\n+\tstruct mlx5_hlist *encaps_decaps;\n \tuint64_t key64;\n \n+\tencaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,\n+\t\t\t\t\"encaps_decaps\",\n+\t\t\t\tMLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,\n+\t\t\t\ttrue, true, sh,\n+\t\t\t\tflow_dv_encap_decap_create_cb,\n+\t\t\t\tflow_dv_encap_decap_match_cb,\n+\t\t\t\tflow_dv_encap_decap_remove_cb,\n+\t\t\t\tflow_dv_encap_decap_clone_cb,\n+\t\t\t\tflow_dv_encap_decap_clone_free_cb);\n+\tif (unlikely(!encaps_decaps))\n+\t\treturn -rte_errno;\n \tresource->flags = dev_flow->dv.group ? 0 : 1;\n \tkey64 =  __rte_raw_cksum(&encap_decap_key.v32,\n \t\t\t\t sizeof(encap_decap_key.v32), 0);\n@@ -3733,7 +3780,7 @@ flow_dv_encap_decap_resource_register\n \t    MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&\n \t    resource->size)\n \t\tkey64 = __rte_raw_cksum(resource->buf, resource->size, key64);\n-\tentry = mlx5_hlist_register(sh->encaps_decaps, key64, &ctx);\n+\tentry = mlx5_hlist_register(encaps_decaps, key64, &ctx);\n \tif (!entry)\n \t\treturn -rte_errno;\n \tresource = container_of(entry, typeof(*resource), entry);\n@@ -5739,8 +5786,20 @@ flow_dv_modify_hdr_resource_register\n \t\t.error = error,\n \t\t.data = resource,\n \t};\n+\tstruct mlx5_hlist *modify_cmds;\n \tuint64_t key64;\n \n+\tmodify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,\n+\t\t\t\t\"hdr_modify\",\n+\t\t\t\tMLX5_FLOW_HDR_MODIFY_HTABLE_SZ,\n+\t\t\t\ttrue, false, sh,\n+\t\t\t\tflow_dv_modify_create_cb,\n+\t\t\t\tflow_dv_modify_match_cb,\n+\t\t\t\tflow_dv_modify_remove_cb,\n+\t\t\t\tflow_dv_modify_clone_cb,\n+\t\t\t\tflow_dv_modify_clone_free_cb);\n+\tif (unlikely(!modify_cmds))\n+\t\treturn -rte_errno;\n \tresource->root = !dev_flow->dv.group;\n \tif (resource->actions_num > flow_dv_modify_hdr_action_max(dev,\n \t\t\t\t\t\t\t\tresource->root))\n@@ -5748,7 +5807,7 @@ flow_dv_modify_hdr_resource_register\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_ACTION, NULL,\n \t\t\t\t\t  \"too many modify header items\");\n \tkey64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);\n-\tentry = mlx5_hlist_register(sh->modify_cmds, key64, &ctx);\n+\tentry = mlx5_hlist_register(modify_cmds, key64, &ctx);\n \tif (!entry)\n \t\treturn -rte_errno;\n \tresource = container_of(entry, typeof(*resource), entry);\n@@ -10530,8 +10589,20 @@ flow_dv_tag_resource_register\n \t\t\t\t\t.error = error,\n \t\t\t\t\t.data = &tag_be24,\n \t\t\t\t\t};\n-\n-\tentry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, &ctx);\n+\tstruct mlx5_hlist *tag_table;\n+\n+\ttag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,\n+\t\t\t\t      \"tags\",\n+\t\t\t\t      MLX5_TAGS_HLIST_ARRAY_SIZE,\n+\t\t\t\t      false, false, priv->sh,\n+\t\t\t\t      flow_dv_tag_create_cb,\n+\t\t\t\t      flow_dv_tag_match_cb,\n+\t\t\t\t      flow_dv_tag_remove_cb,\n+\t\t\t\t      flow_dv_tag_clone_cb,\n+\t\t\t\t      flow_dv_tag_clone_free_cb);\n+\tif (unlikely(!tag_table))\n+\t\treturn -rte_errno;\n+\tentry = mlx5_hlist_register(tag_table, tag_be24, &ctx);\n \tif (entry) {\n \t\tresource = container_of(entry, struct mlx5_flow_dv_tag_resource,\n \t\t\t\t\tentry);\ndiff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nindex a04f93e1d4..5da362a9d5 100644\n--- a/drivers/net/mlx5/windows/mlx5_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -30,8 +30,6 @@\n #include \"mlx5_flow.h\"\n #include \"mlx5_devx.h\"\n \n-#define MLX5_TAGS_HLIST_ARRAY_SIZE 8192\n-\n static const char *MZ_MLX5_PMD_SHARED_DATA = \"mlx5_pmd_shared_data\";\n \n /* Spinlock for mlx5_shared_data allocation. */\n",
    "prefixes": [
        "v4",
        "23/26"
    ]
}