get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/95144/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 95144,
    "url": "https://patches.dpdk.org/api/patches/95144/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210701132609.53727-16-shirik@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210701132609.53727-16-shirik@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210701132609.53727-16-shirik@nvidia.com",
    "date": "2021-07-01T13:26:09",
    "name": "[v5,15/15] test/crypto: add mlx5 multi segment tests",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "bcaacdf6319c55e5199050253767ebede35e81ba",
    "submitter": {
        "id": 1894,
        "url": "https://patches.dpdk.org/api/people/1894/?format=api",
        "name": "Shiri Kuzin",
        "email": "shirik@nvidia.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210701132609.53727-16-shirik@nvidia.com/mbox/",
    "series": [
        {
            "id": 17580,
            "url": "https://patches.dpdk.org/api/series/17580/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17580",
            "date": "2021-07-01T13:25:54",
            "name": "drivers: introduce mlx5 crypto PMD",
            "version": 5,
            "mbox": "https://patches.dpdk.org/series/17580/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/95144/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/95144/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 928D9A0A0C;\n\tThu,  1 Jul 2021 15:28:31 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A9B2841339;\n\tThu,  1 Jul 2021 15:27:27 +0200 (CEST)",
            "from NAM11-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam11on2040.outbound.protection.outlook.com [40.107.236.40])\n by mails.dpdk.org (Postfix) with ESMTP id D36954132C\n for <dev@dpdk.org>; Thu,  1 Jul 2021 15:27:24 +0200 (CEST)",
            "from BN9PR03CA0477.namprd03.prod.outlook.com (2603:10b6:408:139::32)\n by CY4PR1201MB0103.namprd12.prod.outlook.com (2603:10b6:910:17::12)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4264.20; Thu, 1 Jul\n 2021 13:27:23 +0000",
            "from BN8NAM11FT055.eop-nam11.prod.protection.outlook.com\n (2603:10b6:408:139:cafe::84) by BN9PR03CA0477.outlook.office365.com\n (2603:10b6:408:139::32) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4287.21 via Frontend\n Transport; Thu, 1 Jul 2021 13:27:23 +0000",
            "from mail.nvidia.com (216.228.112.34) by\n BN8NAM11FT055.mail.protection.outlook.com (10.13.177.62) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id\n 15.20.4287.22 via Frontend Transport; Thu, 1 Jul 2021 13:27:22 +0000",
            "from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com\n (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 1 Jul\n 2021 13:27:13 +0000"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=Gy8YGYiNKY/MW57TETShrz8ZIv4keitpBnnaxjfRmJfYAk8QY1jyujp2nKJc6qpb9jDkVSjiuOoZ+nCA/XTDH15U+lxRjvNzY2Ls08Pu3r5Jcotsi2w4dv+Bqek/3i4Zox92qzrLUo2O11n0twsKcEMdcnW5zuqgxPj6BWmg8VCZFo658yGo9SEN4/aGPNzHzWhptBbdEyyPyPVB/gnBdIOdITcApOCKMxaStlKhrkMhHzgqqDbGga30Av6YsosfS4zwwmYNAsVh3HK1VDZ+ISLUf9zh1AYX9uubbVIrw+S4xpMEruBG3D13ssfQAREyFhIHssLWp5+H/SwgwDqU4Q==",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=I7vSkIeD6SePoUmOZZj2jwOrC8YCW1XCuSd+iJGGhb4=;\n b=Hiht5Zn6ISu9d1pZ+nErkTIBlNtr6knpk+2luUwDZD5gIN89W+jHYSXarHyEQPRaUlu78hTA3DDEbmrReYtNElEq1X8I+FW+Ta0lK8uUS5dTCvc4yJzBv+q1mzG26mdS/nDwkyRXTzOzLNvzc8qVL+90T50GCLlbeHsxTT6x2ybWDXCVT1tX/EU91LmO8CY9ISzHX79DdGOXabjHQBgXWjCM0oWPoVTx4DXxgJWU+CLqgRh6Dw3ka7mzHmpHHe4dZnEgIjMECEaEHEnm8qTqlIxZV65mqsh5u/gtufcnO9lS+IF6v7EH3LaZK/2mYuM9j/eR4nAq9pJ5FmJWuyRgzg==",
        "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=marvell.com smtp.mailfrom=nvidia.com;\n dmarc=pass (p=none sp=none pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=I7vSkIeD6SePoUmOZZj2jwOrC8YCW1XCuSd+iJGGhb4=;\n b=fpCs8UWKLeYDdyooJk5AiiDG1ES5JNDrEH0ddskse1kb9BBFFu5/5vJKvvulhzlJ2EzDQFzdXTt5mHf+tQVEC1Ap0nRaM0vkoSyo3YvrwFPsA44LZLXQoqB2sMUBYY47d1gNKKYfkUHKbGrN6F9sfqLXv4nj3IYcEZWEjLAup3AsrsOtT8dIYsGQoCx96w78eFJENgVqvulDYa59O7a/Lt3bZPHx+qBBHjU8mnJMYYE/HsbXyy2p72Wx4064aKkf7+cN1plTKsJtRZCErl9PPdWP2rDHJSuyk82vthYP9VS/Il2bkcv7FuX+837OmCvdC6J2Y7uu6pv7GAwu+owZdg==",
        "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; marvell.com; dkim=none (message not signed)\n header.d=none;marvell.com; dmarc=pass action=none header.from=nvidia.com;",
        "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;",
        "From": "Shiri Kuzin <shirik@nvidia.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<matan@nvidia.com>, <gakhil@marvell.com>, <suanmingm@nvidia.com>",
        "Date": "Thu, 1 Jul 2021 16:26:09 +0300",
        "Message-ID": "<20210701132609.53727-16-shirik@nvidia.com>",
        "X-Mailer": "git-send-email 2.27.0",
        "In-Reply-To": "<20210701132609.53727-1-shirik@nvidia.com>",
        "References": "<20210509160507.224644-1-matan@nvidia.com>\n <20210701132609.53727-1-shirik@nvidia.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[172.20.187.6]",
        "X-ClientProxiedBy": "HQMAIL107.nvidia.com (172.20.187.13) To\n HQMAIL107.nvidia.com (172.20.187.13)",
        "X-EOPAttributedMessage": "0",
        "X-MS-PublicTrafficType": "Email",
        "X-MS-Office365-Filtering-Correlation-Id": "b939331b-2c17-47b2-e7b3-08d93c93f5a6",
        "X-MS-TrafficTypeDiagnostic": "CY4PR1201MB0103:",
        "X-Microsoft-Antispam-PRVS": "\n <CY4PR1201MB010325FE52CA02A39E5A8050AA009@CY4PR1201MB0103.namprd12.prod.outlook.com>",
        "X-MS-Oob-TLC-OOBClassifiers": "OLM:3276;",
        "X-MS-Exchange-SenderADCheck": "1",
        "X-Microsoft-Antispam": "BCL:0;",
        "X-Microsoft-Antispam-Message-Info": "\n wy/Vcy8oPntxaZ8OshnnI5qKRDIhvpCVaD9/GgCx6qOAOaX1OXXNgs3hGfrcL79uM4Q1zgcyk4mRFen3BigD4R2iEc+qUrqiAggqH/pjkhO+BhbreT8A+P4yYyxw3uEBd3nlLC3vmIMviWn/h5NfFGNuyP89x9JwBETOxhza5To2zSVYm8RJcACDxv3UZWrE0Iqk+014cZMkz4Aolke0CwSorzp8zKdtfUfWY9wnHLiCWWYSea1rGugPKuEd8hUqReu7cRkW9xwu3Hr51E9QEgrfvTQPjax9QXYGP3UV57I/KCqVgyzZE/vTJYpQVv5hnj786+i13sovrWWmORE21WtgdpuCU+MhqdYirfK6ZIhtzXH7Rq4rA3uNvD+Gw2Y06c1Q+qImYg2mm+RV4PdwRRDZioMCFmHHXAKlc4EwzRKn7JH0ULQP/LIyHTOpL9vKlzkWjFui7aCTgFIu9XmfKYbL6vmYQFERgOiHA2m++8t0EOMaJge/TDucEE110lkae+g/YjIPHEVHa2y0Ka8BXk/GsCj6k4XjTalISWPlgKX5wMN7yaIf0pnyM8CBOqVORJVJEba1N1MwTtfnlKzqDVjP8ATsOCQUMkK/EeSnYawbhvsFnHWJFo0V411G+68xQI8RTFTMctKmrGHKeEcwDKy03tShqCyAVN6LBm+CsNYcD7uMbD9Vn9VwsGH2TNVbw7i5GfYauc5NjXY/tRG78Q==",
        "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(39860400002)(346002)(376002)(136003)(396003)(36840700001)(46966006)(82740400003)(6666004)(2906002)(47076005)(7636003)(70206006)(83380400001)(186003)(70586007)(16526019)(26005)(7696005)(8936002)(107886003)(2616005)(36756003)(6286002)(426003)(54906003)(316002)(336012)(4326008)(478600001)(30864003)(55016002)(36860700001)(1076003)(6916009)(5660300002)(356005)(82310400003)(86362001)(8676002);\n DIR:OUT; SFP:1101;",
        "X-OriginatorOrg": "Nvidia.com",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "01 Jul 2021 13:27:22.6852 (UTC)",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n b939331b-2c17-47b2-e7b3-08d93c93f5a6",
        "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a",
        "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]",
        "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT055.eop-nam11.prod.protection.outlook.com",
        "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous",
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY4PR1201MB0103",
        "Subject": "[dpdk-dev] [PATCH v5 15/15] test/crypto: add mlx5 multi segment\n tests",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The crypto mlx5 driver supports multi segment encryption and decryption\noperations.\n\nAdded mlx5 multi segment encryption function and multi segment\ndecryption function that will both use the mlx5 vectors.\n\nThe added tests will test both data integrity and correct stat values.\n\nSigned-off-by: Shiri Kuzin <shirik@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n app/test/test_cryptodev.c                   | 277 ++++++++++++++++++++\n app/test/test_cryptodev_mlx5_test_vectors.h |   3 -\n 2 files changed, 277 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c\nindex 8dbe324b81..4d27a9444c 100644\n--- a/app/test/test_cryptodev.c\n+++ b/app/test/test_cryptodev.c\n@@ -6681,6 +6681,219 @@ test_mlx5_decryption(const struct mlx5_test_data *tdata)\n \treturn 0;\n }\n \n+static int\n+test_mlx5_encryption_sgl(const struct mlx5_test_data *tdata)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct crypto_unittest_params *ut_params = &unittest_params;\n+\tstruct rte_cryptodev_sym_capability_idx cap_idx;\n+\tstruct rte_cryptodev_info dev_info;\n+\tstruct rte_cryptodev_stats stats;\n+\tuint8_t buffer[10000];\n+\tconst uint8_t *ciphertext;\n+\tconst uint8_t *reference_ciphertext;\n+\tuint64_t feat_flags;\n+\tunsigned int plaintext_pad_len;\n+\tunsigned int plaintext_len;\n+\tint retval;\n+\n+\t/* Verify the capabilities */\n+\tcap_idx.type = RTE_CRYPTO_SYM_XFORM_CIPHER;\n+\tcap_idx.algo.cipher = RTE_CRYPTO_CIPHER_AES_XTS;\n+\tif (rte_cryptodev_sym_capability_get(ts_params->valid_devs[0],\n+\t\t\t&cap_idx) == NULL)\n+\t\treturn TEST_SKIPPED;\n+\trte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info);\n+\tfeat_flags = dev_info.feature_flags;\n+\tif (!(feat_flags & RTE_CRYPTODEV_FF_IN_PLACE_SGL)) {\n+\t\tprintf(\"Device doesn't support in-place scatter-gather. \"\n+\t\t\t\t\"Test Skipped.\\n\");\n+\t\treturn TEST_SKIPPED;\n+\t}\n+\tif ((global_api_test_type == CRYPTODEV_RAW_API_TEST) &&\n+\t\t\t(!(feat_flags & RTE_CRYPTODEV_FF_SYM_RAW_DP))) {\n+\t\tprintf(\"Device doesn't support RAW data-path APIs.\\n\");\n+\t\treturn TEST_SKIPPED;\n+\t}\n+\tif (gbl_action_type == RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO)\n+\t\treturn TEST_SKIPPED;\n+\t/* Create mlx5 session */\n+\tretval = create_wireless_algo_cipher_session(ts_params->valid_devs[0],\n+\t\t\t\t\tRTE_CRYPTO_CIPHER_OP_ENCRYPT,\n+\t\t\t\t\tRTE_CRYPTO_CIPHER_AES_XTS,\n+\t\t\t\t\ttdata->key.data, tdata->key.len,\n+\t\t\t\t\ttdata->cipher_iv.len, 0);\n+\tif (retval < 0)\n+\t\treturn retval;\n+\tplaintext_len = ceil_byte_length(tdata->plaintext.len);\n+\t/* Append data which is padded to a multiple */\n+\t/* of the algorithms block size */\n+\tplaintext_pad_len = RTE_ALIGN_CEIL(plaintext_len, 8);\n+\tut_params->ibuf = create_segmented_mbuf(ts_params->mbuf_pool,\n+\t\t\tplaintext_pad_len, 8, 0);\n+\tif (unlikely(ut_params->ibuf == NULL))\n+\t\treturn -ENOMEM;\n+\tpktmbuf_write(ut_params->ibuf, 0, plaintext_len, tdata->plaintext.data);\n+\tdebug_hexdump(stdout, \"plaintext:\", tdata->plaintext.data,\n+\t\t      plaintext_len);\n+\t/* Create mlx5 operation */\n+\tretval = create_wireless_algo_cipher_operation(tdata->cipher_iv.data,\n+\t\t\t\ttdata->cipher_iv.len, (tdata->cipher.len_bits),\n+\t\t\t\t(tdata->cipher.offset_bits));\n+\tif (retval < 0)\n+\t\treturn retval;\n+\tif (global_api_test_type == CRYPTODEV_RAW_API_TEST)\n+\t\tprocess_sym_raw_dp_op(ts_params->valid_devs[0], 0,\n+\t\t\t\tut_params->op, 1, 0, 1, tdata->cipher_iv.len);\n+\telse\n+\t\tut_params->op = process_crypto_request(ts_params->valid_devs[0],\n+\t\t\t\t\t\tut_params->op);\n+\tTEST_ASSERT_NOT_NULL(ut_params->op, \"failed to retrieve obuf\");\n+\tut_params->obuf = ut_params->op->sym->m_dst;\n+\tif (ut_params->obuf)\n+\t\tciphertext = rte_pktmbuf_read(ut_params->obuf, 0,\n+\t\t\t\tplaintext_len, buffer);\n+\telse\n+\t\tciphertext = rte_pktmbuf_read(ut_params->ibuf,\n+\t\t\t\ttdata->cipher.offset_bits,\n+\t\t\t\tplaintext_len, buffer);\n+\tif (unlikely(ciphertext == NULL))\n+\t\treturn -ENOMEM;\n+\t/* Validate obuf */\n+\tdebug_hexdump(stdout, \"ciphertext:\", ciphertext, plaintext_len);\n+\treference_ciphertext = tdata->ciphertext.data +\n+\t\t\t\ttdata->cipher.offset_bits;\n+\t/* Validate obuf */\n+\tTEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(\n+\t\tciphertext,\n+\t\treference_ciphertext,\n+\t\ttdata->validCipherLenInBits.len,\n+\t\t\"MLX5 Ciphertext data not as expected\");\n+\t/* Validate stats */\n+\tTEST_ASSERT_SUCCESS(rte_cryptodev_stats_get(ts_params->valid_devs[0],\n+\t\t\t&stats),\n+\t\t\"rte_cryptodev_stats_get failed\");\n+\tTEST_ASSERT((stats.enqueued_count == 1),\n+\t\t\"rte_cryptodev_stats_get returned unexpected enqueued stat\");\n+\tTEST_ASSERT((stats.dequeued_count == 1),\n+\t\t   \"rte_cryptodev_stats_get returned unexpected dequeued stat\");\n+\tTEST_ASSERT((stats.enqueue_err_count == 0),\n+\t\t   \"rte_cryptodev_stats_get returned error enqueued stat\");\n+\tTEST_ASSERT((stats.dequeue_err_count == 0),\n+\t\t   \"rte_cryptodev_stats_get returned error dequeued stat\");\n+\treturn 0;\n+}\n+\n+static int\n+test_mlx5_decryption_sgl(const struct mlx5_test_data *tdata)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct crypto_unittest_params *ut_params = &unittest_params;\n+\tstruct rte_cryptodev_sym_capability_idx cap_idx;\n+\tstruct rte_cryptodev_stats stats;\n+\tstruct rte_cryptodev_info dev_info;\n+\tuint8_t *ciphertext;\n+\tconst uint8_t *plaintext;\n+\tconst uint8_t *reference_plaintext;\n+\tuint8_t buffer[10000];\n+\tuint64_t feat_flags;\n+\tunsigned int ciphertext_pad_len;\n+\tunsigned int ciphertext_len;\n+\tint retval;\n+\n+\trte_cryptodev_info_get(ts_params->valid_devs[0], &dev_info);\n+\tfeat_flags = dev_info.feature_flags;\n+\tif ((global_api_test_type == CRYPTODEV_RAW_API_TEST) &&\n+\t\t\t(!(feat_flags & RTE_CRYPTODEV_FF_SYM_RAW_DP))) {\n+\t\tprintf(\"Device doesn't support RAW data-path APIs.\\n\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\tif (gbl_action_type == RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO)\n+\t\treturn -ENOTSUP;\n+\t/* Verify the capabilities */\n+\tcap_idx.type = RTE_CRYPTO_SYM_XFORM_CIPHER;\n+\tcap_idx.algo.cipher = RTE_CRYPTO_CIPHER_AES_XTS;\n+\tif (rte_cryptodev_sym_capability_get(ts_params->valid_devs[0],\n+\t\t\t&cap_idx) == NULL)\n+\t\treturn -ENOTSUP;\n+\t/* Create mlx5 session */\n+\tretval = create_wireless_algo_cipher_session(ts_params->valid_devs[0],\n+\t\t\t\t\tRTE_CRYPTO_CIPHER_OP_DECRYPT,\n+\t\t\t\t\tRTE_CRYPTO_CIPHER_AES_XTS,\n+\t\t\t\t\ttdata->key.data, tdata->key.len,\n+\t\t\t\t\ttdata->cipher_iv.len, 0);\n+\tif (retval < 0)\n+\t\treturn retval;\n+\tut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);\n+\tif (unlikely(ut_params->ibuf == NULL))\n+\t\treturn -ENOMEM;\n+\t/* Clear mbuf payload */\n+\tmemset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,\n+\t       rte_pktmbuf_tailroom(ut_params->ibuf));\n+\tciphertext_len = ceil_byte_length(tdata->ciphertext.len);\n+\t/* Append data which is padded to a multiple */\n+\t/* of the algorithms block size */\n+\tciphertext_pad_len = RTE_ALIGN_CEIL(ciphertext_len, 8);\n+\tciphertext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,\n+\t\t\t\tciphertext_pad_len);\n+\tif (unlikely(ciphertext == NULL))\n+\t\treturn -ENOMEM;\n+\tut_params->ibuf = create_segmented_mbuf(ts_params->mbuf_pool,\n+\t\t\tciphertext_pad_len, 8, 0);\n+\tif (unlikely(ut_params->ibuf == NULL))\n+\t\treturn -ENOMEM;\n+\tpktmbuf_write(ut_params->ibuf, 0, ciphertext_len,\n+\t\t\ttdata->ciphertext.data);\n+\tmemcpy(ciphertext, tdata->ciphertext.data, ciphertext_len);\n+\tif (unlikely(ciphertext == NULL))\n+\t\treturn -ENOMEM;\n+\tdebug_hexdump(stdout, \"ciphertext:\", ciphertext, ciphertext_len);\n+\t/* Create mlx5 operation */\n+\tretval = create_wireless_algo_cipher_operation(tdata->cipher_iv.data,\n+\t\t\t\ttdata->cipher_iv.len, (tdata->cipher.len_bits),\n+\t\t\t\t(tdata->cipher.offset_bits));\n+\tif (retval < 0)\n+\t\treturn retval;\n+\tif (global_api_test_type == CRYPTODEV_RAW_API_TEST)\n+\t\tprocess_sym_raw_dp_op(ts_params->valid_devs[0], 0,\n+\t\t\t\tut_params->op, 1, 0, 1, 0);\n+\telse\n+\t\tut_params->op = process_crypto_request(ts_params->valid_devs[0],\n+\t\t\t\t\t\tut_params->op);\n+\tTEST_ASSERT_NOT_NULL(ut_params->op, \"failed to retrieve obuf\");\n+\tut_params->obuf = ut_params->op->sym->m_dst;\n+\tif (ut_params->obuf)\n+\t\tplaintext = rte_pktmbuf_read(ut_params->obuf, 0,\n+\t\t\t\tciphertext_len, buffer);\n+\telse\n+\t\tplaintext = rte_pktmbuf_read(ut_params->ibuf,\n+\t\t\t\ttdata->cipher.offset_bits,\n+\t\t\t\tciphertext_len, buffer);\n+\tdebug_hexdump(stdout, \"plaintext:\", plaintext, ciphertext_len);\n+\treference_plaintext = tdata->plaintext.data +\n+\t\t\t\t(tdata->cipher.offset_bits);\n+\t/* Validate obuf */\n+\tTEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(\n+\t\tplaintext,\n+\t\treference_plaintext,\n+\t\ttdata->validCipherLenInBits.len,\n+\t\t\"MLX5 Plaintext data not as expected\");\n+\t/* Validate stats */\n+\tTEST_ASSERT_SUCCESS(rte_cryptodev_stats_get(ts_params->valid_devs[0],\n+\t\t\t&stats),\n+\t\t\"rte_cryptodev_stats_get failed\");\n+\tTEST_ASSERT((stats.enqueued_count == 1),\n+\t\t\"rte_cryptodev_stats_get returned unexpected enqueued stat\");\n+\tTEST_ASSERT((stats.dequeued_count == 1),\n+\t\t   \"rte_cryptodev_stats_get returned unexpected dequeued stat\");\n+\tTEST_ASSERT((stats.enqueue_err_count == 0),\n+\t\t   \"rte_cryptodev_stats_get returned error enqueued stat\");\n+\tTEST_ASSERT((stats.dequeue_err_count == 0),\n+\t\t   \"rte_cryptodev_stats_get returned error dequeued stat\");\n+\treturn 0;\n+}\n+\n+\n static int\n test_kasumi_encryption_test_case_1(void)\n {\n@@ -7345,6 +7558,54 @@ test_mlx5_decryption_test_case_4(void)\n \treturn test_mlx5_decryption(&mlx5_test_case_cipher_aes_xts_4);\n }\n \n+static int\n+test_mlx5_encryption_test_case_1_sgl(void)\n+{\n+\treturn test_mlx5_encryption_sgl(&mlx5_test_case_cipher_aes_xts_1);\n+}\n+\n+static int\n+test_mlx5_encryption_test_case_2_sgl(void)\n+{\n+\treturn test_mlx5_encryption_sgl(&mlx5_test_case_cipher_aes_xts_2);\n+}\n+\n+static int\n+test_mlx5_encryption_test_case_3_sgl(void)\n+{\n+\treturn test_mlx5_encryption_sgl(&mlx5_test_case_cipher_aes_xts_3);\n+}\n+\n+static int\n+test_mlx5_encryption_test_case_4_sgl(void)\n+{\n+\treturn test_mlx5_encryption_sgl(&mlx5_test_case_cipher_aes_xts_4);\n+}\n+\n+static int\n+test_mlx5_decryption_test_case_1_sgl(void)\n+{\n+\treturn test_mlx5_decryption_sgl(&mlx5_test_case_cipher_aes_xts_1);\n+}\n+\n+static int\n+test_mlx5_decryption_test_case_2_sgl(void)\n+{\n+\treturn test_mlx5_decryption_sgl(&mlx5_test_case_cipher_aes_xts_2);\n+}\n+\n+static int\n+test_mlx5_decryption_test_case_3_sgl(void)\n+{\n+\treturn test_mlx5_decryption_sgl(&mlx5_test_case_cipher_aes_xts_3);\n+}\n+\n+static int\n+test_mlx5_decryption_test_case_4_sgl(void)\n+{\n+\treturn test_mlx5_decryption_sgl(&mlx5_test_case_cipher_aes_xts_4);\n+}\n+\n static int\n test_mixed_check_if_unsupported(const struct mixed_cipher_auth_test_data *tdata)\n {\n@@ -14747,6 +15008,22 @@ static struct unit_test_suite cryptodev_mlx5_testsuite  = {\n \t\t\ttest_mlx5_encryption_test_case_3),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown,\n \t\t\ttest_mlx5_encryption_test_case_4),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_mlx5_decryption_test_case_1_sgl),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_mlx5_decryption_test_case_2_sgl),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_mlx5_decryption_test_case_3_sgl),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_mlx5_decryption_test_case_4_sgl),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_mlx5_encryption_test_case_1_sgl),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_mlx5_encryption_test_case_2_sgl),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_mlx5_encryption_test_case_3_sgl),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_mlx5_encryption_test_case_4_sgl),\n \t\tTEST_CASES_END()\n \t}\n };\ndiff --git a/app/test/test_cryptodev_mlx5_test_vectors.h b/app/test/test_cryptodev_mlx5_test_vectors.h\nindex 2a05aa4626..db7e5fc744 100644\n--- a/app/test/test_cryptodev_mlx5_test_vectors.h\n+++ b/app/test/test_cryptodev_mlx5_test_vectors.h\n@@ -2496,7 +2496,4 @@ static struct mlx5_test_data mlx5_test_case_cipher_aes_xts_4 = {\n \t.dataunit_len = 0\n };\n \n-\n-\n-\n #endif /*TEST_CRYPTODEV_MLX5_TEST_VECTORS_H_*/\n",
    "prefixes": [
        "v5",
        "15/15"
    ]
}