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GET /api/patches/95044/?format=api
{ "id": 95044, "url": "https://patches.dpdk.org/api/patches/95044/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210630071952.6225-1-getelson@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210630071952.6225-1-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210630071952.6225-1-getelson@nvidia.com", "date": "2021-06-30T07:19:52", "name": "net/mlx5: fix pattern expansion in RSS flow rules", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "93b7bc3b7ebd21ade158027cc3c7ecfa31686b52", "submitter": { "id": 1882, "url": "https://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210630071952.6225-1-getelson@nvidia.com/mbox/", "series": [ { "id": 17543, "url": "https://patches.dpdk.org/api/series/17543/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17543", "date": "2021-06-30T07:19:52", "name": "net/mlx5: fix pattern expansion in RSS flow rules", "version": 1, "mbox": "https://patches.dpdk.org/series/17543/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/95044/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/95044/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 232D0A0A0F;\n\tWed, 30 Jun 2021 09:20:23 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B5CA440141;\n\tWed, 30 Jun 2021 09:20:22 +0200 (CEST)", "from NAM10-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam10on2044.outbound.protection.outlook.com [40.107.94.44])\n by mails.dpdk.org (Postfix) with ESMTP id 843B840040;\n Wed, 30 Jun 2021 09:20:21 +0200 (CEST)", "from BN6PR19CA0118.namprd19.prod.outlook.com (2603:10b6:404:a0::32)\n by CH2PR12MB5019.namprd12.prod.outlook.com (2603:10b6:610:6a::18)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4287.22; 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intel.com; dkim=none (message not signed)\n header.d=none;intel.com; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, <matan@nvidia.com>, <rasland@nvidia.com>,\n <stable@dpdk.org>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>, \"Shahaf\n Shuler\" <shahafs@nvidia.com>, Dekel Peled <dekelp@nvidia.com>, Ferruh Yigit\n <ferruh.yigit@intel.com>", "Date": "Wed, 30 Jun 2021 10:19:52 +0300", "Message-ID": "<20210630071952.6225-1-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.31.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "1697cb04-2425-4b44-3d32-08d93b97844b", "X-MS-TrafficTypeDiagnostic": "CH2PR12MB5019:", "X-Microsoft-Antispam-PRVS": "\n <CH2PR12MB50190B508F9D41CC5AF7BC8AA5019@CH2PR12MB5019.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:2803;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n RRhLjwIWc5AYKsrapy+2Wytj294wBAI1YVJSoUHG6w9py0wJDRIvN7wLSbVNNPeSGnx+ulIlko0LH8IW5R8FKuwlSToPYYcYBygQ/q7L1TQL2Rxpkg7zYSZ7mN6qagXiLiI+I5yK4X6xKfUMKe4rRhKWC4+/86Xohs6B/jYub+5ps0Tbhti5eTovGvYkr6SBYaxavs7E7TPFnSqbRwdoA/4ASw5MkuCtzS3GWWR/UZBCB/PpqGA04B+K63BcMqb+XTpbL/bbrAYCFlCqeJQoJ7abMxDOVwLwiz3iTEzcQ7TRkYI2PSbC6iSBoDz2CTF2EFmqKP5sqy7A+fk8fVV4xm8WC160DJxCH1Z9BomQ6qtIz31ib1LuGk46V6hyMrID88Hflw2nCakiWb5LLnh64fbSsEEyZ/xgXuc+plRa/74l8prjnjCAepuO8HtSnjdkBaWGSxcaOJ2ObvS9x2DFGpUvZbDjJD5rC3E8BfjrEBs/lIORS671K4HUP+mn2HtaNB7DbfQEkH67SPDTleUHOwhfbA1hcC9oF7JIREBNsZcl82sOxnecGVJh0LX/szoimpmTaZOFnF5qSysolmAIpfV0Nwwvl1yT+wzY7/W0YMTYJ2xk7iB14XpyGaWCpxbCAo3thqDkIr0+x85IZD2+KZp/h1+mFBZVSZ3ISyY6Y6n4FTCpwi+dUOv7DefpOmiOU3XHK/MbyQsNqOU56rtu6A==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(396003)(136003)(376002)(346002)(39860400002)(36840700001)(46966006)(2906002)(86362001)(47076005)(8676002)(1076003)(54906003)(82310400003)(2616005)(316002)(4326008)(26005)(36756003)(7636003)(82740400003)(478600001)(356005)(8936002)(5660300002)(7696005)(426003)(336012)(55016002)(36860700001)(70586007)(16526019)(70206006)(6286002)(83380400001)(6666004)(6916009)(186003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Jun 2021 07:20:19.3360 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 1697cb04-2425-4b44-3d32-08d93b97844b", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT034.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH2PR12MB5019", "Subject": "[dpdk-dev] [PATCH] net/mlx5: fix pattern expansion in RSS flow rules", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Flow rule pattern may be implicitly expanded by the PMD if the rule\nhas RSS flow action. The expansion adds network headers to the\noriginal pattern. The new pattern lists all network levels that\nparticipate in the rule RSS action.\n\nThe patch validates that buffer for expanded pattern has enough bytes\nfor new flow items.\n\nFixes: c7870bfe09dc (\"ethdev: move RSS expansion code to mlx5 driver\")\n\nCc: stable@dpdk.org\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow.c | 63 +++++++++++++++++++-----------------\n 1 file changed, 33 insertions(+), 30 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex c5d4a95a8f..159e84bfab 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -264,6 +264,7 @@ mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)\n * set, the following errors are defined:\n *\n * -E2BIG: graph-depth @p graph is too deep.\n+ * -EINVAL: @p size has not enough space for expanded pattern.\n */\n static int\n mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,\n@@ -290,12 +291,12 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,\n \tmemset(&missed_item, 0, sizeof(missed_item));\n \tlsize = offsetof(struct mlx5_flow_expand_rss, entry) +\n \t\tMLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);\n-\tif (lsize <= size) {\n-\t\tbuf->entry[0].priority = 0;\n-\t\tbuf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];\n-\t\tbuf->entries = 0;\n-\t\taddr = buf->entry[0].pattern;\n-\t}\n+\tif (lsize > size)\n+\t\treturn -EINVAL;\n+\tbuf->entry[0].priority = 0;\n+\tbuf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];\n+\tbuf->entries = 0;\n+\taddr = buf->entry[0].pattern;\n \tfor (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {\n \t\tif (!mlx5_flow_is_rss_expandable_item(item)) {\n \t\t\tuser_pattern_size += sizeof(*item);\n@@ -313,12 +314,12 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,\n \t}\n \tuser_pattern_size += sizeof(*item); /* Handle END item. */\n \tlsize += user_pattern_size;\n+\tif (lsize > size)\n+\t\treturn -EINVAL;\n \t/* Copy the user pattern in the first entry of the buffer. */\n-\tif (lsize <= size) {\n-\t\trte_memcpy(addr, pattern, user_pattern_size);\n-\t\taddr = (void *)(((uintptr_t)addr) + user_pattern_size);\n-\t\tbuf->entries = 1;\n-\t}\n+\trte_memcpy(addr, pattern, user_pattern_size);\n+\taddr = (void *)(((uintptr_t)addr) + user_pattern_size);\n+\tbuf->entries = 1;\n \t/* Start expanding. */\n \tmemset(flow_items, 0, sizeof(flow_items));\n \tuser_pattern_size -= sizeof(*item);\n@@ -348,7 +349,9 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,\n \t\telt = 2; /* missed item + item end. */\n \t\tnode = next;\n \t\tlsize += elt * sizeof(*item) + user_pattern_size;\n-\t\tif ((node->rss_types & types) && lsize <= size) {\n+\t\tif (lsize > size)\n+\t\t\treturn -EINVAL;\n+\t\tif (node->rss_types & types) {\n \t\t\tbuf->entry[buf->entries].priority = 1;\n \t\t\tbuf->entry[buf->entries].pattern = addr;\n \t\t\tbuf->entries++;\n@@ -367,6 +370,7 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,\n \twhile (node) {\n \t\tflow_items[stack_pos].type = node->type;\n \t\tif (node->rss_types & types) {\n+\t\t\tsize_t n;\n \t\t\t/*\n \t\t\t * compute the number of items to copy from the\n \t\t\t * expansion and copy it.\n@@ -376,24 +380,23 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,\n \t\t\telt = stack_pos + 2;\n \t\t\tflow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;\n \t\t\tlsize += elt * sizeof(*item) + user_pattern_size;\n-\t\t\tif (lsize <= size) {\n-\t\t\t\tsize_t n = elt * sizeof(*item);\n-\n-\t\t\t\tbuf->entry[buf->entries].priority =\n-\t\t\t\t\tstack_pos + 1 + missed;\n-\t\t\t\tbuf->entry[buf->entries].pattern = addr;\n-\t\t\t\tbuf->entries++;\n-\t\t\t\trte_memcpy(addr, buf->entry[0].pattern,\n-\t\t\t\t\t user_pattern_size);\n-\t\t\t\taddr = (void *)(((uintptr_t)addr) +\n-\t\t\t\t\t\tuser_pattern_size);\n-\t\t\t\trte_memcpy(addr, &missed_item,\n-\t\t\t\t\t missed * sizeof(*item));\n-\t\t\t\taddr = (void *)(((uintptr_t)addr) +\n-\t\t\t\t\tmissed * sizeof(*item));\n-\t\t\t\trte_memcpy(addr, flow_items, n);\n-\t\t\t\taddr = (void *)(((uintptr_t)addr) + n);\n-\t\t\t}\n+\t\t\tif (lsize > size)\n+\t\t\t\treturn -EINVAL;\n+\t\t\tn = elt * sizeof(*item);\n+\t\t\tbuf->entry[buf->entries].priority =\n+\t\t\t\tstack_pos + 1 + missed;\n+\t\t\tbuf->entry[buf->entries].pattern = addr;\n+\t\t\tbuf->entries++;\n+\t\t\trte_memcpy(addr, buf->entry[0].pattern,\n+\t\t\t\t user_pattern_size);\n+\t\t\taddr = (void *)(((uintptr_t)addr) +\n+\t\t\t\t\tuser_pattern_size);\n+\t\t\trte_memcpy(addr, &missed_item,\n+\t\t\t\t missed * sizeof(*item));\n+\t\t\taddr = (void *)(((uintptr_t)addr) +\n+\t\t\t\tmissed * sizeof(*item));\n+\t\t\trte_memcpy(addr, flow_items, n);\n+\t\t\taddr = (void *)(((uintptr_t)addr) + n);\n \t\t}\n \t\t/* Go deeper. */\n \t\tif (!node->optional && node->next) {\n", "prefixes": [] }