get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/94843/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 94843,
    "url": "https://patches.dpdk.org/api/patches/94843/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-20-git-send-email-anoobj@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1624600591-29841-20-git-send-email-anoobj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1624600591-29841-20-git-send-email-anoobj@marvell.com",
    "date": "2021-06-25T05:56:30",
    "name": "[v2,19/20] crypto/cnxk: add symmetric crypto capabilities",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "cf443e7d076baf10607ace48b988ead200fbcd5f",
    "submitter": {
        "id": 1205,
        "url": "https://patches.dpdk.org/api/people/1205/?format=api",
        "name": "Anoob Joseph",
        "email": "anoobj@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-20-git-send-email-anoobj@marvell.com/mbox/",
    "series": [
        {
            "id": 17483,
            "url": "https://patches.dpdk.org/api/series/17483/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17483",
            "date": "2021-06-25T05:56:11",
            "name": "Add Marvell CNXK crypto PMDs",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/17483/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/94843/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/94843/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5353DA0C40;\n\tFri, 25 Jun 2021 07:59:21 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 25344410F1;\n\tFri, 25 Jun 2021 07:58:40 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id C6A1940698\n for <dev@dpdk.org>; Fri, 25 Jun 2021 07:58:38 +0200 (CEST)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15P5nxNd007980; Thu, 24 Jun 2021 22:58:38 -0700",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 39d24dhk5n-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 24 Jun 2021 22:58:37 -0700",
            "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 24 Jun 2021 22:58:36 -0700",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 24 Jun 2021 22:58:36 -0700",
            "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id A29DC3F7041;\n Thu, 24 Jun 2021 22:58:32 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=5ZNkc1S/3TGd6sRumsPru433qyPnovWzv3eNLg7ViRM=;\n b=gcJDrjeyJDvHP4kl4eOKkyCW6eVPjttn7e7w3W1KC+WRzdXuCX3LF8v915JA2qhNkhf6\n xOTq/c9EisAnPV55Gqf4+7qnnWPkEct6N5nuwQNehnSIqZoy6/GSKQIk+ETpPX08BY5e\n rnoiSQhHlcr1XmDFVCbLxR9YAP9QIPzRPrZLwUehN0XTK9hwr0nFeKzMXVVqOo9ySWoW\n KDCyXj3AcqK6hhASkuGMxqFFrOu1u7hAdJSuggH8OwrYYB95NoezhASUUSC/LQzN1Vam\n 6I5vttE4zsNOHibxbWw8PK8RyE0iB6fCT5exTn9fJdBcKx0ZDgcxPmujsCXNsgZPNz9n 9Q==",
        "From": "Anoob Joseph <anoobj@marvell.com>",
        "To": "Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>",
        "CC": "Ankur Dwivedi <adwivedi@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>, Anoob Joseph\n <anoobj@marvell.com>, Archana Muniganti <marchana@marvell.com>",
        "Date": "Fri, 25 Jun 2021 11:26:30 +0530",
        "Message-ID": "<1624600591-29841-20-git-send-email-anoobj@marvell.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1624600591-29841-1-git-send-email-anoobj@marvell.com>",
        "References": "\n <http://patches.dpdk.org/project/dpdk/cover/1622652221-22732-1-git-send-email-anoobj@marvell.com/>\n <1624600591-29841-1-git-send-email-anoobj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "sEoWESSoWM7rqevDUtIcMW_y5IBSHmOI",
        "X-Proofpoint-ORIG-GUID": "sEoWESSoWM7rqevDUtIcMW_y5IBSHmOI",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-25_02:2021-06-24,\n 2021-06-25 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v2 19/20] crypto/cnxk: add symmetric crypto\n capabilities",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Ankur Dwivedi <adwivedi@marvell.com>\n\nAdd symmetric crypto capabilities for cn9k & cn10k.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Archana Muniganti <marchana@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n doc/guides/cryptodevs/cnxk.rst                    |  46 ++\n doc/guides/rel_notes/release_21_08.rst            |   7 +\n drivers/crypto/cnxk/cn10k_cryptodev.c             |   4 +\n drivers/crypto/cnxk/cn9k_cryptodev.c              |   4 +\n drivers/crypto/cnxk/cnxk_cryptodev.h              |   5 +\n drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 699 ++++++++++++++++++++++\n drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h |  25 +\n drivers/crypto/cnxk/cnxk_cryptodev_ops.c          |   3 +-\n drivers/crypto/cnxk/meson.build                   |   1 +\n 9 files changed, 793 insertions(+), 1 deletion(-)\n create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c\n create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h",
    "diff": "diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst\nindex 8bac539..885d941 100644\n--- a/doc/guides/cryptodevs/cnxk.rst\n+++ b/doc/guides/cryptodevs/cnxk.rst\n@@ -21,6 +21,52 @@ Supported OCTEON cnxk SoCs\n - CN9XX\n - CN10XX\n \n+Features\n+--------\n+\n+The OCTEON cnxk crypto PMD has support for:\n+\n+Symmetric Crypto Algorithms\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+Cipher algorithms:\n+\n+* ``RTE_CRYPTO_CIPHER_NULL``\n+* ``RTE_CRYPTO_CIPHER_3DES_CBC``\n+* ``RTE_CRYPTO_CIPHER_3DES_ECB``\n+* ``RTE_CRYPTO_CIPHER_AES_CBC``\n+* ``RTE_CRYPTO_CIPHER_AES_CTR``\n+* ``RTE_CRYPTO_CIPHER_AES_XTS``\n+* ``RTE_CRYPTO_CIPHER_DES_CBC``\n+* ``RTE_CRYPTO_CIPHER_KASUMI_F8``\n+* ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``\n+* ``RTE_CRYPTO_CIPHER_ZUC_EEA3``\n+\n+Hash algorithms:\n+\n+* ``RTE_CRYPTO_AUTH_NULL``\n+* ``RTE_CRYPTO_AUTH_AES_GMAC``\n+* ``RTE_CRYPTO_AUTH_KASUMI_F9``\n+* ``RTE_CRYPTO_AUTH_MD5``\n+* ``RTE_CRYPTO_AUTH_MD5_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA1``\n+* ``RTE_CRYPTO_AUTH_SHA1_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA224``\n+* ``RTE_CRYPTO_AUTH_SHA224_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA256``\n+* ``RTE_CRYPTO_AUTH_SHA256_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA384``\n+* ``RTE_CRYPTO_AUTH_SHA384_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA512``\n+* ``RTE_CRYPTO_AUTH_SHA512_HMAC``\n+* ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``\n+* ``RTE_CRYPTO_AUTH_ZUC_EIA3``\n+\n+AEAD algorithms:\n+\n+* ``RTE_CRYPTO_AEAD_AES_GCM``\n+* ``RTE_CRYPTO_AEAD_CHACHA20_POLY1305``\n+\n Installation\n ------------\n \ndiff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst\nindex a6ecfdf..52f2788 100644\n--- a/doc/guides/rel_notes/release_21_08.rst\n+++ b/doc/guides/rel_notes/release_21_08.rst\n@@ -136,3 +136,10 @@ Tested Platforms\n    This section is a comment. Do not overwrite or remove it.\n    Also, make sure to start the actual text at the margin.\n    =======================================================\n+\n+* **Added support for Marvell CN10K crypto driver.**\n+\n+  Added Marvell CN10K crypto PMD.\n+\n+  * Added crypto/cnxk driver which provides the support for the integrated\n+    crypto device.\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c b/drivers/crypto/cnxk/cn10k_cryptodev.c\nindex 2ae61b5..559aaef 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c\n@@ -13,6 +13,8 @@\n #include \"cn10k_cryptodev.h\"\n #include \"cn10k_cryptodev_ops.h\"\n #include \"cnxk_cryptodev.h\"\n+#include \"cnxk_cryptodev_capabilities.h\"\n+\n #include \"roc_api.h\"\n \n uint8_t cn10k_cryptodev_driver_id;\n@@ -77,6 +79,8 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\t}\n \t}\n \n+\tcnxk_cpt_caps_populate(vf);\n+\n \tdev->dev_ops = &cn10k_cpt_ops;\n \tdev->driver_id = cn10k_cryptodev_driver_id;\n \ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c b/drivers/crypto/cnxk/cn9k_cryptodev.c\nindex 9a2d565..d3dc084 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev.c\n@@ -13,6 +13,8 @@\n #include \"cn9k_cryptodev.h\"\n #include \"cn9k_cryptodev_ops.h\"\n #include \"cnxk_cryptodev.h\"\n+#include \"cnxk_cryptodev_capabilities.h\"\n+\n #include \"roc_api.h\"\n \n uint8_t cn9k_cryptodev_driver_id;\n@@ -78,6 +80,8 @@ cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \tdev->dev_ops = &cn9k_cpt_ops;\n \tdev->driver_id = cn9k_cryptodev_driver_id;\n \n+\tcnxk_cpt_caps_populate(vf);\n+\n \tdev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n \t\t\t     RTE_CRYPTODEV_FF_HW_ACCELERATED |\n \t\t\t     RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h\nindex 5b84f0b..03af4af 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev.h\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev.h\n@@ -9,11 +9,16 @@\n \n #include \"roc_cpt.h\"\n \n+#define CNXK_CPT_MAX_CAPS\t 34\n+#define CNXK_SEC_CRYPTO_MAX_CAPS 4\n+#define CNXK_SEC_MAX_CAPS\t 3\n+\n /**\n  * Device private data\n  */\n struct cnxk_cpt_vf {\n \tstruct roc_cpt cpt;\n+\tstruct rte_cryptodev_capabilities crypto_caps[CNXK_CPT_MAX_CAPS];\n };\n \n int cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt);\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c\nnew file mode 100644\nindex 0000000..a5195e8\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c\n@@ -0,0 +1,699 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include <rte_cryptodev.h>\n+\n+#include \"roc_api.h\"\n+\n+#include \"cnxk_cryptodev.h\"\n+#include \"cnxk_cryptodev_capabilities.h\"\n+\n+#define CPT_CAPS_ADD(cnxk_caps, cur_pos, hw_caps, name)                        \\\n+\tdo {                                                                   \\\n+\t\tif ((hw_caps[CPT_ENG_TYPE_SE].name) ||                         \\\n+\t\t    (hw_caps[CPT_ENG_TYPE_IE].name) ||                         \\\n+\t\t    (hw_caps[CPT_ENG_TYPE_AE].name))                           \\\n+\t\t\tcpt_caps_add(cnxk_caps, cur_pos, caps_##name,          \\\n+\t\t\t\t     RTE_DIM(caps_##name));                    \\\n+\t} while (0)\n+\n+static const struct rte_cryptodev_capabilities caps_sha1_sha2[] = {\n+\t{\t/* SHA1 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA1,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 20,\n+\t\t\t\t\t.max = 20,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA1 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA1_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 1024,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 20,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA224 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA224,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 28,\n+\t\t\t\t\t.max = 28,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA224 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA224_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 1024,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 28,\n+\t\t\t\t\t.max = 28,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA256 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA256,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 32,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA256 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA256_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 1024,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 16\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA384 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA384,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 48,\n+\t\t\t\t\t.max = 48,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA384 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA384_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 1024,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 24,\n+\t\t\t\t\t.max = 48,\n+\t\t\t\t\t.increment = 24\n+\t\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA512 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA512,\n+\t\t\t\t.block_size = 128,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 64,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA512 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA512_HMAC,\n+\t\t\t\t.block_size = 128,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 1024,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 32,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 32\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* MD5 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_MD5,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* MD5 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_MD5_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 4\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+};\n+\n+static const struct rte_cryptodev_capabilities caps_chacha20[] = {\n+\t{\t/* Chacha20-Poly1305 */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,\n+\t\t\t{.aead = {\n+\t\t\t\t.algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 32,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 1024,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 12,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t}\n+};\n+\n+static const struct rte_cryptodev_capabilities caps_zuc_snow3g[] = {\n+\t{\t/* SNOW 3G (UEA2) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* ZUC (EEA3) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_ZUC_EEA3,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SNOW 3G (UIA2) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 4,\n+\t\t\t\t\t.max = 4,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* ZUC (EIA3) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_ZUC_EIA3,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 4,\n+\t\t\t\t\t.max = 4,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+};\n+\n+static const struct rte_cryptodev_capabilities caps_aes[] = {\n+\t{\t/* AES GMAC (AUTH) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_AES_GMAC,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 4\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 12,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES CBC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CBC,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES CTR */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CTR,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 4\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES XTS */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_XTS,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 32,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 32\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES GCM */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,\n+\t\t\t{.aead = {\n+\t\t\t\t.algo = RTE_CRYPTO_AEAD_AES_GCM,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 4,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 1024,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 12,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+};\n+\n+static const struct rte_cryptodev_capabilities caps_kasumi[] = {\n+\t{\t/* KASUMI (F8) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_KASUMI_F8,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 8,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* KASUMI (F9) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_KASUMI_F9,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 4,\n+\t\t\t\t\t.max = 4,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+};\n+\n+static const struct rte_cryptodev_capabilities caps_des[] = {\n+\t{\t/* 3DES CBC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_3DES_CBC,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 24,\n+\t\t\t\t\t.max = 24,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* 3DES ECB */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_3DES_ECB,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 24,\n+\t\t\t\t\t.max = 24,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* DES CBC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_DES_CBC,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 8,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 8,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+};\n+\n+static const struct rte_cryptodev_capabilities caps_null[] = {\n+\t{\t/* NULL (AUTH) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_NULL,\n+\t\t\t\t.block_size = 1,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, },\n+\t\t}, },\n+\t},\n+\t{\t/* NULL (CIPHER) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_NULL,\n+\t\t\t\t.block_size = 1,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, },\n+\t\t}, }\n+\t},\n+};\n+\n+static const struct rte_cryptodev_capabilities caps_end[] = {\n+\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n+};\n+\n+static void\n+cpt_caps_add(struct rte_cryptodev_capabilities cnxk_caps[], int *cur_pos,\n+\t     const struct rte_cryptodev_capabilities *caps, int nb_caps)\n+{\n+\tif (*cur_pos + nb_caps > CNXK_CPT_MAX_CAPS)\n+\t\treturn;\n+\n+\tmemcpy(&cnxk_caps[*cur_pos], caps, nb_caps * sizeof(caps[0]));\n+\t*cur_pos += nb_caps;\n+}\n+\n+static void\n+crypto_caps_populate(struct rte_cryptodev_capabilities cnxk_caps[],\n+\t\t     union cpt_eng_caps *hw_caps)\n+{\n+\tint cur_pos = 0;\n+\n+\tCPT_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, sha1_sha2);\n+\tCPT_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, chacha20);\n+\tCPT_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, zuc_snow3g);\n+\tCPT_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, aes);\n+\tCPT_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, kasumi);\n+\tCPT_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, des);\n+\n+\tcpt_caps_add(cnxk_caps, &cur_pos, caps_null, RTE_DIM(caps_null));\n+\tcpt_caps_add(cnxk_caps, &cur_pos, caps_end, RTE_DIM(caps_end));\n+}\n+\n+const struct rte_cryptodev_capabilities *\n+cnxk_crypto_capabilities_get(struct cnxk_cpt_vf *vf)\n+{\n+\treturn vf->crypto_caps;\n+}\n+\n+void\n+cnxk_cpt_caps_populate(struct cnxk_cpt_vf *vf)\n+{\n+\tcrypto_caps_populate(vf->crypto_caps, vf->cpt.hw_caps);\n+}\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h\nnew file mode 100644\nindex 0000000..85f5ad2\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h\n@@ -0,0 +1,25 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef _CNXK_CRYPTODEV_CAPABILITIES_H_\n+#define _CNXK_CRYPTODEV_CAPABILITIES_H_\n+\n+#include <rte_cryptodev.h>\n+\n+#include \"cnxk_cryptodev.h\"\n+\n+/*\n+ * Initialize crypto capabilities for the device\n+ *\n+ */\n+void cnxk_cpt_caps_populate(struct cnxk_cpt_vf *vf);\n+\n+/*\n+ * Get crypto capabilities list for the device\n+ *\n+ */\n+const struct rte_cryptodev_capabilities *\n+cnxk_crypto_capabilities_get(struct cnxk_cpt_vf *vf);\n+\n+#endif /* _CNXK_CRYPTODEV_CAPABILITIES_H_ */\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\nindex 10bb191..0d81785 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n@@ -10,6 +10,7 @@\n \n #include \"cnxk_cryptodev.h\"\n #include \"cnxk_cryptodev_ops.h\"\n+#include \"cnxk_cryptodev_capabilities.h\"\n #include \"cnxk_se.h\"\n \n static int\n@@ -99,7 +100,7 @@ cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,\n \n \tinfo->max_nb_queue_pairs = roc_cpt->nb_lf_avail;\n \tinfo->feature_flags = dev->feature_flags;\n-\tinfo->capabilities = NULL;\n+\tinfo->capabilities = cnxk_crypto_capabilities_get(vf);\n \tinfo->sym.max_nb_sessions = 0;\n \tinfo->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ;\n \tinfo->min_mbuf_tailroom_req = 0;\ndiff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build\nindex 74b7795..fa6be06 100644\n--- a/drivers/crypto/cnxk/meson.build\n+++ b/drivers/crypto/cnxk/meson.build\n@@ -14,6 +14,7 @@ sources = files(\n         'cn10k_cryptodev.c',\n         'cn10k_cryptodev_ops.c',\n         'cnxk_cryptodev.c',\n+        'cnxk_cryptodev_capabilities.c',\n         'cnxk_cryptodev_ops.c',\n )\n \n",
    "prefixes": [
        "v2",
        "19/20"
    ]
}