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GET /api/patches/94828/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 94828,
    "url": "https://patches.dpdk.org/api/patches/94828/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-5-git-send-email-anoobj@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1624600591-29841-5-git-send-email-anoobj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1624600591-29841-5-git-send-email-anoobj@marvell.com",
    "date": "2021-06-25T05:56:15",
    "name": "[v2,04/20] crypto/cnxk: add queue pair ops",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "df472612e526f6b1cbd5ecc77671270b134cbc9d",
    "submitter": {
        "id": 1205,
        "url": "https://patches.dpdk.org/api/people/1205/?format=api",
        "name": "Anoob Joseph",
        "email": "anoobj@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-5-git-send-email-anoobj@marvell.com/mbox/",
    "series": [
        {
            "id": 17483,
            "url": "https://patches.dpdk.org/api/series/17483/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17483",
            "date": "2021-06-25T05:56:11",
            "name": "Add Marvell CNXK crypto PMDs",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/17483/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/94828/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/94828/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3ECF2A0C40;\n\tFri, 25 Jun 2021 07:57:42 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 98E5D40E78;\n\tFri, 25 Jun 2021 07:57:26 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 48559410E8\n for <dev@dpdk.org>; Fri, 25 Jun 2021 07:57:25 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15P5vCcm018209; Thu, 24 Jun 2021 22:57:24 -0700",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 39d241shqa-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 24 Jun 2021 22:57:24 -0700",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 24 Jun 2021 22:57:22 -0700",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 24 Jun 2021 22:57:22 -0700",
            "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id 2D5E93F7068;\n Thu, 24 Jun 2021 22:57:18 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=vD6/gvBXS4iew80t9g1oXny7Lm0qEJUjSxcLyTyVdNg=;\n b=LJhYLTUksoMmcEcgwLrcqbcyr2KPD9qVIoQrbym3j8Mdq/F8oN0M0KMt7JmIz5X75mar\n 16kUYp8SXRHzgVHZT8/noa3BStxe6YECs03+2/7K1SoMNuFEfgMVIfdT40Er2FLMtfLM\n Lboq0rj4QxxcDJ5tnewcUQarxytp02NtisMeyo8lgJr4019IKrivmZi/+mLzqwoJ+PdE\n qBmA8//kAiBDovBV8Gbmn1ERj9bEytw7kZ8HKrypQD1qjNOEZO505FcRTce2mgujgT9/\n AI7xZIcJk4nvq/OxTQLJotOQE9dBrzvuJFhEUuAoqiWjQepZy7BntLSyiEm7q0GlIGJh MA==",
        "From": "Anoob Joseph <anoobj@marvell.com>",
        "To": "Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>",
        "CC": "Ankur Dwivedi <adwivedi@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>, Anoob Joseph\n <anoobj@marvell.com>, Archana Muniganti <marchana@marvell.com>",
        "Date": "Fri, 25 Jun 2021 11:26:15 +0530",
        "Message-ID": "<1624600591-29841-5-git-send-email-anoobj@marvell.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1624600591-29841-1-git-send-email-anoobj@marvell.com>",
        "References": "\n <http://patches.dpdk.org/project/dpdk/cover/1622652221-22732-1-git-send-email-anoobj@marvell.com/>\n <1624600591-29841-1-git-send-email-anoobj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "JUn-pX_daQ6r1cxF3omFoNZ9OxkW_jb3",
        "X-Proofpoint-ORIG-GUID": "JUn-pX_daQ6r1cxF3omFoNZ9OxkW_jb3",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-25_02:2021-06-24,\n 2021-06-25 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v2 04/20] crypto/cnxk: add queue pair ops",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Ankur Dwivedi <adwivedi@marvell.com>\n\nAdd ops for\n- queue_pair_setup()\n- queue_pair_release()\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Archana Muniganti <marchana@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c |   4 +-\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |   4 +-\n drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 253 ++++++++++++++++++++++++++++++\n drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  48 ++++++\n 4 files changed, 305 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex b0eccb3..007d449 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -29,8 +29,8 @@ struct rte_cryptodev_ops cn10k_cpt_ops = {\n \n \t.stats_get = NULL,\n \t.stats_reset = NULL,\n-\t.queue_pair_setup = NULL,\n-\t.queue_pair_release = NULL,\n+\t.queue_pair_setup = cnxk_cpt_queue_pair_setup,\n+\t.queue_pair_release = cnxk_cpt_queue_pair_release,\n \n \t/* Symmetric crypto ops */\n \t.sym_session_get_size = NULL,\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex acfb071..73ccf5b 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -29,8 +29,8 @@ struct rte_cryptodev_ops cn9k_cpt_ops = {\n \n \t.stats_get = NULL,\n \t.stats_reset = NULL,\n-\t.queue_pair_setup = NULL,\n-\t.queue_pair_release = NULL,\n+\t.queue_pair_setup = cnxk_cpt_queue_pair_setup,\n+\t.queue_pair_release = cnxk_cpt_queue_pair_release,\n \n \t/* Symmetric crypto ops */\n \t.sym_session_get_size = NULL,\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\nindex 810f3b8..cf04aec 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n@@ -11,6 +11,24 @@\n #include \"cnxk_cryptodev.h\"\n #include \"cnxk_cryptodev_ops.h\"\n \n+static int\n+cnxk_cpt_get_mlen(void)\n+{\n+\tuint32_t len;\n+\n+\t/* For MAC */\n+\tlen = 2 * sizeof(uint64_t);\n+\tlen += ROC_SE_MAX_MAC_LEN * sizeof(uint8_t);\n+\n+\tlen += ROC_SE_OFF_CTRL_LEN + ROC_CPT_AES_CBC_IV_LEN;\n+\tlen += RTE_ALIGN_CEIL((ROC_SE_SG_LIST_HDR_SIZE +\n+\t\t\t       (RTE_ALIGN_CEIL(ROC_SE_MAX_SG_IN_OUT_CNT, 4) >>\n+\t\t\t\t2) * ROC_SE_SG_ENTRY_SIZE),\n+\t\t\t      8);\n+\n+\treturn len;\n+}\n+\n int\n cnxk_cpt_dev_config(struct rte_cryptodev *dev,\n \t\t    struct rte_cryptodev_config *conf)\n@@ -55,6 +73,16 @@ int\n cnxk_cpt_dev_close(struct rte_cryptodev *dev)\n {\n \tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n+\tuint16_t i;\n+\tint ret;\n+\n+\tfor (i = 0; i < dev->data->nb_queue_pairs; i++) {\n+\t\tret = cnxk_cpt_queue_pair_release(dev, i);\n+\t\tif (ret < 0) {\n+\t\t\tplt_err(\"Could not release queue pair %u\", i);\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n \n \troc_cpt_dev_clear(&vf->cpt);\n \n@@ -75,3 +103,228 @@ cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,\n \tinfo->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ;\n \tinfo->min_mbuf_tailroom_req = 0;\n }\n+\n+static void\n+qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)\n+{\n+\tsnprintf(name, size, \"cnxk_cpt_pq_mem_%u:%u\", dev_id, qp_id);\n+}\n+\n+static int\n+cnxk_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,\n+\t\t\t\tstruct cnxk_cpt_qp *qp, uint8_t qp_id,\n+\t\t\t\tuint32_t nb_elements)\n+{\n+\tchar mempool_name[RTE_MEMPOOL_NAMESIZE];\n+\tstruct cpt_qp_meta_info *meta_info;\n+\tstruct rte_mempool *pool;\n+\tuint32_t cache_sz;\n+\tint mlen = 8;\n+\n+\tif (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {\n+\t\t/* Get meta len */\n+\t\tmlen = cnxk_cpt_get_mlen();\n+\t}\n+\n+\tcache_sz = RTE_MIN(RTE_MEMPOOL_CACHE_MAX_SIZE, nb_elements / 1.5);\n+\n+\t/* Allocate mempool */\n+\n+\tsnprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, \"cnxk_cpt_mb_%u:%u\",\n+\t\t dev->data->dev_id, qp_id);\n+\n+\tpool = rte_mempool_create(mempool_name, nb_elements, mlen, cache_sz, 0,\n+\t\t\t\t  NULL, NULL, NULL, NULL, rte_socket_id(), 0);\n+\n+\tif (pool == NULL) {\n+\t\tplt_err(\"Could not create mempool for metabuf\");\n+\t\treturn rte_errno;\n+\t}\n+\n+\tmeta_info = &qp->meta_info;\n+\n+\tmeta_info->pool = pool;\n+\tmeta_info->mlen = mlen;\n+\n+\treturn 0;\n+}\n+\n+static void\n+cnxk_cpt_metabuf_mempool_destroy(struct cnxk_cpt_qp *qp)\n+{\n+\tstruct cpt_qp_meta_info *meta_info = &qp->meta_info;\n+\n+\trte_mempool_free(meta_info->pool);\n+\n+\tmeta_info->pool = NULL;\n+\tmeta_info->mlen = 0;\n+}\n+\n+static struct cnxk_cpt_qp *\n+cnxk_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,\n+\t\t   uint32_t iq_len)\n+{\n+\tconst struct rte_memzone *pq_mem;\n+\tchar name[RTE_MEMZONE_NAMESIZE];\n+\tstruct cnxk_cpt_qp *qp;\n+\tuint32_t len;\n+\tuint8_t *va;\n+\tint ret;\n+\n+\t/* Allocate queue pair */\n+\tqp = rte_zmalloc_socket(\"CNXK Crypto PMD Queue Pair\", sizeof(*qp),\n+\t\t\t\tROC_ALIGN, 0);\n+\tif (qp == NULL) {\n+\t\tplt_err(\"Could not allocate queue pair\");\n+\t\treturn NULL;\n+\t}\n+\n+\t/* For pending queue */\n+\tlen = iq_len * sizeof(struct cpt_inflight_req);\n+\n+\tqp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,\n+\t\t\t    qp_id);\n+\n+\tpq_mem = rte_memzone_reserve_aligned(name, len, rte_socket_id(),\n+\t\t\t\t\t     RTE_MEMZONE_SIZE_HINT_ONLY |\n+\t\t\t\t\t\t     RTE_MEMZONE_256MB,\n+\t\t\t\t\t     RTE_CACHE_LINE_SIZE);\n+\tif (pq_mem == NULL) {\n+\t\tplt_err(\"Could not allocate reserved memzone\");\n+\t\tgoto qp_free;\n+\t}\n+\n+\tva = pq_mem->addr;\n+\n+\tmemset(va, 0, len);\n+\n+\tret = cnxk_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);\n+\tif (ret) {\n+\t\tplt_err(\"Could not create mempool for metabuf\");\n+\t\tgoto pq_mem_free;\n+\t}\n+\n+\t/* Initialize pending queue */\n+\tqp->pend_q.req_queue = pq_mem->addr;\n+\tqp->pend_q.enq_tail = 0;\n+\tqp->pend_q.deq_head = 0;\n+\tqp->pend_q.pending_count = 0;\n+\n+\treturn qp;\n+\n+pq_mem_free:\n+\trte_memzone_free(pq_mem);\n+qp_free:\n+\trte_free(qp);\n+\treturn NULL;\n+}\n+\n+static int\n+cnxk_cpt_qp_destroy(const struct rte_cryptodev *dev, struct cnxk_cpt_qp *qp)\n+{\n+\tconst struct rte_memzone *pq_mem;\n+\tchar name[RTE_MEMZONE_NAMESIZE];\n+\tint ret;\n+\n+\tcnxk_cpt_metabuf_mempool_destroy(qp);\n+\n+\tqp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,\n+\t\t\t    qp->lf.lf_id);\n+\n+\tpq_mem = rte_memzone_lookup(name);\n+\n+\tret = rte_memzone_free(pq_mem);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\trte_free(qp);\n+\n+\treturn 0;\n+}\n+\n+int\n+cnxk_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)\n+{\n+\tstruct cnxk_cpt_qp *qp = dev->data->queue_pairs[qp_id];\n+\tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n+\tstruct roc_cpt *roc_cpt = &vf->cpt;\n+\tstruct roc_cpt_lf *lf;\n+\tint ret;\n+\n+\tif (qp == NULL)\n+\t\treturn -EINVAL;\n+\n+\tlf = roc_cpt->lf[qp_id];\n+\tif (lf == NULL)\n+\t\treturn -ENOTSUP;\n+\n+\troc_cpt_lf_fini(lf);\n+\n+\tret = cnxk_cpt_qp_destroy(dev, qp);\n+\tif (ret) {\n+\t\tplt_err(\"Could not destroy queue pair %d\", qp_id);\n+\t\treturn ret;\n+\t}\n+\n+\troc_cpt->lf[qp_id] = NULL;\n+\tdev->data->queue_pairs[qp_id] = NULL;\n+\n+\treturn 0;\n+}\n+\n+int\n+cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n+\t\t\t  const struct rte_cryptodev_qp_conf *conf,\n+\t\t\t  int socket_id __rte_unused)\n+{\n+\tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n+\tstruct roc_cpt *roc_cpt = &vf->cpt;\n+\tstruct rte_pci_device *pci_dev;\n+\tstruct cnxk_cpt_qp *qp;\n+\tint ret;\n+\n+\tif (dev->data->queue_pairs[qp_id] != NULL)\n+\t\tcnxk_cpt_queue_pair_release(dev, qp_id);\n+\n+\tpci_dev = RTE_DEV_TO_PCI(dev->device);\n+\n+\tif (pci_dev->mem_resource[2].addr == NULL) {\n+\t\tplt_err(\"Invalid PCI mem address\");\n+\t\treturn -EIO;\n+\t}\n+\n+\tqp = cnxk_cpt_qp_create(dev, qp_id, conf->nb_descriptors);\n+\tif (qp == NULL) {\n+\t\tplt_err(\"Could not create queue pair %d\", qp_id);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tqp->lf.lf_id = qp_id;\n+\tqp->lf.nb_desc = conf->nb_descriptors;\n+\n+\tret = roc_cpt_lf_init(roc_cpt, &qp->lf);\n+\tif (ret < 0) {\n+\t\tplt_err(\"Could not initialize queue pair %d\", qp_id);\n+\t\tret = -EINVAL;\n+\t\tgoto exit;\n+\t}\n+\n+\troc_cpt->lf[qp_id] = &qp->lf;\n+\n+\tret = roc_cpt_lmtline_init(roc_cpt, &qp->lmtline, qp_id);\n+\tif (ret < 0) {\n+\t\troc_cpt->lf[qp_id] = NULL;\n+\t\tplt_err(\"Could not init lmtline for queue pair %d\", qp_id);\n+\t\tgoto exit;\n+\t}\n+\n+\tqp->sess_mp = conf->mp_session;\n+\tqp->sess_mp_priv = conf->mp_session_private;\n+\tdev->data->queue_pairs[qp_id] = qp;\n+\n+\treturn 0;\n+\n+exit:\n+\tcnxk_cpt_qp_destroy(dev, qp);\n+\treturn ret;\n+}\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\nindex 05c2623..f9440f9 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n@@ -7,8 +7,50 @@\n \n #include <rte_cryptodev.h>\n \n+#include \"roc_api.h\"\n+\n #define CNXK_CPT_MIN_HEADROOM_REQ 24\n \n+struct cpt_qp_meta_info {\n+\tstruct rte_mempool *pool;\n+\tint mlen;\n+};\n+\n+struct cpt_inflight_req {\n+\tunion cpt_res_s res;\n+\tstruct rte_crypto_op *cop;\n+\tvoid *mdata;\n+\tuint8_t op_flags;\n+} __rte_aligned(16);\n+\n+struct pending_queue {\n+\t/** Pending requests count */\n+\tuint64_t pending_count;\n+\t/** Array of pending requests */\n+\tstruct cpt_inflight_req *req_queue;\n+\t/** Tail of queue to be used for enqueue */\n+\tuint16_t enq_tail;\n+\t/** Head of queue to be used for dequeue */\n+\tuint16_t deq_head;\n+\t/** Timeout to track h/w being unresponsive */\n+\tuint64_t time_out;\n+};\n+\n+struct cnxk_cpt_qp {\n+\tstruct roc_cpt_lf lf;\n+\t/**< Crypto LF */\n+\tstruct pending_queue pend_q;\n+\t/**< Pending queue */\n+\tstruct rte_mempool *sess_mp;\n+\t/**< Session mempool */\n+\tstruct rte_mempool *sess_mp_priv;\n+\t/**< Session private data mempool */\n+\tstruct cpt_qp_meta_info meta_info;\n+\t/**< Metabuf info required to support operations on the queue pair */\n+\tstruct roc_cpt_lmtline lmtline;\n+\t/**< Lmtline information */\n+};\n+\n int cnxk_cpt_dev_config(struct rte_cryptodev *dev,\n \t\t\tstruct rte_cryptodev_config *conf);\n \n@@ -21,4 +63,10 @@ int cnxk_cpt_dev_close(struct rte_cryptodev *dev);\n void cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,\n \t\t\t   struct rte_cryptodev_info *info);\n \n+int cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n+\t\t\t      const struct rte_cryptodev_qp_conf *conf,\n+\t\t\t      int socket_id __rte_unused);\n+\n+int cnxk_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);\n+\n #endif /* _CNXK_CRYPTODEV_OPS_H_ */\n",
    "prefixes": [
        "v2",
        "04/20"
    ]
}