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GET /api/patches/94751/?format=api
{ "id": 94751, "url": "https://patches.dpdk.org/api/patches/94751/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-56-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210623044702.4240-56-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210623044702.4240-56-ndabilpuram@marvell.com", "date": "2021-06-23T04:46:55", "name": "[v4,55/62] net/cnxk: support base PTP timesync", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "5f1f15752fe3c69e058ec6c1e2d08d39736cdd87", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-56-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 17449, "url": "https://patches.dpdk.org/api/series/17449/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17449", "date": "2021-06-23T04:46:00", "name": "Marvell CNXK Ethdev Driver", "version": 4, "mbox": "https://patches.dpdk.org/series/17449/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94751/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/94751/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0F6CAA0C41;\n\tWed, 23 Jun 2021 06:53:19 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7ADBA4118D;\n\tWed, 23 Jun 2021 06:50:23 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id CC934411E9\n for <dev@dpdk.org>; Wed, 23 Jun 2021 06:50:21 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15N4jSui026889 for <dev@dpdk.org>; Tue, 22 Jun 2021 21:50:21 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 39bx5j8105-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 22 Jun 2021 21:50:20 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 22 Jun 2021 21:50:19 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 22 Jun 2021 21:50:19 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 0EA065B6938;\n Tue, 22 Jun 2021 21:50:12 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=RtjOzT3drv2hlTL2/V9a8lmQRg2Eh0mtKsnUASrBZJc=;\n b=dNTqTdeZskW2pF4WLwZWLbMzL1ydo8t/O7DejgggiubSBdYE8+RXVoKh3EA2vXmz6IbI\n KUlc1CCXIpRTWtk2HseSWj7BnGziYBHfFmglQ7ECEJBgYNozA2zFsDLfZm1Bpf98q8xc\n sLvq5rn6nlzTS7E1kQO56InpW6i1hq/7dLtR82oB07wZchykc5B69kdun+j4mOO7PZrp\n P2nDS5FqDVC8/4Xlv13r7WpCYdv8dQAtII5FR0ChcH75MiwOBryhMW1Vyr26E9Et1MDU\n Ecu49W0ZY5HDU69x18ucOYnID+kzpmWnxSpu1HQGSVWqHNfsRlu7jZCdTLG4QvtW2E95 hg==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, <hkalra@marvell.com>", "Date": "Wed, 23 Jun 2021 10:16:55 +0530", "Message-ID": "<20210623044702.4240-56-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210623044702.4240-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210623044702.4240-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "VTNWrGERKrZ4uKtuqaoVdCEjk3aYzSgd", "X-Proofpoint-GUID": "VTNWrGERKrZ4uKtuqaoVdCEjk3aYzSgd", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-23_01:2021-06-22,\n 2021-06-23 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 55/62] net/cnxk: support base PTP timesync", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nBase PTP timesync support is added for cn9k and cn10k platforms.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n drivers/net/cnxk/cn10k_ethdev.c | 31 +++++\n drivers/net/cnxk/cn10k_ethdev.h | 1 +\n drivers/net/cnxk/cn10k_rx.c | 32 ++---\n drivers/net/cnxk/cn10k_rx.h | 61 +++++++---\n drivers/net/cnxk/cn10k_rx_mseg.c | 2 +-\n drivers/net/cnxk/cn10k_rx_vec.c | 5 +-\n drivers/net/cnxk/cn10k_tx.c | 28 +++--\n drivers/net/cnxk/cn10k_tx.h | 193 +++++++++++++++++++++++------\n drivers/net/cnxk/cn10k_tx_mseg.c | 2 +-\n drivers/net/cnxk/cn10k_tx_vec.c | 3 +-\n drivers/net/cnxk/cn9k_ethdev.c | 34 +++++-\n drivers/net/cnxk/cn9k_ethdev.h | 1 +\n drivers/net/cnxk/cn9k_rx.c | 32 ++---\n drivers/net/cnxk/cn9k_rx.h | 61 +++++++---\n drivers/net/cnxk/cn9k_rx_mseg.c | 2 +-\n drivers/net/cnxk/cn9k_rx_vec.c | 5 +-\n drivers/net/cnxk/cn9k_tx.c | 28 +++--\n drivers/net/cnxk/cn9k_tx.h | 253 ++++++++++++++++++++++++++++-----------\n drivers/net/cnxk/cn9k_tx_mseg.c | 2 +-\n drivers/net/cnxk/cn9k_tx_vec.c | 3 +-\n drivers/net/cnxk/cnxk_ethdev.c | 36 +++++-\n drivers/net/cnxk/cnxk_ethdev.h | 64 +++++++++-\n drivers/net/cnxk/cnxk_ptp.c | 169 ++++++++++++++++++++++++++\n drivers/net/cnxk/meson.build | 1 +\n 24 files changed, 834 insertions(+), 215 deletions(-)\n create mode 100644 drivers/net/cnxk/cnxk_ptp.c", "diff": "diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c\nindex bddb7fb..5e0de13 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.c\n+++ b/drivers/net/cnxk/cn10k_ethdev.c\n@@ -30,6 +30,9 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev)\n \tif (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\n \t\tflags |= NIX_RX_MULTI_SEG_F;\n \n+\tif ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP))\n+\t\tflags |= NIX_RX_OFFLOAD_TSTAMP_F;\n+\n \tif (!dev->ptype_disable)\n \t\tflags |= NIX_RX_OFFLOAD_PTYPE_F;\n \n@@ -95,6 +98,9 @@ nix_tx_offload_flags(struct rte_eth_dev *eth_dev)\n \t\tflags |= (NIX_TX_OFFLOAD_TSO_F | NIX_TX_OFFLOAD_OL3_OL4_CSUM_F |\n \t\t\t NIX_TX_OFFLOAD_L3_L4_CSUM_F);\n \n+\tif ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP))\n+\t\tflags |= NIX_TX_OFFLOAD_TSTAMP_F;\n+\n \treturn flags;\n }\n \n@@ -121,6 +127,7 @@ nix_form_default_desc(struct cnxk_eth_dev *dev, struct cn10k_eth_txq *txq,\n {\n \tstruct nix_send_ext_s *send_hdr_ext;\n \tunion nix_send_hdr_w0_u send_hdr_w0;\n+\tstruct nix_send_mem_s *send_mem;\n \tunion nix_send_sg_s sg_w0;\n \n \tRTE_SET_USED(dev);\n@@ -136,6 +143,22 @@ nix_form_default_desc(struct cnxk_eth_dev *dev, struct cn10k_eth_txq *txq,\n \n \t\tsend_hdr_ext = (struct nix_send_ext_s *)&txq->cmd[0];\n \t\tsend_hdr_ext->w0.subdc = NIX_SUBDC_EXT;\n+\t\tif (dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F) {\n+\t\t\t/* Default: one seg packet would have:\n+\t\t\t * 2(HDR) + 2(EXT) + 1(SG) + 1(IOVA) + 2(MEM)\n+\t\t\t * => 8/2 - 1 = 3\n+\t\t\t */\n+\t\t\tsend_hdr_w0.sizem1 = 3;\n+\t\t\tsend_hdr_ext->w0.tstmp = 1;\n+\n+\t\t\t/* To calculate the offset for send_mem,\n+\t\t\t * send_hdr->w0.sizem1 * 2\n+\t\t\t */\n+\t\t\tsend_mem = (struct nix_send_mem_s *)(txq->cmd + 2);\n+\t\t\tsend_mem->w0.subdc = NIX_SUBDC_MEM;\n+\t\t\tsend_mem->w0.alg = NIX_SENDMEMALG_SETTSTMP;\n+\t\t\tsend_mem->addr = dev->tstamp.tx_tstamp_iova;\n+\t\t}\n \t} else {\n \t\t/* 2(HDR) + 1(SG) + 1(IOVA) = 4/2 - 1 = 1 */\n \t\tsend_hdr_w0.sizem1 = 1;\n@@ -221,6 +244,7 @@ cn10k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n \trxq->wdata = cq->wdata;\n \trxq->head = cq->head;\n \trxq->qmask = cq->qmask;\n+\trxq->tstamp = &dev->tstamp;\n \n \t/* Data offset from data to start of mbuf is first_skip */\n \trxq->data_off = rq->first_skip;\n@@ -342,6 +366,7 @@ static int\n cn10k_nix_dev_start(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_nix *nix = &dev->nix;\n \tint rc;\n \n \t/* Common eth dev start */\n@@ -349,6 +374,12 @@ cn10k_nix_dev_start(struct rte_eth_dev *eth_dev)\n \tif (rc)\n \t\treturn rc;\n \n+\t/* Update VF about data off shifted by 8 bytes if PTP already\n+\t * enabled in PF owning this VF\n+\t */\n+\tif (dev->ptp_en && (!roc_nix_is_pf(nix) && (!roc_nix_is_sdp(nix))))\n+\t\tnix_ptp_enable_vf(eth_dev);\n+\n \t/* Setting up the rx[tx]_offload_flags due to change\n \t * in rx[tx]_offloads.\n \t */\ndiff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h\nindex d39ca31..8b6e0f2 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.h\n+++ b/drivers/net/cnxk/cn10k_ethdev.h\n@@ -31,6 +31,7 @@ struct cn10k_eth_rxq {\n \tuint32_t available;\n \tuint16_t data_off;\n \tuint16_t rq;\n+\tstruct cnxk_timesync_info *tstamp;\n } __plt_cache_aligned;\n \n /* Rx and Tx routines */\ndiff --git a/drivers/net/cnxk/cn10k_rx.c b/drivers/net/cnxk/cn10k_rx.c\nindex 0598111..c9744e2 100644\n--- a/drivers/net/cnxk/cn10k_rx.c\n+++ b/drivers/net/cnxk/cn10k_rx.c\n@@ -5,7 +5,7 @@\n #include \"cn10k_ethdev.h\"\n #include \"cn10k_rx.h\"\n \n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t \\\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name(\t \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\n@@ -17,12 +17,13 @@ NIX_RX_FASTPATH_MODES\n \n static inline void\n pick_rx_func(struct rte_eth_dev *eth_dev,\n-\t const eth_rx_burst_t rx_burst[2][2][2][2])\n+\t const eth_rx_burst_t rx_burst[2][2][2][2][2])\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\t/* [MARK] [CKSUM] [PTYPE] [RSS] */\n+\t/* [TSP] [MARK] [CKSUM] [PTYPE] [RSS] */\n \teth_dev->rx_pkt_burst = rx_burst\n+\t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_TSTAMP_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_CHECKSUM_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)]\n@@ -34,31 +35,34 @@ cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2] = {\n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t \\\n-\t[f3][f2][f1][f0] = cn10k_nix_recv_pkts_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2] = {\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+\t[f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2] = {\n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t \\\n-\t[f3][f2][f1][f0] = cn10k_nix_recv_pkts_mseg_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2] = {\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+\t[f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_mseg_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2] = {\n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t \\\n-\t[f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2] = {\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+\t[f4][f3][f2][f1][f0] = cn10k_nix_recv_pkts_vec_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tif (dev->scalar_ena)\n+\t/* For PTP enabled, scalar rx function should be chosen as most of the\n+\t * PTP apps are implemented to rx burst 1 pkt.\n+\t */\n+\tif (dev->scalar_ena || dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)\n \t\tpick_rx_func(eth_dev, nix_eth_rx_burst);\n \telse\n \t\tpick_rx_func(eth_dev, nix_eth_rx_vec_burst);\n@@ -69,6 +73,6 @@ cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n \t/* Copy multi seg version with no offload for tear down sequence */\n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n \t\tdev->rx_pkt_burst_no_offload =\n-\t\t\tnix_eth_rx_burst_mseg[0][0][0][0];\n+\t\t\tnix_eth_rx_burst_mseg[0][0][0][0][0];\n \trte_mb();\n }\ndiff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h\nindex 29ee0ac..c09ccdf 100644\n--- a/drivers/net/cnxk/cn10k_rx.h\n+++ b/drivers/net/cnxk/cn10k_rx.h\n@@ -7,6 +7,8 @@\n #include <rte_ether.h>\n #include <rte_vect.h>\n \n+#include <cnxk_ethdev.h>\n+\n #define NIX_RX_OFFLOAD_NONE\t (0)\n #define NIX_RX_OFFLOAD_RSS_F\t BIT(0)\n #define NIX_RX_OFFLOAD_PTYPE_F\t BIT(1)\n@@ -250,6 +252,10 @@ cn10k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,\n \n \t\tcn10k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,\n \t\t\t\t flags);\n+\t\tcnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,\n+\t\t\t\t\t(flags & NIX_RX_OFFLOAD_TSTAMP_F),\n+\t\t\t\t\t(uint64_t *)((uint8_t *)mbuf + data_off)\n+\t\t\t\t\t);\n \t\trx_pkts[packets++] = mbuf;\n \t\troc_prefetch_store_keep(mbuf);\n \t\thead++;\n@@ -487,27 +493,44 @@ cn10k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,\n #define PTYPE_F\t NIX_RX_OFFLOAD_PTYPE_F\n #define CKSUM_F\t NIX_RX_OFFLOAD_CHECKSUM_F\n #define MARK_F\t NIX_RX_OFFLOAD_MARK_UPDATE_F\n+#define TS_F NIX_RX_OFFLOAD_TSTAMP_F\n \n-/* [MARK] [CKSUM] [PTYPE] [RSS] */\n-#define NIX_RX_FASTPATH_MODES\t\t\t\t\t \\\n-R(no_offload,\t\t\t0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \\\n-R(rss,\t\t\t\t0, 0, 0, 1, RSS_F)\t\t \\\n-R(ptype,\t\t\t0, 0, 1, 0, PTYPE_F)\t\t \\\n-R(ptype_rss,\t\t\t0, 0, 1, 1, PTYPE_F | RSS_F)\t \\\n-R(cksum,\t\t\t0, 1, 0, 0, CKSUM_F)\t\t \\\n-R(cksum_rss,\t\t\t0, 1, 0, 1, CKSUM_F | RSS_F)\t \\\n-R(cksum_ptype,\t\t\t0, 1, 1, 0, CKSUM_F | PTYPE_F)\t \\\n-R(cksum_ptype_rss,\t\t0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \\\n-R(mark,\t\t\t\t1, 0, 0, 0, MARK_F)\t\t \\\n-R(mark_rss,\t\t\t1, 0, 0, 1, MARK_F | RSS_F)\t \\\n-R(mark_ptype,\t\t\t1, 0, 1, 0, MARK_F | PTYPE_F)\t \\\n-R(mark_ptype_rss,\t\t1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \\\n-R(mark_cksum,\t\t\t1, 1, 0, 0, MARK_F | CKSUM_F)\t \\\n-R(mark_cksum_rss,\t\t1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \\\n-R(mark_cksum_ptype,\t\t1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F)\\\n-R(mark_cksum_ptype_rss,\t\t1, 1, 1, 1, MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+/* [TS] [MARK] [CKSUM] [PTYPE] [RSS] */\n+#define NIX_RX_FASTPATH_MODES\t\t\t\t\t\t \\\n+R(no_offload,\t\t\t0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE)\t \\\n+R(rss,\t\t\t\t0, 0, 0, 0, 1, RSS_F)\t\t\t \\\n+R(ptype,\t\t\t0, 0, 0, 1, 0, PTYPE_F)\t\t\t \\\n+R(ptype_rss,\t\t\t0, 0, 0, 1, 1, PTYPE_F | RSS_F)\t\t \\\n+R(cksum,\t\t\t0, 0, 1, 0, 0, CKSUM_F)\t\t\t \\\n+R(cksum_rss,\t\t\t0, 0, 1, 0, 1, CKSUM_F | RSS_F)\t\t \\\n+R(cksum_ptype,\t\t\t0, 0, 1, 1, 0, CKSUM_F | PTYPE_F)\t \\\n+R(cksum_ptype_rss,\t\t0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \\\n+R(mark,\t\t\t\t0, 1, 0, 0, 0, MARK_F)\t\t\t \\\n+R(mark_rss,\t\t\t0, 1, 0, 0, 1, MARK_F | RSS_F)\t\t \\\n+R(mark_ptype,\t\t\t0, 1, 0, 1, 0, MARK_F | PTYPE_F)\t \\\n+R(mark_ptype_rss,\t\t0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \\\n+R(mark_cksum,\t\t\t0, 1, 1, 0, 0, MARK_F | CKSUM_F)\t \\\n+R(mark_cksum_rss,\t\t0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \\\n+R(mark_cksum_ptype,\t\t0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \\\n+R(mark_cksum_ptype_rss,\t\t0, 1, 1, 1, 1, MARK_F | CKSUM_F | PTYPE_F | RSS_F)\\\n+R(ts,\t\t\t\t1, 0, 0, 0, 0, TS_F)\t\t\t \\\n+R(ts_rss,\t\t\t1, 0, 0, 0, 1, TS_F | RSS_F)\t\t \\\n+R(ts_ptype,\t\t\t1, 0, 0, 1, 0, TS_F | PTYPE_F)\t\t \\\n+R(ts_ptype_rss,\t\t\t1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F)\t \\\n+R(ts_cksum,\t\t\t1, 0, 1, 0, 0, TS_F | CKSUM_F)\t\t \\\n+R(ts_cksum_rss,\t\t\t1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F)\t \\\n+R(ts_cksum_ptype,\t\t1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \\\n+R(ts_cksum_ptype_rss,\t\t1, 0, 1, 1, 1, TS_F | CKSUM_F | PTYPE_F | RSS_F)\\\n+R(ts_mark,\t\t\t1, 1, 0, 0, 0, TS_F | MARK_F)\t\t \\\n+R(ts_mark_rss,\t\t\t1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F)\t \\\n+R(ts_mark_ptype,\t\t1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F)\t \\\n+R(ts_mark_ptype_rss,\t\t1, 1, 0, 1, 1, TS_F | MARK_F | PTYPE_F | RSS_F)\\\n+R(ts_mark_cksum,\t\t1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F)\t \\\n+R(ts_mark_cksum_rss,\t\t1, 1, 1, 0, 1, TS_F | MARK_F | CKSUM_F | RSS_F)\\\n+R(ts_mark_cksum_ptype,\t\t1, 1, 1, 1, 0, TS_F | MARK_F | CKSUM_F | PTYPE_F)\\\n+R(ts_mark_cksum_ptype_rss,\t1, 1, 1, 1, 1, TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n \n-#define R(name, f3, f2, f1, f0, flags) \\\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \\\n \t\t\t\t\t\t\t\t\t \\\ndiff --git a/drivers/net/cnxk/cn10k_rx_mseg.c b/drivers/net/cnxk/cn10k_rx_mseg.c\nindex 9d283f7..b67d21f 100644\n--- a/drivers/net/cnxk/cn10k_rx_mseg.c\n+++ b/drivers/net/cnxk/cn10k_rx_mseg.c\n@@ -5,7 +5,7 @@\n #include \"cn10k_ethdev.h\"\n #include \"cn10k_rx.h\"\n \n-#define R(name, f3, f2, f1, f0, flags) \\\n+#define R(name, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\ndiff --git a/drivers/net/cnxk/cn10k_rx_vec.c b/drivers/net/cnxk/cn10k_rx_vec.c\nindex 0fa079c..1330235 100644\n--- a/drivers/net/cnxk/cn10k_rx_vec.c\n+++ b/drivers/net/cnxk/cn10k_rx_vec.c\n@@ -5,12 +5,15 @@\n #include \"cn10k_ethdev.h\"\n #include \"cn10k_rx.h\"\n \n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t \\\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot\t\t\t\t \\\n \t\tcn10k_nix_recv_pkts_vec_##name(void *rx_queue, \\\n \t\t\t\t\t struct rte_mbuf **rx_pkts, \\\n \t\t\t\t\t uint16_t pkts) \\\n \t{ \\\n+\t\t/* TSTMP is not supported by vector */ \\\n+\t\tif ((flags) & NIX_RX_OFFLOAD_TSTAMP_F) \\\n+\t\t\treturn 0; \\\n \t\treturn cn10k_nix_recv_pkts_vector(rx_queue, rx_pkts, pkts, \\\n \t\t\t\t\t\t (flags));\t\t \\\n \t}\ndiff --git a/drivers/net/cnxk/cn10k_tx.c b/drivers/net/cnxk/cn10k_tx.c\nindex e6eb101..18694dc 100644\n--- a/drivers/net/cnxk/cn10k_tx.c\n+++ b/drivers/net/cnxk/cn10k_tx.c\n@@ -5,7 +5,7 @@\n #include \"cn10k_ethdev.h\"\n #include \"cn10k_tx.h\"\n \n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_xmit_pkts_##name(\t \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts) \\\n \t{ \\\n@@ -24,12 +24,13 @@ NIX_TX_FASTPATH_MODES\n \n static inline void\n pick_tx_func(struct rte_eth_dev *eth_dev,\n-\t const eth_tx_burst_t tx_burst[2][2][2][2][2])\n+\t const eth_tx_burst_t tx_burst[2][2][2][2][2][2])\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\t/* [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n+\t/* [TSP] [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n \teth_dev->tx_pkt_burst = tx_burst\n+\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSO_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n@@ -42,25 +43,25 @@ cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2] = {\n-#define T(name, f4, f3, f2, f1, f0, sz, flags) \\\n-\t[f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2][2] = {\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags) \\\n+\t[f5][f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2] = {\n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t\\\n-\t[f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_mseg_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2][2] = {\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n+\t[f5][f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_mseg_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2] = {\n-#define T(name, f4, f3, f2, f1, f0, sz, flags) \\\n-\t[f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_vec_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2][2] = {\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags) \\\n+\t[f5][f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_vec_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n@@ -68,7 +69,8 @@ cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev)\n \n \tif (dev->scalar_ena ||\n \t (dev->tx_offload_flags &\n-\t (NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F)))\n+\t (NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSTAMP_F |\n+\t NIX_TX_OFFLOAD_TSO_F)))\n \t\tpick_tx_func(eth_dev, nix_eth_tx_burst);\n \telse\n \t\tpick_tx_func(eth_dev, nix_eth_tx_vec_burst);\ndiff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h\nindex b74df10..8b1446f 100644\n--- a/drivers/net/cnxk/cn10k_tx.h\n+++ b/drivers/net/cnxk/cn10k_tx.h\n@@ -12,6 +12,7 @@\n #define NIX_TX_OFFLOAD_VLAN_QINQ_F BIT(2)\n #define NIX_TX_OFFLOAD_MBUF_NOFF_F BIT(3)\n #define NIX_TX_OFFLOAD_TSO_F\t BIT(4)\n+#define NIX_TX_OFFLOAD_TSTAMP_F\t BIT(5)\n \n /* Flags to control xmit_prepare function.\n * Defining it from backwards to denote its been\n@@ -24,7 +25,8 @@\n \t NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F)\n \n #define NIX_TX_NEED_EXT_HDR \\\n-\t(NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F)\n+\t(NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSTAMP_F | \\\n+\t NIX_TX_OFFLOAD_TSO_F)\n \n #define NIX_XMIT_FC_OR_RETURN(txq, pkts) \\\n \tdo { \\\n@@ -49,8 +51,12 @@\n static __rte_always_inline int\n cn10k_nix_tx_ext_subs(const uint16_t flags)\n {\n-\treturn (flags &\n-\t\t(NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F)) ? 1 : 0;\n+\treturn (flags & NIX_TX_OFFLOAD_TSTAMP_F)\n+\t\t ? 2\n+\t\t : ((flags &\n+\t\t\t (NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F))\n+\t\t\t\t ? 1\n+\t\t\t\t : 0);\n }\n \n static __rte_always_inline uint8_t\n@@ -380,6 +386,45 @@ cn10k_nix_xmit_prepare(struct rte_mbuf *m, uint64_t *cmd, uintptr_t lmt_addr,\n \t*(rte_iova_t *)(lmt_addr + 8) = *(rte_iova_t *)(sg + 1);\n }\n \n+static __rte_always_inline void\n+cn10k_nix_xmit_prepare_tstamp(uintptr_t lmt_addr, const uint64_t *cmd,\n+\t\t\t const uint64_t ol_flags, const uint16_t no_segdw,\n+\t\t\t const uint16_t flags)\n+{\n+\tif (flags & NIX_TX_OFFLOAD_TSTAMP_F) {\n+\t\tconst uint8_t is_ol_tstamp = !(ol_flags & PKT_TX_IEEE1588_TMST);\n+\t\tstruct nix_send_ext_s *send_hdr_ext =\n+\t\t\t\t\t(struct nix_send_ext_s *)lmt_addr + 16;\n+\t\tuint64_t *lmt = (uint64_t *)lmt_addr;\n+\t\tuint16_t off = (no_segdw - 1) << 1;\n+\t\tstruct nix_send_mem_s *send_mem;\n+\n+\t\tsend_mem = (struct nix_send_mem_s *)(lmt + off);\n+\t\tsend_hdr_ext->w0.subdc = NIX_SUBDC_EXT;\n+\t\tsend_hdr_ext->w0.tstmp = 1;\n+\t\tif (flags & NIX_TX_MULTI_SEG_F) {\n+\t\t\t/* Retrieving the default desc values */\n+\t\t\tlmt[off] = cmd[2];\n+\n+\t\t\t/* Using compiler barier to avoid voilation of C\n+\t\t\t * aliasing rules.\n+\t\t\t */\n+\t\t\trte_compiler_barrier();\n+\t\t}\n+\n+\t\t/* Packets for which PKT_TX_IEEE1588_TMST is not set, tx tstamp\n+\t\t * should not be recorded, hence changing the alg type to\n+\t\t * NIX_SENDMEMALG_SET and also changing send mem addr field to\n+\t\t * next 8 bytes as it corrpt the actual tx tstamp registered\n+\t\t * address.\n+\t\t */\n+\t\tsend_mem->w0.subdc = NIX_SUBDC_MEM;\n+\t\tsend_mem->w0.alg = NIX_SENDMEMALG_SETTSTMP - (is_ol_tstamp);\n+\t\tsend_mem->addr =\n+\t\t\t(rte_iova_t)(((uint64_t *)cmd[3]) + is_ol_tstamp);\n+\t}\n+}\n+\n static __rte_always_inline uint16_t\n cn10k_nix_prepare_mseg(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags)\n {\n@@ -445,7 +490,7 @@ cn10k_nix_prepare_mseg(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags)\n \t/* Roundup extra dwords to multiple of 2 */\n \tsegdw = (segdw >> 1) + (segdw & 0x1);\n \t/* Default dwords */\n-\tsegdw += (off >> 1) + 1;\n+\tsegdw += (off >> 1) + 1 + !!(flags & NIX_TX_OFFLOAD_TSTAMP_F);\n \tsend_hdr->w0.sizem1 = segdw - 1;\n \n \treturn segdw;\n@@ -487,6 +532,8 @@ cn10k_nix_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts,\n \n \t\tcn10k_nix_xmit_prepare(tx_pkts[i], cmd, lmt_addr, flags,\n \t\t\t\t lso_tun_fmt);\n+\t\tcn10k_nix_xmit_prepare_tstamp(lmt_addr, &txq->cmd[0],\n+\t\t\t\t\t tx_pkts[i]->ol_flags, 4, flags);\n \t\tlmt_addr += (1ULL << ROC_LMT_LINE_SIZE_LOG2);\n \t}\n \n@@ -576,6 +623,9 @@ cn10k_nix_xmit_pkts_mseg(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t/* Store sg list directly on lmt line */\n \t\tsegdw = cn10k_nix_prepare_mseg(tx_pkts[i], (uint64_t *)lmt_addr,\n \t\t\t\t\t flags);\n+\t\tcn10k_nix_xmit_prepare_tstamp(lmt_addr, &txq->cmd[0],\n+\t\t\t\t\t tx_pkts[i]->ol_flags, segdw,\n+\t\t\t\t\t flags);\n \t\tlmt_addr += (1ULL << ROC_LMT_LINE_SIZE_LOG2);\n \t\tdata128 |= (((__uint128_t)(segdw - 1)) << shft);\n \t\tshft += 3;\n@@ -1406,75 +1456,140 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts,\n #define VLAN_F\t NIX_TX_OFFLOAD_VLAN_QINQ_F\n #define NOFF_F\t NIX_TX_OFFLOAD_MBUF_NOFF_F\n #define TSO_F\t NIX_TX_OFFLOAD_TSO_F\n+#define TSP_F\t NIX_TX_OFFLOAD_TSTAMP_F\n \n-/* [TSO] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n+/* [TSP] [TSO] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n #define NIX_TX_FASTPATH_MODES\t\t\t\t\t\t\\\n-T(no_offload,\t\t\t\t0, 0, 0, 0, 0,\t4,\t\t\\\n+T(no_offload,\t\t\t\t0, 0, 0, 0, 0, 0,\t4,\t\\\n \t\tNIX_TX_OFFLOAD_NONE)\t\t\t\t\t\\\n-T(l3l4csum,\t\t\t\t0, 0, 0, 0, 1,\t4,\t\t\\\n+T(l3l4csum,\t\t\t\t0, 0, 0, 0, 0, 1,\t4,\t\\\n \t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n-T(ol3ol4csum,\t\t\t\t0, 0, 0, 1, 0,\t4,\t\t\\\n+T(ol3ol4csum,\t\t\t\t0, 0, 0, 0, 1, 0,\t4,\t\\\n \t\tOL3OL4CSUM_F)\t\t\t\t\t\t\\\n-T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 1, 1,\t4,\t\t\\\n+T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 0, 1, 1,\t4,\t\\\n \t\tOL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\t\\\n-T(vlan,\t\t\t\t\t0, 0, 1, 0, 0,\t6,\t\t\\\n+T(vlan,\t\t\t\t\t0, 0, 0, 1, 0, 0,\t6,\t\\\n \t\tVLAN_F)\t\t\t\t\t\t\t\\\n-T(vlan_l3l4csum,\t\t\t0, 0, 1, 0, 1,\t6,\t\t\\\n+T(vlan_l3l4csum,\t\t\t0, 0, 0, 1, 0, 1,\t6,\t\\\n \t\tVLAN_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(vlan_ol3ol4csum,\t\t\t0, 0, 1, 1, 0,\t6,\t\t\\\n+T(vlan_ol3ol4csum,\t\t\t0, 0, 0, 1, 1, 0,\t6,\t\\\n \t\tVLAN_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 1, 1,\t6,\t\t\\\n+T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 1, 1, 1,\t6,\t\\\n \t\tVLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n-T(noff,\t\t\t\t\t0, 1, 0, 0, 0,\t4,\t\t\\\n+T(noff,\t\t\t\t\t0, 0, 1, 0, 0, 0,\t4,\t\\\n \t\tNOFF_F)\t\t\t\t\t\t\t\\\n-T(noff_l3l4csum,\t\t\t0, 1, 0, 0, 1,\t4,\t\t\\\n+T(noff_l3l4csum,\t\t\t0, 0, 1, 0, 0, 1,\t4,\t\\\n \t\tNOFF_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(noff_ol3ol4csum,\t\t\t0, 1, 0, 1, 0,\t4,\t\t\\\n+T(noff_ol3ol4csum,\t\t\t0, 0, 1, 0, 1, 0,\t4,\t\\\n \t\tNOFF_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(noff_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 1,\t4,\t\t\\\n+T(noff_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 1, 1,\t4,\t\\\n \t\tNOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n-T(noff_vlan,\t\t\t\t0, 1, 1, 0, 0,\t6,\t\t\\\n+T(noff_vlan,\t\t\t\t0, 0, 1, 1, 0, 0,\t6,\t\\\n \t\tNOFF_F | VLAN_F)\t\t\t\t\t\\\n-T(noff_vlan_l3l4csum,\t\t\t0, 1, 1, 0, 1,\t6,\t\t\\\n+T(noff_vlan_l3l4csum,\t\t\t0, 0, 1, 1, 0, 1,\t6,\t\\\n \t\tNOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(noff_vlan_ol3ol4csum,\t\t\t0, 1, 1, 1, 0,\t6,\t\t\\\n+T(noff_vlan_ol3ol4csum,\t\t\t0, 0, 1, 1, 1, 0,\t6,\t\\\n \t\tNOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1,\t6,\t\t\\\n+T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 1, 1, 1, 1,\t6,\t\\\n \t\tNOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(tso,\t\t\t\t\t1, 0, 0, 0, 0,\t6,\t\t\\\n+T(tso,\t\t\t\t\t0, 1, 0, 0, 0, 0,\t6,\t\\\n \t\tTSO_F)\t\t\t\t\t\t\t\\\n-T(tso_l3l4csum,\t\t\t\t1, 0, 0, 0, 1,\t6,\t\t\\\n+T(tso_l3l4csum,\t\t\t\t0, 1, 0, 0, 0, 1,\t6,\t\\\n \t\tTSO_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(tso_ol3ol4csum,\t\t\t1, 0, 0, 1, 0,\t6,\t\t\\\n+T(tso_ol3ol4csum,\t\t\t0, 1, 0, 0, 1, 0,\t6,\t\\\n \t\tTSO_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(tso_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 1,\t6,\t\t\\\n+T(tso_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 1, 1,\t6,\t\\\n \t\tTSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_vlan,\t\t\t\t1, 0, 1, 0, 0,\t6,\t\t\\\n+T(tso_vlan,\t\t\t\t0, 1, 0, 1, 0, 0,\t6,\t\\\n \t\tTSO_F | VLAN_F)\t\t\t\t\t\t\\\n-T(tso_vlan_l3l4csum,\t\t\t1, 0, 1, 0, 1,\t6,\t\t\\\n+T(tso_vlan_l3l4csum,\t\t\t0, 1, 0, 1, 0, 1,\t6,\t\\\n \t\tTSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_vlan_ol3ol4csum,\t\t\t1, 0, 1, 1, 0,\t6,\t\t\\\n+T(tso_vlan_ol3ol4csum,\t\t\t0, 1, 0, 1, 1, 0,\t6,\t\\\n \t\tTSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 1, 1,\t6,\t\t\\\n+T(tso_vlan_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 1, 1,\t6,\t\\\n \t\tTSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(tso_noff,\t\t\t\t1, 1, 0, 0, 0,\t6,\t\t\\\n+T(tso_noff,\t\t\t\t0, 1, 1, 0, 0, 0,\t6,\t\\\n \t\tTSO_F | NOFF_F)\t\t\t\t\t\t\\\n-T(tso_noff_l3l4csum,\t\t\t1, 1, 0, 0, 1,\t6,\t\t\\\n+T(tso_noff_l3l4csum,\t\t\t0, 1, 1, 0, 0, 1,\t6,\t\\\n \t\tTSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_noff_ol3ol4csum,\t\t\t1, 1, 0, 1, 0,\t6,\t\t\\\n+T(tso_noff_ol3ol4csum,\t\t\t0, 1, 1, 0, 1, 0,\t6,\t\\\n \t\tTSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_noff_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 1, 1,\t6,\t\t\\\n+T(tso_noff_ol3ol4csum_l3l4csum,\t\t0, 1, 1, 0, 1, 1,\t6,\t\\\n \t\tTSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(tso_noff_vlan,\t\t\t1, 1, 1, 0, 0,\t6,\t\t\\\n+T(tso_noff_vlan,\t\t\t0, 1, 1, 1, 0, 0,\t6,\t\\\n \t\tTSO_F | NOFF_F | VLAN_F)\t\t\t\t\\\n-T(tso_noff_vlan_l3l4csum,\t\t1, 1, 1, 0, 1,\t6,\t\t\\\n+T(tso_noff_vlan_l3l4csum,\t\t0, 1, 1, 1, 0, 1,\t6,\t\\\n \t\tTSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_noff_vlan_ol3ol4csum,\t\t1, 1, 1, 1, 0,\t6,\t\t\\\n+T(tso_noff_vlan_ol3ol4csum,\t\t0, 1, 1, 1, 1, 0,\t6,\t\\\n \t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 1,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1, 1,\t6,\t\\\n+\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(ts,\t\t\t\t\t1, 0, 0, 0, 0, 0,\t8,\t\\\n+\t\tTSP_F)\t\t\t\t\t\t\t\\\n+T(ts_l3l4csum,\t\t\t\t1, 0, 0, 0, 0, 1,\t8,\t\\\n+\t\tTSP_F | L3L4CSUM_F)\t\t\t\t\t\\\n+T(ts_ol3ol4csum,\t\t\t1, 0, 0, 0, 1, 0,\t8,\t\\\n+\t\tTSP_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n+T(ts_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 1, 1,\t8,\t\\\n+\t\tTSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n+T(ts_vlan,\t\t\t\t1, 0, 0, 1, 0, 0,\t8,\t\\\n+\t\tTSP_F | VLAN_F)\t\t\t\t\t\t\\\n+T(ts_vlan_l3l4csum,\t\t\t1, 0, 0, 1, 0, 1,\t8,\t\\\n+\t\tTSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n+T(ts_vlan_ol3ol4csum,\t\t\t1, 0, 0, 1, 1, 0,\t8,\t\\\n+\t\tTSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(ts_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 1, 1,\t8,\t\\\n+\t\tTSP_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n+T(ts_noff,\t\t\t\t1, 0, 1, 0, 0, 0,\t8,\t\\\n+\t\tTSP_F | NOFF_F)\t\t\t\t\t\t\\\n+T(ts_noff_l3l4csum,\t\t\t1, 0, 1, 0, 0, 1,\t8,\t\\\n+\t\tTSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n+T(ts_noff_ol3ol4csum,\t\t\t1, 0, 1, 0, 1, 0,\t8,\t\\\n+\t\tTSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(ts_noff_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 0, 1, 1,\t8,\t\\\n+\t\tTSP_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n+T(ts_noff_vlan,\t\t\t\t1, 0, 1, 1, 0, 0,\t8,\t\\\n+\t\tTSP_F | NOFF_F | VLAN_F)\t\t\t\t\\\n+T(ts_noff_vlan_l3l4csum,\t\t1, 0, 1, 1, 0, 1,\t8,\t\\\n+\t\tTSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(ts_noff_vlan_ol3ol4csum,\t\t1, 0, 1, 1, 1, 0,\t8,\t\\\n+\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n+T(ts_noff_vlan_ol3ol4csum_l3l4csum,\t1, 0, 1, 1, 1, 1,\t8,\t\\\n+\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(ts_tso,\t\t\t\t1, 1, 0, 0, 0, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F)\t\t\t\t\t\t\\\n+T(ts_tso_l3l4csum,\t\t\t1, 1, 0, 0, 0, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | L3L4CSUM_F)\t\t\t\t\\\n+T(ts_tso_ol3ol4csum,\t\t\t1, 1, 0, 0, 1, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(ts_tso_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 0, 1, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(ts_tso_vlan,\t\t\t\t1, 1, 0, 1, 0, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | VLAN_F)\t\t\t\t\t\\\n+T(ts_tso_vlan_l3l4csum,\t\t\t1, 1, 0, 1, 0, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(ts_tso_vlan_ol3ol4csum,\t\t1, 1, 0, 1, 1, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n+T(ts_tso_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 1, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n+T(ts_tso_noff,\t\t\t\t1, 1, 1, 0, 0, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F)\t\t\t\t\t\\\n+T(ts_tso_noff_l3l4csum,\t\t\t1, 1, 1, 0, 0, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n+T(ts_tso_noff_ol3ol4csum,\t\t1, 1, 1, 0, 1, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\\\n+T(ts_tso_noff_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 1, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n+T(ts_tso_noff_vlan,\t\t\t1, 1, 1, 1, 0, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F)\t\t\t\\\n+T(ts_tso_noff_vlan_l3l4csum,\t\t1, 1, 1, 1, 0, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n+T(ts_tso_noff_vlan_ol3ol4csum,\t\t1, 1, 1, 1, 1, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n+T(ts_tso_noff_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 1, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n \n-#define T(name, f4, f3, f2, f1, f0, sz, flags) \\\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_xmit_pkts_##name( \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts); \\\n \t\t\t\t\t\t\t\t\t \\\ndiff --git a/drivers/net/cnxk/cn10k_tx_mseg.c b/drivers/net/cnxk/cn10k_tx_mseg.c\nindex 6ae6907..33f6754 100644\n--- a/drivers/net/cnxk/cn10k_tx_mseg.c\n+++ b/drivers/net/cnxk/cn10k_tx_mseg.c\n@@ -5,7 +5,7 @@\n #include \"cn10k_ethdev.h\"\n #include \"cn10k_tx.h\"\n \n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot\t\t\t\t \\\n \t\tcn10k_nix_xmit_pkts_mseg_##name(void *tx_queue, \\\n \t\t\t\t\t\tstruct rte_mbuf **tx_pkts, \\\ndiff --git a/drivers/net/cnxk/cn10k_tx_vec.c b/drivers/net/cnxk/cn10k_tx_vec.c\nindex 42baeb5..7453f3b 100644\n--- a/drivers/net/cnxk/cn10k_tx_vec.c\n+++ b/drivers/net/cnxk/cn10k_tx_vec.c\n@@ -5,7 +5,7 @@\n #include \"cn10k_ethdev.h\"\n #include \"cn10k_tx.h\"\n \n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot\t\t\t\t \\\n \t\tcn10k_nix_xmit_pkts_vec_##name(void *tx_queue, \\\n \t\t\t\t\t struct rte_mbuf **tx_pkts, \\\n@@ -15,6 +15,7 @@\n \t\t\t\t\t\t\t\t\t \\\n \t\t/* VLAN, TSTMP, TSO is not supported by vec */ \\\n \t\tif ((flags) & NIX_TX_OFFLOAD_VLAN_QINQ_F ||\t\t \\\n+\t\t (flags) & NIX_TX_OFFLOAD_TSTAMP_F ||\t\t \\\n \t\t (flags) & NIX_TX_OFFLOAD_TSO_F)\t\t\t \\\n \t\t\treturn 0; \\\n \t\treturn cn10k_nix_xmit_pkts_vector(tx_queue, tx_pkts, pkts, cmd,\\\ndiff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c\nindex 63b13eb..0d63604 100644\n--- a/drivers/net/cnxk/cn9k_ethdev.c\n+++ b/drivers/net/cnxk/cn9k_ethdev.c\n@@ -30,6 +30,9 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev)\n \tif (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\n \t\tflags |= NIX_RX_MULTI_SEG_F;\n \n+\tif ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP))\n+\t\tflags |= NIX_RX_OFFLOAD_TSTAMP_F;\n+\n \tif (!dev->ptype_disable)\n \t\tflags |= NIX_RX_OFFLOAD_PTYPE_F;\n \n@@ -95,6 +98,9 @@ nix_tx_offload_flags(struct rte_eth_dev *eth_dev)\n \t\tflags |= (NIX_TX_OFFLOAD_TSO_F | NIX_TX_OFFLOAD_OL3_OL4_CSUM_F |\n \t\t\t NIX_TX_OFFLOAD_L3_L4_CSUM_F);\n \n+\tif ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP))\n+\t\tflags |= NIX_TX_OFFLOAD_TSTAMP_F;\n+\n \treturn flags;\n }\n \n@@ -121,10 +127,9 @@ nix_form_default_desc(struct cnxk_eth_dev *dev, struct cn9k_eth_txq *txq,\n {\n \tstruct nix_send_ext_s *send_hdr_ext;\n \tstruct nix_send_hdr_s *send_hdr;\n+\tstruct nix_send_mem_s *send_mem;\n \tunion nix_send_sg_s *sg;\n \n-\tRTE_SET_USED(dev);\n-\n \t/* Initialize the fields based on basic single segment packet */\n \tmemset(&txq->cmd, 0, sizeof(txq->cmd));\n \n@@ -135,6 +140,23 @@ nix_form_default_desc(struct cnxk_eth_dev *dev, struct cn9k_eth_txq *txq,\n \n \t\tsend_hdr_ext = (struct nix_send_ext_s *)&txq->cmd[2];\n \t\tsend_hdr_ext->w0.subdc = NIX_SUBDC_EXT;\n+\t\tif (dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F) {\n+\t\t\t/* Default: one seg packet would have:\n+\t\t\t * 2(HDR) + 2(EXT) + 1(SG) + 1(IOVA) + 2(MEM)\n+\t\t\t * => 8/2 - 1 = 3\n+\t\t\t */\n+\t\t\tsend_hdr->w0.sizem1 = 3;\n+\t\t\tsend_hdr_ext->w0.tstmp = 1;\n+\n+\t\t\t/* To calculate the offset for send_mem,\n+\t\t\t * send_hdr->w0.sizem1 * 2\n+\t\t\t */\n+\t\t\tsend_mem = (struct nix_send_mem_s *)\n+\t\t\t\t(txq->cmd + (send_hdr->w0.sizem1 << 1));\n+\t\t\tsend_mem->w0.cn9k.subdc = NIX_SUBDC_MEM;\n+\t\t\tsend_mem->w0.cn9k.alg = NIX_SENDMEMALG_SETTSTMP;\n+\t\t\tsend_mem->addr = dev->tstamp.tx_tstamp_iova;\n+\t\t}\n \t\tsg = (union nix_send_sg_s *)&txq->cmd[4];\n \t} else {\n \t\tsend_hdr = (struct nix_send_hdr_s *)&txq->cmd[0];\n@@ -219,6 +241,7 @@ cn9k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n \trxq->wdata = cq->wdata;\n \trxq->head = cq->head;\n \trxq->qmask = cq->qmask;\n+\trxq->tstamp = &dev->tstamp;\n \n \t/* Data offset from data to start of mbuf is first_skip */\n \trxq->data_off = rq->first_skip;\n@@ -351,6 +374,7 @@ static int\n cn9k_nix_dev_start(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_nix *nix = &dev->nix;\n \tint rc;\n \n \t/* Common eth dev start */\n@@ -358,6 +382,12 @@ cn9k_nix_dev_start(struct rte_eth_dev *eth_dev)\n \tif (rc)\n \t\treturn rc;\n \n+\t/* Update VF about data off shifted by 8 bytes if PTP already\n+\t * enabled in PF owning this VF\n+\t */\n+\tif (dev->ptp_en && (!roc_nix_is_pf(nix) && (!roc_nix_is_sdp(nix))))\n+\t\tnix_ptp_enable_vf(eth_dev);\n+\n \t/* Setting up the rx[tx]_offload_flags due to change\n \t * in rx[tx]_offloads.\n \t */\ndiff --git a/drivers/net/cnxk/cn9k_ethdev.h b/drivers/net/cnxk/cn9k_ethdev.h\nindex f8344e3..3d4a206 100644\n--- a/drivers/net/cnxk/cn9k_ethdev.h\n+++ b/drivers/net/cnxk/cn9k_ethdev.h\n@@ -29,6 +29,7 @@ struct cn9k_eth_rxq {\n \tuint32_t qmask;\n \tuint32_t available;\n \tuint16_t rq;\n+\tstruct cnxk_timesync_info *tstamp;\n } __plt_cache_aligned;\n \n /* Rx and Tx routines */\ndiff --git a/drivers/net/cnxk/cn9k_rx.c b/drivers/net/cnxk/cn9k_rx.c\nindex 01eb21f..a15428d 100644\n--- a/drivers/net/cnxk/cn9k_rx.c\n+++ b/drivers/net/cnxk/cn9k_rx.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_rx.h\"\n \n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t \\\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name(\t \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\n@@ -17,12 +17,13 @@ NIX_RX_FASTPATH_MODES\n \n static inline void\n pick_rx_func(struct rte_eth_dev *eth_dev,\n-\t const eth_rx_burst_t rx_burst[2][2][2][2])\n+\t const eth_rx_burst_t rx_burst[2][2][2][2][2])\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\t/* [MARK] [CKSUM] [PTYPE] [RSS] */\n+\t/* [TSP] [MARK] [CKSUM] [PTYPE] [RSS] */\n \teth_dev->rx_pkt_burst = rx_burst\n+\t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_TSTAMP_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_CHECKSUM_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)]\n@@ -34,31 +35,34 @@ cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2] = {\n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t\\\n-\t[f3][f2][f1][f0] = cn9k_nix_recv_pkts_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2] = {\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+\t[f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2] = {\n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t\\\n-\t[f3][f2][f1][f0] = cn9k_nix_recv_pkts_mseg_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2] = {\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+\t[f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_mseg_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2] = {\n-#define R(name, f3, f2, f1, f0, flags)\t\t\t\t\t\\\n-\t[f3][f2][f1][f0] = cn9k_nix_recv_pkts_vec_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2] = {\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+\t[f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_vec_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tif (dev->scalar_ena)\n+\t/* For PTP enabled, scalar rx function should be chosen as most of the\n+\t * PTP apps are implemented to rx burst 1 pkt.\n+\t */\n+\tif (dev->scalar_ena || dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)\n \t\tpick_rx_func(eth_dev, nix_eth_rx_burst);\n \telse\n \t\tpick_rx_func(eth_dev, nix_eth_rx_vec_burst);\n@@ -69,6 +73,6 @@ cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n \t/* Copy multi seg version with no offload for tear down sequence */\n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n \t\tdev->rx_pkt_burst_no_offload =\n-\t\t\tnix_eth_rx_burst_mseg[0][0][0][0];\n+\t\t\tnix_eth_rx_burst_mseg[0][0][0][0][0];\n \trte_mb();\n }\ndiff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h\nindex f4b3282..c5ad5db 100644\n--- a/drivers/net/cnxk/cn9k_rx.h\n+++ b/drivers/net/cnxk/cn9k_rx.h\n@@ -8,6 +8,8 @@\n #include <rte_ether.h>\n #include <rte_vect.h>\n \n+#include <cnxk_ethdev.h>\n+\n #define NIX_RX_OFFLOAD_NONE\t (0)\n #define NIX_RX_OFFLOAD_RSS_F\t BIT(0)\n #define NIX_RX_OFFLOAD_PTYPE_F\t BIT(1)\n@@ -253,6 +255,10 @@ cn9k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,\n \n \t\tcn9k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,\n \t\t\t\t flags);\n+\t\tcnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,\n+\t\t\t\t\t(flags & NIX_RX_OFFLOAD_TSTAMP_F),\n+\t\t\t\t\t(uint64_t *)((uint8_t *)mbuf + data_off)\n+\t\t\t\t\t);\n \t\trx_pkts[packets++] = mbuf;\n \t\troc_prefetch_store_keep(mbuf);\n \t\thead++;\n@@ -489,27 +495,44 @@ cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,\n #define PTYPE_F\t NIX_RX_OFFLOAD_PTYPE_F\n #define CKSUM_F\t NIX_RX_OFFLOAD_CHECKSUM_F\n #define MARK_F\t NIX_RX_OFFLOAD_MARK_UPDATE_F\n+#define TS_F\t NIX_RX_OFFLOAD_TSTAMP_F\n \n-/* [MARK] [CKSUM] [PTYPE] [RSS] */\n-#define NIX_RX_FASTPATH_MODES\t\t\t\t\t \\\n-R(no_offload,\t\t\t0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \\\n-R(rss,\t\t\t\t0, 0, 0, 1, RSS_F)\t\t \\\n-R(ptype,\t\t\t0, 0, 1, 0, PTYPE_F)\t\t \\\n-R(ptype_rss,\t\t\t0, 0, 1, 1, PTYPE_F | RSS_F)\t \\\n-R(cksum,\t\t\t0, 1, 0, 0, CKSUM_F)\t\t \\\n-R(cksum_rss,\t\t\t0, 1, 0, 1, CKSUM_F | RSS_F)\t \\\n-R(cksum_ptype,\t\t\t0, 1, 1, 0, CKSUM_F | PTYPE_F)\t \\\n-R(cksum_ptype_rss,\t\t0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \\\n-R(mark,\t\t\t\t1, 0, 0, 0, MARK_F)\t\t \\\n-R(mark_rss,\t\t\t1, 0, 0, 1, MARK_F | RSS_F)\t \\\n-R(mark_ptype,\t\t\t1, 0, 1, 0, MARK_F | PTYPE_F)\t \\\n-R(mark_ptype_rss,\t\t1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \\\n-R(mark_cksum,\t\t\t1, 1, 0, 0, MARK_F | CKSUM_F)\t \\\n-R(mark_cksum_rss,\t\t1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \\\n-R(mark_cksum_ptype,\t\t1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F)\\\n-R(mark_cksum_ptype_rss,\t\t1, 1, 1, 1, MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+/* [TS] [MARK] [CKSUM] [PTYPE] [RSS] */\n+#define NIX_RX_FASTPATH_MODES\t\t\t\t\t\t \\\n+R(no_offload,\t\t\t0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE)\t \\\n+R(rss,\t\t\t\t0, 0, 0, 0, 1, RSS_F)\t\t\t \\\n+R(ptype,\t\t\t0, 0, 0, 1, 0, PTYPE_F)\t\t\t \\\n+R(ptype_rss,\t\t\t0, 0, 0, 1, 1, PTYPE_F | RSS_F)\t\t \\\n+R(cksum,\t\t\t0, 0, 1, 0, 0, CKSUM_F)\t\t\t \\\n+R(cksum_rss,\t\t\t0, 0, 1, 0, 1, CKSUM_F | RSS_F)\t\t \\\n+R(cksum_ptype,\t\t\t0, 0, 1, 1, 0, CKSUM_F | PTYPE_F)\t \\\n+R(cksum_ptype_rss,\t\t0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \\\n+R(mark,\t\t\t\t0, 1, 0, 0, 0, MARK_F)\t\t\t \\\n+R(mark_rss,\t\t\t0, 1, 0, 0, 1, MARK_F | RSS_F)\t\t \\\n+R(mark_ptype,\t\t\t0, 1, 0, 1, 0, MARK_F | PTYPE_F)\t \\\n+R(mark_ptype_rss,\t\t0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \\\n+R(mark_cksum,\t\t\t0, 1, 1, 0, 0, MARK_F | CKSUM_F)\t \\\n+R(mark_cksum_rss,\t\t0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \\\n+R(mark_cksum_ptype,\t\t0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \\\n+R(mark_cksum_ptype_rss,\t\t0, 1, 1, 1, 1, MARK_F | CKSUM_F | PTYPE_F | RSS_F)\\\n+R(ts,\t\t\t\t1, 0, 0, 0, 0, TS_F)\t\t\t \\\n+R(ts_rss,\t\t\t1, 0, 0, 0, 1, TS_F | RSS_F)\t\t \\\n+R(ts_ptype,\t\t\t1, 0, 0, 1, 0, TS_F | PTYPE_F)\t\t \\\n+R(ts_ptype_rss,\t\t\t1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F)\t \\\n+R(ts_cksum,\t\t\t1, 0, 1, 0, 0, TS_F | CKSUM_F)\t\t \\\n+R(ts_cksum_rss,\t\t\t1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F)\t \\\n+R(ts_cksum_ptype,\t\t1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \\\n+R(ts_cksum_ptype_rss,\t\t1, 0, 1, 1, 1, TS_F | CKSUM_F | PTYPE_F | RSS_F)\\\n+R(ts_mark,\t\t\t1, 1, 0, 0, 0, TS_F | MARK_F)\t\t \\\n+R(ts_mark_rss,\t\t\t1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F)\t \\\n+R(ts_mark_ptype,\t\t1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F)\t \\\n+R(ts_mark_ptype_rss,\t\t1, 1, 0, 1, 1, TS_F | MARK_F | PTYPE_F | RSS_F)\\\n+R(ts_mark_cksum,\t\t1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F)\t \\\n+R(ts_mark_cksum_rss,\t\t1, 1, 1, 0, 1, TS_F | MARK_F | CKSUM_F | RSS_F)\\\n+R(ts_mark_cksum_ptype,\t\t1, 1, 1, 1, 0, TS_F | MARK_F | CKSUM_F | PTYPE_F)\\\n+R(ts_mark_cksum_ptype_rss,\t1, 1, 1, 1, 1, TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n \n-#define R(name, f3, f2, f1, f0, flags) \\\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \\\n \t\t\t\t\t\t\t\t\t \\\ndiff --git a/drivers/net/cnxk/cn9k_rx_mseg.c b/drivers/net/cnxk/cn9k_rx_mseg.c\nindex 6ad8c1d..3b26962 100644\n--- a/drivers/net/cnxk/cn9k_rx_mseg.c\n+++ b/drivers/net/cnxk/cn9k_rx_mseg.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_rx.h\"\n \n-#define R(name, f3, f2, f1, f0, flags) \\\n+#define R(name, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_mseg_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\ndiff --git a/drivers/net/cnxk/cn9k_rx_vec.c b/drivers/net/cnxk/cn9k_rx_vec.c\nindex 997177f..b19c7f3 100644\n--- a/drivers/net/cnxk/cn9k_rx_vec.c\n+++ b/drivers/net/cnxk/cn9k_rx_vec.c\n@@ -5,10 +5,13 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_rx.h\"\n \n-#define R(name, f3, f2, f1, f0, flags) \\\n+#define R(name, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\n+\t\t/* TSTMP is not supported by vector */ \\\n+\t\tif ((flags) & NIX_RX_OFFLOAD_TSTAMP_F) \\\n+\t\t\treturn 0; \\\n \t\treturn cn9k_nix_recv_pkts_vector(rx_queue, rx_pkts, pkts, \\\n \t\t\t\t\t\t (flags)); \\\n \t}\ndiff --git a/drivers/net/cnxk/cn9k_tx.c b/drivers/net/cnxk/cn9k_tx.c\nindex 2ff9720..b802606 100644\n--- a/drivers/net/cnxk/cn9k_tx.c\n+++ b/drivers/net/cnxk/cn9k_tx.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_tx.h\"\n \n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_xmit_pkts_##name(\t \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts) \\\n \t{ \\\n@@ -23,12 +23,13 @@ NIX_TX_FASTPATH_MODES\n \n static inline void\n pick_tx_func(struct rte_eth_dev *eth_dev,\n-\t const eth_tx_burst_t tx_burst[2][2][2][2][2])\n+\t const eth_tx_burst_t tx_burst[2][2][2][2][2][2])\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\t/* [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n+\t/* [TS] [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n \teth_dev->tx_pkt_burst = tx_burst\n+\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSO_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n@@ -41,25 +42,25 @@ cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2] = {\n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n-\t[f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2][2] = {\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n+\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2] = {\n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n-\t[f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_mseg_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2][2] = {\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n+\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_mseg_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2] = {\n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n-\t[f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_vec_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2][2] = {\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n+\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_vec_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n@@ -67,7 +68,8 @@ cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev)\n \n \tif (dev->scalar_ena ||\n \t (dev->tx_offload_flags &\n-\t (NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F)))\n+\t (NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSTAMP_F |\n+\t NIX_TX_OFFLOAD_TSO_F)))\n \t\tpick_tx_func(eth_dev, nix_eth_tx_burst);\n \telse\n \t\tpick_tx_func(eth_dev, nix_eth_tx_vec_burst);\ndiff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h\nindex 7b0d536..1899d66 100644\n--- a/drivers/net/cnxk/cn9k_tx.h\n+++ b/drivers/net/cnxk/cn9k_tx.h\n@@ -12,6 +12,7 @@\n #define NIX_TX_OFFLOAD_VLAN_QINQ_F BIT(2)\n #define NIX_TX_OFFLOAD_MBUF_NOFF_F BIT(3)\n #define NIX_TX_OFFLOAD_TSO_F\t BIT(4)\n+#define NIX_TX_OFFLOAD_TSTAMP_F\t BIT(5)\n \n /* Flags to control xmit_prepare function.\n * Defining it from backwards to denote its been\n@@ -24,7 +25,8 @@\n \t NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F)\n \n #define NIX_TX_NEED_EXT_HDR \\\n-\t(NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F)\n+\t(NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSTAMP_F | \\\n+\t NIX_TX_OFFLOAD_TSO_F)\n \n #define NIX_XMIT_FC_OR_RETURN(txq, pkts) \\\n \tdo { \\\n@@ -46,8 +48,12 @@\n static __rte_always_inline int\n cn9k_nix_tx_ext_subs(const uint16_t flags)\n {\n-\treturn (flags &\n-\t\t(NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F)) ? 1 : 0;\n+\treturn (flags & NIX_TX_OFFLOAD_TSTAMP_F)\n+\t\t ? 2\n+\t\t : ((flags &\n+\t\t\t (NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_TSO_F))\n+\t\t\t\t ? 1\n+\t\t\t\t : 0);\n }\n \n static __rte_always_inline void\n@@ -283,6 +289,41 @@ cn9k_nix_xmit_prepare(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags,\n }\n \n static __rte_always_inline void\n+cn9k_nix_xmit_prepare_tstamp(uint64_t *cmd, const uint64_t *send_mem_desc,\n+\t\t\t const uint64_t ol_flags, const uint16_t no_segdw,\n+\t\t\t const uint16_t flags)\n+{\n+\tif (flags & NIX_TX_OFFLOAD_TSTAMP_F) {\n+\t\tstruct nix_send_mem_s *send_mem;\n+\t\tuint16_t off = (no_segdw - 1) << 1;\n+\t\tconst uint8_t is_ol_tstamp = !(ol_flags & PKT_TX_IEEE1588_TMST);\n+\n+\t\tsend_mem = (struct nix_send_mem_s *)(cmd + off);\n+\t\tif (flags & NIX_TX_MULTI_SEG_F) {\n+\t\t\t/* Retrieving the default desc values */\n+\t\t\tcmd[off] = send_mem_desc[6];\n+\n+\t\t\t/* Using compiler barier to avoid voilation of C\n+\t\t\t * aliasing rules.\n+\t\t\t */\n+\t\t\trte_compiler_barrier();\n+\t\t}\n+\n+\t\t/* Packets for which PKT_TX_IEEE1588_TMST is not set, tx tstamp\n+\t\t * should not be recorded, hence changing the alg type to\n+\t\t * NIX_SENDMEMALG_SET and also changing send mem addr field to\n+\t\t * next 8 bytes as it corrpt the actual tx tstamp registered\n+\t\t * address.\n+\t\t */\n+\t\tsend_mem->w0.cn9k.alg =\n+\t\t\tNIX_SENDMEMALG_SETTSTMP - (is_ol_tstamp);\n+\n+\t\tsend_mem->addr = (rte_iova_t)((uint64_t *)send_mem_desc[7] +\n+\t\t\t\t\t (is_ol_tstamp));\n+\t}\n+}\n+\n+static __rte_always_inline void\n cn9k_nix_xmit_one(uint64_t *cmd, void *lmt_addr, const rte_iova_t io_addr,\n \t\t const uint32_t flags)\n {\n@@ -380,7 +421,7 @@ cn9k_nix_prepare_mseg(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags)\n \t/* Roundup extra dwords to multiple of 2 */\n \tsegdw = (segdw >> 1) + (segdw & 0x1);\n \t/* Default dwords */\n-\tsegdw += (off >> 1) + 1;\n+\tsegdw += (off >> 1) + 1 + !!(flags & NIX_TX_OFFLOAD_TSTAMP_F);\n \tsend_hdr->w0.sizem1 = segdw - 1;\n \n \treturn segdw;\n@@ -447,6 +488,8 @@ cn9k_nix_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts,\n \n \tfor (i = 0; i < pkts; i++) {\n \t\tcn9k_nix_xmit_prepare(tx_pkts[i], cmd, flags, lso_tun_fmt);\n+\t\tcn9k_nix_xmit_prepare_tstamp(cmd, &txq->cmd[0],\n+\t\t\t\t\t tx_pkts[i]->ol_flags, 4, flags);\n \t\tcn9k_nix_xmit_one(cmd, lmt_addr, io_addr, flags);\n \t}\n \n@@ -488,6 +531,9 @@ cn9k_nix_xmit_pkts_mseg(void *tx_queue, struct rte_mbuf **tx_pkts,\n \tfor (i = 0; i < pkts; i++) {\n \t\tcn9k_nix_xmit_prepare(tx_pkts[i], cmd, flags, lso_tun_fmt);\n \t\tsegdw = cn9k_nix_prepare_mseg(tx_pkts[i], cmd, flags);\n+\t\tcn9k_nix_xmit_prepare_tstamp(cmd, &txq->cmd[0],\n+\t\t\t\t\t tx_pkts[i]->ol_flags, segdw,\n+\t\t\t\t\t flags);\n \t\tcn9k_nix_xmit_mseg_one(cmd, lmt_addr, io_addr, segdw);\n \t}\n \n@@ -1241,75 +1287,140 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts,\n #define VLAN_F\t NIX_TX_OFFLOAD_VLAN_QINQ_F\n #define NOFF_F\t NIX_TX_OFFLOAD_MBUF_NOFF_F\n #define TSO_F\t NIX_TX_OFFLOAD_TSO_F\n+#define TSP_F\t NIX_TX_OFFLOAD_TSTAMP_F\n \n-/* [TSO] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n-#define NIX_TX_FASTPATH_MODES\t\t\t\t\t\t\\\n-T(no_offload,\t\t\t\t0, 0, 0, 0, 0,\t4,\t\t\\\n-\t\tNIX_TX_OFFLOAD_NONE)\t\t\t\t\t\\\n-T(l3l4csum,\t\t\t\t0, 0, 0, 0, 1,\t4,\t\t\\\n-\t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n-T(ol3ol4csum,\t\t\t\t0, 0, 0, 1, 0,\t4,\t\t\\\n-\t\tOL3OL4CSUM_F)\t\t\t\t\t\t\\\n-T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 1, 1,\t4,\t\t\\\n-\t\tOL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\t\\\n-T(vlan,\t\t\t\t\t0, 0, 1, 0, 0,\t6,\t\t\\\n-\t\tVLAN_F)\t\t\t\t\t\t\t\\\n-T(vlan_l3l4csum,\t\t\t0, 0, 1, 0, 1,\t6,\t\t\\\n-\t\tVLAN_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(vlan_ol3ol4csum,\t\t\t0, 0, 1, 1, 0,\t6,\t\t\\\n-\t\tVLAN_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 1, 1,\t6,\t\t\\\n-\t\tVLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n-T(noff,\t\t\t\t\t0, 1, 0, 0, 0,\t4,\t\t\\\n-\t\tNOFF_F)\t\t\t\t\t\t\t\\\n-T(noff_l3l4csum,\t\t\t0, 1, 0, 0, 1,\t4,\t\t\\\n-\t\tNOFF_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(noff_ol3ol4csum,\t\t\t0, 1, 0, 1, 0,\t4,\t\t\\\n-\t\tNOFF_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(noff_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 1,\t4,\t\t\\\n-\t\tNOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n-T(noff_vlan,\t\t\t\t0, 1, 1, 0, 0,\t6,\t\t\\\n-\t\tNOFF_F | VLAN_F)\t\t\t\t\t\\\n-T(noff_vlan_l3l4csum,\t\t\t0, 1, 1, 0, 1,\t6,\t\t\\\n-\t\tNOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(noff_vlan_ol3ol4csum,\t\t\t0, 1, 1, 1, 0,\t6,\t\t\\\n-\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1,\t6,\t\t\\\n-\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(tso,\t\t\t\t\t1, 0, 0, 0, 0,\t6,\t\t\\\n-\t\tTSO_F)\t\t\t\t\t\t\t\\\n-T(tso_l3l4csum,\t\t\t\t1, 0, 0, 0, 1,\t6,\t\t\\\n-\t\tTSO_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(tso_ol3ol4csum,\t\t\t1, 0, 0, 1, 0,\t6,\t\t\\\n-\t\tTSO_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(tso_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 1,\t6,\t\t\\\n-\t\tTSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_vlan,\t\t\t\t1, 0, 1, 0, 0,\t6,\t\t\\\n-\t\tTSO_F | VLAN_F)\t\t\t\t\t\t\\\n-T(tso_vlan_l3l4csum,\t\t\t1, 0, 1, 0, 1,\t6,\t\t\\\n-\t\tTSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_vlan_ol3ol4csum,\t\t\t1, 0, 1, 1, 0,\t6,\t\t\\\n-\t\tTSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 1, 1,\t6,\t\t\\\n-\t\tTSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(tso_noff,\t\t\t\t1, 1, 0, 0, 0,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F)\t\t\t\t\t\t\\\n-T(tso_noff_l3l4csum,\t\t\t1, 1, 0, 0, 1,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_noff_ol3ol4csum,\t\t\t1, 1, 0, 1, 0,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_noff_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 1, 1,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(tso_noff_vlan,\t\t\t1, 1, 1, 0, 0,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F)\t\t\t\t\\\n-T(tso_noff_vlan_l3l4csum,\t\t1, 1, 1, 0, 1,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_noff_vlan_ol3ol4csum,\t\t1, 1, 1, 1, 0,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 1,\t6,\t\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+/* [TSP] [TSO] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n+#define NIX_TX_FASTPATH_MODES\t\t\t\t\t\t \\\n+T(no_offload,\t\t\t\t0, 0, 0, 0, 0, 0,\t4,\t \\\n+\t\tNIX_TX_OFFLOAD_NONE)\t\t\t\t\t \\\n+T(l3l4csum,\t\t\t\t0, 0, 0, 0, 0, 1,\t4,\t \\\n+\t\tL3L4CSUM_F)\t\t\t\t\t\t \\\n+T(ol3ol4csum,\t\t\t\t0, 0, 0, 0, 1, 0,\t4,\t \\\n+\t\tOL3OL4CSUM_F)\t\t\t\t\t\t \\\n+T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 0, 1, 1,\t4,\t \\\n+\t\tOL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\t \\\n+T(vlan,\t\t\t\t\t0, 0, 0, 1, 0, 0,\t6,\t \\\n+\t\tVLAN_F)\t\t\t\t\t\t\t \\\n+T(vlan_l3l4csum,\t\t\t0, 0, 0, 1, 0, 1,\t6,\t \\\n+\t\tVLAN_F | L3L4CSUM_F)\t\t\t\t\t \\\n+T(vlan_ol3ol4csum,\t\t\t0, 0, 0, 1, 1, 0,\t6,\t \\\n+\t\tVLAN_F | OL3OL4CSUM_F)\t\t\t\t\t \\\n+T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 1, 1, 1,\t6,\t \\\n+\t\tVLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t \\\n+T(noff,\t\t\t\t\t0, 0, 1, 0, 0, 0,\t4,\t \\\n+\t\tNOFF_F)\t\t\t\t\t\t\t \\\n+T(noff_l3l4csum,\t\t\t0, 0, 1, 0, 0, 1,\t4,\t \\\n+\t\tNOFF_F | L3L4CSUM_F)\t\t\t\t\t \\\n+T(noff_ol3ol4csum,\t\t\t0, 0, 1, 0, 1, 0,\t4,\t \\\n+\t\tNOFF_F | OL3OL4CSUM_F)\t\t\t\t\t \\\n+T(noff_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 1, 1,\t4,\t \\\n+\t\tNOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t \\\n+T(noff_vlan,\t\t\t\t0, 0, 1, 1, 0, 0,\t6,\t \\\n+\t\tNOFF_F | VLAN_F)\t\t\t\t\t \\\n+T(noff_vlan_l3l4csum,\t\t\t0, 0, 1, 1, 0, 1,\t6,\t \\\n+\t\tNOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\t \\\n+T(noff_vlan_ol3ol4csum,\t\t\t0, 0, 1, 1, 1, 0,\t6,\t \\\n+\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t \\\n+T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 1, 1, 1, 1,\t6,\t \\\n+\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t \\\n+T(tso,\t\t\t\t\t0, 1, 0, 0, 0, 0,\t6,\t \\\n+\t\tTSO_F)\t\t\t\t\t\t\t \\\n+T(tso_l3l4csum,\t\t\t\t0, 1, 0, 0, 0, 1,\t6,\t \\\n+\t\tTSO_F | L3L4CSUM_F)\t\t\t\t\t \\\n+T(tso_ol3ol4csum,\t\t\t0, 1, 0, 0, 1, 0,\t6,\t \\\n+\t\tTSO_F | OL3OL4CSUM_F)\t\t\t\t\t \\\n+T(tso_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 1, 1,\t6,\t \\\n+\t\tTSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t \\\n+T(tso_vlan,\t\t\t\t0, 1, 0, 1, 0, 0,\t6,\t \\\n+\t\tTSO_F | VLAN_F)\t\t\t\t\t\t \\\n+T(tso_vlan_l3l4csum,\t\t\t0, 1, 0, 1, 0, 1,\t6,\t \\\n+\t\tTSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\t \\\n+T(tso_vlan_ol3ol4csum,\t\t\t0, 1, 0, 1, 1, 0,\t6,\t \\\n+\t\tTSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t \\\n+T(tso_vlan_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 1, 1,\t6,\t \\\n+\t\tTSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t \\\n+T(tso_noff,\t\t\t\t0, 1, 1, 0, 0, 0,\t6,\t \\\n+\t\tTSO_F | NOFF_F)\t\t\t\t\t\t \\\n+T(tso_noff_l3l4csum,\t\t\t0, 1, 1, 0, 0, 1,\t6,\t \\\n+\t\tTSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\t \\\n+T(tso_noff_ol3ol4csum,\t\t\t0, 1, 1, 0, 1, 0,\t6,\t \\\n+\t\tTSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t \\\n+T(tso_noff_ol3ol4csum_l3l4csum,\t\t0, 1, 1, 0, 1, 1,\t6,\t \\\n+\t\tTSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t \\\n+T(tso_noff_vlan,\t\t\t0, 1, 1, 1, 0, 0,\t6,\t \\\n+\t\tTSO_F | NOFF_F | VLAN_F)\t\t\t\t \\\n+T(tso_noff_vlan_l3l4csum,\t\t0, 1, 1, 1, 0, 1,\t6,\t \\\n+\t\tTSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t \\\n+T(tso_noff_vlan_ol3ol4csum,\t\t0, 1, 1, 1, 1, 0,\t6,\t \\\n+\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t \\\n+T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1, 1,\t6,\t \\\n+\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t \\\n+T(ts,\t\t\t\t\t1, 0, 0, 0, 0, 0,\t8,\t \\\n+\t\tTSP_F)\t\t\t\t\t\t\t \\\n+T(ts_l3l4csum,\t\t\t\t1, 0, 0, 0, 0, 1,\t8,\t \\\n+\t\tTSP_F | L3L4CSUM_F)\t\t\t\t\t \\\n+T(ts_ol3ol4csum,\t\t\t1, 0, 0, 0, 1, 0,\t8,\t \\\n+\t\tTSP_F | OL3OL4CSUM_F)\t\t\t\t\t \\\n+T(ts_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 1, 1,\t8,\t \\\n+\t\tTSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t \\\n+T(ts_vlan,\t\t\t\t1, 0, 0, 1, 0, 0,\t8,\t \\\n+\t\tTSP_F | VLAN_F)\t\t\t\t\t\t \\\n+T(ts_vlan_l3l4csum,\t\t\t1, 0, 0, 1, 0, 1,\t8,\t \\\n+\t\tTSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\t \\\n+T(ts_vlan_ol3ol4csum,\t\t\t1, 0, 0, 1, 1, 0,\t8,\t \\\n+\t\tTSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t \\\n+T(ts_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 1, 1,\t8,\t \\\n+\t\tTSP_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t \\\n+T(ts_noff,\t\t\t\t1, 0, 1, 0, 0, 0,\t8,\t \\\n+\t\tTSP_F | NOFF_F)\t\t\t\t\t\t \\\n+T(ts_noff_l3l4csum,\t\t\t1, 0, 1, 0, 0, 1,\t8,\t \\\n+\t\tTSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\t \\\n+T(ts_noff_ol3ol4csum,\t\t\t1, 0, 1, 0, 1, 0,\t8,\t \\\n+\t\tTSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t \\\n+T(ts_noff_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 0, 1, 1,\t8,\t \\\n+\t\tTSP_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t \\\n+T(ts_noff_vlan,\t\t\t\t1, 0, 1, 1, 0, 0,\t8,\t \\\n+\t\tTSP_F | NOFF_F | VLAN_F)\t\t\t\t \\\n+T(ts_noff_vlan_l3l4csum,\t\t1, 0, 1, 1, 0, 1,\t8,\t \\\n+\t\tTSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t \\\n+T(ts_noff_vlan_ol3ol4csum,\t\t1, 0, 1, 1, 1, 0,\t8,\t \\\n+\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t \\\n+T(ts_noff_vlan_ol3ol4csum_l3l4csum,\t1, 0, 1, 1, 1, 1,\t8,\t \\\n+\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t \\\n+T(ts_tso,\t\t\t\t1, 1, 0, 0, 0, 0,\t8,\t \\\n+\t\tTSP_F | TSO_F)\t\t\t\t\t\t \\\n+T(ts_tso_l3l4csum,\t\t\t1, 1, 0, 0, 0, 1,\t8,\t \\\n+\t\tTSP_F | TSO_F | L3L4CSUM_F)\t\t\t\t \\\n+T(ts_tso_ol3ol4csum,\t\t\t1, 1, 0, 0, 1, 0,\t8,\t \\\n+\t\tTSP_F | TSO_F | OL3OL4CSUM_F)\t\t\t\t \\\n+T(ts_tso_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 0, 1, 1,\t8,\t \\\n+\t\tTSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t \\\n+T(ts_tso_vlan,\t\t\t\t1, 1, 0, 1, 0, 0,\t8,\t \\\n+\t\tTSP_F | TSO_F | VLAN_F)\t\t\t\t\t \\\n+T(ts_tso_vlan_l3l4csum,\t\t\t1, 1, 0, 1, 0, 1,\t8,\t \\\n+\t\tTSP_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\t \\\n+T(ts_tso_vlan_ol3ol4csum,\t\t1, 1, 0, 1, 1, 0,\t8,\t \\\n+\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t \\\n+T(ts_tso_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 1, 1,\t8,\t \\\n+\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t \\\n+T(ts_tso_noff,\t\t\t\t1, 1, 1, 0, 0, 0,\t8,\t \\\n+\t\tTSP_F | TSO_F | NOFF_F)\t\t\t\t\t \\\n+T(ts_tso_noff_l3l4csum,\t\t\t1, 1, 1, 0, 0, 1,\t8,\t \\\n+\t\tTSP_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\t \\\n+T(ts_tso_noff_ol3ol4csum,\t\t1, 1, 1, 0, 1, 0,\t8,\t \\\n+\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t \\\n+T(ts_tso_noff_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 1, 1,\t8,\t \\\n+\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t \\\n+T(ts_tso_noff_vlan,\t\t\t1, 1, 1, 1, 0, 0,\t8,\t \\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F)\t\t\t \\\n+T(ts_tso_noff_vlan_l3l4csum,\t\t1, 1, 1, 1, 0, 1,\t8,\t \\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t \\\n+T(ts_tso_noff_vlan_ol3ol4csum,\t\t1, 1, 1, 1, 1, 0,\t8,\t \\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t \\\n+T(ts_tso_noff_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 1, 1,\t8,\t \\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n \n-#define T(name, f4, f3, f2, f1, f0, sz, flags) \\\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_xmit_pkts_##name( \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts); \\\n \t\t\t\t\t\t\t\t\t \\\ndiff --git a/drivers/net/cnxk/cn9k_tx_mseg.c b/drivers/net/cnxk/cn9k_tx_mseg.c\nindex 65c5f36..f3c427c 100644\n--- a/drivers/net/cnxk/cn9k_tx_mseg.c\n+++ b/drivers/net/cnxk/cn9k_tx_mseg.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_tx.h\"\n \n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot\t\t\t\t \\\n \t\tcn9k_nix_xmit_pkts_mseg_##name(void *tx_queue, \\\n \t\t\t\t\t struct rte_mbuf **tx_pkts, \\\ndiff --git a/drivers/net/cnxk/cn9k_tx_vec.c b/drivers/net/cnxk/cn9k_tx_vec.c\nindex 21ffc2c..a6e7c9e 100644\n--- a/drivers/net/cnxk/cn9k_tx_vec.c\n+++ b/drivers/net/cnxk/cn9k_tx_vec.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_tx.h\"\n \n-#define T(name, f4, f3, f2, f1, f0, sz, flags)\t\t\t\t \\\n+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot\t\t\t\t \\\n \t\tcn9k_nix_xmit_pkts_vec_##name(void *tx_queue, \\\n \t\t\t\t\t struct rte_mbuf **tx_pkts, \\\n@@ -15,6 +15,7 @@\n \t\t\t\t\t\t\t\t\t \\\n \t\t/* VLAN, TSTMP, TSO is not supported by vec */ \\\n \t\tif ((flags) & NIX_TX_OFFLOAD_VLAN_QINQ_F ||\t\t \\\n+\t\t (flags) & NIX_TX_OFFLOAD_TSTAMP_F ||\t\t \\\n \t\t (flags) & NIX_TX_OFFLOAD_TSO_F)\t\t\t \\\n \t\t\treturn 0; \\\n \t\treturn cn9k_nix_xmit_pkts_vector(tx_queue, tx_pkts, pkts, cmd, \\\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex 522f7ec..fc91346 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -150,7 +150,8 @@ cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev)\n \t\t\t\t offsetof(struct rte_mbuf, data_off) !=\n \t\t\t 6);\n \tmb_def.nb_segs = 1;\n-\tmb_def.data_off = RTE_PKTMBUF_HEADROOM;\n+\tmb_def.data_off = RTE_PKTMBUF_HEADROOM +\n+\t\t\t (dev->ptp_en * CNXK_NIX_TIMESYNC_RX_OFFSET);\n \tmb_def.port = port_id;\n \trte_mbuf_refcnt_set(&mb_def, 1);\n \n@@ -356,6 +357,18 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n \teth_dev->data->rx_queues[qid] = rxq_sp + 1;\n \teth_dev->data->rx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STOPPED;\n \n+\t/* Calculating delta and freq mult between PTP HI clock and tsc.\n+\t * These are needed in deriving raw clock value from tsc counter.\n+\t * read_clock eth op returns raw clock value.\n+\t */\n+\tif ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP) || dev->ptp_en) {\n+\t\trc = cnxk_nix_tsc_convert(dev);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to calculate delta and freq mult\");\n+\t\t\tgoto rq_fini;\n+\t\t}\n+\t}\n+\n \treturn 0;\n rq_fini:\n \trc |= roc_nix_rq_fini(rq);\n@@ -1124,7 +1137,7 @@ cnxk_nix_dev_start(struct rte_eth_dev *eth_dev)\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \tint rc, i;\n \n-\tif (eth_dev->data->nb_rx_queues != 0) {\n+\tif (eth_dev->data->nb_rx_queues != 0 && !dev->ptp_en) {\n \t\trc = nix_recalc_mtu(eth_dev);\n \t\tif (rc)\n \t\t\treturn rc;\n@@ -1169,6 +1182,25 @@ cnxk_nix_dev_start(struct rte_eth_dev *eth_dev)\n \t\t}\n \t}\n \n+\t/* Enable PTP if it is requested by the user or already\n+\t * enabled on PF owning this VF\n+\t */\n+\tmemset(&dev->tstamp, 0, sizeof(struct cnxk_timesync_info));\n+\tif ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP) || dev->ptp_en)\n+\t\tcnxk_eth_dev_ops.timesync_enable(eth_dev);\n+\telse\n+\t\tcnxk_eth_dev_ops.timesync_disable(eth_dev);\n+\n+\tif (dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP) {\n+\t\trc = rte_mbuf_dyn_rx_timestamp_register\n+\t\t\t(&dev->tstamp.tstamp_dynfield_offset,\n+\t\t\t &dev->tstamp.rx_tstamp_dynflag);\n+\t\tif (rc != 0) {\n+\t\t\tplt_err(\"Failed to register Rx timestamp field/flag\");\n+\t\t\tgoto rx_disable;\n+\t\t}\n+\t}\n+\n \tcnxk_nix_toggle_flag_link_cfg(dev, false);\n \n \treturn 0;\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex 1c41dcb..de6d533 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -13,6 +13,7 @@\n #include <rte_mbuf.h>\n #include <rte_mbuf_pool_ops.h>\n #include <rte_mempool.h>\n+#include <rte_time.h>\n \n #include \"roc_api.h\"\n \n@@ -75,7 +76,7 @@\n \t(DEV_RX_OFFLOAD_CHECKSUM | DEV_RX_OFFLOAD_SCTP_CKSUM | \\\n \t DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | DEV_RX_OFFLOAD_SCATTER | \\\n \t DEV_RX_OFFLOAD_JUMBO_FRAME | DEV_RX_OFFLOAD_OUTER_UDP_CKSUM | \\\n-\t DEV_RX_OFFLOAD_RSS_HASH)\n+\t DEV_RX_OFFLOAD_RSS_HASH | DEV_RX_OFFLOAD_TIMESTAMP)\n \n #define RSS_IPV4_ENABLE \\\n \t(ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_UDP | \\\n@@ -100,7 +101,10 @@\n /* Default mark value used when none is provided. */\n #define CNXK_FLOW_ACTION_FLAG_DEFAULT 0xffff\n \n+/* Default cycle counter mask */\n+#define CNXK_CYCLECOUNTER_MASK 0xffffffffffffffffULL\n #define CNXK_NIX_TIMESYNC_RX_OFFSET 8\n+\n #define PTYPE_NON_TUNNEL_WIDTH\t 16\n #define PTYPE_TUNNEL_WIDTH\t 12\n #define PTYPE_NON_TUNNEL_ARRAY_SZ BIT(PTYPE_NON_TUNNEL_WIDTH)\n@@ -130,6 +134,16 @@ struct cnxk_eth_qconf {\n \tuint8_t valid;\n };\n \n+struct cnxk_timesync_info {\n+\tuint64_t rx_tstamp_dynflag;\n+\trte_iova_t tx_tstamp_iova;\n+\tuint64_t *tx_tstamp;\n+\tuint64_t rx_tstamp;\n+\tint tstamp_dynfield_offset;\n+\tuint8_t tx_ready;\n+\tuint8_t rx_ready;\n+} __plt_cache_aligned;\n+\n struct cnxk_eth_dev {\n \t/* ROC NIX */\n \tstruct roc_nix nix;\n@@ -188,6 +202,14 @@ struct cnxk_eth_dev {\n \t/* Flow control configuration */\n \tstruct cnxk_fc_cfg fc_cfg;\n \n+\t/* PTP Counters */\n+\tstruct cnxk_timesync_info tstamp;\n+\tstruct rte_timecounter systime_tc;\n+\tstruct rte_timecounter rx_tstamp_tc;\n+\tstruct rte_timecounter tx_tstamp_tc;\n+\tdouble clk_freq_mult;\n+\tuint64_t clk_delta;\n+\n \t/* Rx burst for cleanup(Only Primary) */\n \teth_rx_burst_t rx_pkt_burst_no_offload;\n \n@@ -288,6 +310,9 @@ int cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n int cnxk_nix_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qid);\n int cnxk_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qid);\n int cnxk_nix_dev_start(struct rte_eth_dev *eth_dev);\n+int cnxk_nix_timesync_enable(struct rte_eth_dev *eth_dev);\n+int cnxk_nix_timesync_disable(struct rte_eth_dev *eth_dev);\n+int cnxk_nix_tsc_convert(struct cnxk_eth_dev *dev);\n \n uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev);\n \n@@ -404,4 +429,41 @@ cnxk_nix_prefree_seg(struct rte_mbuf *m)\n \treturn 1;\n }\n \n+static inline rte_mbuf_timestamp_t *\n+cnxk_nix_timestamp_dynfield(struct rte_mbuf *mbuf,\n+\t\t\t struct cnxk_timesync_info *info)\n+{\n+\treturn RTE_MBUF_DYNFIELD(mbuf, info->tstamp_dynfield_offset,\n+\t\t\t\t rte_mbuf_timestamp_t *);\n+}\n+\n+static __rte_always_inline void\n+cnxk_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,\n+\t\t\tstruct cnxk_timesync_info *tstamp, bool ts_enable,\n+\t\t\tuint64_t *tstamp_ptr)\n+{\n+\tif (ts_enable &&\n+\t (mbuf->data_off ==\n+\t RTE_PKTMBUF_HEADROOM + CNXK_NIX_TIMESYNC_RX_OFFSET)) {\n+\t\tmbuf->pkt_len -= CNXK_NIX_TIMESYNC_RX_OFFSET;\n+\n+\t\t/* Reading the rx timestamp inserted by CGX, viz at\n+\t\t * starting of the packet data.\n+\t\t */\n+\t\t*cnxk_nix_timestamp_dynfield(mbuf, tstamp) =\n+\t\t\trte_be_to_cpu_64(*tstamp_ptr);\n+\t\t/* PKT_RX_IEEE1588_TMST flag needs to be set only in case\n+\t\t * PTP packets are received.\n+\t\t */\n+\t\tif (mbuf->packet_type == RTE_PTYPE_L2_ETHER_TIMESYNC) {\n+\t\t\ttstamp->rx_tstamp =\n+\t\t\t\t*cnxk_nix_timestamp_dynfield(mbuf, tstamp);\n+\t\t\ttstamp->rx_ready = 1;\n+\t\t\tmbuf->ol_flags |= PKT_RX_IEEE1588_PTP |\n+\t\t\t\t\t PKT_RX_IEEE1588_TMST |\n+\t\t\t\t\t tstamp->rx_tstamp_dynflag;\n+\t\t}\n+\t}\n+}\n+\n #endif /* __CNXK_ETHDEV_H__ */\ndiff --git a/drivers/net/cnxk/cnxk_ptp.c b/drivers/net/cnxk/cnxk_ptp.c\nnew file mode 100644\nindex 0000000..fc317965\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_ptp.c\n@@ -0,0 +1,169 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cnxk_ethdev.h\"\n+\n+/* This function calculates two parameters \"clk_freq_mult\" and\n+ * \"clk_delta\" which is useful in deriving PTP HI clock from\n+ * timestamp counter (tsc) value.\n+ */\n+int\n+cnxk_nix_tsc_convert(struct cnxk_eth_dev *dev)\n+{\n+\tuint64_t ticks_base = 0, ticks = 0, tsc = 0, t_freq;\n+\tstruct roc_nix *nix = &dev->nix;\n+\tint rc, val;\n+\n+\t/* Calculating the frequency at which PTP HI clock is running */\n+\trc = roc_nix_ptp_clock_read(nix, &ticks_base, &tsc, false);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to read the raw clock value: %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\n+\trte_delay_ms(100);\n+\n+\trc = roc_nix_ptp_clock_read(nix, &ticks, &tsc, false);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to read the raw clock value: %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\n+\tt_freq = (ticks - ticks_base) * 10;\n+\n+\t/* Calculating the freq multiplier viz the ratio between the\n+\t * frequency at which PTP HI clock works and tsc clock runs\n+\t */\n+\tdev->clk_freq_mult =\n+\t\t(double)pow(10, floor(log10(t_freq))) / rte_get_timer_hz();\n+\n+\tval = false;\n+#ifdef RTE_ARM_EAL_RDTSC_USE_PMU\n+\tval = true;\n+#endif\n+\trc = roc_nix_ptp_clock_read(nix, &ticks, &tsc, val);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to read the raw clock value: %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Calculating delta between PTP HI clock and tsc */\n+\tdev->clk_delta = ((uint64_t)(ticks / dev->clk_freq_mult) - tsc);\n+\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_nix_timesync_enable(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct cnxk_timesync_info *tstamp = &dev->tstamp;\n+\tstruct roc_nix *nix = &dev->nix;\n+\tconst struct rte_memzone *ts;\n+\tint rc = 0;\n+\n+\t/* If we are VF/SDP/LBK, ptp cannot not be enabled */\n+\tif (roc_nix_is_vf_or_sdp(nix) || roc_nix_is_lbk(nix)) {\n+\t\tplt_err(\"PTP cannot be enabled for VF/SDP/LBK\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (dev->ptp_en)\n+\t\treturn rc;\n+\n+\tif (dev->ptype_disable) {\n+\t\tplt_err(\"Ptype offload is disabled, it should be enabled\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (dev->npc.switch_header_type == ROC_PRIV_FLAGS_HIGIG) {\n+\t\tplt_err(\"Both PTP and switch header cannot be enabled\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Allocating a iova address for tx tstamp */\n+\tts = rte_eth_dma_zone_reserve(eth_dev, \"cnxk_ts\", 0, 128, 128, 0);\n+\tif (ts == NULL) {\n+\t\tplt_err(\"Failed to allocate mem for tx tstamp addr\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\ttstamp->tx_tstamp_iova = ts->iova;\n+\ttstamp->tx_tstamp = ts->addr;\n+\n+\trc = rte_mbuf_dyn_rx_timestamp_register(&tstamp->tstamp_dynfield_offset,\n+\t\t\t\t\t\t&tstamp->rx_tstamp_dynflag);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to register Rx timestamp field/flag\");\n+\t\tgoto error;\n+\t}\n+\n+\t/* System time should be already on by default */\n+\tmemset(&dev->systime_tc, 0, sizeof(struct rte_timecounter));\n+\tmemset(&dev->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));\n+\tmemset(&dev->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));\n+\n+\tdev->systime_tc.cc_mask = CNXK_CYCLECOUNTER_MASK;\n+\tdev->rx_tstamp_tc.cc_mask = CNXK_CYCLECOUNTER_MASK;\n+\tdev->tx_tstamp_tc.cc_mask = CNXK_CYCLECOUNTER_MASK;\n+\n+\tdev->rx_offloads |= DEV_RX_OFFLOAD_TIMESTAMP;\n+\n+\trc = roc_nix_ptp_rx_ena_dis(nix, true);\n+\tif (!rc) {\n+\t\trc = roc_nix_ptp_tx_ena_dis(nix, true);\n+\t\tif (rc) {\n+\t\t\troc_nix_ptp_rx_ena_dis(nix, false);\n+\t\t\tgoto error;\n+\t\t}\n+\t}\n+\n+\trc = nix_recalc_mtu(eth_dev);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to set MTU size for ptp\");\n+\t\tgoto error;\n+\t}\n+\n+\treturn rc;\n+\n+error:\n+\trte_eth_dma_zone_free(eth_dev, \"cnxk_ts\", 0);\n+\tdev->tstamp.tx_tstamp_iova = 0;\n+\tdev->tstamp.tx_tstamp = NULL;\n+\treturn rc;\n+}\n+\n+int\n+cnxk_nix_timesync_disable(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tuint64_t rx_offloads = DEV_RX_OFFLOAD_TIMESTAMP;\n+\tstruct roc_nix *nix = &dev->nix;\n+\tint rc = 0;\n+\n+\t/* If we are VF/SDP/LBK, ptp cannot not be disabled */\n+\tif (roc_nix_is_vf_or_sdp(nix) || roc_nix_is_lbk(nix))\n+\t\treturn -EINVAL;\n+\n+\tif (!dev->ptp_en)\n+\t\treturn rc;\n+\n+\tdev->rx_offloads &= ~rx_offloads;\n+\n+\trc = roc_nix_ptp_rx_ena_dis(nix, false);\n+\tif (!rc) {\n+\t\trc = roc_nix_ptp_tx_ena_dis(nix, false);\n+\t\tif (rc) {\n+\t\t\troc_nix_ptp_rx_ena_dis(nix, true);\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n+\trc = nix_recalc_mtu(eth_dev);\n+\tif (rc)\n+\t\tplt_err(\"Failed to set MTU size for ptp\");\n+\n+\treturn rc;\n+}\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex df953fd..2071d0d 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -13,6 +13,7 @@ sources = files('cnxk_ethdev.c',\n \t\t'cnxk_ethdev_devargs.c',\n \t\t'cnxk_link.c',\n \t\t'cnxk_lookup.c',\n+\t\t'cnxk_ptp.c',\n \t\t'cnxk_rte_flow.c',\n \t\t'cnxk_stats.c')\n \n", "prefixes": [ "v4", "55/62" ] }