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GET /api/patches/94745/?format=api
{ "id": 94745, "url": "https://patches.dpdk.org/api/patches/94745/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-50-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210623044702.4240-50-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210623044702.4240-50-ndabilpuram@marvell.com", "date": "2021-06-23T04:46:49", "name": "[v4,49/62] net/cnxk: support initial version of rte flow", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "fdac3901eb49f54208d7a064ebb457f1c16a43ca", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-50-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 17449, "url": "https://patches.dpdk.org/api/series/17449/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17449", "date": "2021-06-23T04:46:00", "name": "Marvell CNXK Ethdev Driver", "version": 4, "mbox": "https://patches.dpdk.org/series/17449/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94745/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94745/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 41079A0C41;\n\tWed, 23 Jun 2021 06:52:43 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B62CF411D2;\n\tWed, 23 Jun 2021 06:50:00 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id BB78541164\n for <dev@dpdk.org>; Wed, 23 Jun 2021 06:49:59 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15N4k6ZB025521 for <dev@dpdk.org>; Tue, 22 Jun 2021 21:49:59 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 39bptj1gu8-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 22 Jun 2021 21:49:58 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 22 Jun 2021 21:49:56 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 22 Jun 2021 21:49:56 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 352BC5B6936;\n Tue, 22 Jun 2021 21:49:53 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=0BAahlvaaSRqSOGKmsHUBAf1Kc7vqKN9tUJ9uR5yrYc=;\n b=FY8yiXybwoNC1un6d7JHphM30tBJjrcUTvYgbgO0eQE6rkAmJUBHlylkgvtfAq9oJ0jO\n c9ad/bbyXez3+OVSejWnVNAmR0PZNCcUvc79FsxblfGrFbq3DM43N4fPZIn/6NhrjIJ0\n 5EoYgmRPmcSb7V1T+PSfGE/gYQqKeioG3i8ZDLUPC4Pp+q3hiYI+qcc8Eezqa7CDtjLB\n pADiE2Mb/4pjhecRvUWSTXh8+7yogoplxe/n5mMcJ6fsZQFrFbdazS+nLpdFRrCyi1ll\n tdxXfkjE9o1R7G95SWeXn1pUFIn/CYFCabvMLKvzl4/dK3u1DGakasDup8zZqG83ZrIB hw==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, <hkalra@marvell.com>", "Date": "Wed, 23 Jun 2021 10:16:49 +0530", "Message-ID": "<20210623044702.4240-50-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210623044702.4240-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210623044702.4240-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "ipz2tPpAUxWleIJzHeJQCAmg9gd2Tmz7", "X-Proofpoint-GUID": "ipz2tPpAUxWleIJzHeJQCAmg9gd2Tmz7", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-23_01:2021-06-22,\n 2021-06-23 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 49/62] net/cnxk: support initial version of\n rte flow", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding initial version of rte_flow support for cnxk family device.\nSupported rte_flow ops are flow_validate, flow_create, flow_crstroy,\nflow_flush, flow_query, flow_isolate.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\n---\n doc/guides/nics/cnxk.rst | 7 +\n doc/guides/nics/features/cnxk.ini | 36 ++++\n doc/guides/nics/features/cnxk_vec.ini | 36 ++++\n doc/guides/nics/features/cnxk_vf.ini | 36 ++++\n drivers/net/cnxk/cn10k_ethdev.c | 16 ++\n drivers/net/cnxk/cn10k_rte_flow.c | 30 ++++\n drivers/net/cnxk/cn10k_rte_flow.h | 17 ++\n drivers/net/cnxk/cn9k_ethdev.c | 16 ++\n drivers/net/cnxk/cn9k_rte_flow.c | 30 ++++\n drivers/net/cnxk/cn9k_rte_flow.h | 17 ++\n drivers/net/cnxk/cnxk_ethdev.h | 3 +\n drivers/net/cnxk/cnxk_rte_flow.c | 330 ++++++++++++++++++++++++++++++++++\n drivers/net/cnxk/cnxk_rte_flow.h | 27 +++\n drivers/net/cnxk/meson.build | 3 +\n 14 files changed, 604 insertions(+)\n create mode 100644 drivers/net/cnxk/cn10k_rte_flow.c\n create mode 100644 drivers/net/cnxk/cn10k_rte_flow.h\n create mode 100644 drivers/net/cnxk/cn9k_rte_flow.c\n create mode 100644 drivers/net/cnxk/cn9k_rte_flow.h\n create mode 100644 drivers/net/cnxk/cnxk_rte_flow.c\n create mode 100644 drivers/net/cnxk/cnxk_rte_flow.h", "diff": "diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst\nindex e875e55..cc71b22 100644\n--- a/doc/guides/nics/cnxk.rst\n+++ b/doc/guides/nics/cnxk.rst\n@@ -24,6 +24,7 @@ Features of the CNXK Ethdev PMD are:\n - Multiple queues for TX and RX\n - Receiver Side Scaling (RSS)\n - MAC filtering\n+- Generic flow API\n - Inner and Outer Checksum offload\n - Port hardware statistics\n - Link state information\n@@ -208,6 +209,12 @@ CRC stripping\n The OCTEON CN9K/CN10K SoC family NICs strip the CRC for every packet being received by\n the host interface irrespective of the offload configuration.\n \n+RTE Flow GRE support\n+~~~~~~~~~~~~~~~~~~~~\n+\n+- ``RTE_FLOW_ITEM_TYPE_GRE_KEY`` works only when checksum and routing\n+ bits in the GRE header are equal to 0.\n+\n Debugging Options\n -----------------\n \ndiff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 192c15a..e2da5dd 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -39,3 +39,39 @@ Module EEPROM dump = Y\n Linux = Y\n ARMv8 = Y\n Usage doc = Y\n+\n+[rte_flow items]\n+any = Y\n+arp_eth_ipv4 = Y\n+esp = Y\n+eth = Y\n+e_tag = Y\n+geneve = Y\n+gre = Y\n+gre_key = Y\n+gtpc = Y\n+gtpu = Y\n+higig2 = Y\n+icmp = Y\n+ipv4 = Y\n+ipv6 = Y\n+ipv6_ext = Y\n+mpls = Y\n+nvgre = Y\n+raw = Y\n+sctp = Y\n+tcp = Y\n+udp = Y\n+vlan = Y\n+vxlan = Y\n+vxlan_gpe = Y\n+\n+[rte_flow actions]\n+count = Y\n+drop = Y\n+flag = Y\n+pf = Y\n+port_id = Y\n+queue = Y\n+security = Y\n+vf = Y\ndiff --git a/doc/guides/nics/features/cnxk_vec.ini b/doc/guides/nics/features/cnxk_vec.ini\nindex e990480..89a3c37 100644\n--- a/doc/guides/nics/features/cnxk_vec.ini\n+++ b/doc/guides/nics/features/cnxk_vec.ini\n@@ -37,3 +37,39 @@ Module EEPROM dump = Y\n Linux = Y\n ARMv8 = Y\n Usage doc = Y\n+\n+[rte_flow items]\n+any = Y\n+arp_eth_ipv4 = Y\n+esp = Y\n+eth = Y\n+e_tag = Y\n+geneve = Y\n+gre = Y\n+gre_key = Y\n+gtpc = Y\n+gtpu = Y\n+higig2 = Y\n+icmp = Y\n+ipv4 = Y\n+ipv6 = Y\n+ipv6_ext = Y\n+mpls = Y\n+nvgre = Y\n+raw = Y\n+sctp = Y\n+tcp = Y\n+udp = Y\n+vlan = Y\n+vxlan = Y\n+vxlan_gpe = Y\n+\n+[rte_flow actions]\n+count = Y\n+drop = Y\n+flag = Y\n+pf = Y\n+port_id = Y\n+queue = Y\n+security = Y\n+vf = Y\ndiff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini\nindex 3a4417c..b0e469f 100644\n--- a/doc/guides/nics/features/cnxk_vf.ini\n+++ b/doc/guides/nics/features/cnxk_vf.ini\n@@ -34,3 +34,39 @@ Module EEPROM dump = Y\n Linux = Y\n ARMv8 = Y\n Usage doc = Y\n+\n+[rte_flow items]\n+any = Y\n+arp_eth_ipv4 = Y\n+esp = Y\n+eth = Y\n+e_tag = Y\n+geneve = Y\n+gre = Y\n+gre_key = Y\n+gtpc = Y\n+gtpu = Y\n+higig2 = Y\n+icmp = Y\n+ipv4 = Y\n+ipv6 = Y\n+ipv6_ext = Y\n+mpls = Y\n+nvgre = Y\n+raw = Y\n+sctp = Y\n+tcp = Y\n+udp = Y\n+vlan = Y\n+vxlan = Y\n+vxlan_gpe = Y\n+\n+[rte_flow actions]\n+count = Y\n+drop = Y\n+flag = Y\n+pf = Y\n+port_id = Y\n+queue = Y\n+security = Y\n+vf = Y\ndiff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c\nindex 5ff36bb..0396ff6 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.c\n+++ b/drivers/net/cnxk/cn10k_ethdev.c\n@@ -2,6 +2,7 @@\n * Copyright(C) 2021 Marvell.\n */\n #include \"cn10k_ethdev.h\"\n+#include \"cn10k_rte_flow.h\"\n #include \"cn10k_rx.h\"\n #include \"cn10k_tx.h\"\n \n@@ -308,6 +309,20 @@ nix_eth_dev_ops_override(void)\n \tcnxk_eth_dev_ops.dev_ptypes_set = cn10k_nix_ptypes_set;\n }\n \n+static void\n+npc_flow_ops_override(void)\n+{\n+\tstatic int init_once;\n+\n+\tif (init_once)\n+\t\treturn;\n+\tinit_once = 1;\n+\n+\t/* Update platform specific ops */\n+\tcnxk_flow_ops.create = cn10k_flow_create;\n+\tcnxk_flow_ops.destroy = cn10k_flow_destroy;\n+}\n+\n static int\n cn10k_nix_remove(struct rte_pci_device *pci_dev)\n {\n@@ -332,6 +347,7 @@ cn10k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t}\n \n \tnix_eth_dev_ops_override();\n+\tnpc_flow_ops_override();\n \n \t/* Common probe */\n \trc = cnxk_nix_probe(pci_drv, pci_dev);\ndiff --git a/drivers/net/cnxk/cn10k_rte_flow.c b/drivers/net/cnxk/cn10k_rte_flow.c\nnew file mode 100644\nindex 0000000..65893cc\n--- /dev/null\n+++ b/drivers/net/cnxk/cn10k_rte_flow.c\n@@ -0,0 +1,30 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2020 Marvell.\n+ */\n+#include <cnxk_rte_flow.h>\n+#include \"cn10k_rte_flow.h\"\n+#include \"cn10k_ethdev.h\"\n+\n+struct rte_flow *\n+cn10k_flow_create(struct rte_eth_dev *eth_dev, const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct roc_npc_flow *flow;\n+\n+\tflow = cnxk_flow_create(eth_dev, attr, pattern, actions, error);\n+\tif (!flow)\n+\t\treturn NULL;\n+\n+\treturn (struct rte_flow *)flow;\n+}\n+\n+int\n+cn10k_flow_destroy(struct rte_eth_dev *eth_dev, struct rte_flow *rte_flow,\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct roc_npc_flow *flow = (struct roc_npc_flow *)rte_flow;\n+\n+\treturn cnxk_flow_destroy(eth_dev, flow, error);\n+}\ndiff --git a/drivers/net/cnxk/cn10k_rte_flow.h b/drivers/net/cnxk/cn10k_rte_flow.h\nnew file mode 100644\nindex 0000000..f64fcf2\n--- /dev/null\n+++ b/drivers/net/cnxk/cn10k_rte_flow.h\n@@ -0,0 +1,17 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2020 Marvell.\n+ */\n+#ifndef __CN10K_RTE_FLOW_H__\n+#define __CN10K_RTE_FLOW_H__\n+\n+#include <rte_flow_driver.h>\n+\n+struct rte_flow *cn10k_flow_create(struct rte_eth_dev *dev,\n+\t\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t\t const struct rte_flow_item pattern[],\n+\t\t\t\t const struct rte_flow_action actions[],\n+\t\t\t\t struct rte_flow_error *error);\n+int cn10k_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow,\n+\t\t struct rte_flow_error *error);\n+\n+#endif /* __CN10K_RTE_FLOW_H__ */\ndiff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c\nindex 2157dca..cf9f7c7 100644\n--- a/drivers/net/cnxk/cn9k_ethdev.c\n+++ b/drivers/net/cnxk/cn9k_ethdev.c\n@@ -2,6 +2,7 @@\n * Copyright(C) 2021 Marvell.\n */\n #include \"cn9k_ethdev.h\"\n+#include \"cn9k_rte_flow.h\"\n #include \"cn9k_rx.h\"\n #include \"cn9k_tx.h\"\n \n@@ -317,6 +318,20 @@ nix_eth_dev_ops_override(void)\n \tcnxk_eth_dev_ops.dev_ptypes_set = cn9k_nix_ptypes_set;\n }\n \n+static void\n+npc_flow_ops_override(void)\n+{\n+\tstatic int init_once;\n+\n+\tif (init_once)\n+\t\treturn;\n+\tinit_once = 1;\n+\n+\t/* Update platform specific ops */\n+\tcnxk_flow_ops.create = cn9k_flow_create;\n+\tcnxk_flow_ops.destroy = cn9k_flow_destroy;\n+}\n+\n static int\n cn9k_nix_remove(struct rte_pci_device *pci_dev)\n {\n@@ -342,6 +357,7 @@ cn9k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t}\n \n \tnix_eth_dev_ops_override();\n+\tnpc_flow_ops_override();\n \n \t/* Common probe */\n \trc = cnxk_nix_probe(pci_drv, pci_dev);\ndiff --git a/drivers/net/cnxk/cn9k_rte_flow.c b/drivers/net/cnxk/cn9k_rte_flow.c\nnew file mode 100644\nindex 0000000..24e1b92\n--- /dev/null\n+++ b/drivers/net/cnxk/cn9k_rte_flow.c\n@@ -0,0 +1,30 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2020 Marvell.\n+ */\n+#include <cnxk_rte_flow.h>\n+#include \"cn9k_ethdev.h\"\n+#include \"cn9k_rte_flow.h\"\n+\n+struct rte_flow *\n+cn9k_flow_create(struct rte_eth_dev *eth_dev, const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct roc_npc_flow *flow;\n+\n+\tflow = cnxk_flow_create(eth_dev, attr, pattern, actions, error);\n+\tif (!flow)\n+\t\treturn NULL;\n+\n+\treturn (struct rte_flow *)flow;\n+}\n+\n+int\n+cn9k_flow_destroy(struct rte_eth_dev *eth_dev, struct rte_flow *rte_flow,\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct roc_npc_flow *flow = (struct roc_npc_flow *)rte_flow;\n+\n+\treturn cnxk_flow_destroy(eth_dev, flow, error);\n+}\ndiff --git a/drivers/net/cnxk/cn9k_rte_flow.h b/drivers/net/cnxk/cn9k_rte_flow.h\nnew file mode 100644\nindex 0000000..43d59e1\n--- /dev/null\n+++ b/drivers/net/cnxk/cn9k_rte_flow.h\n@@ -0,0 +1,17 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2020 Marvell.\n+ */\n+#ifndef __CN9K_RTE_FLOW_H__\n+#define __CN9K_RTE_FLOW_H__\n+\n+#include <rte_flow_driver.h>\n+\n+struct rte_flow *cn9k_flow_create(struct rte_eth_dev *dev,\n+\t\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t\t const struct rte_flow_item pattern[],\n+\t\t\t\t const struct rte_flow_action actions[],\n+\t\t\t\t struct rte_flow_error *error);\n+int cn9k_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow,\n+\t\t struct rte_flow_error *error);\n+\n+#endif /* __CN9K_RTE_FLOW_H__ */\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex 4879ef9..b7869b4 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -233,6 +233,9 @@ cnxk_eth_txq_to_sp(void *__txq)\n /* Common ethdev ops */\n extern struct eth_dev_ops cnxk_eth_dev_ops;\n \n+/* Common flow ops */\n+extern struct rte_flow_ops cnxk_flow_ops;\n+\n /* Ops */\n int cnxk_nix_probe(struct rte_pci_driver *pci_drv,\n \t\t struct rte_pci_device *pci_dev);\ndiff --git a/drivers/net/cnxk/cnxk_rte_flow.c b/drivers/net/cnxk/cnxk_rte_flow.c\nnew file mode 100644\nindex 0000000..1695d4f\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_rte_flow.c\n@@ -0,0 +1,330 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+#include <cnxk_rte_flow.h>\n+\n+const struct cnxk_rte_flow_term_info term[] = {\n+\t[RTE_FLOW_ITEM_TYPE_ETH] = {ROC_NPC_ITEM_TYPE_ETH,\n+\t\t\t\t sizeof(struct rte_flow_item_eth)},\n+\t[RTE_FLOW_ITEM_TYPE_VLAN] = {ROC_NPC_ITEM_TYPE_VLAN,\n+\t\t\t\t sizeof(struct rte_flow_item_vlan)},\n+\t[RTE_FLOW_ITEM_TYPE_E_TAG] = {ROC_NPC_ITEM_TYPE_E_TAG,\n+\t\t\t\t sizeof(struct rte_flow_item_e_tag)},\n+\t[RTE_FLOW_ITEM_TYPE_IPV4] = {ROC_NPC_ITEM_TYPE_IPV4,\n+\t\t\t\t sizeof(struct rte_flow_item_ipv4)},\n+\t[RTE_FLOW_ITEM_TYPE_IPV6] = {ROC_NPC_ITEM_TYPE_IPV6,\n+\t\t\t\t sizeof(struct rte_flow_item_ipv6)},\n+\t[RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {\n+\t\tROC_NPC_ITEM_TYPE_ARP_ETH_IPV4,\n+\t\tsizeof(struct rte_flow_item_arp_eth_ipv4)},\n+\t[RTE_FLOW_ITEM_TYPE_MPLS] = {ROC_NPC_ITEM_TYPE_MPLS,\n+\t\t\t\t sizeof(struct rte_flow_item_mpls)},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP] = {ROC_NPC_ITEM_TYPE_ICMP,\n+\t\t\t\t sizeof(struct rte_flow_item_icmp)},\n+\t[RTE_FLOW_ITEM_TYPE_UDP] = {ROC_NPC_ITEM_TYPE_UDP,\n+\t\t\t\t sizeof(struct rte_flow_item_udp)},\n+\t[RTE_FLOW_ITEM_TYPE_TCP] = {ROC_NPC_ITEM_TYPE_TCP,\n+\t\t\t\t sizeof(struct rte_flow_item_tcp)},\n+\t[RTE_FLOW_ITEM_TYPE_SCTP] = {ROC_NPC_ITEM_TYPE_SCTP,\n+\t\t\t\t sizeof(struct rte_flow_item_sctp)},\n+\t[RTE_FLOW_ITEM_TYPE_ESP] = {ROC_NPC_ITEM_TYPE_ESP,\n+\t\t\t\t sizeof(struct rte_flow_item_esp)},\n+\t[RTE_FLOW_ITEM_TYPE_GRE] = {ROC_NPC_ITEM_TYPE_GRE,\n+\t\t\t\t sizeof(struct rte_flow_item_gre)},\n+\t[RTE_FLOW_ITEM_TYPE_NVGRE] = {ROC_NPC_ITEM_TYPE_NVGRE,\n+\t\t\t\t sizeof(struct rte_flow_item_nvgre)},\n+\t[RTE_FLOW_ITEM_TYPE_VXLAN] = {ROC_NPC_ITEM_TYPE_VXLAN,\n+\t\t\t\t sizeof(struct rte_flow_item_vxlan)},\n+\t[RTE_FLOW_ITEM_TYPE_GTPC] = {ROC_NPC_ITEM_TYPE_GTPC,\n+\t\t\t\t sizeof(struct rte_flow_item_gtp)},\n+\t[RTE_FLOW_ITEM_TYPE_GTPU] = {ROC_NPC_ITEM_TYPE_GTPU,\n+\t\t\t\t sizeof(struct rte_flow_item_gtp)},\n+\t[RTE_FLOW_ITEM_TYPE_GENEVE] = {ROC_NPC_ITEM_TYPE_GENEVE,\n+\t\t\t\t sizeof(struct rte_flow_item_geneve)},\n+\t[RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {\n+\t\t\tROC_NPC_ITEM_TYPE_VXLAN_GPE,\n+\t\t\tsizeof(struct rte_flow_item_vxlan_gpe)},\n+\t[RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {ROC_NPC_ITEM_TYPE_IPV6_EXT,\n+\t\t\t\t\t sizeof(struct rte_flow_item_ipv6_ext)},\n+\t[RTE_FLOW_ITEM_TYPE_VOID] = {ROC_NPC_ITEM_TYPE_VOID, 0},\n+\t[RTE_FLOW_ITEM_TYPE_ANY] = {ROC_NPC_ITEM_TYPE_ANY, 0},\n+\t[RTE_FLOW_ITEM_TYPE_GRE_KEY] = {ROC_NPC_ITEM_TYPE_GRE_KEY,\n+\t\t\t\t\tsizeof(uint32_t)},\n+\t[RTE_FLOW_ITEM_TYPE_HIGIG2] = {\n+\t\tROC_NPC_ITEM_TYPE_HIGIG2,\n+\t\tsizeof(struct rte_flow_item_higig2_hdr)}\n+};\n+\n+static int\n+cnxk_map_actions(struct rte_eth_dev *eth_dev,\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct roc_npc_action in_actions[])\n+{\n+\tconst struct rte_flow_action_count *act_count;\n+\tconst struct rte_flow_action_queue *act_q;\n+\tint rq;\n+\tint i = 0;\n+\n+\tfor (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {\n+\t\tswitch (actions->type) {\n+\t\tcase RTE_FLOW_ACTION_TYPE_VOID:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_VOID;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_MARK:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_MARK;\n+\t\t\tin_actions[i].conf = actions->conf;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_FLAG:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_FLAG;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_COUNT:\n+\t\t\tact_count = (const struct rte_flow_action_count *)\n+\t\t\t\t\t actions->conf;\n+\n+\t\t\tif (act_count->shared == 1) {\n+\t\t\t\tplt_npc_dbg(\"Shared counter is not supported\");\n+\t\t\t\tgoto err_exit;\n+\t\t\t}\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_COUNT;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_DROP:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_DROP;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_PF:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_PF;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_VF:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_VF;\n+\t\t\tin_actions[i].conf = actions->conf;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n+\t\t\tact_q = (const struct rte_flow_action_queue *)\n+\t\t\t\t\tactions->conf;\n+\t\t\trq = act_q->index;\n+\t\t\tif (rq >= eth_dev->data->nb_rx_queues) {\n+\t\t\t\tplt_npc_dbg(\"Invalid queue index\");\n+\t\t\t\tgoto err_exit;\n+\t\t\t}\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_QUEUE;\n+\t\t\tin_actions[i].conf = actions->conf;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_RSS:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_RSS;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_SECURITY:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_SEC;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tplt_npc_dbg(\"Action is not supported = %d\",\n+\t\t\t\t actions->type);\n+\t\t\tgoto err_exit;\n+\t\t}\n+\t\ti++;\n+\t}\n+\tin_actions[i].type = ROC_NPC_ACTION_TYPE_END;\n+\treturn 0;\n+\n+err_exit:\n+\treturn -EINVAL;\n+}\n+\n+static int\n+cnxk_map_flow_data(struct rte_eth_dev *eth_dev,\n+\t\t const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct roc_npc_attr *in_attr,\n+\t\t struct roc_npc_item_info in_pattern[],\n+\t\t struct roc_npc_action in_actions[])\n+{\n+\tint i = 0;\n+\n+\tin_attr->priority = attr->priority;\n+\tin_attr->ingress = attr->ingress;\n+\tin_attr->egress = attr->egress;\n+\n+\twhile (pattern->type != RTE_FLOW_ITEM_TYPE_END) {\n+\t\tin_pattern[i].spec = pattern->spec;\n+\t\tin_pattern[i].last = pattern->last;\n+\t\tin_pattern[i].mask = pattern->mask;\n+\t\tin_pattern[i].type = term[pattern->type].item_type;\n+\t\tin_pattern[i].size = term[pattern->type].item_size;\n+\t\tpattern++;\n+\t\ti++;\n+\t}\n+\tin_pattern[i].type = ROC_NPC_ITEM_TYPE_END;\n+\n+\treturn cnxk_map_actions(eth_dev, actions, in_actions);\n+}\n+\n+static int\n+cnxk_flow_validate(struct rte_eth_dev *eth_dev,\n+\t\t const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct roc_npc_item_info in_pattern[ROC_NPC_ITEM_TYPE_END + 1];\n+\tstruct roc_npc_action in_actions[ROC_NPC_MAX_ACTION_COUNT];\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_npc *npc = &dev->npc;\n+\tstruct roc_npc_attr in_attr;\n+\tstruct roc_npc_flow flow;\n+\tint rc;\n+\n+\tmemset(&flow, 0, sizeof(flow));\n+\n+\trc = cnxk_map_flow_data(eth_dev, attr, pattern, actions, &in_attr,\n+\t\t\t\tin_pattern, in_actions);\n+\tif (rc) {\n+\t\trte_flow_error_set(error, 0, RTE_FLOW_ERROR_TYPE_ACTION_NUM,\n+\t\t\t\t NULL, \"Failed to map flow data\");\n+\t\treturn rc;\n+\t}\n+\n+\treturn roc_npc_flow_parse(npc, &in_attr, in_pattern, in_actions, &flow);\n+}\n+\n+struct roc_npc_flow *\n+cnxk_flow_create(struct rte_eth_dev *eth_dev, const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_npc_item_info in_pattern[ROC_NPC_ITEM_TYPE_END + 1];\n+\tstruct roc_npc_action in_actions[ROC_NPC_MAX_ACTION_COUNT];\n+\tstruct roc_npc *npc = &dev->npc;\n+\tstruct roc_npc_attr in_attr;\n+\tstruct roc_npc_flow *flow;\n+\tint errcode;\n+\tint rc;\n+\n+\trc = cnxk_map_flow_data(eth_dev, attr, pattern, actions, &in_attr,\n+\t\t\t\tin_pattern, in_actions);\n+\tif (rc) {\n+\t\trte_flow_error_set(error, 0, RTE_FLOW_ERROR_TYPE_ACTION_NUM,\n+\t\t\t\t NULL, \"Failed to map flow data\");\n+\t\treturn NULL;\n+\t}\n+\n+\tflow = roc_npc_flow_create(npc, &in_attr, in_pattern, in_actions,\n+\t\t\t\t &errcode);\n+\tif (errcode != 0) {\n+\t\trte_flow_error_set(error, errcode, errcode, NULL,\n+\t\t\t\t roc_error_msg_get(errcode));\n+\t\treturn NULL;\n+\t}\n+\n+\treturn flow;\n+}\n+\n+int\n+cnxk_flow_destroy(struct rte_eth_dev *eth_dev, struct roc_npc_flow *flow,\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_npc *npc = &dev->npc;\n+\tint rc;\n+\n+\trc = roc_npc_flow_destroy(npc, flow);\n+\tif (rc)\n+\t\trte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Flow Destroy failed\");\n+\treturn rc;\n+}\n+\n+static int\n+cnxk_flow_flush(struct rte_eth_dev *eth_dev, struct rte_flow_error *error)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_npc *npc = &dev->npc;\n+\tint rc;\n+\n+\trc = roc_npc_mcam_free_all_resources(npc);\n+\tif (rc) {\n+\t\trte_flow_error_set(error, EIO, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Failed to flush filter\");\n+\t\treturn -rte_errno;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_flow_query(struct rte_eth_dev *eth_dev, struct rte_flow *flow,\n+\t\tconst struct rte_flow_action *action, void *data,\n+\t\tstruct rte_flow_error *error)\n+{\n+\tstruct roc_npc_flow *in_flow = (struct roc_npc_flow *)flow;\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_npc *npc = &dev->npc;\n+\tstruct rte_flow_query_count *query = data;\n+\tconst char *errmsg = NULL;\n+\tint errcode = ENOTSUP;\n+\tint rc;\n+\n+\tif (action->type != RTE_FLOW_ACTION_TYPE_COUNT) {\n+\t\terrmsg = \"Only COUNT is supported in query\";\n+\t\tgoto err_exit;\n+\t}\n+\n+\tif (in_flow->ctr_id == NPC_COUNTER_NONE) {\n+\t\terrmsg = \"Counter is not available\";\n+\t\tgoto err_exit;\n+\t}\n+\n+\trc = roc_npc_mcam_read_counter(npc, in_flow->ctr_id, &query->hits);\n+\tif (rc != 0) {\n+\t\terrcode = EIO;\n+\t\terrmsg = \"Error reading flow counter\";\n+\t\tgoto err_exit;\n+\t}\n+\tquery->hits_set = 1;\n+\tquery->bytes_set = 0;\n+\n+\tif (query->reset)\n+\t\trc = roc_npc_mcam_clear_counter(npc, in_flow->ctr_id);\n+\tif (rc != 0) {\n+\t\terrcode = EIO;\n+\t\terrmsg = \"Error clearing flow counter\";\n+\t\tgoto err_exit;\n+\t}\n+\n+\treturn 0;\n+\n+err_exit:\n+\trte_flow_error_set(error, errcode, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t NULL, errmsg);\n+\treturn -rte_errno;\n+}\n+\n+static int\n+cnxk_flow_isolate(struct rte_eth_dev *eth_dev __rte_unused,\n+\t\t int enable __rte_unused, struct rte_flow_error *error)\n+{\n+\t/* If we support, we need to un-install the default mcam\n+\t * entry for this port.\n+\t */\n+\n+\trte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t NULL, \"Flow isolation not supported\");\n+\n+\treturn -rte_errno;\n+}\n+\n+struct rte_flow_ops cnxk_flow_ops = {\n+\t.validate = cnxk_flow_validate,\n+\t.flush = cnxk_flow_flush,\n+\t.query = cnxk_flow_query,\n+\t.isolate = cnxk_flow_isolate,\n+};\ndiff --git a/drivers/net/cnxk/cnxk_rte_flow.h b/drivers/net/cnxk/cnxk_rte_flow.h\nnew file mode 100644\nindex 0000000..bb23629\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_rte_flow.h\n@@ -0,0 +1,27 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+#ifndef __CNXK_RTE_FLOW_H__\n+#define __CNXK_RTE_FLOW_H__\n+\n+#include <rte_flow_driver.h>\n+#include <rte_malloc.h>\n+\n+#include \"cnxk_ethdev.h\"\n+#include \"roc_api.h\"\n+#include \"roc_npc_priv.h\"\n+\n+struct cnxk_rte_flow_term_info {\n+\tuint16_t item_type;\n+\tuint16_t item_size;\n+};\n+\n+struct roc_npc_flow *cnxk_flow_create(struct rte_eth_dev *dev,\n+\t\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t\t const struct rte_flow_item pattern[],\n+\t\t\t\t const struct rte_flow_action actions[],\n+\t\t\t\t struct rte_flow_error *error);\n+int cnxk_flow_destroy(struct rte_eth_dev *dev, struct roc_npc_flow *flow,\n+\t\t struct rte_flow_error *error);\n+\n+#endif /* __CNXK_RTE_FLOW_H__ */\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex 7d711a2..df953fd 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -13,10 +13,12 @@ sources = files('cnxk_ethdev.c',\n \t\t'cnxk_ethdev_devargs.c',\n \t\t'cnxk_link.c',\n \t\t'cnxk_lookup.c',\n+\t\t'cnxk_rte_flow.c',\n \t\t'cnxk_stats.c')\n \n # CN9K\n sources += files('cn9k_ethdev.c',\n+\t\t 'cn9k_rte_flow.c',\n \t\t 'cn9k_rx.c',\n \t\t 'cn9k_rx_mseg.c',\n \t\t 'cn9k_rx_vec.c',\n@@ -25,6 +27,7 @@ sources += files('cn9k_ethdev.c',\n \t\t 'cn9k_tx_vec.c')\n # CN10K\n sources += files('cn10k_ethdev.c',\n+\t\t 'cn10k_rte_flow.c',\n \t\t 'cn10k_rx.c',\n \t\t 'cn10k_rx_mseg.c',\n \t\t 'cn10k_rx_vec.c',\n", "prefixes": [ "v4", "49/62" ] }