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GET /api/patches/93561/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 93561,
    "url": "https://patches.dpdk.org/api/patches/93561/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210530085929.29695-13-venkatkumar.duvvuru@broadcom.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210530085929.29695-13-venkatkumar.duvvuru@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210530085929.29695-13-venkatkumar.duvvuru@broadcom.com",
    "date": "2021-05-30T08:58:43",
    "name": "[12/58] net/bnxt: modify TRUFLOW HWRM messages",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "0fe18fa535dee6df608bed71c10cac7f26ed0575",
    "submitter": {
        "id": 1635,
        "url": "https://patches.dpdk.org/api/people/1635/?format=api",
        "name": "Venkat Duvvuru",
        "email": "venkatkumar.duvvuru@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "https://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210530085929.29695-13-venkatkumar.duvvuru@broadcom.com/mbox/",
    "series": [
        {
            "id": 17161,
            "url": "https://patches.dpdk.org/api/series/17161/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17161",
            "date": "2021-05-30T08:58:31",
            "name": "enhancements to host based flow table management",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/17161/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/93561/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/93561/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 22D6BA0524;\n\tSun, 30 May 2021 11:02:18 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 03C3341154;\n\tSun, 30 May 2021 11:00:49 +0200 (CEST)",
            "from relay.smtp-ext.broadcom.com (relay.smtp-ext.broadcom.com\n [192.19.11.229]) by mails.dpdk.org (Postfix) with ESMTP id 0BF1D41145\n for <dev@dpdk.org>; Sun, 30 May 2021 11:00:47 +0200 (CEST)",
            "from S60.dhcp.broadcom.net (unknown [10.123.66.170])\n (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n (No client certificate requested)\n by relay.smtp-ext.broadcom.com (Postfix) with ESMTPS id 382BE7DC2;\n Sun, 30 May 2021 02:00:45 -0700 (PDT)"
        ],
        "DKIM-Filter": "OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 382BE7DC2",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1622365246;\n bh=xjAQpWerWAqffuXbm+zIu9VOPDHAoiZdt20ZRgfwmKg=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=HHisbRxkEYfy8jwbFiJoUudZDkCjkTtCW7mFNiqp/Fc/Y+o6QWpN6YApd1ZTY5yHC\n +1tkH/wG+DkLF4eG0ujEfcYfO2VC7jffAs5CIx6gx9U1z21z9sTeCA0syebB5NeqpX\n Uj/xmBF/67wuXOGYSNTZRMFCNu+8B3wQ05us1siI=",
        "From": "Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "Farah Smith <farah.smith@broadcom.com>,\n Peter Spreadborough <peter.spreadborough@broadcom.com>,\n Randy Schacher <stuart.schacher@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>",
        "Date": "Sun, 30 May 2021 14:28:43 +0530",
        "Message-Id": "<20210530085929.29695-13-venkatkumar.duvvuru@broadcom.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com>",
        "References": "<20210530085929.29695-1-venkatkumar.duvvuru@broadcom.com>",
        "Subject": "[dpdk-dev] [PATCH 12/58] net/bnxt: modify TRUFLOW HWRM messages",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Farah Smith <farah.smith@broadcom.com>\n\n- Move Bulk get to a direct HWRM message\n- Deprecate code based on HCAPI changes\n\nSigned-off-by: Farah Smith <farah.smith@broadcom.com>\nSigned-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>\nSigned-off-by: Randy Schacher <stuart.schacher@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\n---\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h        |  72 +----\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c |   4 +-\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h   | 197 ++++++++----\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c     | 116 ++++---\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h     | 282 +----------------\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c    |   2 +-\n drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h    | 287 +-----------------\n drivers/net/bnxt/tf_core/hwrm_tf.h            | 196 ------------\n drivers/net/bnxt/tf_core/lookup3.h            |   2 +-\n drivers/net/bnxt/tf_core/tf_core.c            |   1 -\n drivers/net/bnxt/tf_core/tf_core.h            | 127 ++++----\n drivers/net/bnxt/tf_core/tf_device.c          |   2 +-\n drivers/net/bnxt/tf_core/tf_device_p4.h       |  75 +++--\n drivers/net/bnxt/tf_core/tf_device_p58.h      |  48 ++-\n drivers/net/bnxt/tf_core/tf_em.h              |   4 +-\n drivers/net/bnxt/tf_core/tf_em_common.c       | 250 ++++++++++-----\n drivers/net/bnxt/tf_core/tf_em_common.h       |  68 ++++-\n drivers/net/bnxt/tf_core/tf_em_host.c         | 109 +++++--\n drivers/net/bnxt/tf_core/tf_msg.c             | 263 ++++++++++++++--\n drivers/net/bnxt/tf_core/tf_msg.h             |  87 ++++++\n drivers/net/bnxt/tf_core/tf_msg_common.h      |   3 -\n drivers/net/bnxt/tf_core/tf_session.c         | 115 +++++++\n drivers/net/bnxt/tf_core/tf_session.h         |  90 ++++++\n drivers/net/bnxt/tf_core/tf_tbl.h             |  30 --\n drivers/net/bnxt/tf_core/tf_util.c            |  12 -\n drivers/net/bnxt/tf_core/tf_util.h            |   4 +\n drivers/net/bnxt/tf_core/tfp.c                |  34 ---\n drivers/net/bnxt/tf_core/tfp.h                |  52 ----\n 28 files changed, 1202 insertions(+), 1330 deletions(-)\n delete mode 100644 drivers/net/bnxt/tf_core/hwrm_tf.h",
    "diff": "diff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h\nindex 0580e07c45..c67aa29ad0 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa.h\n@@ -63,74 +63,10 @@ struct hcapi_cfa_devops {\n \t */\n \tuint64_t (*hcapi_cfa_key_hash)(uint64_t *key_data, uint16_t bitlen);\n \n-int hcapi_cfa_action_hw_op(struct hcapi_cfa_hwop *op,\n-\t\t\t   uint8_t *act_tbl,\n-\t\t\t   struct hcapi_cfa_data *act_obj);\n-int hcapi_cfa_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id,\n-\t\t\tstruct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_rm_register_client(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t const char *client_name,\n-\t\t\t\t int *client_id);\n-int hcapi_cfa_rm_unregister_client(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t   int client_id);\n-int hcapi_cfa_rm_query_resources(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t int client_id,\n-\t\t\t\t uint16_t chnl_id,\n-\t\t\t\t struct hcapi_cfa_resc_req_db *req_db);\n-int hcapi_cfa_rm_query_resources_one(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t     int clien_id,\n-\t\t\t\t     struct hcapi_cfa_resc_db *resc_db);\n-int hcapi_cfa_rm_reserve_resources(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t   int client_id,\n-\t\t\t\t   struct hcapi_cfa_resc_req_db *resc_req,\n-\t\t\t\t   struct hcapi_cfa_resc_db *resc_db);\n-int hcapi_cfa_rm_release_resources(hcapi_cfa_rm_data_t *data,\n-\t\t\t\t   int client_id,\n-\t\t\t\t   struct hcapi_cfa_resc_req_db *resc_req,\n-\t\t\t\t   struct hcapi_cfa_resc_db *resc_db);\n-int hcapi_cfa_rm_initialize(hcapi_cfa_rm_data_t *data);\n-\n-#if SUPPORT_CFA_HW_P4\n-\n-int hcapi_cfa_p4_dev_hw_op(struct hcapi_cfa_hwop *op, uint16_t tbl_id,\n-\t\t\t    struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_prof_l2ctxt_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t   struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_prof_l2ctxtrmp_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t      struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_prof_tcam_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_prof_tcamrmp_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t    struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_wc_tcam_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t       struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_wc_tcam_rec_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t   struct hcapi_cfa_data *obj_data);\n-int hcapi_cfa_p4_mirror_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t     struct hcapi_cfa_data *mirror);\n-int hcapi_cfa_p4_global_cfg_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t uint32_t type,\n-\t\t\t\t struct hcapi_cfa_data *config);\n-/* SUPPORT_CFA_HW_P4 */\n-#elif SUPPORT_CFA_HW_P45\n-int hcapi_cfa_p45_mirror_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t      struct hcapi_cfa_data *mirror);\n-int hcapi_cfa_p45_global_cfg_hwop(struct hcapi_cfa_hwop *op,\n-\t\t\t\t  uint32_t type,\n-\t\t\t\t  struct hcapi_cfa_data *config);\n-/* SUPPORT_CFA_HW_P45 */\n-#endif\n-\n-/**\n- *  HCAPI CFA device HW operation function callback definition\n- *  This is standardized function callback hook to install different\n- *  CFA HW table programming function callback.\n- */\n-\n-struct hcapi_cfa_tbl_cb {\n-\t/**\n-\t * This function callback provides the functionality to read/write\n-\t * HW table entry from a HW table.\n+\t/** hardware operation on the CFA EM key\n+\t *\n+\t * This API provides the functionality to program the exact match and\n+\t * key data to exact match record memory.\n \t *\n \t * @param[in] op\n \t *   A pointer to the Hardware operation parameter\ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c\nindex fc96e3bff7..93a9f555df 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_common.c\n@@ -3,9 +3,7 @@\n  *   All rights reserved.\n  */\n \n-#include \"hcapi_cfa_defs.h\"\n-#include <errno.h>\n-#include \"assert.h\"\n+#include \"hcapi_cfa.h\"\n \n const uint32_t crc32tbl[] = {\t/* CRC polynomial 0xedb88320 */\n 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,\ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h\nindex 579f1d5693..5135a857e1 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_defs.h\n@@ -1,7 +1,6 @@\n-\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2014-2021 Broadcom\n- * All rights reserved.\n+/*\n+ *   Copyright(c) Broadcom Limited.\n+ *   All rights reserved.\n  */\n \n /*!\n@@ -14,27 +13,54 @@\n #include <stdio.h>\n #include <string.h>\n #include <stdbool.h>\n-#include <stdint.h>\n #include <stddef.h>\n+#include <stdint.h>\n+\n+#if !defined(__GNUC__)\n+#pragma anon_unions\n+#endif\n \n #define CFA_BITS_PER_BYTE (8)\n+#define CFA_BITS_PER_WORD (sizeof(uint32_t) * CFA_BITS_PER_BYTE)\n #define __CFA_ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask))\n-#define CFA_ALIGN(x, a) __CFA_ALIGN_MASK(x, (a) - 1)\n+#define CFA_ALIGN(x, a) __CFA_ALIGN_MASK((x), (a) - 1)\n+#define CFA_ALIGN_256(x) CFA_ALIGN(x, 256)\n #define CFA_ALIGN_128(x) CFA_ALIGN(x, 128)\n #define CFA_ALIGN_32(x) CFA_ALIGN(x, 32)\n \n-#define NUM_WORDS_ALIGN_32BIT(x)                                               \\\n-\t(CFA_ALIGN_32(x) / (sizeof(uint32_t) * CFA_BITS_PER_BYTE))\n-#define NUM_WORDS_ALIGN_128BIT(x)                                              \\\n-\t(CFA_ALIGN_128(x) / (sizeof(uint32_t) * CFA_BITS_PER_BYTE))\n+#define NUM_WORDS_ALIGN_32BIT(x) (CFA_ALIGN_32(x) / CFA_BITS_PER_WORD)\n+#define NUM_WORDS_ALIGN_128BIT(x) (CFA_ALIGN_128(x) / CFA_BITS_PER_WORD)\n+#define NUM_WORDS_ALIGN_256BIT(x) (CFA_ALIGN_256(x) / CFA_BITS_PER_WORD)\n \n+/* TODO: redefine according to chip variant */\n #define CFA_GLOBAL_CFG_DATA_SZ (100)\n \n+#ifndef SUPPORT_CFA_HW_P4\n+#define SUPPORT_CFA_HW_P4 (0)\n+#endif\n+\n+#ifndef SUPPORT_CFA_HW_P45\n+#define SUPPORT_CFA_HW_P45 (0)\n+#endif\n+\n+#ifndef SUPPORT_CFA_HW_P58\n+#define SUPPORT_CFA_HW_P58 (0)\n+#endif\n+\n #if SUPPORT_CFA_HW_ALL\n #include \"hcapi_cfa_p4.h\"\n #include \"hcapi_cfa_p58.h\"\n #endif /* SUPPORT_CFA_HW_ALL */\n \n+/*\n+ * Hashing defines\n+ */\n+#define HCAPI_CFA_LKUP_SEED_MEM_SIZE 512\n+\n+/* CRC32i support for Key0 hash */\n+#define ucrc32(ch, crc) (crc32tbl[((crc) ^ (ch)) & 0xff] ^ ((crc) >> 8))\n+#define crc32(x, y) crc32i(~0, x, y)\n+\n /**\n  * CFA HW version definition\n  */\n@@ -54,35 +80,30 @@ enum hcapi_cfa_dir {\n \tHCAPI_CFA_DIR_MAX = 2\n };\n \n-/*\n- * Hashing defines\n- */\n-#define HCAPI_CFA_LKUP_SEED_MEM_SIZE 512\n-\n-/* CRC32i support for Key0 hash */\n-#define ucrc32(ch, crc) (crc32tbl[((crc) ^ (ch)) & 0xff] ^ ((crc) >> 8))\n-#define crc32(x, y) crc32i(~0, x, y)\n-\n-\n /**\n  * CFA HW OPCODE definition\n  */\n enum hcapi_cfa_hwops {\n-\tHCAPI_CFA_HWOPS_PUT, /**< Write to HW operation */\n-\tHCAPI_CFA_HWOPS_GET, /**< Read from HW operation */\n-\tHCAPI_CFA_HWOPS_ADD, /**< For operations which require more than simple\n-\t\t\t      * writes to HW, this operation is used. The\n-\t\t\t      * distinction with this operation when compared\n-\t\t\t      * to the PUT ops is that this operation is used\n-\t\t\t      * in conjunction with the HCAPI_CFA_HWOPS_DEL\n-\t\t\t      * op to remove the operations issued by the\n-\t\t\t      * ADD OP.\n-\t\t\t      */\n-\tHCAPI_CFA_HWOPS_DEL, /**< This issues operations to clear the hardware.\n-\t\t\t      * This operation is used in conjunction\n-\t\t\t      * with the HCAPI_CFA_HWOPS_ADD op and is the\n-\t\t\t      * way to undo/clear the ADD op.\n-\t\t\t      */\n+\tHCAPI_CFA_HWOPS_PUT,   /**< Write to HW operation */\n+\tHCAPI_CFA_HWOPS_GET,   /**< Read from HW operation */\n+\tHCAPI_CFA_HWOPS_ADD,   /*<\n+\t\t\t\t* For operations which require more then\n+\t\t\t\t* simple writes to HW, this operation is\n+\t\t\t\t* used.  The distinction with this operation\n+\t\t\t\t* when compared to the PUT ops is that this\n+\t\t\t\t* operation is used in conjunction with\n+\t\t\t\t* the HCAPI_CFA_HWOPS_DEL op to remove\n+\t\t\t\t* the operations issued by the ADD OP.\n+\t\t\t\t*/\n+\tHCAPI_CFA_HWOPS_DEL,   /*<\n+\t\t\t\t*  Beside to delete from the hardware, this\n+\t\t\t\t*   operation is also undo the add operation\n+\t\t\t\t*   performed by the HCAPI_CFA_HWOPS_ADD op.\n+\t\t\t\t*/\n+\tHCAPI_CFA_HWOPS_EVICT, /*< This operaton is used to evit entries from\n+\t\t\t\t*   CFA cache memories. This operation is only\n+\t\t\t\t*   applicable to tables that use CFA caches.\n+\t\t\t\t*/\n \tHCAPI_CFA_HWOPS_MAX\n };\n \n@@ -91,11 +112,10 @@ enum hcapi_cfa_hwops {\n  */\n enum hcapi_cfa_key_ctrlops {\n \tHCAPI_CFA_KEY_CTRLOPS_INSERT, /**< insert control bits */\n-\tHCAPI_CFA_KEY_CTRLOPS_STRIP, /**< strip control bits */\n+\tHCAPI_CFA_KEY_CTRLOPS_STRIP,  /**< strip control bits */\n \tHCAPI_CFA_KEY_CTRLOPS_MAX\n };\n \n-\n /**\n  * CFA HW definition\n  */\n@@ -132,18 +152,23 @@ struct hcapi_cfa_data {\n \t/** [in] physical offset to the HW table for the data to be\n \t *  written to.  If this is an array of registers, this is the\n \t *  index into the array of registers.  For writing keys, this\n-\t *  is the byte offset into the memory where the key should be\n+\t *  is the byte pointer into the memory where the key should be\n \t *  written.\n \t */\n \tunion {\n \t\tuint32_t index;\n \t\tuint32_t byte_offset;\n-\t} u;\n+\t};\n \t/** [in] HW data buffer pointer */\n \tuint8_t *data;\n-\t/** [in] HW data mask buffer pointer */\n+\t/** [in] HW data mask buffer pointer.\n+\t *  When the CFA data is a FKB and  data_mask pointer\n+\t *  is NULL, then the default mask to enable all bit will\n+\t *  be used.\n+\t */\n \tuint8_t *data_mask;\n-\t/** [in] size of the HW data buffer in bytes */\n+\t/** [in/out] size of the HW data buffer in bytes\n+\t */\n \tuint16_t data_sz;\n };\n \n@@ -160,35 +185,36 @@ enum hcapi_cfa_em_table_type {\n \tTF_KEY1_TABLE,\n \tTF_RECORD_TABLE,\n \tTF_EFC_TABLE,\n+\tTF_ACTION_TABLE,\n+\tTF_EM_LKUP_TABLE,\n \tTF_MAX_TABLE\n };\n \n struct hcapi_cfa_em_page_tbl {\n-\tuint32_t\tpg_count;\n-\tuint32_t\tpg_size;\n-\tvoid\t\t**pg_va_tbl;\n-\tuint64_t\t*pg_pa_tbl;\n+\tuint32_t pg_count;\n+\tuint32_t pg_size;\n+\tvoid **pg_va_tbl;\n+\tuint64_t *pg_pa_tbl;\n };\n \n struct hcapi_cfa_em_table {\n-\tint\t\t\t\ttype;\n-\tuint32_t\t\t\tnum_entries;\n-\tuint16_t\t\t\tctx_id;\n-\tuint32_t\t\t\tentry_size;\n-\tint\t\t\t\tnum_lvl;\n-\tuint32_t\t\t\tpage_cnt[TF_PT_LVL_MAX];\n-\tuint64_t\t\t\tnum_data_pages;\n-\tvoid\t\t\t\t*l0_addr;\n-\tuint64_t\t\t\tl0_dma_addr;\n-\tstruct hcapi_cfa_em_page_tbl    pg_tbl[TF_PT_LVL_MAX];\n+\tint type;\n+\tuint32_t num_entries;\n+\tuint16_t ctx_id;\n+\tuint32_t entry_size;\n+\tint num_lvl;\n+\tuint32_t page_cnt[TF_PT_LVL_MAX];\n+\tuint64_t num_data_pages;\n+\tvoid *l0_addr;\n+\tuint64_t l0_dma_addr;\n+\tstruct hcapi_cfa_em_page_tbl pg_tbl[TF_PT_LVL_MAX];\n };\n \n struct hcapi_cfa_em_ctx_mem_info {\n-\tstruct hcapi_cfa_em_table\t\tem_tables[TF_MAX_TABLE];\n+\tstruct hcapi_cfa_em_table em_tables[TF_MAX_TABLE];\n };\n \n /*********************** Truflow end ****************************/\n-\n /**\n  * CFA HW key table definition\n  *\n@@ -210,6 +236,10 @@ struct hcapi_cfa_key_tbl {\n \t *  applicable for newer chip\n \t */\n \tuint8_t *base1;\n+\t/** [in] Optional - If the table is managed by a Backing Store\n+\t *  database, then this object can be use to configure the EM Key.\n+\t */\n+\tstruct hcapi_cfa_bs_db *bs_db;\n \t/** [in] Page size for EEM tables */\n \tuint32_t page_size;\n };\n@@ -220,7 +250,7 @@ struct hcapi_cfa_key_tbl {\n struct hcapi_cfa_key_obj {\n \t/** [in] pointer to the key data buffer */\n \tuint32_t *data;\n-\t/** [in] buffer len in bits */\n+\t/** [in] buffer len in bytes */\n \tuint32_t len;\n \t/** [in] Pointer to the key layout */\n \tstruct hcapi_cfa_key_layout *layout;\n@@ -239,6 +269,13 @@ struct hcapi_cfa_key_data {\n \tuint8_t *data;\n \t/** [in] size of the key in bytes */\n \tuint16_t size;\n+\t/** [in] optional table scope ID */\n+\tuint8_t tbl_scope;\n+\t/** [in] the fid owner of the key */\n+\tuint64_t metadata;\n+\t/** [in] stored with the bucket which can be used to by\n+\t *       the caller to retreved later via the GET HW OP.\n+\t */\n };\n \n /**\n@@ -247,8 +284,52 @@ struct hcapi_cfa_key_data {\n struct hcapi_cfa_key_loc {\n \t/** [out] on-chip EM bucket offset or off-chip EM bucket mem pointer */\n \tuint64_t bucket_mem_ptr;\n+\t/** [out] off-chip EM key offset mem pointer */\n+\tuint64_t mem_ptr;\n+\t/** [out] index within the array of the EM buckets */\n+\tuint32_t bucket_mem_idx;\n \t/** [out] index within the EM bucket */\n \tuint8_t bucket_idx;\n+\t/** [out] index within the EM records */\n+\tuint32_t mem_idx;\n+};\n+\n+/**\n+ *  Action record info\n+ */\n+struct hcapi_cfa_action_addr {\n+\t/** [in] action SRAM block ID for on-chip action records or table\n+\t *  scope of the action backing store\n+\t */\n+\tuint16_t blk_id;\n+\t/** [in] ar_id or cache line aligned address offset for the action\n+\t *  record\n+\t */\n+\tuint32_t offset;\n+};\n+\n+/**\n+ * Action data definition\n+ */\n+struct hcapi_cfa_action_data {\n+\t/** [in] action record addr info for on-chip action records */\n+\tstruct hcapi_cfa_action_addr addr;\n+\t/** [in/out] pointer to the action data buffer */\n+\tuint32_t *data;\n+\t/** [in] action data buffer len in bytes */\n+\tuint32_t len;\n+};\n+\n+/**\n+ * Action object definition\n+ */\n+struct hcapi_cfa_action_obj {\n+\t/** [in] pointer to the action data buffer */\n+\tuint32_t *data;\n+\t/** [in] buffer len in bytes */\n+\tuint32_t len;\n+\t/** [in] pointer to the action layout */\n+\tstruct hcapi_cfa_action_layout *layout;\n };\n \n /**\ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c\nindex 0544b667dd..79bc569989 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.c\n@@ -1,8 +1,9 @@\n+\n /* SPDX-License-Identifier: BSD-3-Clause\n  * Copyright(c) 2019-2021 Broadcom\n  * All rights reserved.\n  */\n-#include <inttypes.h>\n+\n #include <stdint.h>\n #include <stdlib.h>\n #include <stdbool.h>\n@@ -10,6 +11,7 @@\n #include \"lookup3.h\"\n #include \"rand.h\"\n \n+#include \"hcapi_cfa.h\"\n #include \"hcapi_cfa_defs.h\"\n \n static uint32_t hcapi_cfa_lkup_lkup3_init_cfg;\n@@ -18,10 +20,9 @@ static bool hcapi_cfa_lkup_init;\n \n extern const uint32_t crc32tbl[];\n \n-static inline uint32_t SWAP_WORDS32(uint32_t val32)\n+static __inline uint32_t SWAP_WORDS32(uint32_t val32)\n {\n-\treturn (((val32 & 0x0000ffff) << 16) |\n-\t\t((val32 & 0xffff0000) >> 16));\n+\treturn (((val32 & 0x0000ffff) << 16) | ((val32 & 0xffff0000) >> 16));\n }\n \n static void hcapi_cfa_seeds_init(void)\n@@ -79,9 +80,8 @@ static uint32_t hcapi_cfa_crc32_hash(uint8_t *key)\n \tif (!(val2 & 0x1))\n \t\tval1 = hcapi_cfa_crc32i(~val1, temp, 4);\n \n-\tval1 = hcapi_cfa_crc32i(~val1,\n-\t\t      (key - (CFA_P4_EEM_KEY_MAX_SIZE - 1)),\n-\t\t      CFA_P4_EEM_KEY_MAX_SIZE);\n+\tval1 = hcapi_cfa_crc32i(~val1, (key - (CFA_P4_EEM_KEY_MAX_SIZE - 1)),\n+\t\t\t\tCFA_P4_EEM_KEY_MAX_SIZE);\n \n \t/* End with seed */\n \tif (val2 & 0x1)\n@@ -94,16 +94,14 @@ static uint32_t hcapi_cfa_lookup3_hash(uint8_t *in_key)\n {\n \tuint32_t val1;\n \n-\tval1 = hashword(((const uint32_t *)(uintptr_t *)in_key) + 1,\n-\t\t\t CFA_P4_EEM_KEY_MAX_SIZE / (sizeof(uint32_t)),\n-\t\t\t hcapi_cfa_lkup_lkup3_init_cfg);\n+\tval1 = hashword(((uint32_t *)in_key) + 1,\n+\t\t\tCFA_P4_EEM_KEY_MAX_SIZE / (sizeof(uint32_t)),\n+\t\t\thcapi_cfa_lkup_lkup3_init_cfg);\n \n \treturn val1;\n }\n \n-\n-uint64_t hcapi_get_table_page(struct hcapi_cfa_em_table *mem,\n-\t\t\t      uint32_t page)\n+uint64_t hcapi_get_table_page(struct hcapi_cfa_em_table *mem, uint32_t page)\n {\n \tint level = 0;\n \tuint64_t addr;\n@@ -116,7 +114,7 @@ uint64_t hcapi_get_table_page(struct hcapi_cfa_em_table *mem,\n \t */\n \tlevel = mem->num_lvl - 1;\n \n-\taddr = (uintptr_t)mem->pg_tbl[level].pg_va_tbl[page];\n+\taddr = (uint64_t)mem->pg_tbl[level].pg_va_tbl[page];\n \n \treturn addr;\n }\n@@ -138,42 +136,39 @@ uint64_t hcapi_cfa_p4_key_hash(uint64_t *key_data,\n \tif (!hcapi_cfa_lkup_init)\n \t\thcapi_cfa_seeds_init();\n \n-\tkey0_hash = hcapi_cfa_crc32_hash(((uint8_t *)key_data) +\n-\t\t\t\t\t      (bitlen / 8) - 1);\n+\tkey0_hash =\n+\t\thcapi_cfa_crc32_hash(((uint8_t *)key_data) + (bitlen / 8) - 1);\n \n \tkey1_hash = hcapi_cfa_lookup3_hash((uint8_t *)key_data);\n \n \treturn ((uint64_t)key0_hash) << 32 | (uint64_t)key1_hash;\n }\n \n-static int hcapi_cfa_key_hw_op_put(struct hcapi_cfa_hwop *op,\n-\t\t\t\t   struct hcapi_cfa_key_data *key_obj)\n+static int hcapi_cfa_p4_key_hw_op_put(struct hcapi_cfa_hwop *op,\n+\t\t\t\t      struct hcapi_cfa_key_data *key_obj)\n {\n \tint rc = 0;\n \n-\tmemcpy((uint8_t *)(uintptr_t)op->hw.base_addr +\n-\t       key_obj->offset,\n-\t       key_obj->data,\n-\t       key_obj->size);\n+\tmemcpy((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset,\n+\t       key_obj->data, key_obj->size);\n \n \treturn rc;\n }\n \n-static int hcapi_cfa_key_hw_op_get(struct hcapi_cfa_hwop *op,\n-\t\t\t\t   struct hcapi_cfa_key_data *key_obj)\n+static int hcapi_cfa_p4_key_hw_op_get(struct hcapi_cfa_hwop *op,\n+\t\t\t\t      struct hcapi_cfa_key_data *key_obj)\n {\n \tint rc = 0;\n \n \tmemcpy(key_obj->data,\n-\t       (uint8_t *)(uintptr_t)op->hw.base_addr +\n-\t       key_obj->offset,\n+\t       (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset,\n \t       key_obj->size);\n \n \treturn rc;\n }\n \n-static int hcapi_cfa_key_hw_op_add(struct hcapi_cfa_hwop *op,\n-\t\t\t\t   struct hcapi_cfa_key_data *key_obj)\n+static int hcapi_cfa_p4_key_hw_op_add(struct hcapi_cfa_hwop *op,\n+\t\t\t\t      struct hcapi_cfa_key_data *key_obj)\n {\n \tint rc = 0;\n \tstruct cfa_p4_eem_64b_entry table_entry;\n@@ -182,8 +177,7 @@ static int hcapi_cfa_key_hw_op_add(struct hcapi_cfa_hwop *op,\n \t * Is entry free?\n \t */\n \tmemcpy(&table_entry,\n-\t       (uint8_t *)(uintptr_t)op->hw.base_addr +\n-\t       key_obj->offset,\n+\t       (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset,\n \t       key_obj->size);\n \n \t/*\n@@ -192,16 +186,14 @@ static int hcapi_cfa_key_hw_op_add(struct hcapi_cfa_hwop *op,\n \tif (table_entry.hdr.word1 & (1 << CFA_P4_EEM_ENTRY_VALID_SHIFT))\n \t\treturn -1;\n \n-\tmemcpy((uint8_t *)(uintptr_t)op->hw.base_addr +\n-\t       key_obj->offset,\n-\t       key_obj->data,\n-\t       key_obj->size);\n+\tmemcpy((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset,\n+\t       key_obj->data, key_obj->size);\n \n \treturn rc;\n }\n \n-static int hcapi_cfa_key_hw_op_del(struct hcapi_cfa_hwop *op,\n-\t\t\t\t   struct hcapi_cfa_key_data *key_obj)\n+static int hcapi_cfa_p4_key_hw_op_del(struct hcapi_cfa_hwop *op,\n+\t\t\t\t      struct hcapi_cfa_key_data *key_obj)\n {\n \tint rc = 0;\n \tstruct cfa_p4_eem_64b_entry table_entry;\n@@ -210,8 +202,7 @@ static int hcapi_cfa_key_hw_op_del(struct hcapi_cfa_hwop *op,\n \t * Read entry\n \t */\n \tmemcpy(&table_entry,\n-\t       (uint8_t *)(uintptr_t)op->hw.base_addr +\n-\t       key_obj->offset,\n+\t       (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset,\n \t       key_obj->size);\n \n \t/*\n@@ -223,8 +214,7 @@ static int hcapi_cfa_key_hw_op_del(struct hcapi_cfa_hwop *op,\n \t\t * before deleting the entry.\n \t\t */\n \t\tif (key_obj->data != NULL) {\n-\t\t\tif (memcmp(&table_entry,\n-\t\t\t\t   key_obj->data,\n+\t\t\tif (memcmp(&table_entry, key_obj->data,\n \t\t\t\t   key_obj->size) != 0)\n \t\t\t\treturn -1;\n \t\t}\n@@ -232,40 +222,33 @@ static int hcapi_cfa_key_hw_op_del(struct hcapi_cfa_hwop *op,\n \t\treturn -1;\n \t}\n \n-\n \t/*\n \t * Delete entry\n \t */\n-\tmemset((uint8_t *)(uintptr_t)op->hw.base_addr +\n-\t       key_obj->offset,\n-\t       0,\n-\t       key_obj->size);\n+\tmemset((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, 0, key_obj->size);\n \n \treturn rc;\n }\n \n-\n /** Apporiximation of hcapi_cfa_key_hw_op()\n  *\n  *\n  */\n-int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op,\n-\t\t\tstruct hcapi_cfa_key_tbl *key_tbl,\n-\t\t\tstruct hcapi_cfa_key_data *key_obj,\n-\t\t\tstruct hcapi_cfa_key_loc *key_loc)\n+static int hcapi_cfa_p4_key_hw_op(struct hcapi_cfa_hwop *op,\n+\t\t\t\t  struct hcapi_cfa_key_tbl *key_tbl,\n+\t\t\t\t  struct hcapi_cfa_key_data *key_obj,\n+\t\t\t\t  struct hcapi_cfa_key_loc *key_loc)\n {\n \tint rc = 0;\n+\tstruct hcapi_cfa_em_table *em_tbl;\n+\tuint32_t page;\n \n-\tif (op == NULL ||\n-\t    key_tbl == NULL ||\n-\t    key_obj == NULL ||\n-\t    key_loc == NULL)\n+\tif (op == NULL || key_tbl == NULL || key_obj == NULL || key_loc == NULL)\n \t\treturn -1;\n \n-\top->hw.base_addr =\n-\t\thcapi_get_table_page((struct hcapi_cfa_em_table *)\n-\t\t\t\t     key_tbl->base0,\n-\t\t\t\t     key_obj->offset / key_tbl->page_size);\n+\tpage = key_obj->offset / key_tbl->page_size;\n+\tem_tbl = (struct hcapi_cfa_em_table *)key_tbl->base0;\n+\top->hw.base_addr = hcapi_get_table_page(em_tbl, page);\n \t/* Offset is adjusted to be the offset into the page */\n \tkey_obj->offset = key_obj->offset % key_tbl->page_size;\n \n@@ -274,14 +257,14 @@ int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op,\n \n \tswitch (op->opcode) {\n \tcase HCAPI_CFA_HWOPS_PUT: /**< Write to HW operation */\n-\t\trc = hcapi_cfa_key_hw_op_put(op, key_obj);\n+\t\trc = hcapi_cfa_p4_key_hw_op_put(op, key_obj);\n \t\tbreak;\n \tcase HCAPI_CFA_HWOPS_GET: /**< Read from HW operation */\n-\t\trc = hcapi_cfa_key_hw_op_get(op, key_obj);\n+\t\trc = hcapi_cfa_p4_key_hw_op_get(op, key_obj);\n \t\tbreak;\n \tcase HCAPI_CFA_HWOPS_ADD:\n-\t\t/**< For operations which require more than\n-\t\t * simple writes to HW, this operation is used. The\n+\t\t/**< For operations which require more then simple\n+\t\t * writes to HW, this operation is used.  The\n \t\t * distinction with this operation when compared\n \t\t * to the PUT ops is that this operation is used\n \t\t * in conjunction with the HCAPI_CFA_HWOPS_DEL\n@@ -289,11 +272,11 @@ int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op,\n \t\t * ADD OP.\n \t\t */\n \n-\t\trc = hcapi_cfa_key_hw_op_add(op, key_obj);\n+\t\trc = hcapi_cfa_p4_key_hw_op_add(op, key_obj);\n \n \t\tbreak;\n \tcase HCAPI_CFA_HWOPS_DEL:\n-\t\trc = hcapi_cfa_key_hw_op_del(op, key_obj);\n+\t\trc = hcapi_cfa_p4_key_hw_op_del(op, key_obj);\n \t\tbreak;\n \tdefault:\n \t\trc = -1;\n@@ -302,3 +285,8 @@ int hcapi_cfa_key_hw_op(struct hcapi_cfa_hwop *op,\n \n \treturn rc;\n }\n+\n+const struct hcapi_cfa_devops cfa_p4_devops = {\n+\t.hcapi_cfa_key_hash = hcapi_cfa_p4_key_hash,\n+\t.hcapi_cfa_key_hw_op = hcapi_cfa_p4_key_hw_op,\n+};\ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h\nindex 74a5483c0b..363ffcd57c 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p4.h\n@@ -1,5 +1,5 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2014-2021 Broadcom\n+ * Copyright(c) 2019-2021 Broadcom\n  * All rights reserved.\n  */\n \n@@ -44,286 +44,6 @@ struct cfa_p4_prof_key_cfg {\n \tenum cfa_p4_mac_sel_mode mode;\n };\n \n-/**\n- * CFA action layout definition\n- */\n-\n-#define CFA_P4_ACTION_MAX_LAYOUT_SIZE 184\n-\n-/**\n- * Action object template structure\n- *\n- * Template structure presents data fields that are necessary to know\n- * at the beginning of Action Builder (AB) processing. Like before the\n- * AB compilation. One such example could be a template that is\n- * flexible in size (Encap Record) and the presence of these fields\n- * allows for determining the template size as well as where the\n- * fields are located in the record.\n- *\n- * The template may also present fields that are not made visible to\n- * the caller by way of the action fields.\n- *\n- * Template fields also allow for additional checking on user visible\n- * fields. One such example could be the encap pointer behavior on a\n- * CFA_P4_ACT_OBJ_TYPE_ACT or CFA_P4_ACT_OBJ_TYPE_ACT_SRAM.\n- */\n-struct cfa_p4_action_template {\n-\t/** Action Object type\n-\t *\n-\t * Controls the type of the Action Template\n-\t */\n-\tenum {\n-\t\t/** Select this type to build an Action Record Object\n-\t\t */\n-\t\tCFA_P4_ACT_OBJ_TYPE_ACT,\n-\t\t/** Select this type to build an Action Statistics\n-\t\t * Object\n-\t\t */\n-\t\tCFA_P4_ACT_OBJ_TYPE_STAT,\n-\t\t/** Select this type to build a SRAM Action Record\n-\t\t * Object.\n-\t\t */\n-\t\tCFA_P4_ACT_OBJ_TYPE_ACT_SRAM,\n-\t\t/** Select this type to build a SRAM Action\n-\t\t * Encapsulation Object.\n-\t\t */\n-\t\tCFA_P4_ACT_OBJ_TYPE_ENCAP_SRAM,\n-\t\t/** Select this type to build a SRAM Action Modify\n-\t\t * Object, with IPv4 capability.\n-\t\t */\n-\t\t/* In case of Stingray the term Modify is used for the 'NAT\n-\t\t * action'. Action builder is leveraged to fill in the NAT\n-\t\t * object which then can be referenced by the action\n-\t\t * record.\n-\t\t */\n-\t\tCFA_P4_ACT_OBJ_TYPE_MODIFY_IPV4_SRAM,\n-\t\t/** Select this type to build a SRAM Action Source\n-\t\t * Property Object.\n-\t\t */\n-\t\t/* In case of Stingray this is not a 'pure' action record.\n-\t\t * Action builder is leveraged to full in the Source Property\n-\t\t * object which can then be referenced by the action\n-\t\t * record.\n-\t\t */\n-\t\tCFA_P4_ACT_OBJ_TYPE_SRC_PROP_SRAM,\n-\t\t/** Select this type to build a SRAM Action Statistics\n-\t\t * Object\n-\t\t */\n-\t\tCFA_P4_ACT_OBJ_TYPE_STAT_SRAM,\n-\t} obj_type;\n-\n-\t/** Action Control\n-\t *\n-\t * Controls the internals of the Action Template\n-\t *\n-\t * act is valid when:\n-\t * (obj_type == CFA_P4_ACT_OBJ_TYPE_ACT)\n-\t */\n-\t/*\n-\t * Stat and encap are always inline for EEM as table scope\n-\t * allocation does not allow for separate Stats allocation,\n-\t * but has the xx_inline flags as to be forward compatible\n-\t * with Stingray 2, always treated as TRUE.\n-\t */\n-\tstruct {\n-\t\t/** Set to CFA_HCAPI_TRUE to enable statistics\n-\t\t */\n-\t\tuint8_t stat_enable;\n-\t\t/** Set to CFA_HCAPI_TRUE to enable statistics to be inlined\n-\t\t */\n-\t\tuint8_t stat_inline;\n-\n-\t\t/** Set to CFA_HCAPI_TRUE to enable encapsulation\n-\t\t */\n-\t\tuint8_t encap_enable;\n-\t\t/** Set to CFA_HCAPI_TRUE to enable encapsulation to be inlined\n-\t\t */\n-\t\tuint8_t encap_inline;\n-\t} act;\n-\n-\t/** Modify Setting\n-\t *\n-\t * Controls the type of the Modify Action the template is\n-\t * describing\n-\t *\n-\t * modify is valid when:\n-\t * (obj_type == CFA_P4_ACT_OBJ_TYPE_MODIFY_SRAM)\n-\t */\n-\tenum {\n-\t\t/** Set to enable Modify of Source IPv4 Address\n-\t\t */\n-\t\tCFA_P4_MR_REPLACE_SOURCE_IPV4 = 0,\n-\t\t/** Set to enable Modify of Destination IPv4 Address\n-\t\t */\n-\t\tCFA_P4_MR_REPLACE_DEST_IPV4\n-\t} modify;\n-\n-\t/** Encap Control\n-\t * Controls the type of encapsulation the template is\n-\t * describing\n-\t *\n-\t * encap is valid when:\n-\t * ((obj_type == CFA_P4_ACT_OBJ_TYPE_ACT) &&\n-\t *   act.encap_enable) ||\n-\t * ((obj_type == CFA_P4_ACT_OBJ_TYPE_SRC_PROP_SRAM)\n-\t */\n-\tstruct {\n-\t\t/* Direction is required as Stingray Encap on RX is\n-\t\t * limited to l2 and VTAG only.\n-\t\t */\n-\t\t/** Receive or Transmit direction\n-\t\t */\n-\t\tuint8_t direction;\n-\t\t/** Set to CFA_HCAPI_TRUE to enable L2 capability in the\n-\t\t *  template\n-\t\t */\n-\t\tuint8_t l2_enable;\n-\t\t/** vtag controls the Encap Vector - VTAG Encoding, 4 bits\n-\t\t *\n-\t\t * <ul>\n-\t\t * <li> CFA_P4_ACT_ENCAP_VTAGS_PUSH_0, default, no VLAN\n-\t\t *      Tags applied\n-\t\t * <li> CFA_P4_ACT_ENCAP_VTAGS_PUSH_1, adds capability to\n-\t\t *      set 1 VLAN Tag. Action Template compile adds\n-\t\t *      the following field to the action object\n-\t\t *      ::TF_ER_VLAN1\n-\t\t * <li> CFA_P4_ACT_ENCAP_VTAGS_PUSH_2, adds capability to\n-\t\t *      set 2 VLAN Tags. Action Template compile adds\n-\t\t *      the following fields to the action object\n-\t\t *      ::TF_ER_VLAN1 and ::TF_ER_VLAN2\n-\t\t * </ul>\n-\t\t */\n-\t\tenum { CFA_P4_ACT_ENCAP_VTAGS_PUSH_0 = 0,\n-\t\t       CFA_P4_ACT_ENCAP_VTAGS_PUSH_1,\n-\t\t       CFA_P4_ACT_ENCAP_VTAGS_PUSH_2 } vtag;\n-\n-\t\t/*\n-\t\t * The remaining fields are NOT supported when\n-\t\t * direction is RX and ((obj_type ==\n-\t\t * CFA_P4_ACT_OBJ_TYPE_ACT) && act.encap_enable).\n-\t\t * ab_compile_layout will perform the checking and\n-\t\t * skip remaining fields.\n-\t\t */\n-\t\t/** L3 Encap controls the Encap Vector - L3 Encoding,\n-\t\t *  3 bits. Defines the type of L3 Encapsulation the\n-\t\t *  template is describing.\n-\t\t * <ul>\n-\t\t * <li> CFA_P4_ACT_ENCAP_L3_NONE, default, no L3\n-\t\t *      Encapsulation processing.\n-\t\t * <li> CFA_P4_ACT_ENCAP_L3_IPV4, enables L3 IPv4\n-\t\t *      Encapsulation.\n-\t\t * <li> CFA_P4_ACT_ENCAP_L3_IPV6, enables L3 IPv6\n-\t\t *      Encapsulation.\n-\t\t * <li> CFA_P4_ACT_ENCAP_L3_MPLS_8847, enables L3 MPLS\n-\t\t *      8847 Encapsulation.\n-\t\t * <li> CFA_P4_ACT_ENCAP_L3_MPLS_8848, enables L3 MPLS\n-\t\t *      8848 Encapsulation.\n-\t\t * </ul>\n-\t\t */\n-\t\tenum {\n-\t\t\t/** Set to disable any L3 encapsulation\n-\t\t\t * processing, default\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_L3_NONE = 0,\n-\t\t\t/** Set to enable L3 IPv4 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_L3_IPV4 = 4,\n-\t\t\t/** Set to enable L3 IPv6 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_L3_IPV6 = 5,\n-\t\t\t/** Set to enable L3 MPLS 8847 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_L3_MPLS_8847 = 6,\n-\t\t\t/** Set to enable L3 MPLS 8848 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_L3_MPLS_8848 = 7\n-\t\t} l3;\n-\n-#define CFA_P4_ACT_ENCAP_MAX_MPLS_LABELS 8\n-\t\t/** 1-8 labels, valid when\n-\t\t * (l3 == CFA_P4_ACT_ENCAP_L3_MPLS_8847) ||\n-\t\t * (l3 == CFA_P4_ACT_ENCAP_L3_MPLS_8848)\n-\t\t *\n-\t\t * MAX number of MPLS Labels 8.\n-\t\t */\n-\t\tuint8_t l3_num_mpls_labels;\n-\n-\t\t/** Set to CFA_HCAPI_TRUE to enable L4 capability in the\n-\t\t * template.\n-\t\t *\n-\t\t * CFA_HCAPI_TRUE adds ::TF_EN_UDP_SRC_PORT and\n-\t\t * ::TF_EN_UDP_DST_PORT to the template.\n-\t\t */\n-\t\tuint8_t l4_enable;\n-\n-\t\t/** Tunnel Encap controls the Encap Vector - Tunnel\n-\t\t *  Encap, 3 bits. Defines the type of Tunnel\n-\t\t *  encapsulation the template is describing\n-\t\t * <ul>\n-\t\t * <li> CFA_P4_ACT_ENCAP_TNL_NONE, default, no Tunnel\n-\t\t *      Encapsulation processing.\n-\t\t * <li> CFA_P4_ACT_ENCAP_TNL_GENERIC_FULL\n-\t\t * <li> CFA_P4_ACT_ENCAP_TNL_VXLAN. NOTE: Expects\n-\t\t *      l4_enable set to CFA_P4_TRUE;\n-\t\t * <li> CFA_P4_ACT_ENCAP_TNL_NGE. NOTE: Expects l4_enable\n-\t\t *      set to CFA_P4_TRUE;\n-\t\t * <li> CFA_P4_ACT_ENCAP_TNL_NVGRE. NOTE: only valid if\n-\t\t *      l4_enable set to CFA_HCAPI_FALSE.\n-\t\t * <li> CFA_P4_ACT_ENCAP_TNL_GRE.NOTE: only valid if\n-\t\t *      l4_enable set to CFA_HCAPI_FALSE.\n-\t\t * <li> CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4\n-\t\t * <li> CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL\n-\t\t * </ul>\n-\t\t */\n-\t\tenum {\n-\t\t\t/** Set to disable Tunnel header encapsulation\n-\t\t\t * processing, default\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_TNL_NONE = 0,\n-\t\t\t/** Set to enable Tunnel Generic Full header\n-\t\t\t * encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_TNL_GENERIC_FULL,\n-\t\t\t/** Set to enable VXLAN header encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_TNL_VXLAN,\n-\t\t\t/** Set to enable NGE (VXLAN2) header encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_TNL_NGE,\n-\t\t\t/** Set to enable NVGRE header encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_TNL_NVGRE,\n-\t\t\t/** Set to enable GRE header encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_TNL_GRE,\n-\t\t\t/** Set to enable Generic header after Tunnel\n-\t\t\t * L4 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4,\n-\t\t\t/** Set to enable Generic header after Tunnel\n-\t\t\t * encapsulation\n-\t\t\t */\n-\t\t\tCFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL\n-\t\t} tnl;\n-\n-\t\t/** Number of bytes of generic tunnel header,\n-\t\t * valid when\n-\t\t * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_FULL) ||\n-\t\t * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TL4) ||\n-\t\t * (tnl == CFA_P4_ACT_ENCAP_TNL_GENERIC_AFTER_TNL)\n-\t\t */\n-\t\tuint8_t tnl_generic_size;\n-\t\t/** Number of 32b words of nge options,\n-\t\t * valid when\n-\t\t * (tnl == CFA_P4_ACT_ENCAP_TNL_NGE)\n-\t\t */\n-\t\tuint8_t tnl_nge_op_len;\n-\t\t/* Currently not planned */\n-\t\t/* Custom Header */\n-\t\t/*\tuint8_t custom_enable; */\n-\t} encap;\n-};\n-\n /**\n  * Enumeration of SRAM entry types, used for allocation of\n  * fixed SRAM entities. The memory model for CFA HCAPI\ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c\nindex 723b8393b9..a70c6f4eaa 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.c\n@@ -88,7 +88,7 @@ static uint32_t hcapi_cfa_lookup3_hash(uint8_t *in_key)\n {\n \tuint32_t val1;\n \n-\tval1 = hashword(((uint32_t *)in_key) + 1,\n+\tval1 = hashword(((uint32_t *)in_key),\n \t\t\t CFA_P58_EEM_KEY_MAX_SIZE / (sizeof(uint32_t)),\n \t\t\t hcapi_cfa_lkup_lkup3_init_cfg);\n \ndiff --git a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h\nindex 27796b1b2f..d272d3ffec 100644\n--- a/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h\n+++ b/drivers/net/bnxt/hcapi/cfa/hcapi_cfa_p58.h\n@@ -12,6 +12,11 @@\n #define CFA_P58_EEM_KEY_MAX_SIZE 80\n #define CFA_P58_EEM_KEY_RECORD_SIZE 80\n \n+#define CFA_P58_EM_FKB_NUM_WORDS 4\n+#define CFA_P58_EM_FKB_NUM_ENTRIES 64\n+#define CFA_P58_WC_TCAM_FKB_NUM_WORDS 4\n+#define CFA_P58_WC_TCAM_FKB_NUM_ENTRIES 64\n+\n /** CFA phase 5.8 fix formatted table(layout) ID definition\n  *\n  */\n@@ -29,7 +34,7 @@ enum cfa_p58_tbl_id {\n \tCFA_P58_TBL_PROF_PARIF_DFLT_ACT_REC_PTR,\n \t/** Error Profile TCAM Miss Action Record Pointer Table */\n \tCFA_P58_TBL_PROF_PARIF_ERR_ACT_REC_PTR,\n-\t/** SR2 VNIC/SVIF Properties Table */\n+\t/** VNIC/SVIF Properties Table */\n \tCFA_P58_TBL_VSPT,\n \tCFA_P58_TBL_MAX\n };\n@@ -56,286 +61,6 @@ struct cfa_p58_prof_key_cfg {\n \tenum cfa_p58_mac_sel_mode mode;\n };\n \n-/**\n- * CFA action layout definition\n- */\n-\n-#define CFA_P58_ACTION_MAX_LAYOUT_SIZE 184\n-\n-/**\n- * Action object template structure\n- *\n- * Template structure presents data fields that are necessary to know\n- * at the beginning of Action Builder (AB) processing. Like before the\n- * AB compilation. One such example could be a template that is\n- * flexible in size (Encap Record) and the presence of these fields\n- * allows for determining the template size as well as where the\n- * fields are located in the record.\n- *\n- * The template may also present fields that are not made visible to\n- * the caller by way of the action fields.\n- *\n- * Template fields also allow for additional checking on user visible\n- * fields. One such example could be the encap pointer behavior on a\n- * CFA_P58_ACT_OBJ_TYPE_ACT or CFA_P58_ACT_OBJ_TYPE_ACT_SRAM.\n- */\n-struct cfa_p58_action_template {\n-\t/** Action Object type\n-\t *\n-\t * Controls the type of the Action Template\n-\t */\n-\tenum {\n-\t\t/** Select this type to build an Action Record Object\n-\t\t */\n-\t\tCFA_P58_ACT_OBJ_TYPE_ACT,\n-\t\t/** Select this type to build an Action Statistics\n-\t\t * Object\n-\t\t */\n-\t\tCFA_P58_ACT_OBJ_TYPE_STAT,\n-\t\t/** Select this type to build a SRAM Action Record\n-\t\t * Object.\n-\t\t */\n-\t\tCFA_P58_ACT_OBJ_TYPE_ACT_SRAM,\n-\t\t/** Select this type to build a SRAM Action\n-\t\t * Encapsulation Object.\n-\t\t */\n-\t\tCFA_P58_ACT_OBJ_TYPE_ENCAP_SRAM,\n-\t\t/** Select this type to build a SRAM Action Modify\n-\t\t * Object, with IPv4 capability.\n-\t\t */\n-\t\t/* In case of Stingray the term Modify is used for the 'NAT\n-\t\t * action'. Action builder is leveraged to fill in the NAT\n-\t\t * object which then can be referenced by the action\n-\t\t * record.\n-\t\t */\n-\t\tCFA_P58_ACT_OBJ_TYPE_MODIFY_IPV4_SRAM,\n-\t\t/** Select this type to build a SRAM Action Source\n-\t\t * Property Object.\n-\t\t */\n-\t\t/* In case of Stingray this is not a 'pure' action record.\n-\t\t * Action builder is leveraged to full in the Source Property\n-\t\t * object which can then be referenced by the action\n-\t\t * record.\n-\t\t */\n-\t\tCFA_P58_ACT_OBJ_TYPE_SRC_PROP_SRAM,\n-\t\t/** Select this type to build a SRAM Action Statistics\n-\t\t * Object\n-\t\t */\n-\t\tCFA_P58_ACT_OBJ_TYPE_STAT_SRAM,\n-\t} obj_type;\n-\n-\t/** Action Control\n-\t *\n-\t * Controls the internals of the Action Template\n-\t *\n-\t * act is valid when:\n-\t * (obj_type == CFA_P58_ACT_OBJ_TYPE_ACT)\n-\t */\n-\t/*\n-\t * Stat and encap are always inline for EEM as table scope\n-\t * allocation does not allow for separate Stats allocation,\n-\t * but has the xx_inline flags as to be forward compatible\n-\t * with Stingray 2, always treated as TRUE.\n-\t */\n-\tstruct {\n-\t\t/** Set to CFA_HCAPI_TRUE to enable statistics\n-\t\t */\n-\t\tuint8_t stat_enable;\n-\t\t/** Set to CFA_HCAPI_TRUE to enable statistics to be inlined\n-\t\t */\n-\t\tuint8_t stat_inline;\n-\n-\t\t/** Set to CFA_HCAPI_TRUE to enable encapsulation\n-\t\t */\n-\t\tuint8_t encap_enable;\n-\t\t/** Set to CFA_HCAPI_TRUE to enable encapsulation to be inlined\n-\t\t */\n-\t\tuint8_t encap_inline;\n-\t} act;\n-\n-\t/** Modify Setting\n-\t *\n-\t * Controls the type of the Modify Action the template is\n-\t * describing\n-\t *\n-\t * modify is valid when:\n-\t * (obj_type == CFA_P58_ACT_OBJ_TYPE_MODIFY_SRAM)\n-\t */\n-\tenum {\n-\t\t/** Set to enable Modify of Source IPv4 Address\n-\t\t */\n-\t\tCFA_P58_MR_REPLACE_SOURCE_IPV4 = 0,\n-\t\t/** Set to enable Modify of Destination IPv4 Address\n-\t\t */\n-\t\tCFA_P58_MR_REPLACE_DEST_IPV4\n-\t} modify;\n-\n-\t/** Encap Control\n-\t * Controls the type of encapsulation the template is\n-\t * describing\n-\t *\n-\t * encap is valid when:\n-\t * ((obj_type == CFA_P58_ACT_OBJ_TYPE_ACT) &&\n-\t *   act.encap_enable) ||\n-\t * ((obj_type == CFA_P58_ACT_OBJ_TYPE_SRC_PROP_SRAM)\n-\t */\n-\tstruct {\n-\t\t/* Direction is required as Stingray Encap on RX is\n-\t\t * limited to l2 and VTAG only.\n-\t\t */\n-\t\t/** Receive or Transmit direction\n-\t\t */\n-\t\tuint8_t direction;\n-\t\t/** Set to CFA_HCAPI_TRUE to enable L2 capability in the\n-\t\t *  template\n-\t\t */\n-\t\tuint8_t l2_enable;\n-\t\t/** vtag controls the Encap Vector - VTAG Encoding, 4 bits\n-\t\t *\n-\t\t * <ul>\n-\t\t * <li> CFA_P58_ACT_ENCAP_VTAGS_PUSH_0, default, no VLAN\n-\t\t *      Tags applied\n-\t\t * <li> CFA_P58_ACT_ENCAP_VTAGS_PUSH_1, adds capability to\n-\t\t *      set 1 VLAN Tag. Action Template compile adds\n-\t\t *      the following field to the action object\n-\t\t *      ::TF_ER_VLAN1\n-\t\t * <li> CFA_P58_ACT_ENCAP_VTAGS_PUSH_2, adds capability to\n-\t\t *      set 2 VLAN Tags. Action Template compile adds\n-\t\t *      the following fields to the action object\n-\t\t *      ::TF_ER_VLAN1 and ::TF_ER_VLAN2\n-\t\t * </ul>\n-\t\t */\n-\t\tenum { CFA_P58_ACT_ENCAP_VTAGS_PUSH_0 = 0,\n-\t\t       CFA_P58_ACT_ENCAP_VTAGS_PUSH_1,\n-\t\t       CFA_P58_ACT_ENCAP_VTAGS_PUSH_2 } vtag;\n-\n-\t\t/*\n-\t\t * The remaining fields are NOT supported when\n-\t\t * direction is RX and ((obj_type ==\n-\t\t * CFA_P58_ACT_OBJ_TYPE_ACT) && act.encap_enable).\n-\t\t * ab_compile_layout will perform the checking and\n-\t\t * skip remaining fields.\n-\t\t */\n-\t\t/** L3 Encap controls the Encap Vector - L3 Encoding,\n-\t\t *  3 bits. Defines the type of L3 Encapsulation the\n-\t\t *  template is describing.\n-\t\t * <ul>\n-\t\t * <li> CFA_P58_ACT_ENCAP_L3_NONE, default, no L3\n-\t\t *      Encapsulation processing.\n-\t\t * <li> CFA_P58_ACT_ENCAP_L3_IPV4, enables L3 IPv4\n-\t\t *      Encapsulation.\n-\t\t * <li> CFA_P58_ACT_ENCAP_L3_IPV6, enables L3 IPv6\n-\t\t *      Encapsulation.\n-\t\t * <li> CFA_P58_ACT_ENCAP_L3_MPLS_8847, enables L3 MPLS\n-\t\t *      8847 Encapsulation.\n-\t\t * <li> CFA_P58_ACT_ENCAP_L3_MPLS_8848, enables L3 MPLS\n-\t\t *      8848 Encapsulation.\n-\t\t * </ul>\n-\t\t */\n-\t\tenum {\n-\t\t\t/** Set to disable any L3 encapsulation\n-\t\t\t * processing, default\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_L3_NONE = 0,\n-\t\t\t/** Set to enable L3 IPv4 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_L3_IPV4 = 4,\n-\t\t\t/** Set to enable L3 IPv6 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_L3_IPV6 = 5,\n-\t\t\t/** Set to enable L3 MPLS 8847 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_L3_MPLS_8847 = 6,\n-\t\t\t/** Set to enable L3 MPLS 8848 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_L3_MPLS_8848 = 7\n-\t\t} l3;\n-\n-#define CFA_P58_ACT_ENCAP_MAX_MPLS_LABELS 8\n-\t\t/** 1-8 labels, valid when\n-\t\t * (l3 == CFA_P58_ACT_ENCAP_L3_MPLS_8847) ||\n-\t\t * (l3 == CFA_P58_ACT_ENCAP_L3_MPLS_8848)\n-\t\t *\n-\t\t * MAX number of MPLS Labels 8.\n-\t\t */\n-\t\tuint8_t l3_num_mpls_labels;\n-\n-\t\t/** Set to CFA_HCAPI_TRUE to enable L4 capability in the\n-\t\t * template.\n-\t\t *\n-\t\t * CFA_HCAPI_TRUE adds ::TF_EN_UDP_SRC_PORT and\n-\t\t * ::TF_EN_UDP_DST_PORT to the template.\n-\t\t */\n-\t\tuint8_t l4_enable;\n-\n-\t\t/** Tunnel Encap controls the Encap Vector - Tunnel\n-\t\t *  Encap, 3 bits. Defines the type of Tunnel\n-\t\t *  encapsulation the template is describing\n-\t\t * <ul>\n-\t\t * <li> CFA_P58_ACT_ENCAP_TNL_NONE, default, no Tunnel\n-\t\t *      Encapsulation processing.\n-\t\t * <li> CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL\n-\t\t * <li> CFA_P58_ACT_ENCAP_TNL_VXLAN. NOTE: Expects\n-\t\t *      l4_enable set to CFA_P58_TRUE;\n-\t\t * <li> CFA_P58_ACT_ENCAP_TNL_NGE. NOTE: Expects l4_enable\n-\t\t *      set to CFA_P58_TRUE;\n-\t\t * <li> CFA_P58_ACT_ENCAP_TNL_NVGRE. NOTE: only valid if\n-\t\t *      l4_enable set to CFA_HCAPI_FALSE.\n-\t\t * <li> CFA_P58_ACT_ENCAP_TNL_GRE.NOTE: only valid if\n-\t\t *      l4_enable set to CFA_HCAPI_FALSE.\n-\t\t * <li> CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4\n-\t\t * <li> CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL\n-\t\t * </ul>\n-\t\t */\n-\t\tenum {\n-\t\t\t/** Set to disable Tunnel header encapsulation\n-\t\t\t * processing, default\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_TNL_NONE = 0,\n-\t\t\t/** Set to enable Tunnel Generic Full header\n-\t\t\t * encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_TNL_GENERIC_FULL,\n-\t\t\t/** Set to enable VXLAN header encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_TNL_VXLAN,\n-\t\t\t/** Set to enable NGE (VXLAN2) header encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_TNL_NGE,\n-\t\t\t/** Set to enable NVGRE header encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_TNL_NVGRE,\n-\t\t\t/** Set to enable GRE header encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_TNL_GRE,\n-\t\t\t/** Set to enable Generic header after Tunnel\n-\t\t\t * L4 encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4,\n-\t\t\t/** Set to enable Generic header after Tunnel\n-\t\t\t * encapsulation\n-\t\t\t */\n-\t\t\tCFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL\n-\t\t} tnl;\n-\n-\t\t/** Number of bytes of generic tunnel header,\n-\t\t * valid when\n-\t\t * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_FULL) ||\n-\t\t * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TL4) ||\n-\t\t * (tnl == CFA_P58_ACT_ENCAP_TNL_GENERIC_AFTER_TNL)\n-\t\t */\n-\t\tuint8_t tnl_generic_size;\n-\t\t/** Number of 32b words of nge options,\n-\t\t * valid when\n-\t\t * (tnl == CFA_P58_ACT_ENCAP_TNL_NGE)\n-\t\t */\n-\t\tuint8_t tnl_nge_op_len;\n-\t\t/* Currently not planned */\n-\t\t/* Custom Header */\n-\t\t/*\tuint8_t custom_enable; */\n-\t} encap;\n-};\n-\n /**\n  * Enumeration of SRAM entry types, used for allocation of\n  * fixed SRAM entities. The memory model for CFA HCAPI\ndiff --git a/drivers/net/bnxt/tf_core/hwrm_tf.h b/drivers/net/bnxt/tf_core/hwrm_tf.h\ndeleted file mode 100644\nindex 9cc9a1435c..0000000000\n--- a/drivers/net/bnxt/tf_core/hwrm_tf.h\n+++ /dev/null\n@@ -1,196 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2019-2021 Broadcom\n- * All rights reserved.\n- */\n-#ifndef _HWRM_TF_H_\n-#define _HWRM_TF_H_\n-\n-#include \"tf_core.h\"\n-\n-typedef enum tf_type {\n-\tTF_TYPE_TRUFLOW,\n-\tTF_TYPE_LAST = TF_TYPE_TRUFLOW,\n-} tf_type_t;\n-\n-typedef enum tf_subtype {\n-\tHWRM_TFT_GET_GLOBAL_CFG = 821,\n-\tHWRM_TFT_SET_GLOBAL_CFG = 822,\n-\tHWRM_TFT_TBL_TYPE_BULK_GET = 825,\n-\tHWRM_TFT_IF_TBL_SET = 827,\n-\tHWRM_TFT_IF_TBL_GET = 828,\n-\tTF_SUBTYPE_LAST = HWRM_TFT_IF_TBL_GET,\n-} tf_subtype_t;\n-\n-/* Request and Response compile time checking */\n-/* u32_t\ttlv_req_value[26]; */\n-#define TF_MAX_REQ_SIZE 104\n-/* u32_t\ttlv_resp_value[170]; */\n-#define TF_MAX_RESP_SIZE 680\n-\n-/* Use this to allocate/free any kind of\n- * indexes over HWRM and fill the parms pointer\n- */\n-#define TF_BULK_RECV\t 128\n-#define TF_BULK_SEND\t  16\n-\n-/* EM Key value */\n-#define TF_DEV_DATA_TYPE_TF_EM_RULE_INSERT_KEY_DATA 0x2e30UL\n-/* EM Key value */\n-#define TF_DEV_DATA_TYPE_TF_EM_RULE_DELETE_KEY_DATA 0x2e40UL\n-/* L2 Context DMA Address Type */\n-#define TF_DEV_DATA_TYPE_TF_L2_CTX_DMA_ADDR\t\t0x2fe0UL\n-/* L2 Context Entry */\n-#define TF_DEV_DATA_TYPE_TF_L2_CTX_ENTRY\t\t0x2fe1UL\n-/* Prof tcam DMA Address Type */\n-#define TF_DEV_DATA_TYPE_TF_PROF_TCAM_DMA_ADDR\t\t0x3030UL\n-/* Prof tcam Entry */\n-#define TF_DEV_DATA_TYPE_TF_PROF_TCAM_ENTRY\t\t0x3031UL\n-/* WC DMA Address Type */\n-#define TF_DEV_DATA_TYPE_TF_WC_DMA_ADDR\t\t\t0x30d0UL\n-/* WC Entry */\n-#define TF_DEV_DATA_TYPE_TF_WC_ENTRY\t\t\t\t0x30d1UL\n-/* SPIF DFLT L2 CTXT Entry */\n-#define TF_DEV_DATA_TYPE_SPIF_DFLT_L2_CTXT\t\t  0x3131UL\n-/* PARIF DFLT ACT REC PTR Entry */\n-#define TF_DEV_DATA_TYPE_PARIF_DFLT_ACT_REC\t\t0x3132UL\n-/* PARIF ERR DFLT ACT REC PTR Entry */\n-#define TF_DEV_DATA_TYPE_PARIF_ERR_DFLT_ACT_REC\t 0x3133UL\n-/* ILT Entry */\n-#define TF_DEV_DATA_TYPE_ILT\t\t\t\t0x3134UL\n-/* VNIC SVIF entry */\n-#define TF_DEV_DATA_TYPE_VNIC_SVIF\t\t\t0x3135UL\n-/* Action Data */\n-#define TF_DEV_DATA_TYPE_TF_ACTION_DATA\t\t\t0x3170UL\n-#define TF_DEV_DATA_TYPE_LAST   TF_DEV_DATA_TYPE_TF_ACTION_DATA\n-\n-#define TF_BITS2BYTES(x) (((x) + 7) >> 3)\n-#define TF_BITS2BYTES_WORD_ALIGN(x) ((((x) + 31) >> 5) * 4)\n-#define TF_BITS2BYTES_64B_WORD_ALIGN(x) ((((x) + 63) >> 6) * 8)\n-\n-struct tf_set_global_cfg_input;\n-struct tf_get_global_cfg_input;\n-struct tf_get_global_cfg_output;\n-struct tf_tbl_type_bulk_get_input;\n-struct tf_tbl_type_bulk_get_output;\n-struct tf_if_tbl_set_input;\n-struct tf_if_tbl_get_input;\n-struct tf_if_tbl_get_output;\n-/* Input params for global config set */\n-typedef struct tf_set_global_cfg_input {\n-\t/* Session Id */\n-\tuint32_t\t\t\t fw_session_id;\n-\t/* flags */\n-\tuint32_t\t\t\t flags;\n-\t/* When set to 0, indicates the query apply to RX */\n-#define TF_SET_GLOBAL_CFG_INPUT_FLAGS_DIR_RX\t\t  (0x0)\n-\t/* When set to 1, indicates the query apply to TX */\n-#define TF_SET_GLOBAL_CFG_INPUT_FLAGS_DIR_TX\t\t  (0x1)\n-\t/* Config type */\n-\tuint32_t\t\t\t type;\n-\t/* Offset of the type */\n-\tuint32_t\t\t\t offset;\n-\t/* Size of the data to set in bytes */\n-\tuint16_t\t\t\t size;\n-\t/* Data to set */\n-\tuint8_t\t\t\t  data[TF_BULK_SEND];\n-} tf_set_global_cfg_input_t, *ptf_set_global_cfg_input_t;\n-\n-/* Input params for global config to get */\n-typedef struct tf_get_global_cfg_input {\n-\t/* Session Id */\n-\tuint32_t\t\t\t fw_session_id;\n-\t/* flags */\n-\tuint32_t\t\t\t flags;\n-\t/* When set to 0, indicates the query apply to RX */\n-#define TF_GET_GLOBAL_CFG_INPUT_FLAGS_DIR_RX\t\t  (0x0)\n-\t/* When set to 1, indicates the query apply to TX */\n-#define TF_GET_GLOBAL_CFG_INPUT_FLAGS_DIR_TX\t\t  (0x1)\n-\t/* Config to retrieve */\n-\tuint32_t\t\t\t type;\n-\t/* Offset to retrieve */\n-\tuint32_t\t\t\t offset;\n-\t/* Size of the data to set in bytes */\n-\tuint16_t\t\t\t size;\n-} tf_get_global_cfg_input_t, *ptf_get_global_cfg_input_t;\n-\n-/* Output params for global config */\n-typedef struct tf_get_global_cfg_output {\n-\t/* Size of the total data read in bytes */\n-\tuint16_t\t\t\t size;\n-\t/* Data to get */\n-\tuint8_t\t\t\t  data[TF_BULK_SEND];\n-} tf_get_global_cfg_output_t, *ptf_get_global_cfg_output_t;\n-\n-/* Input params for table type get */\n-typedef struct tf_tbl_type_bulk_get_input {\n-\t/* Session Id */\n-\tuint32_t\t\t\t fw_session_id;\n-\t/* flags */\n-\tuint32_t\t\t\t flags;\n-\t/* When set to 0, indicates the get apply to RX */\n-#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_DIR_RX\t   (0x0)\n-\t/* When set to 1, indicates the get apply to TX */\n-#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_DIR_TX\t   (0x1)\n-\t/* When set to 1, indicates the clear entry on read */\n-#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_CLEAR_ON_READ\t  (0x2)\n-\t/* Type of the object to set */\n-\tuint32_t\t\t\t type;\n-\t/* Starting index to get from */\n-\tuint32_t\t\t\t start_index;\n-\t/* Number of entries to get */\n-\tuint32_t\t\t\t num_entries;\n-\t/* Host memory where data will be stored */\n-\tuint64_t\t\t\t host_addr;\n-} tf_tbl_type_bulk_get_input_t, *ptf_tbl_type_bulk_get_input_t;\n-\n-/* Output params for table type get */\n-typedef struct tf_tbl_type_bulk_get_output {\n-\t/* Size of the total data read in bytes */\n-\tuint16_t\t\t\t size;\n-} tf_tbl_type_bulk_get_output_t, *ptf_tbl_type_bulk_get_output_t;\n-\n-/* Input params for if tbl set */\n-typedef struct tf_if_tbl_set_input {\n-\t/* Session Id */\n-\tuint32_t\t\t\t fw_session_id;\n-\t/* flags */\n-\tuint16_t\t\t\t flags;\n-\t/* When set to 0, indicates the query apply to RX */\n-#define TF_IF_TBL_SET_INPUT_FLAGS_DIR_RX\t\t\t  (0x0)\n-\t/* When set to 1, indicates the query apply to TX */\n-#define TF_IF_TBL_SET_INPUT_FLAGS_DIR_TX\t\t\t  (0x1)\n-\t/* if table type */\n-\tuint16_t\t\t\t tf_if_tbl_type;\n-\t/* index of table entry */\n-\tuint16_t\t\t\t idx;\n-\t/* size of the data write to table entry */\n-\tuint32_t\t\t\t data_sz_in_bytes;\n-\t/* data to write into table entry */\n-\tuint32_t\t\t\t data[2];\n-} tf_if_tbl_set_input_t, *ptf_if_tbl_set_input_t;\n-\n-/* Input params for if tbl get */\n-typedef struct tf_if_tbl_get_input {\n-\t/* Session Id */\n-\tuint32_t\t\t\t fw_session_id;\n-\t/* flags */\n-\tuint16_t\t\t\t flags;\n-\t/* When set to 0, indicates the query apply to RX */\n-#define TF_IF_TBL_GET_INPUT_FLAGS_DIR_RX\t\t\t  (0x0)\n-\t/* When set to 1, indicates the query apply to TX */\n-#define TF_IF_TBL_GET_INPUT_FLAGS_DIR_TX\t\t\t  (0x1)\n-\t/* if table type */\n-\tuint16_t\t\t\t tf_if_tbl_type;\n-\t/* size of the data get from table entry */\n-\tuint32_t\t\t\t data_sz_in_bytes;\n-\t/* index of table entry */\n-\tuint16_t\t\t\t idx;\n-} tf_if_tbl_get_input_t, *ptf_if_tbl_get_input_t;\n-\n-/* output params for if tbl get */\n-typedef struct tf_if_tbl_get_output {\n-\t/* Value read from table entry */\n-\tuint32_t\t\t\t data[2];\n-} tf_if_tbl_get_output_t, *ptf_if_tbl_get_output_t;\n-\n-#endif /* _HWRM_TF_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/lookup3.h b/drivers/net/bnxt/tf_core/lookup3.h\nindex b1fd2cd436..743c4d9c4f 100644\n--- a/drivers/net/bnxt/tf_core/lookup3.h\n+++ b/drivers/net/bnxt/tf_core/lookup3.h\n@@ -122,7 +122,7 @@ static inline uint32_t hashword(const uint32_t *k,\n \t\t\t\tsize_t length,\n \t\t\t\tuint32_t initval) {\n \tuint32_t a, b, c;\n-\tint index = 12;\n+\tint index = length - 1;\n \n \t/* Set up the internal state */\n \ta = 0xdeadbeef + (((uint32_t)length) << 2) + initval;\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c\nindex 573fa0b1ed..9b8677caac 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.c\n+++ b/drivers/net/bnxt/tf_core/tf_core.c\n@@ -18,7 +18,6 @@\n #include \"bnxt.h\"\n #include \"rand.h\"\n #include \"tf_common.h\"\n-#include \"hwrm_tf.h\"\n #include \"tf_ext_flow_handle.h\"\n \n int\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h\nindex fcba492dc5..7b26b58000 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.h\n+++ b/drivers/net/bnxt/tf_core/tf_core.h\n@@ -10,7 +10,7 @@\n #include <stdlib.h>\n #include <stdbool.h>\n #include <stdio.h>\n-#include \"hcapi/cfa/hcapi_cfa_defs.h\"\n+#include \"hcapi_cfa_defs.h\"\n #include \"tf_project.h\"\n \n /**\n@@ -43,6 +43,29 @@ enum tf_mem {\n \tTF_MEM_MAX\n };\n \n+/**\n+ * External memory control channel type\n+ */\n+enum tf_ext_mem_chan_type {\n+\t/**\n+\t * Direct memory write(Wh+/SR)\n+\t */\n+\tTF_EXT_MEM_CHAN_TYPE_DIRECT = 0,\n+\t/**\n+\t * Ring interface MPC\n+\t */\n+\tTF_EXT_MEM_CHAN_TYPE_RING_IF,\n+\t/**\n+\t * Use HWRM message to firmware\n+\t */\n+\tTF_EXT_MEM_CHAN_TYPE_FW,\n+\t/**\n+\t * Use ring_if message to firmware\n+\t */\n+\tTF_EXT_MEM_CHAN_TYPE_RING_IF_FW,\n+\tTF_EXT_MEM_CHAN_TYPE_MAX\n+};\n+\n /**\n  * EEM record AR helper\n  *\n@@ -149,7 +172,6 @@ enum tf_device_type {\n \tTF_DEVICE_TYPE_WH = 0, /**< Whitney+  */\n \tTF_DEVICE_TYPE_SR,     /**< Stingray  */\n \tTF_DEVICE_TYPE_THOR,   /**< Thor      */\n-\tTF_DEVICE_TYPE_SR2,    /**< Stingray2 */\n \tTF_DEVICE_TYPE_MAX     /**< Maximum   */\n };\n \n@@ -182,40 +204,39 @@ enum tf_module_type {\n  */\n enum tf_identifier_type {\n \t/**\n-\t *  WH/SR/TH/SR2\n+\t *  WH/SR/TH\n \t *  The L2 Context is returned from the L2 Ctxt TCAM lookup\n \t *  and can be used in WC TCAM or EM keys to virtualize further\n \t *  lookups.\n \t */\n \tTF_IDENT_TYPE_L2_CTXT_HIGH,\n \t/**\n-\t *  WH/SR/TH/SR2\n+\t *  WH/SR/TH\n \t *  The L2 Context is returned from the L2 Ctxt TCAM lookup\n \t *  and can be used in WC TCAM or EM keys to virtualize further\n \t *  lookups.\n \t */\n \tTF_IDENT_TYPE_L2_CTXT_LOW,\n \t/**\n-\t *  WH/SR/TH/SR2\n+\t *  WH/SR/TH\n \t *  The WC profile func is returned from the L2 Ctxt TCAM lookup\n \t *  to enable virtualization of the profile TCAM.\n \t */\n \tTF_IDENT_TYPE_PROF_FUNC,\n \t/**\n-\t *  WH/SR/TH/SR2\n+\t *  WH/SR/TH\n \t *  The WC profile ID is included in the WC lookup key\n \t *  to enable virtualization of the WC TCAM hardware.\n \t */\n \tTF_IDENT_TYPE_WC_PROF,\n \t/**\n-\t *  WH/SR/TH/SR2\n+\t *  WH/SR/TH\n \t *  The EM profile ID is included in the EM lookup key\n-\t *  to enable virtualization of the EM hardware. (not required for SR2\n-\t *  as it has table scope)\n+\t *  to enable virtualization of the EM hardware.\n \t */\n \tTF_IDENT_TYPE_EM_PROF,\n \t/**\n-\t *  TH/SR2\n+\t *  TH\n \t *  The L2 func is included in the ILT result and from recycling to\n \t *  enable virtualization of further lookups.\n \t */\n@@ -273,23 +294,15 @@ enum tf_tbl_type {\n \tTF_TBL_TYPE_MIRROR_CONFIG,\n \t/** (Future) UPAR */\n \tTF_TBL_TYPE_UPAR,\n-\t/** (Future) SR2 Epoch 0 table */\n-\tTF_TBL_TYPE_EPOCH0,\n-\t/** (Future) SR2 Epoch 1 table  */\n-\tTF_TBL_TYPE_EPOCH1,\n-\t/** (Future) TH/SR2 Metadata  */\n+\t/** (Future) TH Metadata  */\n \tTF_TBL_TYPE_METADATA,\n-\t/** (Future) TH/SR2 CT State  */\n+\t/** (Future) TH CT State  */\n \tTF_TBL_TYPE_CT_STATE,\n-\t/** (Future) TH/SR2 Range Profile  */\n+\t/** (Future) TH Range Profile  */\n \tTF_TBL_TYPE_RANGE_PROF,\n-\t/** (Future) SR2 Range Entry  */\n-\tTF_TBL_TYPE_RANGE_ENTRY,\n-\t/** (Future) SR2 LAG Entry  */\n-\tTF_TBL_TYPE_LAG,\n-\t/** TH/SR2 EM Flexible Key builder */\n+\t/** TH EM Flexible Key builder */\n \tTF_TBL_TYPE_EM_FKB,\n-\t/** TH/SR2 WC Flexible Key builder */\n+\t/** TH WC Flexible Key builder */\n \tTF_TBL_TYPE_WC_FKB,\n \n \t/* External */\n@@ -301,14 +314,6 @@ enum tf_tbl_type {\n \t * a pool of 64B entries.\n \t */\n \tTF_TBL_TYPE_EXT,\n-\t/* (Future) SR2 32B External EM Action 32B Pool */\n-\tTF_TBL_TYPE_EXT_32B,\n-\t/* (Future) SR2 64B External EM Action 64B Pool */\n-\tTF_TBL_TYPE_EXT_64B,\n-\t/* (Future) SR2 96B External EM Action 96B Pool */\n-\tTF_TBL_TYPE_EXT_96B,\n-\t/* (Future) SR2 128B External EM Action 128B Pool */\n-\tTF_TBL_TYPE_EXT_128B,\n \tTF_TBL_TYPE_MAX\n };\n \n@@ -969,20 +974,13 @@ struct tf_map_tbl_scope_parms {\n /**\n  * allocate a table scope\n  *\n- * On SR2 Firmware will allocate a scope ID.  On other devices, the scope\n- * is a software construct to identify an EEM table.  This function will\n+ * The scope is a software construct to identify an EEM table.  This function will\n  * divide the hash memory/buckets and records according to the device\n  * device constraints based upon calculations using either the number of flows\n  * requested or the size of memory indicated.  Other parameters passed in\n  * determine the configuration (maximum key size, maximum external action record\n  * size).\n  *\n- * This API will allocate the table region in DRAM, program the PTU page table\n- * entries, and program the number of static buckets (if SR2) in the RX and TX\n- * CFAs.  Buckets are assumed to start at 0 in the EM memory for the scope.\n- * Upon successful completion of this API, hash tables are fully initialized and\n- * ready for entries to be inserted.\n- *\n  * A single API is used to allocate a common table scope identifier in both\n  * receive and transmit CFA. The scope identifier is common due to nature of\n  * connection tracking sending notifications between RX and TX direction.\n@@ -1028,7 +1026,7 @@ int tf_map_tbl_scope(struct tf *tfp,\n  *\n  * Firmware checks that the table scope ID is owned by the TruFlow\n  * session, verifies that no references to this table scope remains\n- * (SR2 ILT) or Profile TCAM entries for either CFA (RX/TX) direction,\n+ * or Profile TCAM entries for either CFA (RX/TX) direction,\n  * then frees the table scope ID.\n  *\n  * Returns success or failure code.\n@@ -1589,6 +1587,10 @@ struct tf_set_tbl_entry_parms {\n \t * [in] Entry size\n \t */\n \tuint16_t data_sz_in_bytes;\n+\t/**\n+\t * [in] External memory channel type to use\n+\t */\n+\tenum tf_ext_mem_chan_type chan_type;\n \t/**\n \t * [in] Entry index to write to\n \t */\n@@ -1627,6 +1629,10 @@ struct tf_get_tbl_entry_parms {\n \t * [in] Entry size\n \t */\n \tuint16_t data_sz_in_bytes;\n+\t/**\n+\t * [in] External memory channel type to use\n+\t */\n+\tenum tf_ext_mem_chan_type chan_type;\n \t/**\n \t * [in] Entry index to read\n \t */\n@@ -1679,6 +1685,10 @@ struct tf_bulk_get_tbl_entry_parms {\n \t * structure for the physical address.\n \t */\n \tuint64_t physical_mem_addr;\n+\t/**\n+\t * [in] External memory channel type to use\n+\t */\n+\tenum tf_ext_mem_chan_type chan_type;\n };\n \n /**\n@@ -1723,10 +1733,6 @@ struct tf_insert_em_entry_parms {\n \t * [in] ID of table scope to use (external only)\n \t */\n \tuint32_t tbl_scope_id;\n-\t/**\n-\t * [in] ID of table interface to use (SR2 only)\n-\t */\n-\tuint32_t tbl_if_id;\n \t/**\n \t * [in] ptr to structure containing key fields\n \t */\n@@ -1747,6 +1753,10 @@ struct tf_insert_em_entry_parms {\n \t * [in] duplicate check flag\n \t */\n \tuint8_t\tdup_check;\n+\t/**\n+\t * [in] External memory channel type to use\n+\t */\n+\tenum tf_ext_mem_chan_type chan_type;\n \t/**\n \t * [out] Flow handle value for the inserted entry.  This is encoded\n \t * as the entries[4]:bucket[2]:hashId[1]:hash[14]\n@@ -1775,19 +1785,14 @@ struct tf_delete_em_entry_parms {\n \t * [in] ID of table scope to use (external only)\n \t */\n \tuint32_t tbl_scope_id;\n-\t/**\n-\t * [in] ID of table interface to use (SR2 only)\n-\t */\n-\tuint32_t tbl_if_id;\n-\t/**\n-\t * [in] epoch group IDs of entry to delete\n-\t * 2 element array with 2 ids. (SR2 only)\n-\t */\n-\tuint16_t *epochs;\n \t/**\n \t * [out] The index of the entry\n \t */\n \tuint16_t index;\n+\t/**\n+\t * [in] External memory channel type to use\n+\t */\n+\tenum tf_ext_mem_chan_type chan_type;\n \t/**\n \t * [in] structure containing flow delete handle information\n \t */\n@@ -1809,10 +1814,6 @@ struct tf_search_em_entry_parms {\n \t * [in] ID of table scope to use (external only)\n \t */\n \tuint32_t tbl_scope_id;\n-\t/**\n-\t * [in] ID of table interface to use (SR2 only)\n-\t */\n-\tuint32_t tbl_if_id;\n \t/**\n \t * [in] ptr to structure containing key fields\n \t */\n@@ -1830,10 +1831,9 @@ struct tf_search_em_entry_parms {\n \t */\n \tuint16_t em_record_sz_in_bits;\n \t/**\n-\t * [in] epoch group IDs of entry to lookup\n-\t * 2 element array with 2 ids. (SR2 only)\n+\t * [in] External memory channel type to use\n \t */\n-\tuint16_t *epochs;\n+\tenum tf_ext_mem_chan_type chan_type;\n \t/**\n \t * [in] ptr to structure containing flow delete handle\n \t */\n@@ -1858,9 +1858,6 @@ struct tf_search_em_entry_parms {\n  * This API inserts an exact match entry into DRAM EM table memory of the\n  * specified direction and table scope.\n  *\n- * When inserting an entry into an exact match table, the TruFlow library may\n- * need to allocate a dynamic bucket for the entry (SR2 only).\n- *\n  * The insertion of duplicate entries in an EM table is not permitted.\tIf a\n  * TruFlow application can guarantee that it will never insert duplicates, it\n  * can disable duplicate checking by passing a zero value in the  dup_check\n@@ -2040,9 +2037,9 @@ enum tf_if_tbl_type {\n \tTF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR,\n \t/** Default Error Profile TCAM Miss Action Record Pointer Table */\n \tTF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR,\n-\t/** SR2 Ingress lookup table */\n+\t/** Ingress lookup table */\n \tTF_IF_TBL_TYPE_ILT,\n-\t/** SR2 VNIC/SVIF Properties Table */\n+\t/** VNIC/SVIF Properties Table */\n \tTF_IF_TBL_TYPE_VSPT,\n \tTF_IF_TBL_TYPE_MAX\n };\ndiff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c\nindex 61b3746d8b..9e71c04bf2 100644\n--- a/drivers/net/bnxt/tf_core/tf_device.c\n+++ b/drivers/net/bnxt/tf_core/tf_device.c\n@@ -487,7 +487,7 @@ tf_dev_bind_p58(struct tf *tfp,\n  *   - (-EINVAL) on failure.\n  */\n static int\n-\ttf_dev_unbind_p58(struct tf *tfp)\n+tf_dev_unbind_p58(struct tf *tfp)\n {\n \tint rc = 0;\n \tbool fail = false;\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h\nindex ee283ce29d..a73ba3cd70 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.h\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.h\n@@ -14,92 +14,117 @@\n \n struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {\n \t[TF_IDENT_TYPE_L2_CTXT_HIGH] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH,\n+\t\t0, 0, 0\n \t},\n \t[TF_IDENT_TYPE_L2_CTXT_LOW] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW,\n+\t\t0, 0, 0\n \t},\n \t[TF_IDENT_TYPE_PROF_FUNC] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC,\n+\t\t0, 0, 0\n \t},\n \t[TF_IDENT_TYPE_WC_PROF] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID,\n+\t\t0, 0, 0\n \t},\n \t[TF_IDENT_TYPE_EM_PROF] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID,\n+\t\t0, 0, 0\n \t},\n };\n \n struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {\n \t[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH,\n+\t\t0, 0, 0\n \t},\n \t[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW,\n+\t\t0, 0, 0\n \t},\n \t[TF_TCAM_TBL_TYPE_PROF_TCAM] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM,\n+\t\t0, 0, 0\n \t},\n \t[TF_TCAM_TBL_TYPE_WC_TCAM] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM,\n+\t\t0, 0, 0\n \t},\n \t[TF_TCAM_TBL_TYPE_SP_TCAM] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM,\n+\t\t0, 0, 0\n \t},\n };\n \n struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = {\n \t[TF_TBL_TYPE_FULL_ACT_RECORD] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_MCAST_GROUPS] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_ACT_ENCAP_8B] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_ACT_ENCAP_16B] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_ACT_ENCAP_64B] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_ACT_SP_SMAC] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_ACT_STATS_64] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_ACT_MODIFY_IPV4] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_METER_PROF] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_METER_INST] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_MIRROR_CONFIG] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR,\n+\t\t0, 0, 0\n \t},\n \n };\n \n struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = {\n \t[TF_EM_TBL_TYPE_TBL_SCOPE] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE,\n+\t\t0, 0, 0\n \t},\n };\n \n struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = {\n \t[TF_EM_TBL_TYPE_EM_RECORD] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC\n+\t\tTF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC,\n+\t\t0, 0, 0\n \t},\n };\n \ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p58.h b/drivers/net/bnxt/tf_core/tf_device_p58.h\nindex 4d7a78e52c..b5e2598cb6 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p58.h\n+++ b/drivers/net/bnxt/tf_core/tf_device_p58.h\n@@ -14,55 +14,70 @@\n \n struct tf_rm_element_cfg tf_ident_p58[TF_IDENT_TYPE_MAX] = {\n \t[TF_IDENT_TYPE_L2_CTXT_HIGH] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH,\n+\t\t0, 0, 0\n \t},\n \t[TF_IDENT_TYPE_L2_CTXT_LOW] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW,\n+\t\t0, 0, 0\n \t},\n \t[TF_IDENT_TYPE_PROF_FUNC] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_FUNC\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_FUNC,\n+\t\t0, 0, 0\n \t},\n \t[TF_IDENT_TYPE_WC_PROF] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID,\n+\t\t0, 0, 0\n \t},\n \t[TF_IDENT_TYPE_EM_PROF] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_PROF_ID\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_PROF_ID,\n+\t\t0, 0, 0\n \t},\n };\n \n struct tf_rm_element_cfg tf_tcam_p58[TF_TCAM_TBL_TYPE_MAX] = {\n \t[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH,\n+\t\t0, 0, 0\n \t},\n \t[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW,\n+\t\t0, 0, 0\n \t},\n \t[TF_TCAM_TBL_TYPE_PROF_TCAM] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_TCAM\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_PROF_TCAM,\n+\t\t0, 0, 0\n \t},\n \t[TF_TCAM_TBL_TYPE_WC_TCAM] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_TCAM,\n+\t\t0, 0, 0\n \t},\n \t[TF_TCAM_TBL_TYPE_VEB_TCAM] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_VEB_TCAM\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_VEB_TCAM,\n+\t\t0, 0, 0\n \t},\n };\n \n struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = {\n \t[TF_TBL_TYPE_EM_FKB] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_FKB\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_EM_FKB,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_WC_FKB] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_FKB\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_WC_FKB,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_METER_PROF] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER_PROF\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER_PROF,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_METER_INST] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_METER,\n+\t\t0, 0, 0\n \t},\n \t[TF_TBL_TYPE_MIRROR_CONFIG] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_MIRROR\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P58_MIRROR,\n+\t\t0, 0, 0\n \t},\n \t/* Policy - ARs in bank 1 */\n \t[TF_TBL_TYPE_FULL_ACT_RECORD] = {\n@@ -167,7 +182,8 @@ struct tf_rm_element_cfg tf_tbl_p58[TF_TBL_TYPE_MAX] = {\n \n struct tf_rm_element_cfg tf_em_int_p58[TF_EM_TBL_TYPE_MAX] = {\n \t[TF_EM_TBL_TYPE_EM_RECORD] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P58_EM_REC\n+\t\tTF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P58_EM_REC,\n+\t\t0, 0, 0\n \t},\n };\n \ndiff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h\nindex 4de9e42cbc..2de1862cd9 100644\n--- a/drivers/net/bnxt/tf_core/tf_em.h\n+++ b/drivers/net/bnxt/tf_core/tf_em.h\n@@ -9,7 +9,9 @@\n #include \"tf_core.h\"\n #include \"tf_session.h\"\n \n-#include \"hcapi/cfa/hcapi_cfa_defs.h\"\n+#include \"tf_em_common.h\"\n+\n+#include \"hcapi_cfa_defs.h\"\n \n #define TF_EM_MIN_ENTRIES     (1 << 15) /* 32K */\n #define TF_EM_MAX_ENTRIES     (1 << 27) /* 128M */\ndiff --git a/drivers/net/bnxt/tf_core/tf_em_common.c b/drivers/net/bnxt/tf_core/tf_em_common.c\nindex d8278f1ce1..4dc3c86b57 100644\n--- a/drivers/net/bnxt/tf_core/tf_em_common.c\n+++ b/drivers/net/bnxt/tf_core/tf_em_common.c\n@@ -19,18 +19,13 @@\n #include \"tfp.h\"\n #include \"tf_device.h\"\n #include \"tf_ext_flow_handle.h\"\n-#include \"cfa_resource_types.h\"\n+#include \"hcapi_cfa.h\"\n \n #include \"bnxt.h\"\n \n /* Number of pointers per page_size */\n #define MAX_PAGE_PTRS(page_size)  ((page_size) / sizeof(void *))\n \n-/**\n- * EM DBs.\n- */\n-void *eem_db[TF_DIR_MAX];\n-\n /**\n  * Init flag, set on bind and cleared on unbind\n  */\n@@ -41,36 +36,7 @@ static uint8_t init;\n  */\n static enum tf_mem_type mem_type;\n \n-/** Table scope array */\n-struct tf_tbl_scope_cb tbl_scopes[TF_NUM_TBL_SCOPE];\n-\n /* API defined in tf_em.h */\n-struct tf_tbl_scope_cb *\n-tbl_scope_cb_find(uint32_t tbl_scope_id)\n-{\n-\tint i;\n-\tstruct tf_rm_is_allocated_parms parms = { 0 };\n-\tint allocated;\n-\n-\t/* Check that id is valid */\n-\tparms.rm_db = eem_db[TF_DIR_RX];\n-\tparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE;\n-\tparms.index = tbl_scope_id;\n-\tparms.allocated = &allocated;\n-\n-\ti = tf_rm_is_allocated(&parms);\n-\n-\tif (i < 0 || allocated != TF_RM_ALLOCATED_ENTRY_IN_USE)\n-\t\treturn NULL;\n-\n-\tfor (i = 0; i < TF_NUM_TBL_SCOPE; i++) {\n-\t\tif (tbl_scopes[i].tbl_scope_id == tbl_scope_id)\n-\t\t\treturn &tbl_scopes[i];\n-\t}\n-\n-\treturn NULL;\n-}\n-\n int\n tf_create_tbl_pool_external(enum tf_dir dir,\n \t\t\t    struct tf_tbl_scope_cb *tbl_scope_cb,\n@@ -158,6 +124,44 @@ tf_destroy_tbl_pool_external(enum tf_dir dir,\n \ttfp_free(ext_act_pool_mem);\n }\n \n+/**\n+ * Looks up table scope control block using tbl_scope_id from tf_session.\n+ *\n+ * [in] tfp\n+ *   Pointer to Truflow Handle\n+ * [in] tbl_scope_id\n+ *   table scope id\n+ *\n+ * Return:\n+ *  - Pointer to the tf_tbl_scope_cb, if found.\n+ *  - (NULL) on failure, not found.\n+ */\n+struct tf_tbl_scope_cb *\n+tf_em_ext_common_tbl_scope_find(struct tf *tfp,\n+\t\t\tuint32_t tbl_scope_id)\n+{\n+\tint rc;\n+\tstruct em_ext_db *ext_db;\n+\tvoid *ext_ptr = NULL;\n+\tstruct tf_tbl_scope_cb *tbl_scope_cb = NULL;\n+\tstruct ll_entry *entry;\n+\n+\trc = tf_session_get_em_ext_db(tfp, &ext_ptr);\n+\tif (rc)\n+\t\treturn NULL;\n+\n+\text_db = (struct em_ext_db *)ext_ptr;\n+\n+\tfor (entry = ext_db->tbl_scope_ll.head; entry != NULL;\n+\t\t\tentry = entry->next) {\n+\t\ttbl_scope_cb = (struct tf_tbl_scope_cb *)entry;\n+\t\tif (tbl_scope_cb->tbl_scope_id == tbl_scope_id)\n+\t\t\treturn tbl_scope_cb;\n+\t}\n+\n+\treturn NULL;\n+}\n+\n /**\n  * Allocate External Tbl entry from the scope pool.\n  *\n@@ -182,16 +186,14 @@ tf_tbl_ext_alloc(struct tf *tfp,\n \n \tTF_CHECK_PARMS2(tfp, parms);\n \n-\t/* Get the pool info from the table scope\n-\t */\n-\ttbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id);\n-\n+\ttbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id);\n \tif (tbl_scope_cb == NULL) {\n \t\tTFP_DRV_LOG(ERR,\n \t\t\t    \"%s, table scope not allocated\\n\",\n \t\t\t    tf_dir_2_str(parms->dir));\n \t\treturn -EINVAL;\n \t}\n+\n \tpool = &tbl_scope_cb->ext_act_pool[parms->dir];\n \n \t/* Allocate an element\n@@ -237,10 +239,7 @@ tf_tbl_ext_free(struct tf *tfp,\n \n \tTF_CHECK_PARMS2(tfp, parms);\n \n-\t/* Get the pool info from the table scope\n-\t */\n-\ttbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id);\n-\n+\ttbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id);\n \tif (tbl_scope_cb == NULL) {\n \t\tTFP_DRV_LOG(ERR,\n \t\t\t    \"%s, table scope error\\n\",\n@@ -646,7 +645,18 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \ttbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_RECORD_TABLE].entry_size =\n \t\tparms->rx_max_action_entry_sz_in_bits / 8;\n \n-\ttbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EFC_TABLE].num_entries = 0;\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EFC_TABLE].num_entries =\n+\t\t0;\n+\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_ACTION_TABLE].num_entries =\n+\t\tparms->rx_num_flows_in_k * TF_KILOBYTE;\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_ACTION_TABLE].entry_size =\n+\t\tparms->rx_max_action_entry_sz_in_bits / 8;\n+\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EM_LKUP_TABLE].num_entries =\n+\t\tparms->rx_num_flows_in_k * TF_KILOBYTE;\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EM_LKUP_TABLE].entry_size =\n+\t\tparms->rx_max_key_sz_in_bits / 8;\n \n \t/* Tx */\n \ttbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_KEY0_TABLE].num_entries =\n@@ -664,7 +674,18 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \ttbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_RECORD_TABLE].entry_size =\n \t\tparms->tx_max_action_entry_sz_in_bits / 8;\n \n-\ttbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_EFC_TABLE].num_entries = 0;\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_EFC_TABLE].num_entries =\n+\t\t0;\n+\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_ACTION_TABLE].num_entries =\n+\t\tparms->rx_num_flows_in_k * TF_KILOBYTE;\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_ACTION_TABLE].entry_size =\n+\t\tparms->tx_max_action_entry_sz_in_bits / 8;\n+\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_EM_LKUP_TABLE].num_entries =\n+\t\tparms->rx_num_flows_in_k * TF_KILOBYTE;\n+\ttbl_scope_cb->em_ctx_info[TF_DIR_TX].em_tables[TF_EM_LKUP_TABLE].entry_size =\n+\t\tparms->tx_max_key_sz_in_bits / 8;\n \n \treturn 0;\n }\n@@ -747,10 +768,10 @@ tf_insert_eem_entry(struct tf_dev_info *dev,\n \tkey_obj.data = (uint8_t *)&key_entry;\n \tkey_obj.size = TF_P4_EM_KEY_RECORD_SIZE;\n \n-\trc = hcapi_cfa_key_hw_op(&op,\n-\t\t\t\t &key_tbl,\n-\t\t\t\t &key_obj,\n-\t\t\t\t &key_loc);\n+\trc = cfa_p4_devops.hcapi_cfa_key_hw_op(&op,\n+\t\t\t\t\t       &key_tbl,\n+\t\t\t\t\t       &key_obj,\n+\t\t\t\t\t       &key_loc);\n \n \tif (rc == 0) {\n \t\ttable_type = TF_KEY0_TABLE;\n@@ -761,10 +782,10 @@ tf_insert_eem_entry(struct tf_dev_info *dev,\n \t\t\t(uint8_t *)&tbl_scope_cb->em_ctx_info[parms->dir].em_tables[TF_KEY1_TABLE];\n \t\tkey_obj.offset = index * TF_P4_EM_KEY_RECORD_SIZE;\n \n-\t\trc = hcapi_cfa_key_hw_op(&op,\n-\t\t\t\t\t &key_tbl,\n-\t\t\t\t\t &key_obj,\n-\t\t\t\t\t &key_loc);\n+\t\trc = cfa_p4_devops.hcapi_cfa_key_hw_op(&op,\n+\t\t\t\t\t\t       &key_tbl,\n+\t\t\t\t\t\t       &key_obj,\n+\t\t\t\t\t\t       &key_loc);\n \t\tif (rc != 0)\n \t\t\treturn rc;\n \n@@ -781,7 +802,7 @@ tf_insert_eem_entry(struct tf_dev_info *dev,\n \tTF_SET_FIELDS_IN_FLOW_HANDLE(parms->flow_handle,\n \t\t\t\t     0,\n \t\t\t\t     0,\n-\t\t\t\t     TF_FLAGS_FLOW_HANDLE_EXTERNAL,\n+\t\t\t\t     0,\n \t\t\t\t     index,\n \t\t\t\t     0,\n \t\t\t\t     table_type);\n@@ -826,10 +847,10 @@ tf_delete_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb,\n \tkey_obj.data = NULL;\n \tkey_obj.size = TF_P4_EM_KEY_RECORD_SIZE;\n \n-\trc = hcapi_cfa_key_hw_op(&op,\n-\t\t\t\t &key_tbl,\n-\t\t\t\t &key_obj,\n-\t\t\t\t &key_loc);\n+\trc = cfa_p4_devops.hcapi_cfa_key_hw_op(&op,\n+\t\t\t\t\t       &key_tbl,\n+\t\t\t\t\t       &key_obj,\n+\t\t\t\t\t       &key_loc);\n \n \tif (!rc)\n \t\treturn rc;\n@@ -844,7 +865,7 @@ tf_delete_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb,\n  *    -EINVAL - Error\n  */\n int\n-tf_em_insert_ext_entry(struct tf *tfp __rte_unused,\n+tf_em_insert_ext_entry(struct tf *tfp,\n \t\t       struct tf_insert_em_entry_parms *parms)\n {\n \tint rc;\n@@ -852,7 +873,7 @@ tf_em_insert_ext_entry(struct tf *tfp __rte_unused,\n \tstruct tf_session *tfs;\n \tstruct tf_dev_info *dev;\n \n-\ttbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id);\n+\ttbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id);\n \tif (tbl_scope_cb == NULL) {\n \t\tTFP_DRV_LOG(ERR, \"Invalid tbl_scope_cb\\n\");\n \t\treturn -EINVAL;\n@@ -881,12 +902,12 @@ tf_em_insert_ext_entry(struct tf *tfp __rte_unused,\n  *    -EINVAL - Error\n  */\n int\n-tf_em_delete_ext_entry(struct tf *tfp __rte_unused,\n+tf_em_delete_ext_entry(struct tf *tfp,\n \t\t       struct tf_delete_em_entry_parms *parms)\n {\n \tstruct tf_tbl_scope_cb *tbl_scope_cb;\n \n-\ttbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id);\n+\ttbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id);\n \tif (tbl_scope_cb == NULL) {\n \t\tTFP_DRV_LOG(ERR, \"Invalid tbl_scope_cb\\n\");\n \t\treturn -EINVAL;\n@@ -904,6 +925,8 @@ tf_em_ext_common_bind(struct tf *tfp,\n \tint i;\n \tstruct tf_rm_create_db_parms db_cfg = { 0 };\n \tuint8_t db_exists = 0;\n+\tstruct em_ext_db *ext_db;\n+\tstruct tfp_calloc_parms cparms;\n \n \tTF_CHECK_PARMS2(tfp, parms);\n \n@@ -913,6 +936,21 @@ tf_em_ext_common_bind(struct tf *tfp,\n \t\treturn -EINVAL;\n \t}\n \n+\tcparms.nitems = 1;\n+\tcparms.size = sizeof(struct em_ext_db);\n+\tcparms.alignment = 0;\n+\tif (tfp_calloc(&cparms) != 0) {\n+\t\tTFP_DRV_LOG(ERR, \"em_ext_db alloc error %s\\n\",\n+\t\t\t    strerror(ENOMEM));\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\text_db = cparms.mem_va;\n+\tll_init(&ext_db->tbl_scope_ll);\n+\tfor (i = 0; i < TF_DIR_MAX; i++)\n+\t\text_db->eem_db[i] = NULL;\n+\ttf_session_set_em_ext_db(tfp, ext_db);\n+\n \tdb_cfg.module = TF_MODULE_TYPE_EM;\n \tdb_cfg.num_elements = parms->num_elements;\n \tdb_cfg.cfg = parms->cfg;\n@@ -927,7 +965,7 @@ tf_em_ext_common_bind(struct tf *tfp,\n \t\tif (db_cfg.alloc_cnt[TF_EM_TBL_TYPE_TBL_SCOPE] == 0)\n \t\t\tcontinue;\n \n-\t\tdb_cfg.rm_db = &eem_db[i];\n+\t\tdb_cfg.rm_db = (void *)&ext_db->eem_db[i];\n \t\trc = tf_rm_create_db(tfp, &db_cfg);\n \t\tif (rc) {\n \t\t\tTFP_DRV_LOG(ERR,\n@@ -953,6 +991,13 @@ tf_em_ext_common_unbind(struct tf *tfp)\n \tint rc;\n \tint i;\n \tstruct tf_rm_free_db_parms fparms = { 0 };\n+\tstruct em_ext_db *ext_db = NULL;\n+\tstruct tf_session *tfs = NULL;\n+\tstruct tf_dev_info *dev;\n+\tstruct ll_entry *entry;\n+\tstruct tf_tbl_scope_cb *tbl_scope_cb = NULL;\n+\tvoid *ext_ptr = NULL;\n+\tstruct tf_free_tbl_scope_parms tparms = { 0 };\n \n \tTF_CHECK_PARMS1(tfp);\n \n@@ -963,16 +1008,62 @@ tf_em_ext_common_unbind(struct tf *tfp)\n \t\treturn 0;\n \t}\n \n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR, \"Failed to get tf_session, rc:%s\\n\",\n+\t\tstrerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Retrieve the device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to lookup device, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\trc = tf_session_get_em_ext_db(tfp, &ext_ptr);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to get em_ext_db from session, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\text_db = (struct em_ext_db *)ext_ptr;\n+\n+\tentry = ext_db->tbl_scope_ll.head;\n+\twhile (entry != NULL) {\n+\t\ttbl_scope_cb = (struct tf_tbl_scope_cb *)entry;\n+\t\tentry = entry->next;\n+\t\ttparms.tbl_scope_id = tbl_scope_cb->tbl_scope_id;\n+\n+\t\tif (dev->ops->tf_dev_free_tbl_scope) {\n+\t\t\tdev->ops->tf_dev_free_tbl_scope(tfp, &tparms);\n+\t\t} else {\n+\t\t\t/* should not reach here */\n+\t\t\tll_delete(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry);\n+\t\t\ttfp_free(tbl_scope_cb);\n+\t\t}\n+\t}\n+\n \tfor (i = 0; i < TF_DIR_MAX; i++) {\n+\t\tif (ext_db->eem_db[i] == NULL)\n+\t\t\tcontinue;\n+\n \t\tfparms.dir = i;\n-\t\tfparms.rm_db = eem_db[i];\n+\t\tfparms.rm_db = ext_db->eem_db[i];\n \t\trc = tf_rm_free_db(tfp, &fparms);\n \t\tif (rc)\n \t\t\treturn rc;\n \n-\t\teem_db[i] = NULL;\n+\t\text_db->eem_db[i] = NULL;\n \t}\n \n+\ttfp_free(ext_db);\n+\ttf_session_set_em_ext_db(tfp, NULL);\n+\n \tinit = 0;\n \n \treturn 0;\n@@ -1022,11 +1113,7 @@ int tf_tbl_ext_common_set(struct tf *tfp,\n \t\treturn -EINVAL;\n \t}\n \n-\t/* Get the table scope control block associated with the\n-\t * external pool\n-\t */\n-\ttbl_scope_cb = tbl_scope_cb_find(tbl_scope_id);\n-\n+\ttbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, tbl_scope_id);\n \tif (tbl_scope_cb == NULL) {\n \t\tTFP_DRV_LOG(ERR,\n \t\t\t    \"%s, table scope error\\n\",\n@@ -1042,10 +1129,10 @@ int tf_tbl_ext_common_set(struct tf *tfp,\n \tkey_obj.data = parms->data;\n \tkey_obj.size = parms->data_sz_in_bytes;\n \n-\trc = hcapi_cfa_key_hw_op(&op,\n-\t\t\t\t &key_tbl,\n-\t\t\t\t &key_obj,\n-\t\t\t\t &key_loc);\n+\trc = cfa_p4_devops.hcapi_cfa_key_hw_op(&op,\n+\t\t\t\t\t       &key_tbl,\n+\t\t\t\t\t       &key_obj,\n+\t\t\t\t\t       &key_loc);\n \n \treturn rc;\n }\n@@ -1076,14 +1163,6 @@ int tf_em_ext_map_tbl_scope(struct tf *tfp,\n \tuint32_t sz_in_bytes = 8;\n \tstruct tf_dev_info *dev;\n \n-\ttbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id);\n-\n-\tif (tbl_scope_cb == NULL) {\n-\t\tTFP_DRV_LOG(ERR, \"Invalid tbl_scope_cb tbl_scope_id(%d)\\n\",\n-\t\t\t    parms->tbl_scope_id);\n-\t\treturn -EINVAL;\n-\t}\n-\n \t/* Retrieve the session information */\n \trc = tf_session_get_session_internal(tfp, &tfs);\n \tif (rc)\n@@ -1094,6 +1173,13 @@ int tf_em_ext_map_tbl_scope(struct tf *tfp,\n \tif (rc)\n \t\treturn rc;\n \n+\ttbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id);\n+\tif (tbl_scope_cb == NULL) {\n+\t\tTFP_DRV_LOG(ERR, \"Invalid tbl_scope_cb tbl_scope_id(%d)\\n\",\n+\t\t\t    parms->tbl_scope_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n \tif (dev->ops->tf_dev_map_tbl_scope == NULL) {\n \t\trc = -EOPNOTSUPP;\n \t\tTFP_DRV_LOG(ERR,\ndiff --git a/drivers/net/bnxt/tf_core/tf_em_common.h b/drivers/net/bnxt/tf_core/tf_em_common.h\nindex 5e55f4e968..7f215adef2 100644\n--- a/drivers/net/bnxt/tf_core/tf_em_common.h\n+++ b/drivers/net/bnxt/tf_core/tf_em_common.h\n@@ -8,7 +8,7 @@\n \n #include \"tf_core.h\"\n #include \"tf_session.h\"\n-\n+#include \"ll.h\"\n \n /**\n  * Function to search for table scope control block structure\n@@ -23,6 +23,53 @@\n  */\n struct tf_tbl_scope_cb *tbl_scope_cb_find(uint32_t tbl_scope_id);\n \n+/**\n+ * Table scope control block content\n+ */\n+struct tf_em_caps {\n+\tuint32_t flags;\n+\tuint32_t supported;\n+\tuint32_t max_entries_supported;\n+\tuint16_t key_entry_size;\n+\tuint16_t record_entry_size;\n+\tuint16_t efc_entry_size;\n+};\n+\n+/**\n+ *  EEM data\n+ *\n+ *  Link list of ext em data allocated and managed by EEM module\n+ *  for a TruFlow session.\n+ */\n+struct em_ext_db {\n+\tstruct ll tbl_scope_ll;\n+\tstruct rm_db *eem_db[TF_DIR_MAX];\n+};\n+\n+/**\n+ * Table Scope Control Block\n+ *\n+ * Holds private data for a table scope.\n+ */\n+struct tf_tbl_scope_cb {\n+\t/**\n+\t * Linked list of tbl_scope\n+\t */\n+\tstruct ll_entry ll_entry; /* For inserting in link list, must be\n+\t\t\t\t   * first field of struct.\n+\t\t\t\t   */\n+\n+\tuint32_t tbl_scope_id;\n+\n+       /** The pf or parent pf of the vf used for table scope creation\n+\t*/\n+\tuint16_t pf;\n+\tstruct hcapi_cfa_em_ctx_mem_info em_ctx_info[TF_DIR_MAX];\n+\tstruct tf_em_caps em_caps[TF_DIR_MAX];\n+\tstruct stack ext_act_pool[TF_DIR_MAX];\n+\tuint32_t *ext_act_pool_mem[TF_DIR_MAX];\n+};\n+\n /**\n  * Create and initialize a stack to use for action entries\n  *\n@@ -131,4 +178,23 @@ int tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n int tf_em_size_table(struct hcapi_cfa_em_table *tbl,\n \t\t     uint32_t page_size);\n \n+\n+/**\n+ * Look up table scope control block using tbl_scope_id from\n+ * tf_session\n+ *\n+ * [in] tbl_scope_cb\n+ *   Pointer to Truflow Handle\n+ *\n+ * [in] tbl_scope_id\n+ *   table scope id\n+ *\n+ * Returns:\n+ *   - Pointer to the tf_tbl_scope_cb, if found.\n+ *   - (NULL) on failure, not found.\n+ */\n+struct tf_tbl_scope_cb *\n+tf_em_ext_common_tbl_scope_find(struct tf *tfp,\n+\t\t\t\tuint32_t tbl_scope_id);\n+\n #endif /* _TF_EM_COMMON_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_em_host.c b/drivers/net/bnxt/tf_core/tf_em_host.c\nindex 166f397935..869a78e904 100644\n--- a/drivers/net/bnxt/tf_core/tf_em_host.c\n+++ b/drivers/net/bnxt/tf_core/tf_em_host.c\n@@ -29,13 +29,6 @@\n /* Number of pointers per page_size */\n #define MAX_PAGE_PTRS(page_size)  ((page_size) / sizeof(void *))\n \n-/**\n- * EM DBs.\n- */\n-extern void *eem_db[TF_DIR_MAX];\n-\n-extern struct tf_tbl_scope_cb tbl_scopes[TF_NUM_TBL_SCOPE];\n-\n /**\n  * Function to free a page table\n  *\n@@ -367,7 +360,8 @@ tf_em_ctx_reg(struct tf *tfp,\n }\n \n int\n-tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms)\n+tf_em_ext_alloc(struct tf *tfp,\n+\t\tstruct tf_alloc_tbl_scope_parms *parms)\n {\n \tint rc;\n \tenum tf_dir dir;\n@@ -376,30 +370,65 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms)\n \tstruct tf_free_tbl_scope_parms free_parms;\n \tstruct tf_rm_allocate_parms aparms = { 0 };\n \tstruct tf_rm_free_parms fparms = { 0 };\n+\tstruct tfp_calloc_parms cparms;\n+\tstruct tf_session *tfs = NULL;\n+\tstruct em_ext_db *ext_db = NULL;\n+\tvoid *ext_ptr = NULL;\n+\tuint16_t pf;\n+\n+\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR, \"Failed to get tf_session, rc:%s\\n\",\n+\t\tstrerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\trc = tf_session_get_em_ext_db(tfp, &ext_ptr);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\"Failed to get em_ext_db from session, rc:%s\\n\",\n+\t\t\tstrerror(-rc));\n+\t\treturn rc;\n+\t}\n+\text_db = (struct em_ext_db *)ext_ptr;\n+\n+\trc = tfp_get_pf(tfp, &pf);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"EEM: PF query error rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\tgoto cleanup;\n+\t}\n \n \t/* Get Table Scope control block from the session pool */\n-\taparms.rm_db = eem_db[TF_DIR_RX];\n+\taparms.rm_db = ext_db->eem_db[TF_DIR_RX];\n \taparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE;\n \taparms.index = (uint32_t *)&parms->tbl_scope_id;\n \trc = tf_rm_allocate(&aparms);\n \tif (rc) {\n \t\tTFP_DRV_LOG(ERR,\n \t\t\t    \"Failed to allocate table scope\\n\");\n-\t\treturn rc;\n+\t\tgoto cleanup;\n \t}\n \n-\ttbl_scope_cb = &tbl_scopes[parms->tbl_scope_id];\n-\ttbl_scope_cb->index = parms->tbl_scope_id;\n-\ttbl_scope_cb->tbl_scope_id = parms->tbl_scope_id;\n-\n-\trc = tfp_get_pf(tfp, &tbl_scope_cb->pf);\n+\t/* Create tbl_scope, initialize and attach to the session */\n+\tcparms.nitems = 1;\n+\tcparms.size = sizeof(struct tf_tbl_scope_cb);\n+\tcparms.alignment = 0;\n+\trc = tfp_calloc(&cparms);\n \tif (rc) {\n+\t\t/* Log error */\n \t\tTFP_DRV_LOG(ERR,\n-\t\t\t    \"EEM: PF query error rc:%s\\n\",\n-\t\t\t    strerror(-rc));\n+\t\t\t\"Failed to allocate session table scope, rc:%s\\n\",\n+\t\t\tstrerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n+\ttbl_scope_cb = cparms.mem_va;\n+\ttbl_scope_cb->tbl_scope_id = parms->tbl_scope_id;\n+\ttbl_scope_cb->pf = pf;\n+\n \tfor (dir = 0; dir < TF_DIR_MAX; dir++) {\n \t\trc = tf_msg_em_qcaps(tfp,\n \t\t\t\t     dir,\n@@ -409,7 +438,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms)\n \t\t\t\t    \"EEM: Unable to query for EEM capability,\"\n \t\t\t\t    \" rc:%s\\n\",\n \t\t\t\t    strerror(-rc));\n-\t\t\tgoto cleanup;\n+\t\t\tgoto cleanup_ts;\n \t\t}\n \t}\n \n@@ -417,7 +446,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms)\n \t * Validate and setup table sizes\n \t */\n \tif (tf_em_validate_num_entries(tbl_scope_cb, parms))\n-\t\tgoto cleanup;\n+\t\tgoto cleanup_ts;\n \n \tfor (dir = 0; dir < TF_DIR_MAX; dir++) {\n \t\t/*\n@@ -429,7 +458,7 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms)\n \t\t\t\t    \"EEM: Unable to register for EEM ctx,\"\n \t\t\t\t    \" rc:%s\\n\",\n \t\t\t\t    strerror(-rc));\n-\t\t\tgoto cleanup;\n+\t\t\tgoto cleanup_ts;\n \t\t}\n \n \t\tem_tables = tbl_scope_cb->em_ctx_info[dir].em_tables;\n@@ -478,19 +507,29 @@ tf_em_ext_alloc(struct tf *tfp, struct tf_alloc_tbl_scope_parms *parms)\n \t\t}\n \t}\n \n+\t/* Insert into session tbl_scope list */\n+\tll_insert(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry);\n \treturn 0;\n \n cleanup_full:\n \tfree_parms.tbl_scope_id = parms->tbl_scope_id;\n+\t/* Insert into session list prior to ext_free */\n+\tll_insert(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry);\n \ttf_em_ext_free(tfp, &free_parms);\n \treturn -EINVAL;\n \n+cleanup_ts:\n+\ttfp_free(tbl_scope_cb);\n+\n cleanup:\n \t/* Free Table control block */\n-\tfparms.rm_db = eem_db[TF_DIR_RX];\n+\tfparms.rm_db = ext_db->eem_db[TF_DIR_RX];\n \tfparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE;\n \tfparms.index = parms->tbl_scope_id;\n-\ttf_rm_free(&fparms);\n+\trc = tf_rm_free(&fparms);\n+\tif (rc)\n+\t\tTFP_DRV_LOG(ERR, \"Failed to free table scope\\n\");\n+\n \treturn -EINVAL;\n }\n \n@@ -501,17 +540,35 @@ tf_em_ext_free(struct tf *tfp,\n \tint rc = 0;\n \tenum tf_dir  dir;\n \tstruct tf_tbl_scope_cb *tbl_scope_cb;\n+\tstruct tf_session *tfs;\n+\tstruct em_ext_db *ext_db = NULL;\n+\tvoid *ext_ptr = NULL;\n \tstruct tf_rm_free_parms aparms = { 0 };\n \n-\ttbl_scope_cb = tbl_scope_cb_find(parms->tbl_scope_id);\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR, \"Failed to get tf_session, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn -EINVAL;\n+\t}\n+\n+\trc = tf_session_get_em_ext_db(tfp, &ext_ptr);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\"Failed to get em_ext_db from session, rc:%s\\n\",\n+\t\t\tstrerror(-rc));\n+\t\treturn rc;\n+\t}\n+\text_db = (struct em_ext_db *)ext_ptr;\n \n+\ttbl_scope_cb = tf_em_ext_common_tbl_scope_find(tfp, parms->tbl_scope_id);\n \tif (tbl_scope_cb == NULL) {\n \t\tTFP_DRV_LOG(ERR, \"Table scope error\\n\");\n \t\treturn -EINVAL;\n \t}\n \n \t/* Free Table control block */\n-\taparms.rm_db = eem_db[TF_DIR_RX];\n+\taparms.rm_db = ext_db->eem_db[TF_DIR_RX];\n \taparms.subtype = TF_EM_TBL_TYPE_TBL_SCOPE;\n \taparms.index = parms->tbl_scope_id;\n \trc = tf_rm_free(&aparms);\n@@ -534,6 +591,8 @@ tf_em_ext_free(struct tf *tfp,\n \t\ttf_em_ctx_unreg(tfp, tbl_scope_cb, dir);\n \t}\n \n-\ttbl_scopes[parms->tbl_scope_id].tbl_scope_id = TF_TBL_SCOPE_INVALID;\n+\t/* remove from session list and free tbl_scope */\n+\tll_delete(&ext_db->tbl_scope_ll, &tbl_scope_cb->ll_entry);\n+\ttfp_free(tbl_scope_cb);\n \treturn rc;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c\nindex ec4c7890c3..c6eb94bee0 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.c\n+++ b/drivers/net/bnxt/tf_core/tf_msg.c\n@@ -9,6 +9,7 @@\n #include <stdlib.h>\n #include <string.h>\n \n+#include \"tf_em_common.h\"\n #include \"tf_msg_common.h\"\n #include \"tf_device.h\"\n #include \"tf_msg.h\"\n@@ -16,7 +17,6 @@\n #include \"tf_common.h\"\n #include \"tf_session.h\"\n #include \"tfp.h\"\n-#include \"hwrm_tf.h\"\n #include \"tf_em.h\"\n \n /* Specific msg size defines as we cannot use defines in tf.yaml. This\n@@ -39,8 +39,19 @@\n  * array size (define above) should be checked and compared.\n  */\n #define TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET 56\n+static_assert(sizeof(struct hwrm_tf_global_cfg_set_input) ==\n+\t      TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET,\n+\t      \"HWRM message size changed: hwrm_tf_global_cfg_set_input\");\n+\n #define TF_MSG_SIZE_HWRM_TF_EM_INSERT      104\n+static_assert(sizeof(struct hwrm_tf_em_insert_input) ==\n+\t      TF_MSG_SIZE_HWRM_TF_EM_INSERT,\n+\t      \"HWRM message size changed: hwrm_tf_em_insert_input\");\n+\n #define TF_MSG_SIZE_HWRM_TF_TBL_TYPE_SET   128\n+static_assert(sizeof(struct hwrm_tf_tbl_type_set_input) ==\n+\t      TF_MSG_SIZE_HWRM_TF_TBL_TYPE_SET,\n+\t      \"HWRM message size changed: hwrm_tf_tbl_type_set_input\");\n \n /**\n  * This is the MAX data we can transport across regular HWRM\n@@ -862,6 +873,117 @@ tf_msg_delete_em_entry(struct tf *tfp,\n \treturn 0;\n }\n \n+int tf_msg_ext_em_ctxt_mem_alloc(struct tf *tfp,\n+\t\t\t\tstruct hcapi_cfa_em_table *tbl,\n+\t\t\t\tuint64_t *dma_addr,\n+\t\t\t\tuint32_t *page_lvl,\n+\t\t\t\tuint32_t *page_size)\n+{\n+\tstruct tfp_send_msg_parms parms = { 0 };\n+\tstruct hwrm_tf_ctxt_mem_alloc_input req = {0};\n+\tstruct hwrm_tf_ctxt_mem_alloc_output resp = {0};\n+\tuint32_t mem_size_k;\n+\tint rc = 0;\n+\tstruct tf_dev_info *dev;\n+\tstruct tf_session *tfs;\n+\tuint32_t fw_se_id;\n+\n+\t/* Retrieve the session information */\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to lookup session, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Retrieve the device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to lookup device, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\t/* Retrieve the session information */\n+\tfw_se_id = tfs->session_id.internal.fw_session_id;\n+\n+\tif (tbl->num_entries && tbl->entry_size) {\n+\t\t/* unit: kbytes */\n+\t\tmem_size_k = (tbl->num_entries / TF_KILOBYTE) * tbl->entry_size;\n+\t\treq.mem_size = tfp_cpu_to_le_32(mem_size_k);\n+\t\treq.fw_session_id = tfp_cpu_to_le_32(fw_se_id);\n+\t\tparms.tf_type = HWRM_TF_CTXT_MEM_ALLOC;\n+\t\tparms.req_data = (uint32_t *)&req;\n+\t\tparms.req_size = sizeof(req);\n+\t\tparms.resp_data = (uint32_t *)&resp;\n+\t\tparms.resp_size = sizeof(resp);\n+\t\tparms.mailbox = dev->ops->tf_dev_get_mailbox();\n+\t\trc = tfp_send_msg_direct(tfp, &parms);\n+\t\tif (rc) {\n+\t\t\tTFP_DRV_LOG(ERR, \"Failed ext_em_alloc error rc:%s\\n\",\n+\t\t\t\tstrerror(-rc));\n+\t\t\treturn rc;\n+\t\t}\n+\n+\t\t*dma_addr = tfp_le_to_cpu_64(resp.page_dir);\n+\t\t*page_lvl = resp.page_level;\n+\t\t*page_size = resp.page_size;\n+\t}\n+\n+\treturn rc;\n+}\n+\n+int tf_msg_ext_em_ctxt_mem_free(struct tf *tfp,\n+\t\t\t\tuint32_t mem_size_k,\n+\t\t\t\tuint64_t dma_addr,\n+\t\t\t\tuint8_t page_level,\n+\t\t\t\tuint8_t page_size)\n+{\n+\tstruct tfp_send_msg_parms parms = { 0 };\n+\tstruct hwrm_tf_ctxt_mem_free_input req = {0};\n+\tstruct hwrm_tf_ctxt_mem_free_output resp = {0};\n+\tint rc = 0;\n+\tstruct tf_dev_info *dev;\n+\tstruct tf_session *tfs;\n+\tuint32_t fw_se_id;\n+\n+\t/* Retrieve the session information */\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to lookup session, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Retrieve the device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to lookup device, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\t/* Retrieve the session information */\n+\tfw_se_id = tfs->session_id.internal.fw_session_id;\n+\n+\treq.fw_session_id = tfp_cpu_to_le_32(fw_se_id);\n+\treq.mem_size = tfp_cpu_to_le_32(mem_size_k);\n+\treq.page_dir = tfp_cpu_to_le_64(dma_addr);\n+\treq.page_level = page_level;\n+\treq.page_size = page_size;\n+\tparms.tf_type = HWRM_TF_CTXT_MEM_FREE;\n+\tparms.req_data = (uint32_t *)&req;\n+\tparms.req_size = sizeof(req);\n+\tparms.resp_data = (uint32_t *)&resp;\n+\tparms.resp_size = sizeof(resp);\n+\tparms.mailbox = dev->ops->tf_dev_get_mailbox();\n+\trc = tfp_send_msg_direct(tfp, &parms);\n+\n+\treturn rc;\n+}\n+\n int\n tf_msg_em_mem_rgtr(struct tf *tfp,\n \t\t   int page_lvl,\n@@ -875,6 +997,7 @@ tf_msg_em_mem_rgtr(struct tf *tfp,\n \tstruct tfp_send_msg_parms parms = { 0 };\n \tstruct tf_dev_info *dev;\n \tstruct tf_session *tfs;\n+\tuint32_t fw_se_id;\n \n \t/* Retrieve the session information */\n \trc = tf_session_get_session_internal(tfp, &tfs);\n@@ -893,7 +1016,9 @@ tf_msg_em_mem_rgtr(struct tf *tfp,\n \t\t\t    strerror(-rc));\n \t\treturn rc;\n \t}\n+\tfw_se_id = tfs->session_id.internal.fw_session_id;\n \n+\treq.fw_session_id = tfp_cpu_to_le_32(fw_se_id);\n \treq.page_level = page_lvl;\n \treq.page_size = page_size;\n \treq.page_dir = tfp_cpu_to_le_64(dma_addr);\n@@ -925,6 +1050,7 @@ tf_msg_em_mem_unrgtr(struct tf *tfp,\n \tstruct tfp_send_msg_parms parms = { 0 };\n \tstruct tf_dev_info *dev;\n \tstruct tf_session *tfs;\n+\tuint32_t fw_se_id;\n \n \t/* Retrieve the session information */\n \trc = tf_session_get_session_internal(tfp, &tfs);\n@@ -944,6 +1070,9 @@ tf_msg_em_mem_unrgtr(struct tf *tfp,\n \t\treturn rc;\n \t}\n \n+\tfw_se_id = tfs->session_id.internal.fw_session_id;\n+\treq.fw_session_id = tfp_cpu_to_le_32(fw_se_id);\n+\n \treq.ctx_id = tfp_cpu_to_le_32(*ctx_id);\n \n \tparms.tf_type = HWRM_TF_CTXT_MEM_UNRGTR;\n@@ -970,6 +1099,7 @@ tf_msg_em_qcaps(struct tf *tfp,\n \tstruct tfp_send_msg_parms parms = { 0 };\n \tstruct tf_dev_info *dev;\n \tstruct tf_session *tfs;\n+\tuint32_t fw_se_id;\n \n \t/* Retrieve the session information */\n \trc = tf_session_get_session_internal(tfp, &tfs);\n@@ -980,6 +1110,7 @@ tf_msg_em_qcaps(struct tf *tfp,\n \t\t\t    strerror(-rc));\n \t\treturn rc;\n \t}\n+\tfw_se_id = tfs->session_id.internal.fw_session_id;\n \n \t/* Retrieve the device information */\n \trc = tf_session_get_device(tfs, &dev);\n@@ -996,6 +1127,7 @@ tf_msg_em_qcaps(struct tf *tfp,\n \treq.flags = tfp_cpu_to_le_32(flags);\n \n \tparms.tf_type = HWRM_TF_EXT_EM_QCAPS;\n+\treq.fw_session_id = tfp_cpu_to_le_32(fw_se_id);\n \tparms.req_data = (uint32_t *)&req;\n \tparms.req_size = sizeof(req);\n \tparms.resp_data = (uint32_t *)&resp;\n@@ -1082,6 +1214,80 @@ tf_msg_em_cfg(struct tf *tfp,\n \treturn rc;\n }\n \n+int\n+tf_msg_ext_em_cfg(struct tf *tfp,\n+\t\t  struct tf_tbl_scope_cb *tbl_scope_cb,\n+\t\t  uint32_t st_buckets,\n+\t\t  uint8_t flush_interval,\n+\t\t  enum tf_dir dir)\n+{\n+\tstruct hcapi_cfa_em_ctx_mem_info *ctxp = &tbl_scope_cb->em_ctx_info[dir];\n+\tstruct hcapi_cfa_em_table *lkup_tbl, *act_tbl;\n+\tstruct hwrm_tf_ext_em_cfg_input  req = {0};\n+\tstruct hwrm_tf_ext_em_cfg_output resp = {0};\n+\tstruct tfp_send_msg_parms parms = { 0 };\n+\tuint32_t flags;\n+\tstruct tf_dev_info *dev;\n+\tstruct tf_session *tfs;\n+\tuint32_t fw_se_id;\n+\tint rc;\n+\n+\t/* Retrieve the session information */\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup session, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Retrieve the device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup device, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\tfw_se_id = tfs->session_id.internal.fw_session_id;\n+\n+\tlkup_tbl = &ctxp->em_tables[TF_EM_LKUP_TABLE];\n+\tact_tbl = &ctxp->em_tables[TF_ACTION_TABLE];\n+\tflags = (dir == TF_DIR_TX ? HWRM_TF_EXT_EM_CFG_INPUT_FLAGS_DIR_TX :\n+\t\t HWRM_TF_EXT_EM_CFG_INPUT_FLAGS_DIR_RX);\n+\tflags |= HWRM_TF_EXT_EM_QCAPS_INPUT_FLAGS_PREFERRED_OFFLOAD;\n+\n+\treq.flags = tfp_cpu_to_le_32(flags);\n+\treq.num_entries = tfp_cpu_to_le_32(act_tbl->num_entries);\n+\treq.lkup_static_buckets = tfp_cpu_to_le_32(st_buckets);\n+\treq.fw_session_id = tfp_cpu_to_le_32(fw_se_id);\n+\treq.flush_interval = flush_interval;\n+\treq.action_ctx_id = tfp_cpu_to_le_16(act_tbl->ctx_id);\n+\treq.action_tbl_scope = tfp_cpu_to_le_16(tbl_scope_cb->tbl_scope_id);\n+\treq.lkup_ctx_id = tfp_cpu_to_le_16(lkup_tbl->ctx_id);\n+\treq.lkup_tbl_scope = tfp_cpu_to_le_16(tbl_scope_cb->tbl_scope_id);\n+\n+\treq.enables = (HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_ACTION_CTX_ID |\n+\t\t       HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_ACTION_TBL_SCOPE |\n+\t\t       HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_LKUP_CTX_ID |\n+\t\t       HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_LKUP_TBL_SCOPE |\n+\t\t       HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_LKUP_STATIC_BUCKETS |\n+\t\t       HWRM_TF_EXT_EM_CFG_INPUT_ENABLES_NUM_ENTRIES);\n+\n+\tparms.tf_type = HWRM_TF_EXT_EM_CFG;\n+\tparms.req_data = (uint32_t *)&req;\n+\tparms.req_size = sizeof(req);\n+\tparms.resp_data = (uint32_t *)&resp;\n+\tparms.resp_size = sizeof(resp);\n+\tparms.mailbox = dev->ops->tf_dev_get_mailbox();\n+\n+\trc = tfp_send_msg_direct(tfp,\n+\t\t\t\t &parms);\n+\treturn rc;\n+}\n+\n int\n tf_msg_em_op(struct tf *tfp,\n \t     int dir,\n@@ -1244,9 +1450,6 @@ tf_msg_tcam_entry_get(struct tf *tfp,\n \tif (rc != 0)\n \t\treturn rc;\n \n-\tif (mparms.tf_resp_code != 0)\n-\t\treturn tfp_le_to_cpu_32(mparms.tf_resp_code);\n-\n \tif (parms->key_size < resp.key_size ||\n \t    parms->result_size < resp.result_size) {\n \t\trc = -EINVAL;\n@@ -1264,7 +1467,7 @@ tf_msg_tcam_entry_get(struct tf *tfp,\n \ttfp_memcpy(parms->mask, &resp.dev_data[resp.key_size], resp.key_size);\n \ttfp_memcpy(parms->result, &resp.dev_data[resp.result_offset], resp.result_size);\n \n-\treturn tfp_le_to_cpu_32(mparms.tf_resp_code);\n+\treturn 0;\n }\n \n int\n@@ -1388,7 +1591,7 @@ tf_msg_set_tbl_entry(struct tf *tfp,\n \tif (rc)\n \t\treturn rc;\n \n-\treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n+\treturn 0;\n }\n \n int\n@@ -1454,15 +1657,22 @@ tf_msg_get_tbl_entry(struct tf *tfp,\n \tif (rc)\n \t\treturn rc;\n \n-\t/* Verify that we got enough buffer to return the requested data */\n-\tif (tfp_le_to_cpu_32(resp.size) != size)\n+\t/*\n+\t * The response will be 64 bytes long, the response size will\n+\t * be in words (16). All we can test for is that the response\n+\t * size is < to the requested size.\n+\t */\n+\tif ((tfp_le_to_cpu_32(resp.size) * 4) < size)\n \t\treturn -EINVAL;\n \n+\t/*\n+\t * Copy the requested number of bytes\n+\t */\n \ttfp_memcpy(data,\n \t\t   &resp.data,\n \t\t   size);\n \n-\treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n+\treturn 0;\n }\n \n /* HWRM Tunneled messages */\n@@ -1544,7 +1754,7 @@ tf_msg_get_global_cfg(struct tf *tfp,\n \telse\n \t\treturn -EFAULT;\n \n-\treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n+\treturn 0;\n }\n \n int\n@@ -1560,9 +1770,6 @@ tf_msg_set_global_cfg(struct tf *tfp,\n \tstruct tf_dev_info *dev;\n \tstruct tf_session *tfs;\n \n-\tRTE_BUILD_BUG_ON(sizeof(struct hwrm_tf_global_cfg_set_input) !=\n-\t\t\t TF_MSG_SIZE_HWRM_TF_GLOBAL_CFG_SET);\n-\n \t/* Retrieve the session information */\n \trc = tf_session_get_session_internal(tfp, &tfs);\n \tif (rc) {\n@@ -1637,7 +1844,7 @@ tf_msg_set_global_cfg(struct tf *tfp,\n \tif (rc != 0)\n \t\treturn rc;\n \n-\treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n+\treturn 0;\n }\n \n int\n@@ -1651,8 +1858,8 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp,\n {\n \tint rc;\n \tstruct tfp_send_msg_parms parms = { 0 };\n-\tstruct tf_tbl_type_bulk_get_input req = { 0 };\n-\tstruct tf_tbl_type_bulk_get_output resp = { 0 };\n+\tstruct hwrm_tf_tbl_type_bulk_get_input req = { 0 };\n+\tstruct hwrm_tf_tbl_type_bulk_get_output resp = { 0 };\n \tint data_size = 0;\n \tuint8_t fw_session_id;\n \tstruct tf_dev_info *dev;\n@@ -1698,14 +1905,15 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp,\n \n \treq.host_addr = tfp_cpu_to_le_64(physical_mem_addr);\n \n-\tMSG_PREP(parms,\n-\t\t dev->ops->tf_dev_get_mailbox(),\n-\t\t HWRM_TF,\n-\t\t HWRM_TFT_TBL_TYPE_BULK_GET,\n-\t\t req,\n-\t\t resp);\n+\tparms.tf_type = HWRM_TF_TBL_TYPE_BULK_GET;\n+\tparms.req_data = (uint32_t *)&req;\n+\tparms.req_size = sizeof(req);\n+\tparms.resp_data = (uint32_t *)&resp;\n+\tparms.resp_size = sizeof(resp);\n+\tparms.mailbox = dev->ops->tf_dev_get_mailbox();\n \n-\trc = tfp_send_msg_tunneled(tfp, &parms);\n+\trc = tfp_send_msg_direct(tfp,\n+\t\t\t\t &parms);\n \tif (rc)\n \t\treturn rc;\n \n@@ -1713,7 +1921,7 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp,\n \tif (tfp_le_to_cpu_32(resp.size) != data_size)\n \t\treturn -EINVAL;\n \n-\treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n+\treturn 0;\n }\n \n int\n@@ -1772,12 +1980,9 @@ tf_msg_get_if_tbl_entry(struct tf *tfp,\n \tif (rc != 0)\n \t\treturn rc;\n \n-\tif (parms.tf_resp_code != 0)\n-\t\treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n-\n \ttfp_memcpy(params->data, resp.data, req.size);\n \n-\treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n+\treturn 0;\n }\n \n int\n@@ -1832,5 +2037,5 @@ tf_msg_set_if_tbl_entry(struct tf *tfp,\n \tif (rc != 0)\n \t\treturn rc;\n \n-\treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n+\treturn 0;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h\nindex a14bcd3927..7b4a6a3d92 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.h\n+++ b/drivers/net/bnxt/tf_core/tf_msg.h\n@@ -9,6 +9,7 @@\n #include <rte_common.h>\n #include <hsi_struct_def_dpdk.h>\n \n+#include \"tf_em_common.h\"\n #include \"tf_tbl.h\"\n #include \"tf_rm.h\"\n #include \"tf_tcam.h\"\n@@ -275,6 +276,60 @@ tf_msg_hash_insert_em_internal_entry(struct tf *tfp,\n int tf_msg_delete_em_entry(struct tf *tfp,\n \t\t\t   struct tf_delete_em_entry_parms *em_parms);\n \n+/**\n+ * Sends Ext EM mem allocation request to Firmware\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] tbl\n+ *   memory allocation details\n+ *\n+ * [out] dma_addr\n+ *   memory address\n+ *\n+ * [out] page_lvl\n+ *   page level\n+ *\n+ * [out] page_size\n+ *   page size\n+ *\n+ * Returns:\n+ *   0 on Success else internal Truflow error\n+ */\n+int tf_msg_ext_em_ctxt_mem_alloc(struct tf *tfp,\n+\t\t\tstruct hcapi_cfa_em_table *tbl,\n+\t\t\tuint64_t *dma_addr,\n+\t\t\tuint32_t *page_lvl,\n+\t\t\tuint32_t *page_size);\n+\n+/**\n+ * Sends Ext EM mem allocation request to Firmware\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] mem_size_k\n+ *   memory size in KB\n+ *\n+ * [in] page_dir\n+ *   Pointer to the PBL or PDL depending on number of levels\n+ *\n+ * [in] page_level\n+ *   PBL indirect levels\n+ *\n+ * [in] page_size\n+ *   page size\n+ *\n+ * Returns:\n+ *   0 on Success else internal Truflow error\n+ */\n+int tf_msg_ext_em_ctxt_mem_free(struct tf *tfp,\n+\t\t\t\tuint32_t mem_size_k,\n+\t\t\t\tuint64_t dma_addr,\n+\t\t\t\tuint8_t page_level,\n+\t\t\t\tuint8_t page_size);\n+\n /**\n  * Sends EM mem register request to Firmware\n  *\n@@ -377,6 +432,38 @@ int tf_msg_em_cfg(struct tf *tfp,\n \t\t  uint8_t flush_interval,\n \t\t  int dir);\n \n+/**\n+ * Sends Ext EM config request to Firmware\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] fw_se_id\n+ *   FW session id\n+ *\n+ * [in] tbl_scope_cb\n+ *   Table scope parameters\n+ *\n+ * [in] st_buckets\n+ *   static bucket size\n+ *\n+ * [in] flush_interval\n+ *   Flush pending HW cached flows every 1/10th of value set in\n+ *   seconds, both idle and active flows are flushed from the HW\n+ *   cache. If set to 0, this feature will be disabled.\n+ *\n+ * [in] dir\n+ *   Receive or Transmit direction\n+ *\n+ * Returns:\n+ *   0 on Success else internal Truflow error\n+ */\n+int tf_msg_ext_em_cfg(struct tf *tfp,\n+\t\t      struct tf_tbl_scope_cb *tbl_scope_cb,\n+\t\t      uint32_t st_buckets,\n+\t\t      uint8_t flush_interval,\n+\t\t      enum tf_dir dir);\n+\n /**\n  * Sends EM operation request to Firmware\n  *\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg_common.h b/drivers/net/bnxt/tf_core/tf_msg_common.h\nindex 0c5c21fd68..49f334717d 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg_common.h\n+++ b/drivers/net/bnxt/tf_core/tf_msg_common.h\n@@ -15,7 +15,6 @@\n \t\tparms.mailbox = mb;\t\t\t\t\\\n \t\tparms.tf_type = type;\t\t\t\t\\\n \t\tparms.tf_subtype = subtype;\t\t\t\\\n-\t\tparms.tf_resp_code = 0;\t\t\t\t\\\n \t\tparms.req_size = sizeof(req);\t\t\t\\\n \t\tparms.req_data = (uint32_t *)&(req);\t\t\\\n \t\tparms.resp_size = sizeof(resp);\t\t\t\\\n@@ -26,7 +25,6 @@\n \t\tparms.mailbox = mb;\t\t\t\t\\\n \t\tparms.tf_type = type;\t\t\t\t\\\n \t\tparms.tf_subtype = subtype;\t\t\t\\\n-\t\tparms.tf_resp_code = 0;\t\t\t\t\\\n \t\tparms.req_size  = 0;\t\t\t\t\\\n \t\tparms.req_data  = NULL;\t\t\t\t\\\n \t\tparms.resp_size = sizeof(resp);\t\t\t\\\n@@ -37,7 +35,6 @@\n \t\tparms.mailbox = mb;\t\t\t\t\\\n \t\tparms.tf_type = type;\t\t\t\t\\\n \t\tparms.tf_subtype = subtype;\t\t\t\\\n-\t\tparms.tf_resp_code = 0;\t\t\t\t\\\n \t\tparms.req_size = sizeof(req);\t\t\t\\\n \t\tparms.req_data = (uint32_t *)&(req);\t\t\\\n \t\tparms.resp_size = 0;\t\t\t\t\\\ndiff --git a/drivers/net/bnxt/tf_core/tf_session.c b/drivers/net/bnxt/tf_core/tf_session.c\nindex d2b24f5e20..f591fbe3f5 100644\n--- a/drivers/net/bnxt/tf_core/tf_session.c\n+++ b/drivers/net/bnxt/tf_core/tf_session.c\n@@ -173,6 +173,9 @@ tf_session_create(struct tf *tfp,\n \tll_insert(&session->client_ll, &client->ll_entry);\n \tsession->ref_count++;\n \n+\t/* Init session em_ext_db */\n+\tsession->em_ext_db_handle = NULL;\n+\n \trc = tf_dev_bind(tfp,\n \t\t\t parms->open_cfg->device_type,\n \t\t\t session->shadow_copy,\n@@ -796,3 +799,115 @@ tf_session_get_session_id(struct tf *tfp,\n \n \treturn 0;\n }\n+\n+int\n+tf_session_get_em_ext_db(struct tf *tfp,\n+\t\t\t void **em_ext_db_handle)\n+{\n+\tstruct tf_session *tfs = NULL;\n+\tint rc = 0;\n+\n+\t*em_ext_db_handle = NULL;\n+\n+\tif (tfp == NULL)\n+\t\treturn (-EINVAL);\n+\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t*em_ext_db_handle = tfs->em_ext_db_handle;\n+\treturn rc;\n+}\n+\n+int\n+tf_session_set_em_ext_db(struct tf *tfp,\n+\t\t\t void *em_ext_db_handle)\n+{\n+\tstruct tf_session *tfs = NULL;\n+\tint rc = 0;\n+\n+\tif (tfp == NULL)\n+\t\treturn (-EINVAL);\n+\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\ttfs->em_ext_db_handle = em_ext_db_handle;\n+\treturn rc;\n+}\n+\n+int\n+tf_session_get_db(struct tf *tfp,\n+\t\t  enum tf_module_type type,\n+\t\t  void **db_handle)\n+{\n+\tstruct tf_session *tfs = NULL;\n+\tint rc = 0;\n+\n+\t*db_handle = NULL;\n+\n+\tif (tfp == NULL)\n+\t\treturn (-EINVAL);\n+\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tswitch (type) {\n+\tcase TF_MODULE_TYPE_IDENTIFIER:\n+\t\t*db_handle = tfs->id_db_handle;\n+\t\tbreak;\n+\tcase TF_MODULE_TYPE_TABLE:\n+\t\t*db_handle = tfs->tbl_db_handle;\n+\t\tbreak;\n+\tcase TF_MODULE_TYPE_TCAM:\n+\t\t*db_handle = tfs->tcam_db_handle;\n+\t\tbreak;\n+\tcase TF_MODULE_TYPE_EM:\n+\t\t*db_handle = tfs->em_db_handle;\n+\t\tbreak;\n+\tdefault:\n+\t\trc = -EINVAL;\n+\t\tbreak;\n+\t}\n+\n+\treturn rc;\n+}\n+\n+int\n+tf_session_set_db(struct tf *tfp,\n+\t\t  enum tf_module_type type,\n+\t\t  void *db_handle)\n+{\n+\tstruct tf_session *tfs = NULL;\n+\tint rc = 0;\n+\n+\tif (tfp == NULL)\n+\t\treturn (-EINVAL);\n+\n+\trc = tf_session_get_session_internal(tfp, &tfs);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tswitch (type) {\n+\tcase TF_MODULE_TYPE_IDENTIFIER:\n+\t\ttfs->id_db_handle = db_handle;\n+\t\tbreak;\n+\tcase TF_MODULE_TYPE_TABLE:\n+\t\ttfs->tbl_db_handle = db_handle;\n+\t\tbreak;\n+\tcase TF_MODULE_TYPE_TCAM:\n+\t\ttfs->tcam_db_handle = db_handle;\n+\t\tbreak;\n+\tcase TF_MODULE_TYPE_EM:\n+\t\ttfs->em_db_handle = db_handle;\n+\t\tbreak;\n+\tdefault:\n+\t\trc = -EINVAL;\n+\t\tbreak;\n+\t}\n+\n+\treturn rc;\n+}\ndiff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h\nindex 1d51fa12f8..e5c7a07daf 100644\n--- a/drivers/net/bnxt/tf_core/tf_session.h\n+++ b/drivers/net/bnxt/tf_core/tf_session.h\n@@ -112,6 +112,31 @@ struct tf_session {\n \t * Linked list of clients registered for this session\n \t */\n \tstruct ll client_ll;\n+\n+\t/**\n+\t * em ext db reference for the session\n+\t */\n+\tvoid *em_ext_db_handle;\n+\n+\t/**\n+\t * tcam db reference for the session\n+\t */\n+\tvoid *tcam_db_handle;\n+\n+\t/**\n+\t * table db reference for the session\n+\t */\n+\tvoid *tbl_db_handle;\n+\n+\t/**\n+\t * identifier db reference for the session\n+\t */\n+\tvoid *id_db_handle;\n+\n+\t/**\n+\t * em db reference for the session\n+\t */\n+\tvoid *em_db_handle;\n };\n \n /**\n@@ -410,4 +435,69 @@ int tf_session_get_fw_session_id(struct tf *tfp,\n int tf_session_get_session_id(struct tf *tfp,\n \t\t\t      union tf_session_id *session_id);\n \n+/**\n+ * API to get the em_ext_db from tf_session.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [out] em_ext_db_handle, pointer to eem handle\n+ *\n+ * Returns:\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+int\n+tf_session_get_em_ext_db(struct tf *tfp,\n+\t\t\tvoid **em_ext_db_handle);\n+\n+/**\n+ * API to set the em_ext_db in tf_session.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] em_ext_db_handle, pointer to eem handle\n+ *\n+ * Returns:\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+int\n+tf_session_set_em_ext_db(struct tf *tfp,\n+\t\t\tvoid *em_ext_db_handle);\n+\n+/**\n+ * API to get the db from tf_session.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [out] db_handle, pointer to db handle\n+ *\n+ * Returns:\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+int\n+tf_session_get_db(struct tf *tfp,\n+\t\t   enum tf_module_type type,\n+\t\t  void **db_handle);\n+\n+/**\n+ * API to set the db in tf_session.\n+ *\n+ * [in] tfp\n+ *   Pointer to TF handle\n+ *\n+ * [in] db_handle, pointer to db handle\n+ *\n+ * Returns:\n+ *   - (0) if successful.\n+ *   - (-EINVAL) on failure.\n+ */\n+int\n+tf_session_set_db(struct tf *tfp,\n+\t\t   enum tf_module_type type,\n+\t\t  void *db_handle);\n #endif /* _TF_SESSION_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_tbl.h b/drivers/net/bnxt/tf_core/tf_tbl.h\nindex f0d8e94f7e..9271cf28eb 100644\n--- a/drivers/net/bnxt/tf_core/tf_tbl.h\n+++ b/drivers/net/bnxt/tf_core/tf_tbl.h\n@@ -15,39 +15,9 @@ struct tf;\n  * The Table module provides processing of Internal TF table types.\n  */\n \n-/**\n- * Table scope control block content\n- */\n-struct tf_em_caps {\n-\tuint32_t flags;\n-\tuint32_t supported;\n-\tuint32_t max_entries_supported;\n-\tuint16_t key_entry_size;\n-\tuint16_t record_entry_size;\n-\tuint16_t efc_entry_size;\n-};\n-\n /** Invalid table scope id */\n #define TF_TBL_SCOPE_INVALID 0xffffffff\n \n-/**\n- * Table Scope Control Block\n- *\n- * Holds private data for a table scope. Only one instance of a table\n- * scope with Internal EM is supported.\n- */\n-struct tf_tbl_scope_cb {\n-\tuint32_t tbl_scope_id;\n-       /** The pf or parent pf of the vf used for table scope creation\n-\t*/\n-\tuint16_t pf;\n-\tint index;\n-\tstruct hcapi_cfa_em_ctx_mem_info em_ctx_info[TF_DIR_MAX];\n-\tstruct tf_em_caps em_caps[TF_DIR_MAX];\n-\tstruct stack ext_act_pool[TF_DIR_MAX];\n-\tuint32_t *ext_act_pool_mem[TF_DIR_MAX];\n-};\n-\n /**\n  * Table configuration parameters\n  */\ndiff --git a/drivers/net/bnxt/tf_core/tf_util.c b/drivers/net/bnxt/tf_core/tf_util.c\nindex b4d47d5a8c..25f5c152d2 100644\n--- a/drivers/net/bnxt/tf_core/tf_util.c\n+++ b/drivers/net/bnxt/tf_core/tf_util.c\n@@ -98,20 +98,8 @@ tf_tbl_type_2_str(enum tf_tbl_type tbl_type)\n \t\treturn \"Mirror\";\n \tcase TF_TBL_TYPE_UPAR:\n \t\treturn \"UPAR\";\n-\tcase TF_TBL_TYPE_EPOCH0:\n-\t\treturn \"EPOCH0\";\n-\tcase TF_TBL_TYPE_EPOCH1:\n-\t\treturn \"EPOCH1\";\n \tcase TF_TBL_TYPE_METADATA:\n \t\treturn \"Metadata\";\n-\tcase TF_TBL_TYPE_CT_STATE:\n-\t\treturn \"Connection State\";\n-\tcase TF_TBL_TYPE_RANGE_PROF:\n-\t\treturn \"Range Profile\";\n-\tcase TF_TBL_TYPE_RANGE_ENTRY:\n-\t\treturn \"Range\";\n-\tcase TF_TBL_TYPE_LAG:\n-\t\treturn \"Link Aggregation\";\n \tcase TF_TBL_TYPE_EM_FKB:\n \t\treturn \"EM Flexible Key Builder\";\n \tcase TF_TBL_TYPE_WC_FKB:\ndiff --git a/drivers/net/bnxt/tf_core/tf_util.h b/drivers/net/bnxt/tf_core/tf_util.h\nindex 1aa35b6b82..4caf50349d 100644\n--- a/drivers/net/bnxt/tf_core/tf_util.h\n+++ b/drivers/net/bnxt/tf_core/tf_util.h\n@@ -9,6 +9,10 @@\n #include \"tf_core.h\"\n #include \"tf_device.h\"\n \n+#define TF_BITS2BYTES(x) (((x) + 7) >> 3)\n+#define TF_BITS2BYTES_WORD_ALIGN(x) ((((x) + 31) >> 5) * 4)\n+#define TF_BITS2BYTES_64B_WORD_ALIGN(x) ((((x) + 63) >> 6) * 8)\n+\n /**\n  * Helper function converting direction to text string\n  *\ndiff --git a/drivers/net/bnxt/tf_core/tfp.c b/drivers/net/bnxt/tf_core/tfp.c\nindex b88affcf1e..37c49b587d 100644\n--- a/drivers/net/bnxt/tf_core/tfp.c\n+++ b/drivers/net/bnxt/tf_core/tfp.c\n@@ -53,40 +53,6 @@ tfp_send_msg_direct(struct tf *tfp,\n \treturn rc;\n }\n \n-/**\n- * Sends preformatted TruFlow msg to the TruFlow Firmware using\n- * the Truflow tunnel HWRM message type.\n- *\n- * Returns success or failure code.\n- */\n-int\n-tfp_send_msg_tunneled(struct tf *tfp,\n-\t\t      struct tfp_send_msg_parms *parms)\n-{\n-\tint      rc = 0;\n-\tuint8_t  use_kong_mb = 1;\n-\n-\tif (parms == NULL)\n-\t\treturn -EINVAL;\n-\n-\tif (parms->mailbox == TF_CHIMP_MB)\n-\t\tuse_kong_mb = 0;\n-\n-\trc = bnxt_hwrm_tf_message_tunneled(container_of(tfp,\n-\t\t\t\t\t\t  struct bnxt,\n-\t\t\t\t\t\t  tfp),\n-\t\t\t\t\t   use_kong_mb,\n-\t\t\t\t\t   parms->tf_type,\n-\t\t\t\t\t   parms->tf_subtype,\n-\t\t\t\t\t   &parms->tf_resp_code,\n-\t\t\t\t\t   parms->req_data,\n-\t\t\t\t\t   parms->req_size,\n-\t\t\t\t\t   parms->resp_data,\n-\t\t\t\t\t   parms->resp_size);\n-\n-\treturn rc;\n-}\n-\n /**\n  * Allocates zero'ed memory from the heap.\n  *\ndiff --git a/drivers/net/bnxt/tf_core/tfp.h b/drivers/net/bnxt/tf_core/tfp.h\nindex 2e4ca7ac44..bcc56b0a54 100644\n--- a/drivers/net/bnxt/tf_core/tfp.h\n+++ b/drivers/net/bnxt/tf_core/tfp.h\n@@ -56,11 +56,6 @@ struct tfp_send_msg_parms {\n \t * [in] tlv_subtype, specifies the tlv_subtype.\n \t */\n \tuint16_t  tf_subtype;\n-\t/**\n-\t * [out] tf_resp_code, response code from the internal tlv\n-\t *       message. Only supported on tunneled messages.\n-\t */\n-\tuint32_t tf_resp_code;\n \t/**\n \t * [out] size, number specifying the request size of the data in bytes\n \t */\n@@ -111,7 +106,6 @@ struct tfp_calloc_parms {\n  * @page Portability\n  *\n  * @ref tfp_send_direct\n- * @ref tfp_send_msg_tunneled\n  *\n  * @ref tfp_calloc\n  * @ref tfp_memcpy\n@@ -139,37 +133,6 @@ struct tfp_calloc_parms {\n int tfp_send_msg_direct(struct tf *tfp,\n \t\t\tstruct tfp_send_msg_parms *parms);\n \n-/**\n- * Provides communication capability from the TrueFlow API layer to\n- * the TrueFlow firmware. The portability layer internally provides\n- * the transport to the firmware.\n- *\n- * [in] session, pointer to session handle\n- * [in] parms, parameter structure\n- *\n- * Returns:\n- *   0              - Success\n- *   -1             - Global error like not supported\n- *   -EINVAL        - Parameter Error\n- */\n-int tfp_send_msg_tunneled(struct tf *tfp,\n-\t\t\t  struct tfp_send_msg_parms *parms);\n-\n-/**\n- * Sends OEM command message to Chimp\n- *\n- * [in] session, pointer to session handle\n- * [in] max_flows, max number of flows requested\n- *\n- * Returns:\n- *   0              - Success\n- *   -1             - Global error like not supported\n- *   -EINVAL        - Parameter Error\n- */\n-int\n-tfp_msg_hwrm_oem_cmd(struct tf *tfp,\n-\t\t     uint32_t max_flows);\n-\n /**\n  * Sends OEM command message to Chimp\n  *\n@@ -253,21 +216,6 @@ int tfp_get_fid(struct tf *tfp, uint16_t *fw_fid);\n #define tfp_bswap_32(val) rte_bswap32(val)\n #define tfp_bswap_64(val) rte_bswap64(val)\n \n-/**\n- * Lookup of the FID in the platform specific structure.\n- *\n- * [in] session\n- *   Pointer to session handle\n- *\n- * [out] fw_fid\n- *   Pointer to the fw_fid\n- *\n- * Returns:\n- *   0       - Success\n- *   -EINVAL - Parameter error\n- */\n-int tfp_get_fid(struct tf *tfp, uint16_t *fw_fid);\n-\n /**\n  * Get the PF associated with the fw communications channel.\n  *\n",
    "prefixes": [
        "12/58"
    ]
}