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GET /api/patches/92855/?format=api
{ "id": 92855, "url": "https://patches.dpdk.org/api/patches/92855/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210505073348.6394-5-mk@semihalf.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210505073348.6394-5-mk@semihalf.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210505073348.6394-5-mk@semihalf.com", "date": "2021-05-05T07:33:30", "name": "[v2,04/22] net/ena/base: typos, style and comments improvements", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ff1511575382415dba31a02176d72160b0fc88f5", "submitter": { "id": 786, "url": "https://patches.dpdk.org/api/people/786/?format=api", "name": "Michal Krawczyk", "email": "mk@semihalf.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210505073348.6394-5-mk@semihalf.com/mbox/", "series": [ { "id": 16820, "url": "https://patches.dpdk.org/api/series/16820/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16820", "date": "2021-05-05T07:33:26", "name": "net/ena: update ENA PMD to v2.3.0", "version": 2, "mbox": "https://patches.dpdk.org/series/16820/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/92855/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/92855/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EBDFDA0524;\n\tWed, 5 May 2021 09:34:30 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5DE7B4110D;\n\tWed, 5 May 2021 09:34:07 +0200 (CEST)", "from mail-wr1-f42.google.com (mail-wr1-f42.google.com\n [209.85.221.42]) by mails.dpdk.org (Postfix) with ESMTP id F1BE541106\n for <dev@dpdk.org>; Wed, 5 May 2021 09:34:04 +0200 (CEST)", "by mail-wr1-f42.google.com with SMTP id h4so648655wrt.12\n for <dev@dpdk.org>; Wed, 05 May 2021 00:34:04 -0700 (PDT)", "from DESKTOP-U5LNN3J.localdomain (89-79-189-199.dynamic.chello.pl.\n [89.79.189.199])\n by smtp.gmail.com with ESMTPSA id t17sm4679856wmq.12.2021.05.05.00.34.02\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 05 May 2021 00:34:03 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=semihalf-com.20150623.gappssmtp.com; s=20150623;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=qAlEd43IG+W8z9qC7+I6wVwUzQ2CvZGWPb7gGtUidNc=;\n b=WhQ1wbFl9wANbVtxy/dfdE/l5Py9X2pMlD+JMl2+vjTXl+YbfQRTANR7OqzBpH5z/p\n RrIqEl/dRxJDGWNwmNnRYiUZcR/NacW/w8FVpGV+eTuf5spd1qmrLSkIQtIuTajyosg1\n jaKj6eRS2vfAcrAJS1eSwkMdl3vkYubYki0hHZTs2eRKjNvqE9kZzG9unzlZS7vdH9xd\n BmwsjXAQHUEqQXIZJI1YhHENxeg/33mZiNILNVUvtzqZDLKWgrbmzqIX3GGCLHX5q89b\n aU7i7p/zKfBEozgejmxPyu2bU3fQDHs060tGq6NNG23Ktg9Z7dv1R+09C8Q2Db62lkXb\n vhGQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=qAlEd43IG+W8z9qC7+I6wVwUzQ2CvZGWPb7gGtUidNc=;\n b=YzQcjZlGvELoItgKHRe3yx+e2em+6ygNLNGWhP6TYRCJS7dJHGlPv8AOcFYNRTrnl9\n 3pAjRnRs8XeT9qR7DZv5+9oSsynYe21E/8KIMZQSSeHJFr3irKToPfRmCy1uPXpdvrP3\n Sl0/ICdQNxf6ocjP2y+2Zux46Pa+WgcY8RN2NhflnbPyWALVPP1vR7io6fu7KKgE2zvw\n lDMyCVxkK5b1LZppat9HZ0hHXdmjOBfSIYbZs6HiCTL8cRWsJeOH+YqDbVSbr9vrJm+H\n 5aUw5bhQN0u3Wz9rO9qvDXpnXOOq29KcQZey4aMKiqQt1sR1lUiuwRY1h4GCkGuay/ex\n uF6g==", "X-Gm-Message-State": "AOAM533bBl8yZnCOta0vdnsErwDOb+I8uD6ueXegLLujMHk0RcT4GiwR\n prIYmoBDr1nmRBj2PigQwfvI1i7WCVpJS8GP", "X-Google-Smtp-Source": "\n ABdhPJzxoVP5I0bdT/JATiiMXnqmQxZmVVlUVgI5z2JeIXSH2WFOe+rVQ0jgs+uACadg6BT0uGDpQg==", "X-Received": "by 2002:a5d:64cf:: with SMTP id\n f15mr33317782wri.327.1620200044214;\n Wed, 05 May 2021 00:34:04 -0700 (PDT)", "From": "Michal Krawczyk <mk@semihalf.com>", "To": "dev@dpdk.org", "Cc": "ndagan@amazon.com, gtzalik@amazon.com, igorch@amazon.com,\n upstream@semihalf.com, Michal Krawczyk <mk@semihalf.com>", "Date": "Wed, 5 May 2021 09:33:30 +0200", "Message-Id": "<20210505073348.6394-5-mk@semihalf.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210505073348.6394-1-mk@semihalf.com>", "References": "<20210430125725.28796-1-mk@semihalf.com>\n <20210505073348.6394-1-mk@semihalf.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 04/22] net/ena/base: typos,\n style and comments improvements", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "List of changes:\n * Comment style was adjusted for the functions\n * The keys_num at \"struct ena_admin_feature_rss_flow_hash_control\" was\n renamed to the key_parts to better describe it's meaning\n * The RSS indirection table was called \"REDIRECTION\" -> changed to\n INDIRECTION\n * Change AENQ field \"syndrom\" -> \"syndrome\"\n * Calculate number of the RSS key parts or whole key by ussing the\n common way: sizeof of the first element of the RSS key\n * Add description of the \"enum ena_admin_aq_feature_id\"\n * Rename \"map_rx_buf_bidirectional\" field as \"rx_buf_mirroring\"\n * Other minor style fixes (remove extra spaces, add missing line break,\n improve indentation)\n * Remove unused macros ENA_ADMIN_EXTRA_PROPERTIES_*\n * Restructure the \"if {} else if {} else\" conditional statement for\n setting up the meta descriptor\n\nFixes: 99ecfbf845b3 (\"ena: import communication layer\")\nFixes: b68309be44c0 (\"net/ena/base: update communication layer for the ENAv2\")\nFixes: b2b02edeb0d6 (\"net/ena/base: upgrade HAL for new HW features\")\n\nSigned-off-by: Michal Krawczyk <mk@semihalf.com>\nReviewed-by: Igor Chauskin <igorch@amazon.com>\nReviewed-by: Guy Tzalik <gtzalik@amazon.com>\n---\n drivers/net/ena/base/ena_com.c | 26 +++---\n .../net/ena/base/ena_defs/ena_admin_defs.h | 85 +++++++++----------\n drivers/net/ena/base/ena_eth_com.c | 16 ++--\n drivers/net/ena/ena_ethdev.c | 4 +-\n 4 files changed, 66 insertions(+), 65 deletions(-)", "diff": "diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c\nindex 9931819bbb..9dc9f280c4 100644\n--- a/drivers/net/ena/base/ena_com.c\n+++ b/drivers/net/ena/base/ena_com.c\n@@ -598,7 +598,7 @@ static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_c\n \treturn ret;\n }\n \n-/**\n+/*\n * Set the LLQ configurations of the firmware\n *\n * The driver provides only the enabled feature values to the device,\n@@ -1092,7 +1092,7 @@ static void ena_com_hash_key_fill_default_key(struct ena_com_dev *ena_dev)\n \t/* The key buffer is stored in the device in an array of\n \t * uint32 elements.\n \t */\n-\thash_key->keys_num = ENA_ADMIN_RSS_KEY_PARTS;\n+\thash_key->key_parts = ENA_ADMIN_RSS_KEY_PARTS;\n }\n \n static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev)\n@@ -1165,7 +1165,7 @@ static int ena_com_indirect_table_allocate(struct ena_com_dev *ena_dev,\n \tint ret;\n \n \tret = ena_com_get_feature(ena_dev, &get_resp,\n-\t\t\t\t ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG, 0);\n+\t\t\t\t ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG, 0);\n \tif (unlikely(ret))\n \t\treturn ret;\n \n@@ -1977,6 +1977,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,\n \n \tmemcpy(&get_feat_ctx->dev_attr, &get_resp.u.dev_attr,\n \t sizeof(get_resp.u.dev_attr));\n+\n \tena_dev->supported_features = get_resp.u.dev_attr.supported_features;\n \n \tif (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {\n@@ -2044,7 +2045,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,\n \t\treturn rc;\n \n \trc = ena_com_get_feature(ena_dev, &get_resp,\n-\t\t\t\t ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG, 0);\n+\t\t\t\t ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG, 0);\n \tif (!rc)\n \t\tmemcpy(&get_feat_ctx->ind_table, &get_resp.u.ind_table,\n \t\t sizeof(get_resp.u.ind_table));\n@@ -2106,9 +2107,9 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data)\n \t\ttimestamp = (u64)aenq_common->timestamp_low |\n \t\t\t((u64)aenq_common->timestamp_high << 32);\n \t\tENA_TOUCH(timestamp); /* In case debug is disabled */\n-\t\tena_trc_dbg(ena_dev, \"AENQ! Group[%x] Syndrom[%x] timestamp: [%\" ENA_PRIu64 \"s]\\n\",\n+\t\tena_trc_dbg(ena_dev, \"AENQ! Group[%x] Syndrome[%x] timestamp: [%\" ENA_PRIu64 \"s]\\n\",\n \t\t\t aenq_common->group,\n-\t\t\t aenq_common->syndrom,\n+\t\t\t aenq_common->syndrome,\n \t\t\t timestamp);\n \n \t\t/* Handle specific event*/\n@@ -2410,7 +2411,7 @@ int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,\n \t\t\t}\n \t\t\tmemcpy(hash_key->key, key, key_len);\n \t\t\trss->hash_init_val = init_val;\n-\t\t\thash_key->keys_num = key_len / sizeof(u32);\n+\t\t\thash_key->key_parts = key_len / sizeof(hash_key->key[0]);\n \t\t}\n \t\tbreak;\n \tcase ENA_ADMIN_CRC32:\n@@ -2465,7 +2466,8 @@ int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key)\n \t\tena_dev->rss.hash_key;\n \n \tif (key)\n-\t\tmemcpy(key, hash_key->key, (size_t)(hash_key->keys_num) << 2);\n+\t\tmemcpy(key, hash_key->key,\n+\t\t (size_t)(hash_key->key_parts) * sizeof(hash_key->key[0]));\n \n \treturn 0;\n }\n@@ -2660,9 +2662,9 @@ int ena_com_indirect_table_set(struct ena_com_dev *ena_dev)\n \tint ret;\n \n \tif (!ena_com_check_supported_feature_id(ena_dev,\n-\t\t\t\t\t\tENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG)) {\n+\t\t\t\t\t\tENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG)) {\n \t\tena_trc_dbg(ena_dev, \"Feature %d isn't supported\\n\",\n-\t\t\t ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG);\n+\t\t\t ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG);\n \t\treturn ENA_COM_UNSUPPORTED;\n \t}\n \n@@ -2677,7 +2679,7 @@ int ena_com_indirect_table_set(struct ena_com_dev *ena_dev)\n \tcmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;\n \tcmd.aq_common_descriptor.flags =\n \t\tENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK;\n-\tcmd.feat_common.feature_id = ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG;\n+\tcmd.feat_common.feature_id = ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG;\n \tcmd.u.ind_table.size = rss->tbl_log_size;\n \tcmd.u.ind_table.inline_index = 0xFFFFFFFF;\n \n@@ -2715,7 +2717,7 @@ int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl)\n \t\tsizeof(struct ena_admin_rss_ind_table_entry);\n \n \trc = ena_com_get_feature_ex(ena_dev, &get_resp,\n-\t\t\t\t ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG,\n+\t\t\t\t ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG,\n \t\t\t\t rss->rss_ind_tbl_dma_addr,\n \t\t\t\t tbl_size, 0);\n \tif (unlikely(rc))\ndiff --git a/drivers/net/ena/base/ena_defs/ena_admin_defs.h b/drivers/net/ena/base/ena_defs/ena_admin_defs.h\nindex 30e5eead71..40c2db717c 100644\n--- a/drivers/net/ena/base/ena_defs/ena_admin_defs.h\n+++ b/drivers/net/ena/base/ena_defs/ena_admin_defs.h\n@@ -2,13 +2,9 @@\n * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.\n * All rights reserved.\n */\n-\n #ifndef _ENA_ADMIN_H_\n #define _ENA_ADMIN_H_\n \n-#define ENA_ADMIN_EXTRA_PROPERTIES_STRING_LEN 32\n-#define ENA_ADMIN_EXTRA_PROPERTIES_COUNT 32\n-\n #define ENA_ADMIN_RSS_KEY_PARTS 10\n \n enum ena_admin_aq_opcode {\n@@ -33,6 +29,7 @@ enum ena_admin_aq_completion_status {\n \tENA_ADMIN_RESOURCE_BUSY = 7,\n };\n \n+/* subcommands for the set/get feature admin commands */\n enum ena_admin_aq_feature_id {\n \tENA_ADMIN_DEVICE_ATTRIBUTES = 1,\n \tENA_ADMIN_MAX_QUEUES_NUM = 2,\n@@ -43,7 +40,7 @@ enum ena_admin_aq_feature_id {\n \tENA_ADMIN_MAX_QUEUES_EXT = 7,\n \tENA_ADMIN_RSS_HASH_FUNCTION = 10,\n \tENA_ADMIN_STATELESS_OFFLOAD_CONFIG = 11,\n-\tENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG = 12,\n+\tENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG = 12,\n \tENA_ADMIN_MTU = 14,\n \tENA_ADMIN_RSS_HASH_INPUT = 18,\n \tENA_ADMIN_INTERRUPT_MODERATION = 20,\n@@ -175,7 +172,7 @@ struct ena_admin_acq_common_desc {\n \tuint16_t extended_status;\n \n \t/* indicates to the driver which AQ entry has been consumed by the\n-\t * device and could be reused\n+\t * device and could be reused\n \t */\n \tuint16_t sq_head_indx;\n };\n@@ -220,8 +217,8 @@ struct ena_admin_aq_create_sq_cmd {\n \t */\n \tuint8_t sq_caps_3;\n \n-\t/* associated completion queue id. This CQ must be created prior to\n-\t * SQ creation\n+\t/* associated completion queue id. This CQ must be created prior to SQ\n+\t * creation\n \t */\n \tuint16_t cq_idx;\n \n@@ -360,7 +357,7 @@ struct ena_admin_aq_get_stats_cmd {\n \tuint16_t queue_idx;\n \n \t/* device id, value 0xFFFF means mine. only privileged device can get\n-\t * stats of other device\n+\t * stats of other device\n \t */\n \tuint16_t device_id;\n };\n@@ -442,8 +439,8 @@ struct ena_admin_get_set_feature_common_desc {\n \tuint8_t feature_id;\n \n \t/* The driver specifies the max feature version it supports and the\n-\t * device responds with the currently supported feature version. The\n-\t * field is zero based\n+\t * device responds with the currently supported feature version. The\n+\t * field is zero based\n \t */\n \tuint8_t feature_version;\n \n@@ -455,7 +452,9 @@ struct ena_admin_device_attr_feature_desc {\n \n \tuint32_t device_version;\n \n-\t/* bitmap of ena_admin_aq_feature_id */\n+\t/* bitmap of ena_admin_aq_feature_id, which represents supported\n+\t * subcommands for the set/get feature admin commands.\n+\t */\n \tuint32_t supported_features;\n \n \tuint32_t reserved3;\n@@ -541,32 +540,30 @@ struct ena_admin_feature_llq_desc {\n \n \tuint32_t max_llq_depth;\n \n-\t/* specify the header locations the device supports. bitfield of\n-\t * enum ena_admin_llq_header_location.\n+\t/* specify the header locations the device supports. bitfield of enum\n+\t * ena_admin_llq_header_location.\n \t */\n \tuint16_t header_location_ctrl_supported;\n \n \t/* the header location the driver selected to use. */\n \tuint16_t header_location_ctrl_enabled;\n \n-\t/* if inline header is specified - this is the size of descriptor\n-\t * list entry. If header in a separate ring is specified - this is\n-\t * the size of header ring entry. bitfield of enum\n-\t * ena_admin_llq_ring_entry_size. specify the entry sizes the device\n-\t * supports\n+\t/* if inline header is specified - this is the size of descriptor list\n+\t * entry. If header in a separate ring is specified - this is the size\n+\t * of header ring entry. bitfield of enum ena_admin_llq_ring_entry_size.\n+\t * specify the entry sizes the device supports\n \t */\n \tuint16_t entry_size_ctrl_supported;\n \n \t/* the entry size the driver selected to use. */\n \tuint16_t entry_size_ctrl_enabled;\n \n-\t/* valid only if inline header is specified. First entry associated\n-\t * with the packet includes descriptors and header. Rest of the\n-\t * entries occupied by descriptors. This parameter defines the max\n-\t * number of descriptors precedding the header in the first entry.\n-\t * The field is bitfield of enum\n-\t * ena_admin_llq_num_descs_before_header and specify the values the\n-\t * device supports\n+\t/* valid only if inline header is specified. First entry associated with\n+\t * the packet includes descriptors and header. Rest of the entries\n+\t * occupied by descriptors. This parameter defines the max number of\n+\t * descriptors precedding the header in the first entry. The field is\n+\t * bitfield of enum ena_admin_llq_num_descs_before_header and specify\n+\t * the values the device supports\n \t */\n \tuint16_t desc_num_before_header_supported;\n \n@@ -574,7 +571,7 @@ struct ena_admin_feature_llq_desc {\n \tuint16_t desc_num_before_header_enabled;\n \n \t/* valid only if inline was chosen. bitfield of enum\n-\t * ena_admin_llq_stride_ctrl\n+\t * ena_admin_llq_stride_ctrl\n \t */\n \tuint16_t descriptors_stride_ctrl_supported;\n \n@@ -584,8 +581,8 @@ struct ena_admin_feature_llq_desc {\n \t/* reserved */\n \tuint32_t reserved1;\n \n-\t/* accelerated low latency queues requirement. Driver needs to\n-\t * support those requirements in order to use accelerated LLQ\n+\t/* accelerated low latency queues requirement. driver needs to\n+\t * support those requirements in order to use accelerated llq\n \t */\n \tstruct ena_admin_accel_mode_req accel_mode;\n };\n@@ -609,8 +606,8 @@ struct ena_admin_queue_ext_feature_fields {\n \n \tuint32_t max_tx_header_size;\n \n-\t/* Maximum Descriptors number, including meta descriptor, allowed for\n-\t * a single Tx packet\n+\t/* Maximum Descriptors number, including meta descriptor, allowed for a\n+\t * single Tx packet\n \t */\n \tuint16_t max_per_packet_tx_descs;\n \n@@ -633,8 +630,8 @@ struct ena_admin_queue_feature_desc {\n \n \tuint32_t max_header_size;\n \n-\t/* Maximum Descriptors number, including meta descriptor, allowed for\n-\t * a single Tx packet\n+\t/* Maximum Descriptors number, including meta descriptor, allowed for a\n+\t * single Tx packet\n \t */\n \tuint16_t max_packet_tx_descs;\n \n@@ -730,7 +727,7 @@ enum ena_admin_hash_functions {\n };\n \n struct ena_admin_feature_rss_flow_hash_control {\n-\tuint32_t keys_num;\n+\tuint32_t key_parts;\n \n \tuint32_t reserved;\n \n@@ -872,7 +869,7 @@ struct ena_admin_host_info {\n \t/* 0 : mutable_rss_table_size\n \t * 1 : rx_offset\n \t * 2 : interrupt_moderation\n-\t * 3 : map_rx_buf_bidirectional\n+\t * 3 : rx_buf_mirroring\n \t * 4 : rss_configurable_function_key\n \t * 31:5 : reserved\n \t */\n@@ -956,7 +953,7 @@ struct ena_admin_queue_ext_feature_desc {\n \t\tstruct ena_admin_queue_ext_feature_fields max_queue_ext;\n \n \t\tuint32_t raw[10];\n-\t} ;\n+\t};\n };\n \n struct ena_admin_get_feat_resp {\n@@ -1039,7 +1036,7 @@ struct ena_admin_set_feat_resp {\n struct ena_admin_aenq_common_desc {\n \tuint16_t group;\n \n-\tuint16_t syndrom;\n+\tuint16_t syndrome;\n \n \t/* 0 : phase\n \t * 7:1 : reserved - MBZ\n@@ -1063,7 +1060,7 @@ enum ena_admin_aenq_group {\n \tENA_ADMIN_AENQ_GROUPS_NUM = 5,\n };\n \n-enum ena_admin_aenq_notification_syndrom {\n+enum ena_admin_aenq_notification_syndrome {\n \tENA_ADMIN_SUSPEND = 0,\n \tENA_ADMIN_RESUME = 1,\n \tENA_ADMIN_UPDATE_HINTS = 2,\n@@ -1197,8 +1194,8 @@ struct ena_admin_ena_mmio_req_read_less_resp {\n #define ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK BIT(1)\n #define ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_SHIFT 2\n #define ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK BIT(2)\n-#define ENA_ADMIN_HOST_INFO_MAP_RX_BUF_BIDIRECTIONAL_SHIFT 3\n-#define ENA_ADMIN_HOST_INFO_MAP_RX_BUF_BIDIRECTIONAL_MASK BIT(3)\n+#define ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_SHIFT 3\n+#define ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK BIT(3)\n #define ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_SHIFT 4\n #define ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK BIT(4)\n \n@@ -1652,14 +1649,14 @@ static inline void set_ena_admin_host_info_interrupt_moderation(struct ena_admin\n \tp->driver_supported_features |= (val << ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_SHIFT) & ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK;\n }\n \n-static inline uint32_t get_ena_admin_host_info_map_rx_buf_bidirectional(const struct ena_admin_host_info *p)\n+static inline uint32_t get_ena_admin_host_info_rx_buf_mirroring(const struct ena_admin_host_info *p)\n {\n-\treturn (p->driver_supported_features & ENA_ADMIN_HOST_INFO_MAP_RX_BUF_BIDIRECTIONAL_MASK) >> ENA_ADMIN_HOST_INFO_MAP_RX_BUF_BIDIRECTIONAL_SHIFT;\n+\treturn (p->driver_supported_features & ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK) >> ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_SHIFT;\n }\n \n-static inline void set_ena_admin_host_info_map_rx_buf_bidirectional(struct ena_admin_host_info *p, uint32_t val)\n+static inline void set_ena_admin_host_info_rx_buf_mirroring(struct ena_admin_host_info *p, uint32_t val)\n {\n-\tp->driver_supported_features |= (val << ENA_ADMIN_HOST_INFO_MAP_RX_BUF_BIDIRECTIONAL_SHIFT) & ENA_ADMIN_HOST_INFO_MAP_RX_BUF_BIDIRECTIONAL_MASK;\n+\tp->driver_supported_features |= (val << ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_SHIFT) & ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK;\n }\n \n static inline uint32_t get_ena_admin_host_info_rss_configurable_function_key(const struct ena_admin_host_info *p)\ndiff --git a/drivers/net/ena/base/ena_eth_com.c b/drivers/net/ena/base/ena_eth_com.c\nindex 701e6721e3..92a9a10a9e 100644\n--- a/drivers/net/ena/base/ena_eth_com.c\n+++ b/drivers/net/ena/base/ena_eth_com.c\n@@ -331,16 +331,18 @@ static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,\n \n \t\t*have_meta = true;\n \t\treturn ena_com_create_meta(io_sq, ena_meta);\n-\t} else if (ena_com_meta_desc_changed(io_sq, ena_tx_ctx)) {\n+\t}\n+\n+\tif (ena_com_meta_desc_changed(io_sq, ena_tx_ctx)) {\n \t\t*have_meta = true;\n \t\t/* Cache the meta desc */\n \t\tmemcpy(&io_sq->cached_tx_meta, ena_meta,\n \t\t sizeof(struct ena_com_tx_meta));\n \t\treturn ena_com_create_meta(io_sq, ena_meta);\n-\t} else {\n-\t\t*have_meta = false;\n-\t\treturn ENA_COM_OK;\n \t}\n+\n+\t*have_meta = false;\n+\treturn ENA_COM_OK;\n }\n \n static void ena_com_rx_set_flags(struct ena_com_io_cq *io_cq,\n@@ -626,9 +628,9 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,\n \tdesc->length = ena_buf->len;\n \n \tdesc->ctrl = ENA_ETH_IO_RX_DESC_FIRST_MASK |\n-\t\tENA_ETH_IO_RX_DESC_LAST_MASK |\n-\t\t(io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK) |\n-\t\tENA_ETH_IO_RX_DESC_COMP_REQ_MASK;\n+\t\t ENA_ETH_IO_RX_DESC_LAST_MASK |\n+\t\t ENA_ETH_IO_RX_DESC_COMP_REQ_MASK |\n+\t\t (io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK);\n \n \tdesc->req_id = req_id;\n \ndiff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c\nindex f60e843b7f..f1ff4dad36 100644\n--- a/drivers/net/ena/ena_ethdev.c\n+++ b/drivers/net/ena/ena_ethdev.c\n@@ -2973,7 +2973,7 @@ static void ena_notification(void *data,\n \t\t\taenq_e->aenq_common_desc.group,\n \t\t\tENA_ADMIN_NOTIFICATION);\n \n-\tswitch (aenq_e->aenq_common_desc.syndrom) {\n+\tswitch (aenq_e->aenq_common_desc.syndrome) {\n \tcase ENA_ADMIN_UPDATE_HINTS:\n \t\thints = (struct ena_admin_ena_hw_hints *)\n \t\t\t(&aenq_e->inline_data_w4);\n@@ -2981,7 +2981,7 @@ static void ena_notification(void *data,\n \t\tbreak;\n \tdefault:\n \t\tPMD_DRV_LOG(ERR, \"Invalid aenq notification link state %d\\n\",\n-\t\t\taenq_e->aenq_common_desc.syndrom);\n+\t\t\taenq_e->aenq_common_desc.syndrome);\n \t}\n }\n \n", "prefixes": [ "v2", "04/22" ] }