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GET /api/patches/91588/?format=api
{ "id": 91588, "url": "https://patches.dpdk.org/api/patches/91588/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210415151135.2098674-12-lizh@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210415151135.2098674-12-lizh@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210415151135.2098674-12-lizh@nvidia.com", "date": "2021-04-15T15:11:31", "name": "[v5,11/14] net/mlx5: aso flow meter send WQE and CQE handle", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "81e37d403b54ddc3167ca6c4894e3d31cbaccec2", "submitter": { "id": 1967, "url": "https://patches.dpdk.org/api/people/1967/?format=api", "name": "Li Zhang", "email": "lizh@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210415151135.2098674-12-lizh@nvidia.com/mbox/", "series": [ { "id": 16417, "url": "https://patches.dpdk.org/api/series/16417/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16417", "date": "2021-04-15T15:11:20", "name": "Add ASO meter support in MLX5 PMD", "version": 5, "mbox": "https://patches.dpdk.org/series/16417/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/91588/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/91588/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AFF9DA0C3F;\n\tThu, 15 Apr 2021 17:12:59 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6C98F162322;\n\tThu, 15 Apr 2021 17:12:04 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by mails.dpdk.org (Postfix) with ESMTP id 70ADA162305\n for <dev@dpdk.org>; Thu, 15 Apr 2021 17:11:51 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n lizh@nvidia.com)\n with SMTP; 15 Apr 2021 18:11:48 +0300", "from nvidia.com (c-235-17-1-009.mtl.labs.mlnx [10.235.17.9])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 13FFBjPQ032677;\n Thu, 15 Apr 2021 18:11:48 +0300" ], "From": "Li Zhang <lizh@nvidia.com>", "To": "dekelp@nvidia.com, orika@nvidia.com, viacheslavo@nvidia.com,\n matan@nvidia.com, shahafs@nvidia.com", "Cc": "dev@dpdk.org, thomas@monjalon.net, rasland@nvidia.com, roniba@nvidia.com", "Date": "Thu, 15 Apr 2021 18:11:31 +0300", "Message-Id": "<20210415151135.2098674-12-lizh@nvidia.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20210415151135.2098674-1-lizh@nvidia.com>", "References": "<20210331073632.1443011-1-lizh@nvidia.com>\n <20210415151135.2098674-1-lizh@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v5 11/14] net/mlx5: aso flow meter send WQE and\n CQE handle", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "ASO flow meter send WQE and CQE handle functions\n\nSigned-off-by: Li Zhang <lizh@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5.h | 4 +\n drivers/net/mlx5/mlx5_flow_aso.c | 183 ++++++++++++++++++++++++++++-\n drivers/net/mlx5/mlx5_flow_meter.c | 143 +++++++++++++---------\n 3 files changed, 274 insertions(+), 56 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 2976105210..a4b3597365 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1531,5 +1531,9 @@ int mlx5_aso_flow_hit_queue_poll_start(struct mlx5_dev_ctx_shared *sh);\n int mlx5_aso_flow_hit_queue_poll_stop(struct mlx5_dev_ctx_shared *sh);\n void mlx5_aso_queue_uninit(struct mlx5_dev_ctx_shared *sh,\n \t\tenum mlx5_access_aso_opc_mod aso_opc_mod);\n+int mlx5_aso_meter_update_by_wqe(struct mlx5_dev_ctx_shared *sh,\n+\t\tstruct mlx5_aso_mtr *mtr);\n+int mlx5_aso_mtr_wait(struct mlx5_dev_ctx_shared *sh,\n+\t\tstruct mlx5_aso_mtr *mtr);\n \n #endif /* RTE_PMD_MLX5_H_ */\ndiff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c\nindex 067471ba0f..fe5c9912f2 100644\n--- a/drivers/net/mlx5/mlx5_flow_aso.c\n+++ b/drivers/net/mlx5/mlx5_flow_aso.c\n@@ -13,7 +13,6 @@\n #include \"mlx5.h\"\n #include \"mlx5_flow.h\"\n \n-\n /**\n * Destroy Completion Queue used for ASO access.\n *\n@@ -657,3 +656,185 @@ mlx5_aso_flow_hit_queue_poll_stop(struct mlx5_dev_ctx_shared *sh)\n \t}\n \treturn -rte_errno;\n }\n+\n+static uint16_t\n+mlx5_aso_mtr_sq_enqueue_single(struct mlx5_aso_sq *sq,\n+\t\tstruct mlx5_aso_mtr *aso_mtr)\n+{\n+\tvolatile struct mlx5_aso_wqe *wqe = NULL;\n+\tstruct mlx5_flow_meter_info *fm = NULL;\n+\tuint16_t size = 1 << sq->log_desc_n;\n+\tuint16_t mask = size - 1;\n+\tuint16_t res = size - (uint16_t)(sq->head - sq->tail);\n+\tuint32_t dseg_idx = 0;\n+\tstruct mlx5_aso_mtr_pool *pool = NULL;\n+\n+\tif (unlikely(!res)) {\n+\t\tDRV_LOG(ERR, \"Fail: SQ is full and no free WQE to send\");\n+\t\treturn 0;\n+\t}\n+\twqe = &sq->sq_obj.aso_wqes[sq->head & mask];\n+\trte_prefetch0(&sq->sq_obj.aso_wqes[(sq->head + 1) & mask]);\n+\t/* Fill next WQE. */\n+\tfm = &aso_mtr->fm;\n+\tsq->elts[sq->head & mask].mtr = aso_mtr;\n+\tpool = container_of(aso_mtr, struct mlx5_aso_mtr_pool,\n+\t\t\tmtrs[aso_mtr->offset]);\n+\twqe->general_cseg.misc = rte_cpu_to_be_32(pool->devx_obj->id +\n+\t\t\t(aso_mtr->offset >> 1));\n+\twqe->general_cseg.opcode = rte_cpu_to_be_32(MLX5_OPCODE_ACCESS_ASO |\n+\t\t\t(ASO_OPC_MOD_POLICER <<\n+\t\t\tWQE_CSEG_OPC_MOD_OFFSET) |\n+\t\t\tsq->pi << WQE_CSEG_WQE_INDEX_OFFSET);\n+\t/* There are 2 meters in one ASO cache line. */\n+\tdseg_idx = aso_mtr->offset & 0x1;\n+\twqe->aso_cseg.data_mask =\n+\t\tRTE_BE64(MLX5_IFC_FLOW_METER_PARAM_MASK << (32 * !dseg_idx));\n+\tif (fm->is_enable) {\n+\t\twqe->aso_dseg.mtrs[dseg_idx].cbs_cir =\n+\t\t\tfm->profile->srtcm_prm.cbs_cir;\n+\t\twqe->aso_dseg.mtrs[dseg_idx].ebs_eir =\n+\t\t\tfm->profile->srtcm_prm.ebs_eir;\n+\t} else {\n+\t\twqe->aso_dseg.mtrs[dseg_idx].cbs_cir =\n+\t\t\tRTE_BE32(MLX5_IFC_FLOW_METER_DISABLE_CBS_CIR_VAL);\n+\t\twqe->aso_dseg.mtrs[dseg_idx].ebs_eir = 0;\n+\t}\n+\tsq->head++;\n+\tsq->pi += 2;/* Each WQE contains 2 WQEBB's. */\n+\trte_io_wmb();\n+\tsq->sq_obj.db_rec[MLX5_SND_DBR] = rte_cpu_to_be_32(sq->pi);\n+\trte_wmb();\n+\t*sq->uar_addr = *(volatile uint64_t *)wqe; /* Assume 64 bit ARCH. */\n+\trte_wmb();\n+\treturn 1;\n+}\n+\n+static void\n+mlx5_aso_mtrs_status_update(struct mlx5_aso_sq *sq, uint16_t aso_mtrs_nums)\n+{\n+\tuint16_t size = 1 << sq->log_desc_n;\n+\tuint16_t mask = size - 1;\n+\tuint16_t i;\n+\tstruct mlx5_aso_mtr *aso_mtr = NULL;\n+\tuint8_t exp_state = ASO_METER_WAIT;\n+\n+\tfor (i = 0; i < aso_mtrs_nums; ++i) {\n+\t\taso_mtr = sq->elts[(sq->tail + i) & mask].mtr;\n+\t\tMLX5_ASSERT(aso_mtr);\n+\t\t(void)__atomic_compare_exchange_n(&aso_mtr->state,\n+\t\t\t\t&exp_state, ASO_METER_READY,\n+\t\t\t\tfalse, __ATOMIC_RELAXED, __ATOMIC_RELAXED);\n+\t}\n+}\n+\n+static void\n+mlx5_aso_mtr_completion_handle(struct mlx5_aso_sq *sq)\n+{\n+\tstruct mlx5_aso_cq *cq = &sq->cq;\n+\tvolatile struct mlx5_cqe *restrict cqe;\n+\tconst unsigned int cq_size = 1 << cq->log_desc_n;\n+\tconst unsigned int mask = cq_size - 1;\n+\tuint32_t idx;\n+\tuint32_t next_idx = cq->cq_ci & mask;\n+\tconst uint16_t max = (uint16_t)(sq->head - sq->tail);\n+\tuint16_t n = 0;\n+\tint ret;\n+\n+\tif (unlikely(!max))\n+\t\treturn;\n+\tdo {\n+\t\tidx = next_idx;\n+\t\tnext_idx = (cq->cq_ci + 1) & mask;\n+\t\trte_prefetch0(&cq->cq_obj.cqes[next_idx]);\n+\t\tcqe = &cq->cq_obj.cqes[idx];\n+\t\tret = check_cqe(cqe, cq_size, cq->cq_ci);\n+\t\t/*\n+\t\t * Be sure owner read is done before any other cookie field or\n+\t\t * opaque field.\n+\t\t */\n+\t\trte_io_rmb();\n+\t\tif (ret != MLX5_CQE_STATUS_SW_OWN) {\n+\t\t\tif (likely(ret == MLX5_CQE_STATUS_HW_OWN))\n+\t\t\t\tbreak;\n+\t\t\tmlx5_aso_cqe_err_handle(sq);\n+\t\t} else {\n+\t\t\tn++;\n+\t\t}\n+\t\tcq->cq_ci++;\n+\t} while (1);\n+\tif (likely(n)) {\n+\t\tmlx5_aso_mtrs_status_update(sq, n);\n+\t\tsq->tail += n;\n+\t\trte_io_wmb();\n+\t\tcq->cq_obj.db_rec[0] = rte_cpu_to_be_32(cq->cq_ci);\n+\t}\n+}\n+\n+/**\n+ * Update meter parameter by send WQE.\n+ *\n+ * @param[in] dev\n+ * Pointer to Ethernet device.\n+ * @param[in] priv\n+ * Pointer to mlx5 private data structure.\n+ * @param[in] fm\n+ * Pointer to flow meter to be modified.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_aso_meter_update_by_wqe(struct mlx5_dev_ctx_shared *sh,\n+\t\t\tstruct mlx5_aso_mtr *mtr)\n+{\n+\tstruct mlx5_aso_sq *sq = &sh->mtrmng->sq;\n+\tuint32_t poll_wqe_times = MLX5_MTR_POLL_WQE_CQE_TIMES;\n+\n+\tdo {\n+\t\tmlx5_aso_mtr_completion_handle(sq);\n+\t\tif (mlx5_aso_mtr_sq_enqueue_single(sq, mtr))\n+\t\t\treturn 0;\n+\t\t/* Waiting for wqe resource. */\n+\t\trte_delay_us_sleep(MLX5_ASO_WQE_CQE_RESPONSE_DELAY);\n+\t} while (--poll_wqe_times);\n+\tDRV_LOG(ERR, \"Fail to send WQE for ASO meter %d\",\n+\t\t\tmtr->fm.meter_id);\n+\treturn -1;\n+}\n+\n+/**\n+ * Wait for meter to be ready.\n+ *\n+ * @param[in] dev\n+ * Pointer to Ethernet device.\n+ * @param[in] priv\n+ * Pointer to mlx5 private data structure.\n+ * @param[in] fm\n+ * Pointer to flow meter to be modified.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_aso_mtr_wait(struct mlx5_dev_ctx_shared *sh,\n+\t\t\tstruct mlx5_aso_mtr *mtr)\n+{\n+\tstruct mlx5_aso_sq *sq = &sh->mtrmng->sq;\n+\tuint32_t poll_cqe_times = MLX5_MTR_POLL_WQE_CQE_TIMES;\n+\n+\tif (__atomic_load_n(&mtr->state, __ATOMIC_RELAXED) ==\n+\t\t\t\t\t ASO_METER_READY)\n+\t\treturn 0;\n+\tdo {\n+\t\tmlx5_aso_mtr_completion_handle(sq);\n+\t\tif (__atomic_load_n(&mtr->state, __ATOMIC_RELAXED) ==\n+\t\t\t\t\t ASO_METER_READY)\n+\t\t\treturn 0;\n+\t\t/* Waiting for CQE ready. */\n+\t\trte_delay_us_sleep(MLX5_ASO_WQE_CQE_RESPONSE_DELAY);\n+\t} while (--poll_cqe_times);\n+\tDRV_LOG(ERR, \"Fail to poll CQE ready for ASO meter %d\",\n+\t\t\tmtr->fm.meter_id);\n+\treturn -1;\n+}\ndiff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c\nindex ef4ca30e4a..fcefc135b4 100644\n--- a/drivers/net/mlx5/mlx5_flow_meter.c\n+++ b/drivers/net/mlx5/mlx5_flow_meter.c\n@@ -540,56 +540,79 @@ static int\n mlx5_flow_meter_action_modify(struct mlx5_priv *priv,\n \t\tstruct mlx5_flow_meter_info *fm,\n \t\tconst struct mlx5_flow_meter_srtcm_rfc2697_prm *srtcm,\n-\t\tuint64_t modify_bits, uint32_t active_state)\n+\t\tuint64_t modify_bits, uint32_t active_state, uint32_t is_enable)\n {\n #ifdef HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER\n \tuint32_t in[MLX5_ST_SZ_DW(flow_meter_parameters)] = { 0 };\n \tuint32_t *attr;\n \tstruct mlx5dv_dr_flow_meter_attr mod_attr = { 0 };\n \tint ret;\n+\tstruct mlx5_aso_mtr *aso_mtr = NULL;\n \tuint32_t cbs_cir, ebs_eir, val;\n \n-\t/* Fill command parameters. */\n-\tmod_attr.reg_c_index = priv->mtr_color_reg - REG_C_0;\n-\tmod_attr.flow_meter_parameter = in;\n-\tmod_attr.flow_meter_parameter_sz =\n+\tif (priv->sh->meter_aso_en) {\n+\t\tfm->is_enable = !!is_enable;\n+\t\taso_mtr = container_of(fm, struct mlx5_aso_mtr, fm);\n+\t\tret = mlx5_aso_meter_update_by_wqe(priv->sh, aso_mtr);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t\tret = mlx5_aso_mtr_wait(priv->sh, aso_mtr);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t} else {\n+\t\t/* Fill command parameters. */\n+\t\tmod_attr.reg_c_index = priv->mtr_color_reg - REG_C_0;\n+\t\tmod_attr.flow_meter_parameter = in;\n+\t\tmod_attr.flow_meter_parameter_sz =\n \t\t\t\tMLX5_ST_SZ_BYTES(flow_meter_parameters);\n-\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_ACTIVE)\n-\t\tmod_attr.active = !!active_state;\n-\telse\n-\t\tmod_attr.active = 0;\n-\tattr = in;\n-\tcbs_cir = rte_be_to_cpu_32(srtcm->cbs_cir);\n-\tebs_eir = rte_be_to_cpu_32(srtcm->ebs_eir);\n-\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_CBS) {\n-\t\tval = (cbs_cir >> ASO_DSEG_CBS_EXP_OFFSET) & ASO_DSEG_EXP_MASK;\n-\t\tMLX5_SET(flow_meter_parameters, attr, cbs_exponent, val);\n-\t\tval = (cbs_cir >> ASO_DSEG_CBS_MAN_OFFSET) & ASO_DSEG_MAN_MASK;\n-\t\tMLX5_SET(flow_meter_parameters, attr, cbs_mantissa, val);\n-\t}\n-\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_CIR) {\n-\t\tval = (cbs_cir >> ASO_DSEG_CIR_EXP_OFFSET) & ASO_DSEG_EXP_MASK;\n-\t\tMLX5_SET(flow_meter_parameters, attr, cir_exponent, val);\n-\t\tval = cbs_cir & ASO_DSEG_MAN_MASK;\n-\t\tMLX5_SET(flow_meter_parameters, attr, cir_mantissa, val);\n-\t}\n-\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_EBS) {\n-\t\tval = (ebs_eir >> ASO_DSEG_EBS_EXP_OFFSET) & ASO_DSEG_EXP_MASK;\n-\t\tMLX5_SET(flow_meter_parameters, attr, ebs_exponent, val);\n-\t\tval = (ebs_eir >> ASO_DSEG_EBS_MAN_OFFSET) & ASO_DSEG_MAN_MASK;\n-\t\tMLX5_SET(flow_meter_parameters, attr, ebs_mantissa, val);\n-\t}\n-\t/* Apply modifications to meter only if it was created. */\n-\tif (fm->mfts->meter_action) {\n-\t\tret = mlx5_glue->dv_modify_flow_action_meter\n+\t\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_ACTIVE)\n+\t\t\tmod_attr.active = !!active_state;\n+\t\telse\n+\t\t\tmod_attr.active = 0;\n+\t\tattr = in;\n+\t\tcbs_cir = rte_be_to_cpu_32(srtcm->cbs_cir);\n+\t\tebs_eir = rte_be_to_cpu_32(srtcm->ebs_eir);\n+\t\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_CBS) {\n+\t\t\tval = (cbs_cir >> ASO_DSEG_CBS_EXP_OFFSET) &\n+\t\t\t\tASO_DSEG_EXP_MASK;\n+\t\t\tMLX5_SET(flow_meter_parameters, attr,\n+\t\t\t\tcbs_exponent, val);\n+\t\t\tval = (cbs_cir >> ASO_DSEG_CBS_MAN_OFFSET) &\n+\t\t\t\tASO_DSEG_MAN_MASK;\n+\t\t\tMLX5_SET(flow_meter_parameters, attr,\n+\t\t\t\tcbs_mantissa, val);\n+\t\t}\n+\t\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_CIR) {\n+\t\t\tval = (cbs_cir >> ASO_DSEG_CIR_EXP_OFFSET) &\n+\t\t\t\tASO_DSEG_EXP_MASK;\n+\t\t\tMLX5_SET(flow_meter_parameters, attr,\n+\t\t\t\tcir_exponent, val);\n+\t\t\tval = cbs_cir & ASO_DSEG_MAN_MASK;\n+\t\t\tMLX5_SET(flow_meter_parameters, attr,\n+\t\t\t\tcir_mantissa, val);\n+\t\t}\n+\t\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_EBS) {\n+\t\t\tval = (ebs_eir >> ASO_DSEG_EBS_EXP_OFFSET) &\n+\t\t\t\tASO_DSEG_EXP_MASK;\n+\t\t\tMLX5_SET(flow_meter_parameters, attr,\n+\t\t\t\tebs_exponent, val);\n+\t\t\tval = (ebs_eir >> ASO_DSEG_EBS_MAN_OFFSET) &\n+\t\t\t\tASO_DSEG_MAN_MASK;\n+\t\t\tMLX5_SET(flow_meter_parameters, attr,\n+\t\t\t\tebs_mantissa, val);\n+\t\t}\n+\t\t/* Apply modifications to meter only if it was created. */\n+\t\tif (fm->mfts->meter_action) {\n+\t\t\tret = mlx5_glue->dv_modify_flow_action_meter\n \t\t\t\t\t(fm->mfts->meter_action, &mod_attr,\n \t\t\t\t\trte_cpu_to_be_64(modify_bits));\n-\t\tif (ret)\n-\t\t\treturn ret;\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\t\t}\n+\t\t/* Update succeedded modify meter parameters. */\n+\t\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_ACTIVE)\n+\t\t\tfm->active_state = !!active_state;\n \t}\n-\t/* Update succeedded modify meter parameters. */\n-\tif (modify_bits & MLX5_FLOW_METER_OBJ_MODIFY_FIELD_ACTIVE)\n-\t\tfm->active_state = !!active_state;\n \treturn 0;\n #else\n \t(void)priv;\n@@ -653,6 +676,7 @@ mlx5_flow_meter_create(struct rte_eth_dev *dev, uint32_t meter_id,\n \t\t.type = \"mlx5_flow_mtr_flow_id_pool\",\n \t};\n \tstruct mlx5_aso_mtr *aso_mtr;\n+\tunion mlx5_l3t_data data;\n \tuint32_t mtr_idx;\n \tint ret;\n \tuint8_t mtr_id_bits;\n@@ -704,7 +728,6 @@ mlx5_flow_meter_create(struct rte_eth_dev *dev, uint32_t meter_id,\n \tfm->profile = fmp;\n \tmemcpy(fm->action, params->action, sizeof(params->action));\n \tmlx5_flow_meter_stats_enable_update(fm, params->stats_mask);\n-\n \t/* Alloc policer counters. */\n \tif (fm->green_bytes || fm->green_pkts) {\n \t\tfm->policer_stats.pass_cnt = mlx5_counter_alloc(dev);\n@@ -727,12 +750,23 @@ mlx5_flow_meter_create(struct rte_eth_dev *dev, uint32_t meter_id,\n \tif (!priv->sh->meter_aso_en)\n \t\tTAILQ_INSERT_TAIL(fms, legacy_fm, next);\n \tfm->active_state = 1; /* Config meter starts as active. */\n+\tfm->is_enable = 1;\n \tfm->shared = !!shared;\n \t__atomic_add_fetch(&fm->profile->ref_cnt, 1, __ATOMIC_RELAXED);\n \tfm->flow_ipool = mlx5_ipool_create(&flow_ipool_cfg);\n \tif (!fm->flow_ipool)\n \t\tgoto error;\n \trte_spinlock_init(&fm->sl);\n+\t/* If ASO meter supported, allocate ASO flow meter. */\n+\tif (priv->sh->meter_aso_en) {\n+\t\taso_mtr = container_of(fm, struct mlx5_aso_mtr, fm);\n+\t\tret = mlx5_aso_meter_update_by_wqe(priv->sh, aso_mtr);\n+\t\tif (ret)\n+\t\t\tgoto error;\n+\t\tdata.dword = mtr_idx;\n+\t\tif (mlx5_l3t_set_entry(priv->mtr_idx_tbl, meter_id, &data))\n+\t\t\tgoto error;\n+\t}\n \treturn 0;\n error:\n \tmlx5_flow_destroy_policer_rules(dev, fm, &attr);\n@@ -878,12 +912,12 @@ mlx5_flow_meter_modify_state(struct mlx5_priv *priv,\n \tint ret;\n \n \tif (new_state == MLX5_FLOW_METER_DISABLE)\n-\t\tret = mlx5_flow_meter_action_modify(priv, fm, &srtcm,\n-\t\t\t\t\t\t modify_bits, 0);\n+\t\tret = mlx5_flow_meter_action_modify(priv, fm,\n+\t\t\t\t&srtcm, modify_bits, 0, 0);\n \telse\n \t\tret = mlx5_flow_meter_action_modify(priv, fm,\n \t\t\t\t\t\t &fm->profile->srtcm_prm,\n-\t\t\t\t\t\t modify_bits, 0);\n+\t\t\t\t\t\t modify_bits, 0, 1);\n \tif (ret)\n \t\treturn -rte_mtr_error_set(error, -ret,\n \t\t\t\t\t RTE_MTR_ERROR_TYPE_MTR_PARAMS,\n@@ -1031,7 +1065,7 @@ mlx5_flow_meter_profile_update(struct rte_eth_dev *dev,\n \tif (fm->active_state == MLX5_FLOW_METER_DISABLE)\n \t\treturn 0;\n \tret = mlx5_flow_meter_action_modify(priv, fm, &fm->profile->srtcm_prm,\n-\t\t\t\t\t modify_bits, fm->active_state);\n+\t\t\t\t\t modify_bits, fm->active_state, 1);\n \tif (ret) {\n \t\tfm->profile = old_fmp;\n \t\treturn -rte_mtr_error_set(error, -ret,\n@@ -1281,6 +1315,8 @@ mlx5_flow_meter_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg)\n * Pointer to mlx5_priv.\n * @param meter_id\n * Meter id.\n+ * @param mtr_idx\n+ * Pointer to Meter index.\n *\n * @return\n * Pointer to the profile found on success, NULL otherwise.\n@@ -1297,10 +1333,6 @@ mlx5_flow_meter_find(struct mlx5_priv *priv, uint32_t meter_id,\n \n \tif (priv->sh->meter_aso_en) {\n \t\trte_spinlock_lock(&mtrmng->mtrsl);\n-\t\tif (!mtrmng->n_valid) {\n-\t\t\trte_spinlock_unlock(&mtrmng->mtrsl);\n-\t\t\treturn NULL;\n-\t\t}\n \t\tif (mlx5_l3t_get_entry(priv->mtr_idx_tbl, meter_id, &data) ||\n \t\t\t!data.dword) {\n \t\t\trte_spinlock_unlock(&mtrmng->mtrsl);\n@@ -1309,17 +1341,18 @@ mlx5_flow_meter_find(struct mlx5_priv *priv, uint32_t meter_id,\n \t\tif (mtr_idx)\n \t\t\t*mtr_idx = data.dword;\n \t\taso_mtr = mlx5_aso_meter_by_idx(priv, data.dword);\n+\t\t/* Remove reference taken by the mlx5_l3t_get_entry. */\n \t\tmlx5_l3t_clear_entry(priv->mtr_idx_tbl, meter_id);\n-\t\tif (meter_id == aso_mtr->fm.meter_id) {\n-\t\t\trte_spinlock_unlock(&mtrmng->mtrsl);\n-\t\t\treturn &aso_mtr->fm;\n-\t\t}\n+\t\tMLX5_ASSERT(meter_id == aso_mtr->fm.meter_id);\n \t\trte_spinlock_unlock(&mtrmng->mtrsl);\n-\t} else {\n-\t\tTAILQ_FOREACH(legacy_fm, fms, next)\n-\t\t\tif (meter_id == legacy_fm->fm.meter_id)\n-\t\t\t\treturn &legacy_fm->fm;\n+\t\treturn &aso_mtr->fm;\n \t}\n+\tTAILQ_FOREACH(legacy_fm, fms, next)\n+\t\tif (meter_id == legacy_fm->fm.meter_id) {\n+\t\t\tif (mtr_idx)\n+\t\t\t\t*mtr_idx = legacy_fm->idx;\n+\t\t\treturn &legacy_fm->fm;\n+\t\t}\n \treturn NULL;\n }\n \n", "prefixes": [ "v5", "11/14" ] }