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GET /api/patches/91519/?format=api
{ "id": 91519, "url": "https://patches.dpdk.org/api/patches/91519/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1618458722-31558-2-git-send-email-humin29@huawei.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1618458722-31558-2-git-send-email-humin29@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1618458722-31558-2-git-send-email-humin29@huawei.com", "date": "2021-04-15T03:52:00", "name": "[1/3] net/hns3: support runtime config of mask device capability", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "75b4af008b928fd36b02554b16d4ec4779344094", "submitter": { "id": 1944, "url": "https://patches.dpdk.org/api/people/1944/?format=api", "name": "humin (Q)", "email": "humin29@huawei.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1618458722-31558-2-git-send-email-humin29@huawei.com/mbox/", "series": [ { "id": 16388, "url": "https://patches.dpdk.org/api/series/16388/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16388", "date": "2021-04-15T03:52:02", "name": "some features about hns3 PMD", "version": 1, "mbox": "https://patches.dpdk.org/series/16388/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/91519/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/91519/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 956DCA0A0E;\n\tThu, 15 Apr 2021 05:52:09 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2108A161F5C;\n\tThu, 15 Apr 2021 05:51:58 +0200 (CEST)", "from szxga06-in.huawei.com (szxga06-in.huawei.com [45.249.212.32])\n by mails.dpdk.org (Postfix) with ESMTP id 96358161F3F\n for <dev@dpdk.org>; Thu, 15 Apr 2021 05:51:52 +0200 (CEST)", "from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.58])\n by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4FLQMp2Q1BzlX45\n for <dev@dpdk.org>; Thu, 15 Apr 2021 11:49:58 +0800 (CST)", "from localhost.localdomain (10.69.192.56) by\n DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id\n 14.3.498.0; Thu, 15 Apr 2021 11:51:46 +0800" ], "From": "\"Min Hu (Connor)\" <humin29@huawei.com>", "To": "<dev@dpdk.org>", "CC": "<ferruh.yigit@intel.com>", "Date": "Thu, 15 Apr 2021 11:52:00 +0800", "Message-ID": "<1618458722-31558-2-git-send-email-humin29@huawei.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1618458722-31558-1-git-send-email-humin29@huawei.com>", "References": "<1618458722-31558-1-git-send-email-humin29@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.69.192.56]", "X-CFilter-Loop": "Reflected", "Subject": "[dpdk-dev] [PATCH 1/3] net/hns3: support runtime config of mask\n device capability", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Chengwen Feng <fengchengwen@huawei.com>\n\nThis patch supports runtime config of mask device capability, it was\nused to mask the capability which queried from firmware.\n\nThe device args key is \"dev_caps_mask\" which takes hexadecimal bitmask\nwhere each bit represents whether mask corresponding capability.\n\nIts main purpose is to debug and avoid problems.\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\nSigned-off-by: Min Hu (Connor) <humin29@huawei.com>\n---\n doc/guides/nics/hns3.rst | 9 ++++++\n drivers/net/hns3/hns3_cmd.c | 67 +++++++++++++++++++++++++++++++++++++++\n drivers/net/hns3/hns3_ethdev.c | 24 +++++++++++++-\n drivers/net/hns3/hns3_ethdev.h | 4 +++\n drivers/net/hns3/hns3_ethdev_vf.c | 3 +-\n 5 files changed, 105 insertions(+), 2 deletions(-)", "diff": "diff --git a/doc/guides/nics/hns3.rst b/doc/guides/nics/hns3.rst\nindex 3366562..9592551 100644\n--- a/doc/guides/nics/hns3.rst\n+++ b/doc/guides/nics/hns3.rst\n@@ -84,6 +84,15 @@ Runtime Config Options\n be first checked, if meets, use the ``vec``. Then, ``simple``, at last\n ``common``.\n \n+- ``dev_caps_mask`` (default ``0``)\n+\n+ Used to mask the capability which queried from firmware.\n+ This args take hexadecimal bitmask where each bit represents whether mask\n+ corresponding capability. eg. If the capability is 0xFFFF queried from\n+ firmware, and the args value is 0xF which means the bit0~bit3 should be\n+ masked off, then the capability will be 0xFFF0.\n+ Its main purpose is to debug and avoid problems.\n+\n Driver compilation and testing\n ------------------------------\n \ndiff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c\nindex 75d5299..04e5786 100644\n--- a/drivers/net/hns3/hns3_cmd.c\n+++ b/drivers/net/hns3/hns3_cmd.c\n@@ -411,6 +411,68 @@ hns3_cmd_send(struct hns3_hw *hw, struct hns3_cmd_desc *desc, int num)\n \treturn retval;\n }\n \n+static const char *\n+hns3_get_caps_name(uint32_t caps_id)\n+{\n+\tconst struct {\n+\t\tenum HNS3_CAPS_BITS caps;\n+\t\tconst char *name;\n+\t} dev_caps[] = {\n+\t\t{ HNS3_CAPS_UDP_GSO_B, \"udp_gso\" },\n+\t\t{ HNS3_CAPS_ATR_B, \"atr\" },\n+\t\t{ HNS3_CAPS_FD_QUEUE_REGION_B, \"fd_queue_region\" },\n+\t\t{ HNS3_CAPS_PTP_B, \"ptp\" },\n+\t\t{ HNS3_CAPS_INT_QL_B, \"int_ql\" },\n+\t\t{ HNS3_CAPS_SIMPLE_BD_B, \"simple_bd\" },\n+\t\t{ HNS3_CAPS_TX_PUSH_B, \"tx_push\" },\n+\t\t{ HNS3_CAPS_PHY_IMP_B, \"phy_imp\" },\n+\t\t{ HNS3_CAPS_TQP_TXRX_INDEP_B, \"tqp_txrx_indep\" },\n+\t\t{ HNS3_CAPS_HW_PAD_B, \"hw_pad\" },\n+\t\t{ HNS3_CAPS_STASH_B, \"stash\" },\n+\t\t{ HNS3_CAPS_UDP_TUNNEL_CSUM_B, \"udp_tunnel_csum\" },\n+\t\t{ HNS3_CAPS_RAS_IMP_B, \"ras_imp\" },\n+\t\t{ HNS3_CAPS_FEC_B, \"fec\" },\n+\t\t{ HNS3_CAPS_PAUSE_B, \"pause\" },\n+\t\t{ HNS3_CAPS_RXD_ADV_LAYOUT_B, \"rxd_adv_layout\" }\n+\t};\n+\tuint32_t i;\n+\n+\tfor (i = 0; i < RTE_DIM(dev_caps); i++) {\n+\t\tif (dev_caps[i].caps == caps_id)\n+\t\t\treturn dev_caps[i].name;\n+\t}\n+\n+\treturn \"unknown\";\n+}\n+\n+static void\n+hns3_mask_capability(struct hns3_hw *hw,\n+\t\t struct hns3_query_version_cmd *cmd)\n+{\n+#define MAX_CAPS_BIT\t64\n+\n+\tstruct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);\n+\tuint64_t caps_org, caps_new, caps_masked;\n+\tuint32_t i;\n+\n+\tif (hns->dev_caps_mask == 0)\n+\t\treturn;\n+\n+\tmemcpy(&caps_org, &cmd->caps[0], sizeof(caps_org));\n+\tcaps_org = rte_le_to_cpu_64(caps_org);\n+\tcaps_new = caps_org ^ (caps_org & hns->dev_caps_mask);\n+\tcaps_masked = caps_org ^ caps_new;\n+\tcaps_new = rte_cpu_to_le_64(caps_new);\n+\tmemcpy(&cmd->caps[0], &caps_new, sizeof(caps_new));\n+\n+\tfor (i = 0; i < MAX_CAPS_BIT; i++) {\n+\t\tif (!(caps_masked & BIT_ULL(i)))\n+\t\t\tcontinue;\n+\t\thns3_info(hw, \"mask capabiliy: id-%u, name-%s.\",\n+\t\t\t i, hns3_get_caps_name(i));\n+\t}\n+}\n+\n static void\n hns3_parse_capability(struct hns3_hw *hw,\n \t\t struct hns3_query_version_cmd *cmd)\n@@ -478,6 +540,11 @@ hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw)\n \t\treturn ret;\n \n \thw->fw_version = rte_le_to_cpu_32(resp->firmware);\n+\t/*\n+\t * Make sure mask the capability before parse capability because it\n+\t * may overwrite resp's data.\n+\t */\n+\thns3_mask_capability(hw, resp);\n \thns3_parse_capability(hw, resp);\n \n \treturn 0;\ndiff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c\nindex 1832d26..8601cf0 100644\n--- a/drivers/net/hns3/hns3_ethdev.c\n+++ b/drivers/net/hns3/hns3_ethdev.c\n@@ -7208,6 +7208,19 @@ hns3_get_io_hint_func_name(uint32_t hint)\n \t}\n }\n \n+static int\n+hns3_parse_dev_caps_mask(const char *key, const char *value, void *extra_args)\n+{\n+\tuint64_t val;\n+\n+\tRTE_SET_USED(key);\n+\n+\tval = strtoull(value, NULL, 16);\n+\t*(uint64_t *)extra_args = val;\n+\n+\treturn 0;\n+}\n+\n void\n hns3_parse_devargs(struct rte_eth_dev *dev)\n {\n@@ -7215,6 +7228,7 @@ hns3_parse_devargs(struct rte_eth_dev *dev)\n \tuint32_t rx_func_hint = HNS3_IO_FUNC_HINT_NONE;\n \tuint32_t tx_func_hint = HNS3_IO_FUNC_HINT_NONE;\n \tstruct hns3_hw *hw = &hns->hw;\n+\tuint64_t dev_caps_mask = 0;\n \tstruct rte_kvargs *kvlist;\n \n \tif (dev->device->devargs == NULL)\n@@ -7228,6 +7242,8 @@ hns3_parse_devargs(struct rte_eth_dev *dev)\n \t\t\t &hns3_parse_io_hint_func, &rx_func_hint);\n \trte_kvargs_process(kvlist, HNS3_DEVARG_TX_FUNC_HINT,\n \t\t\t &hns3_parse_io_hint_func, &tx_func_hint);\n+\trte_kvargs_process(kvlist, HNS3_DEVARG_DEV_CAPS_MASK,\n+\t\t\t &hns3_parse_dev_caps_mask, &dev_caps_mask);\n \trte_kvargs_free(kvlist);\n \n \tif (rx_func_hint != HNS3_IO_FUNC_HINT_NONE)\n@@ -7238,6 +7254,11 @@ hns3_parse_devargs(struct rte_eth_dev *dev)\n \t\thns3_warn(hw, \"parsed %s = %s.\", HNS3_DEVARG_TX_FUNC_HINT,\n \t\t\t hns3_get_io_hint_func_name(tx_func_hint));\n \thns->tx_func_hint = tx_func_hint;\n+\n+\tif (dev_caps_mask != 0)\n+\t\thns3_warn(hw, \"parsed %s = 0x%\" PRIx64 \".\",\n+\t\t\t HNS3_DEVARG_DEV_CAPS_MASK, dev_caps_mask);\n+\thns->dev_caps_mask = dev_caps_mask;\n }\n \n static const struct eth_dev_ops hns3_eth_dev_ops = {\n@@ -7505,6 +7526,7 @@ RTE_PMD_REGISTER_PCI_TABLE(net_hns3, pci_id_hns3_map);\n RTE_PMD_REGISTER_KMOD_DEP(net_hns3, \"* igb_uio | vfio-pci\");\n RTE_PMD_REGISTER_PARAM_STRING(net_hns3,\n \t\tHNS3_DEVARG_RX_FUNC_HINT \"=vec|sve|simple|common \"\n-\t\tHNS3_DEVARG_TX_FUNC_HINT \"=vec|sve|simple|common \");\n+\t\tHNS3_DEVARG_TX_FUNC_HINT \"=vec|sve|simple|common \"\n+\t\tHNS3_DEVARG_DEV_CAPS_MASK \"=<1-65535> \");\n RTE_LOG_REGISTER(hns3_logtype_init, pmd.net.hns3.init, NOTICE);\n RTE_LOG_REGISTER(hns3_logtype_driver, pmd.net.hns3.driver, NOTICE);\ndiff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h\nindex 7b7d359..07b313c 100644\n--- a/drivers/net/hns3/hns3_ethdev.h\n+++ b/drivers/net/hns3/hns3_ethdev.h\n@@ -822,6 +822,8 @@ struct hns3_adapter {\n \tuint32_t rx_func_hint;\n \tuint32_t tx_func_hint;\n \n+\tuint64_t dev_caps_mask;\n+\n \tstruct hns3_ptype_table ptype_tbl __rte_cache_min_aligned;\n };\n \n@@ -836,6 +838,8 @@ enum {\n #define HNS3_DEVARG_RX_FUNC_HINT\t\"rx_func_hint\"\n #define HNS3_DEVARG_TX_FUNC_HINT\t\"tx_func_hint\"\n \n+#define HNS3_DEVARG_DEV_CAPS_MASK\t\"dev_caps_mask\"\n+\n #define HNS3_DEV_SUPPORT_DCB_B\t\t\t0x0\n #define HNS3_DEV_SUPPORT_COPPER_B\t\t0x1\n #define HNS3_DEV_SUPPORT_UDP_GSO_B\t\t0x2\ndiff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c\nindex 5770c47..273a938 100644\n--- a/drivers/net/hns3/hns3_ethdev_vf.c\n+++ b/drivers/net/hns3/hns3_ethdev_vf.c\n@@ -3074,4 +3074,5 @@ RTE_PMD_REGISTER_PCI_TABLE(net_hns3_vf, pci_id_hns3vf_map);\n RTE_PMD_REGISTER_KMOD_DEP(net_hns3_vf, \"* igb_uio | vfio-pci\");\n RTE_PMD_REGISTER_PARAM_STRING(net_hns3_vf,\n \t\tHNS3_DEVARG_RX_FUNC_HINT \"=vec|sve|simple|common \"\n-\t\tHNS3_DEVARG_TX_FUNC_HINT \"=vec|sve|simple|common \");\n+\t\tHNS3_DEVARG_TX_FUNC_HINT \"=vec|sve|simple|common \"\n+\t\tHNS3_DEVARG_DEV_CAPS_MASK \"=<1-65535> \");\n", "prefixes": [ "1/3" ] }