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{
    "id": 8534,
    "url": "https://patches.dpdk.org/api/patches/8534/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1446467130-300-2-git-send-email-alejandro.lucero@netronome.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1446467130-300-2-git-send-email-alejandro.lucero@netronome.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1446467130-300-2-git-send-email-alejandro.lucero@netronome.com",
    "date": "2015-11-02T12:25:21",
    "name": "[dpdk-dev,v5,1/9] nfp: basic initialization for netronome´s nfp-6xxx card",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "e128a79c04b73ccf4d6c956d1e0a6f17905dd56e",
    "submitter": {
        "id": 270,
        "url": "https://patches.dpdk.org/api/people/270/?format=api",
        "name": "Alejandro Lucero",
        "email": "alejandro.lucero@netronome.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1446467130-300-2-git-send-email-alejandro.lucero@netronome.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/8534/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/8534/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 19E0491CC;\n\tMon,  2 Nov 2015 13:25:40 +0100 (CET)",
            "from ubuntu (host217-39-174-19.in-addr.btopenworld.com\n\t[217.39.174.19]) by dpdk.org (Postfix) with SMTP id D49EF8E8A\n\tfor <dev@dpdk.org>; Mon,  2 Nov 2015 13:25:30 +0100 (CET)",
            "by ubuntu (Postfix, from userid 5466)\n\tid 2987EE1100; Mon,  2 Nov 2015 12:25:30 +0000 (GMT)"
        ],
        "From": "\"Alejandro.Lucero\" <alejandro.lucero@netronome.com>",
        "To": "dev@dpdk.org",
        "Date": "Mon,  2 Nov 2015 12:25:21 +0000",
        "Message-Id": "<1446467130-300-2-git-send-email-alejandro.lucero@netronome.com>",
        "X-Mailer": "git-send-email 1.7.9.5",
        "In-Reply-To": "<1446467130-300-1-git-send-email-alejandro.lucero@netronome.com>",
        "References": "<1446467130-300-1-git-send-email-alejandro.lucero@netronome.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=UTF-8",
        "Content-Transfer-Encoding": "quoted-printable",
        "Subject": "[dpdk-dev] =?utf-8?q?=5BPATCH_v5_1/9=5D_nfp=3A_basic_initializati?=\n\t=?utf-8?q?on_for_netronome=C2=B4s_nfp-6xxx_card?=",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: \"Alejandro.Lucero\" <alejandro.lucero@netronome.com>\n\nSigned-off-by: Alejandro.Lucero <alejandro.lucero@netronome.com>\nSigned-off-by: Rolf.Neugebauer <rolf.neugebauer@netronome.com>\n---\n drivers/net/nfp/Makefile       |   88 +++++\n drivers/net/nfp/nfp_net.c      |  785 ++++++++++++++++++++++++++++++++++++++++\n drivers/net/nfp/nfp_net_ctrl.h |  290 +++++++++++++++\n drivers/net/nfp/nfp_net_logs.h |   75 ++++\n drivers/net/nfp/nfp_net_pmd.h  |  434 ++++++++++++++++++++++\n 5 files changed, 1672 insertions(+)\n create mode 100644 drivers/net/nfp/Makefile\n create mode 100644 drivers/net/nfp/nfp_net.c\n create mode 100644 drivers/net/nfp/nfp_net_ctrl.h\n create mode 100644 drivers/net/nfp/nfp_net_logs.h\n create mode 100644 drivers/net/nfp/nfp_net_pmd.h",
    "diff": "diff --git a/drivers/net/nfp/Makefile b/drivers/net/nfp/Makefile\nnew file mode 100644\nindex 0000000..ef74e27\n--- /dev/null\n+++ b/drivers/net/nfp/Makefile\n@@ -0,0 +1,88 @@\n+#   BSD LICENSE\n+#\n+#   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n+#   All rights reserved.\n+#\n+#   Redistribution and use in source and binary forms, with or without\n+#   modification, are permitted provided that the following conditions\n+#   are met:\n+#\n+#     * Redistributions of source code must retain the above copyright\n+#       notice, this list of conditions and the following disclaimer.\n+#     * Redistributions in binary form must reproduce the above copyright\n+#       notice, this list of conditions and the following disclaimer in\n+#       the documentation and/or other materials provided with the\n+#       distribution.\n+#     * Neither the name of Intel Corporation nor the names of its\n+#       contributors may be used to endorse or promote products derived\n+#       from this software without specific prior written permission.\n+#\n+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+#   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+\n+include $(RTE_SDK)/mk/rte.vars.mk\n+\n+#\n+# library name\n+#\n+LIB = librte_pmd_nfp.a\n+\n+CFLAGS += -O3\n+CFLAGS += $(WERROR_FLAGS)\n+\n+#\n+# Add extra flags for base driver files (also known as shared code)\n+# to disable warnings\n+#\n+ifeq ($(CC), icc)\n+CFLAGS_BASE_DRIVER = -wd593\n+else ifeq ($(CC), clang)\n+CFLAGS_BASE_DRIVER += -Wno-sign-compare\n+CFLAGS_BASE_DRIVER += -Wno-unused-value\n+CFLAGS_BASE_DRIVER += -Wno-unused-parameter\n+CFLAGS_BASE_DRIVER += -Wno-strict-aliasing\n+CFLAGS_BASE_DRIVER += -Wno-format\n+CFLAGS_BASE_DRIVER += -Wno-missing-field-initializers\n+CFLAGS_BASE_DRIVER += -Wno-pointer-to-int-cast\n+CFLAGS_BASE_DRIVER += -Wno-format-nonliteral\n+else\n+CFLAGS_BASE_DRIVER  = -Wno-sign-compare\n+CFLAGS_BASE_DRIVER += -Wno-unused-value\n+CFLAGS_BASE_DRIVER += -Wno-unused-parameter\n+CFLAGS_BASE_DRIVER += -Wno-strict-aliasing\n+CFLAGS_BASE_DRIVER += -Wno-format\n+CFLAGS_BASE_DRIVER += -Wno-missing-field-initializers\n+CFLAGS_BASE_DRIVER += -Wno-pointer-to-int-cast\n+CFLAGS_BASE_DRIVER += -Wno-format-nonliteral\n+CFLAGS_BASE_DRIVER += -Wno-format-security\n+\n+ifeq ($(shell test $(GCC_VERSION) -ge 44 && echo 1), 1)\n+CFLAGS_BASE_DRIVER += -Wno-unused-but-set-variable\n+endif\n+\n+endif\n+OBJS_BASE_DRIVER=$(patsubst %.c,%.o,$(notdir $(wildcard $(RTE_SDK)/lib/librte_pmd_nfp/*.c)))\n+$(foreach obj, $(OBJS_BASE_DRIVER), $(eval CFLAGS_$(obj)+=$(CFLAGS_BASE_DRIVER)))\n+\n+VPATH += $(RTE_SDK)/drivers/net/nfp/\n+\n+#\n+# all source are stored in SRCS-y\n+#\n+SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_net.c\n+\n+# this lib depends upon:\n+DEPDIRS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += lib/librte_eal lib/librte_ether\n+DEPDIRS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += lib/librte_mempool lib/librte_mbuf\n+DEPDIRS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += lib/librte_net lib/librte_malloc\n+\n+include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/nfp/nfp_net.c b/drivers/net/nfp/nfp_net.c\nnew file mode 100644\nindex 0000000..a33ed37\n--- /dev/null\n+++ b/drivers/net/nfp/nfp_net.c\n@@ -0,0 +1,785 @@\n+/*\n+ * Copyright (c) 2014, 2015 Netronome Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Small portions derived from code Copyright(c) 2010-2015 Intel Corporation.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright notice,\n+ *  this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ *  notice, this list of conditions and the following disclaimer in the\n+ *  documentation and/or other materials provided with the distribution\n+ *\n+ * 3. Neither the name of the copyright holder nor the names of its\n+ *  contributors may be used to endorse or promote products derived from this\n+ *  software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE\n+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+/*\n+ * vim:shiftwidth=8:noexpandtab\n+ *\n+ * @file dpdk/pmd/nfp_net.c\n+ *\n+ * Netronome vNIC DPDK Poll-Mode Driver: Main entry point\n+ */\n+\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <stdint.h>\n+#include <unistd.h>\n+#include <string.h>\n+#include <sys/mman.h>\n+#include <sys/socket.h>\n+#include <sys/io.h>\n+#include <assert.h>\n+#include <time.h>\n+#include <math.h>\n+#include <inttypes.h>\n+\n+#include <rte_byteorder.h>\n+#include <rte_common.h>\n+#include <rte_log.h>\n+#include <rte_debug.h>\n+#include <rte_ethdev.h>\n+#include <rte_dev.h>\n+#include <rte_ether.h>\n+#include <rte_malloc.h>\n+#include <rte_memzone.h>\n+#include <rte_mempool.h>\n+#include <rte_version.h>\n+#include <rte_string_fns.h>\n+#include <rte_alarm.h>\n+\n+#include \"nfp_net_pmd.h\"\n+#include \"nfp_net_logs.h\"\n+#include \"nfp_net_ctrl.h\"\n+\n+/* Prototypes */\n+static void nfp_net_close(struct rte_eth_dev *dev);\n+static int nfp_net_configure(struct rte_eth_dev *dev);\n+static int nfp_net_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);\n+static void nfp_net_infos_get(struct rte_eth_dev *dev,\n+\t\t\t      struct rte_eth_dev_info *dev_info);\n+static int nfp_net_init(struct rte_eth_dev *eth_dev);\n+static int nfp_net_link_update(struct rte_eth_dev *dev, int wait_to_complete);\n+static void nfp_net_promisc_enable(struct rte_eth_dev *dev);\n+static void nfp_net_promisc_disable(struct rte_eth_dev *dev);\n+static int nfp_net_rx_fill_freelist(struct nfp_net_rxq *rxq);\n+static uint32_t nfp_net_rx_queue_count(struct rte_eth_dev *dev,\n+\t\t\t\t       uint16_t queue_idx);\n+static uint16_t nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t\t  uint16_t nb_pkts);\n+static void nfp_net_rx_queue_release(void *rxq);\n+static int nfp_net_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n+\t\t\t\t  uint16_t nb_desc, unsigned int socket_id,\n+\t\t\t\t  const struct rte_eth_rxconf *rx_conf,\n+\t\t\t\t  struct rte_mempool *mp);\n+static int nfp_net_tx_free_bufs(struct nfp_net_txq *txq);\n+static void nfp_net_tx_queue_release(void *txq);\n+static int nfp_net_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n+\t\t\t\t  uint16_t nb_desc, unsigned int socket_id,\n+\t\t\t\t  const struct rte_eth_txconf *tx_conf);\n+static int nfp_net_start(struct rte_eth_dev *dev);\n+static void nfp_net_stats_get(struct rte_eth_dev *dev,\n+\t\t\t      struct rte_eth_stats *stats);\n+static void nfp_net_stats_reset(struct rte_eth_dev *dev);\n+static void nfp_net_stop(struct rte_eth_dev *dev);\n+static uint16_t nfp_net_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t\t  uint16_t nb_pkts);\n+\n+/*\n+ * The offset of the queue controller queues in the PCIe Target. These\n+ * happen to be at the same offset on the NFP6000 and the NFP3200 so\n+ * we use a single macro here.\n+ */\n+#define NFP_PCIE_QUEUE(_q)\t(0x80000 + (0x800 * ((_q) & 0xff)))\n+\n+/* Maximum value which can be added to a queue with one transaction */\n+#define NFP_QCP_MAX_ADD\t0x7f\n+\n+#define RTE_MBUF_DMA_ADDR_DEFAULT(mb) \\\n+\t(uint64_t)((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)\n+\n+/* nfp_qcp_ptr - Read or Write Pointer of a queue */\n+enum nfp_qcp_ptr {\n+\tNFP_QCP_READ_PTR = 0,\n+\tNFP_QCP_WRITE_PTR\n+};\n+\n+/*\n+ * nfp_qcp_ptr_add - Add the value to the selected pointer of a queue\n+ * @q: Base address for queue structure\n+ * @ptr: Add to the Read or Write pointer\n+ * @val: Value to add to the queue pointer\n+ *\n+ * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.\n+ */\n+static inline void\n+nfp_qcp_ptr_add(__u8 *q, enum nfp_qcp_ptr ptr, uint32_t val)\n+{\n+\tuint32_t off;\n+\n+\tif (ptr == NFP_QCP_READ_PTR)\n+\t\toff = NFP_QCP_QUEUE_ADD_RPTR;\n+\telse\n+\t\toff = NFP_QCP_QUEUE_ADD_WPTR;\n+\n+\twhile (val > NFP_QCP_MAX_ADD) {\n+\t\tnn_writel(rte_cpu_to_le_32(NFP_QCP_MAX_ADD), q + off);\n+\t\tval -= NFP_QCP_MAX_ADD;\n+\t}\n+\n+\tnn_writel(rte_cpu_to_le_32(val), q + off);\n+}\n+\n+/*\n+ * nfp_qcp_read - Read the current Read/Write pointer value for a queue\n+ * @q:  Base address for queue structure\n+ * @ptr: Read or Write pointer\n+ */\n+static inline uint32_t\n+nfp_qcp_read(__u8 *q, enum nfp_qcp_ptr ptr)\n+{\n+\tuint32_t off;\n+\tuint32_t val;\n+\n+\tif (ptr == NFP_QCP_READ_PTR)\n+\t\toff = NFP_QCP_QUEUE_STS_LO;\n+\telse\n+\t\toff = NFP_QCP_QUEUE_STS_HI;\n+\n+\tval = rte_cpu_to_le_32(nn_readl(q + off));\n+\n+\tif (ptr == NFP_QCP_READ_PTR)\n+\t\treturn val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;\n+\telse\n+\t\treturn val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;\n+}\n+\n+/*\n+ * Functions to read/write from/to Config BAR\n+ * Performs any endian conversion necessary.\n+ */\n+static inline __u8\n+nn_cfg_readb(struct nfp_net_hw *hw, int off)\n+{\n+\treturn nn_readb(hw->ctrl_bar + off);\n+}\n+\n+static inline void\n+nn_cfg_writeb(struct nfp_net_hw *hw, int off, __u8 val)\n+{\n+\tnn_writeb(val, hw->ctrl_bar + off);\n+}\n+\n+static inline uint32_t\n+nn_cfg_readl(struct nfp_net_hw *hw, int off)\n+{\n+\treturn rte_le_to_cpu_32(nn_readl(hw->ctrl_bar + off));\n+}\n+\n+static inline void\n+nn_cfg_writel(struct nfp_net_hw *hw, int off, uint32_t val)\n+{\n+\tnn_writel(rte_cpu_to_le_32(val), hw->ctrl_bar + off);\n+}\n+\n+static inline uint64_t\n+nn_cfg_readq(struct nfp_net_hw *hw, int off)\n+{\n+\treturn rte_le_to_cpu_64(nn_readq(hw->ctrl_bar + off));\n+}\n+\n+static inline void\n+nn_cfg_writeq(struct nfp_net_hw *hw, int off, uint64_t val)\n+{\n+\tnn_writeq(rte_cpu_to_le_64(val), hw->ctrl_bar + off);\n+}\n+\n+static int\n+__nfp_net_reconfig(struct nfp_net_hw *hw, uint32_t update)\n+{\n+\tint cnt;\n+\tuint32_t new;\n+\tstruct timespec wait;\n+\n+\tPMD_DRV_LOG(DEBUG, \"Writing to the configuration queue (%p)...\\n\",\n+\t\t    hw->qcp_cfg);\n+\n+\tif (hw->qcp_cfg == NULL)\n+\t\trte_panic(\"Bad configuration queue pointer\\n\");\n+\n+\tnfp_qcp_ptr_add(hw->qcp_cfg, NFP_QCP_WRITE_PTR, 1);\n+\n+\twait.tv_sec = 0;\n+\twait.tv_nsec = 1000000;\n+\n+\tPMD_DRV_LOG(DEBUG, \"Polling for update ack...\\n\");\n+\n+\t/* Poll update field, waiting for NFP to ack the config */\n+\tfor (cnt = 0; ; cnt++) {\n+\t\tnew = nn_cfg_readl(hw, NFP_NET_CFG_UPDATE);\n+\t\tif (new == 0)\n+\t\t\tbreak;\n+\t\tif (new & NFP_NET_CFG_UPDATE_ERR) {\n+\t\t\tPMD_INIT_LOG(ERR, \"Reconfig error: 0x%08x\\n\", new);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tif (cnt >= NFP_NET_POLL_TIMEOUT) {\n+\t\t\tPMD_INIT_LOG(ERR, \"Reconfig timeout for 0x%08x after\"\n+\t\t\t\t\t  \" %dms\\n\", update, cnt);\n+\t\t\trte_panic(\"Exiting\\n\");\n+\t\t}\n+\t\tnanosleep(&wait, 0); /* waiting for a 1ms */\n+\t}\n+\tPMD_DRV_LOG(DEBUG, \"Ack DONE\\n\");\n+\treturn 0;\n+}\n+\n+/*\n+ * Reconfigure the NIC\n+ * @nn:    device to reconfigure\n+ * @ctrl:    The value for the ctrl field in the BAR config\n+ * @update:  The value for the update field in the BAR config\n+ *\n+ * Write the update word to the BAR and ping the reconfig queue. Then poll\n+ * until the firmware has acknowledged the update by zeroing the update word.\n+ */\n+static int\n+nfp_net_reconfig(struct nfp_net_hw *hw, uint32_t ctrl, uint32_t update)\n+{\n+\tuint32_t err;\n+\n+\tPMD_DRV_LOG(DEBUG, \"nfp_net_reconfig: ctrl=%08x update=%08x\\n\",\n+\t\t    ctrl, update);\n+\n+\tnn_cfg_writel(hw, NFP_NET_CFG_CTRL, ctrl);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_UPDATE, update);\n+\n+\trte_wmb();\n+\n+\terr = __nfp_net_reconfig(hw, update);\n+\n+\tif (!err)\n+\t\treturn 0;\n+\n+\t/*\n+\t * Reconfig errors imply situations where they can be handled.\n+\t * Otherwise, rte_panic is called inside __nfp_net_reconfig\n+\t */\n+\tPMD_INIT_LOG(ERR, \"Error nfp_net reconfig for ctrl: %x update: %x\\n\",\n+\t\t     ctrl, update);\n+\treturn -EIO;\n+}\n+\n+/*\n+ * Configure an Ethernet device. This function must be invoked first\n+ * before any other function in the Ethernet API. This function can\n+ * also be re-invoked when a device is in the stopped state.\n+ */\n+static int\n+nfp_net_configure(struct rte_eth_dev *dev)\n+{\n+\tstruct rte_eth_conf *dev_conf;\n+\tstruct rte_eth_rxmode *rxmode;\n+\tstruct rte_eth_txmode *txmode;\n+\tuint32_t new_ctrl = 0;\n+\tuint32_t update = 0;\n+\tstruct nfp_net_hw *hw;\n+\n+\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\t/*\n+\t * A DPDK app sends info about how many queues to use and how\n+\t * those queues need to be configured. This is used by the\n+\t * DPDK core and it makes sure no more queues than those\n+\t * advertised by the driver are requested. This function is\n+\t * called after that internal process\n+\t */\n+\n+\tPMD_INIT_LOG(DEBUG, \"Configure\\n\");\n+\n+\tdev_conf = &dev->data->dev_conf;\n+\trxmode = &dev_conf->rxmode;\n+\ttxmode = &dev_conf->txmode;\n+\n+\t/* Checking TX mode */\n+\tif (txmode->mq_mode) {\n+\t\tPMD_INIT_LOG(INFO, \"TX mq_mode DCB and VMDq not supported\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Checking RX mode */\n+\tif (rxmode->mq_mode & ETH_MQ_RX_RSS) {\n+\t\tif (hw->cap & NFP_NET_CFG_CTRL_RSS) {\n+\t\t\tupdate = NFP_NET_CFG_UPDATE_RSS;\n+\t\t\tnew_ctrl = NFP_NET_CFG_CTRL_RSS;\n+\t\t} else {\n+\t\t\tPMD_INIT_LOG(INFO, \"RSS not supported\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\tif (rxmode->split_hdr_size) {\n+\t\tPMD_INIT_LOG(INFO, \"rxmode does not support split header\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (rxmode->hw_ip_checksum) {\n+\t\tif (hw->cap & NFP_NET_CFG_CTRL_RXCSUM) {\n+\t\t\tnew_ctrl |= NFP_NET_CFG_CTRL_RXCSUM;\n+\t\t} else {\n+\t\t\tPMD_INIT_LOG(INFO, \"RXCSUM not supported\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\tif (rxmode->hw_vlan_filter) {\n+\t\tPMD_INIT_LOG(INFO, \"VLAN filter not supported\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (rxmode->hw_vlan_strip) {\n+\t\tif (hw->cap & NFP_NET_CFG_CTRL_RXVLAN) {\n+\t\t\tnew_ctrl |= NFP_NET_CFG_CTRL_RXVLAN;\n+\t\t} else {\n+\t\t\tPMD_INIT_LOG(INFO, \"hw vlan strip not supported\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\tif (rxmode->hw_vlan_extend) {\n+\t\tPMD_INIT_LOG(INFO, \"VLAN extended not supported\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Supporting VLAN insertion by default */\n+\tif (hw->cap & NFP_NET_CFG_CTRL_TXVLAN)\n+\t\tnew_ctrl |= NFP_NET_CFG_CTRL_TXVLAN;\n+\n+\tif (rxmode->jumbo_frame)\n+\t\t/* this is handled in rte_eth_dev_configure */\n+\n+\tif (rxmode->hw_strip_crc) {\n+\t\tPMD_INIT_LOG(INFO, \"strip CRC not supported\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (rxmode->enable_scatter) {\n+\t\tPMD_INIT_LOG(INFO, \"Scatter not supported\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (!new_ctrl)\n+\t\treturn 0;\n+\n+\tupdate |= NFP_NET_CFG_UPDATE_GEN;\n+\n+\tnn_cfg_writel(hw, NFP_NET_CFG_CTRL, new_ctrl);\n+\tif (nfp_net_reconfig(hw, new_ctrl, update) < 0)\n+\t\treturn -EIO;\n+\n+\thw->ctrl = new_ctrl;\n+\n+\treturn 0;\n+}\n+\n+static void\n+nfp_net_enable_queues(struct rte_eth_dev *dev)\n+{\n+\tstruct nfp_net_hw *hw;\n+\tuint64_t enabled_queues = 0;\n+\tint i;\n+\n+\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\t/* Enabling the required TX queues in the device */\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++)\n+\t\tenabled_queues |= (1 << i);\n+\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_TXRS_ENABLE, enabled_queues);\n+\n+\tenabled_queues = 0;\n+\n+\t/* Enabling the required RX queues in the device */\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n+\t\tenabled_queues |= (1 << i);\n+\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_RXRS_ENABLE, enabled_queues);\n+}\n+\n+static void\n+nfp_net_disable_queues(struct rte_eth_dev *dev)\n+{\n+\tstruct nfp_net_hw *hw;\n+\tuint32_t new_ctrl, update = 0;\n+\n+\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_TXRS_ENABLE, 0);\n+\tnn_cfg_writeq(hw, NFP_NET_CFG_RXRS_ENABLE, 0);\n+\n+\tnew_ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_ENABLE;\n+\tupdate = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING |\n+\t\t NFP_NET_CFG_UPDATE_MSIX;\n+\n+\tif (hw->cap & NFP_NET_CFG_CTRL_RINGCFG)\n+\t\tnew_ctrl &= ~NFP_NET_CFG_CTRL_RINGCFG;\n+\n+\t/* If an error when reconfig we avoid to change hw state */\n+\tif (nfp_net_reconfig(hw, new_ctrl, update) < 0)\n+\t\treturn;\n+\n+\thw->ctrl = new_ctrl;\n+}\n+\n+static void\n+nfp_net_params_setup(struct nfp_net_hw *hw)\n+{\n+\tuint32_t *mac_address;\n+\n+\tnn_cfg_writel(hw, NFP_NET_CFG_MTU, hw->mtu);\n+\tnn_cfg_writel(hw, NFP_NET_CFG_FLBUFSZ, hw->flbufsz);\n+\n+\t/* A MAC address is 8 bytes long */\n+\tmac_address = (uint32_t *)(hw->mac_addr);\n+\n+\tnn_cfg_writel(hw, NFP_NET_CFG_MACADDR,\n+\t\t      rte_cpu_to_be_32(*mac_address));\n+\tnn_cfg_writel(hw, NFP_NET_CFG_MACADDR + 4,\n+\t\t      rte_cpu_to_be_32(*(mac_address + 4)));\n+}\n+\n+static void\n+nfp_net_cfg_queue_setup(struct nfp_net_hw *hw)\n+{\n+\thw->qcp_cfg = hw->tx_bar + NFP_QCP_QUEUE_ADDR_SZ;\n+}\n+\n+static int\n+nfp_net_start(struct rte_eth_dev *dev)\n+{\n+\tuint32_t new_ctrl, update = 0;\n+\tstruct nfp_net_hw *hw;\n+\tint ret;\n+\n+\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\tPMD_INIT_LOG(DEBUG, \"Start\\n\");\n+\n+\t/* Disabling queues just in case... */\n+\tnfp_net_disable_queues(dev);\n+\n+\t/* Writing configuration parameters in the device */\n+\tnfp_net_params_setup(hw);\n+\n+\t/* Enabling the required queues in the device */\n+\tnfp_net_enable_queues(dev);\n+\n+\t/* Enable device */\n+\tnew_ctrl = hw->ctrl | NFP_NET_CFG_CTRL_ENABLE | NFP_NET_CFG_UPDATE_MSIX;\n+\tupdate = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING;\n+\n+\tif (hw->cap & NFP_NET_CFG_CTRL_RINGCFG)\n+\t\tnew_ctrl |= NFP_NET_CFG_CTRL_RINGCFG;\n+\n+\tnn_cfg_writel(hw, NFP_NET_CFG_CTRL, new_ctrl);\n+\tif (nfp_net_reconfig(hw, new_ctrl, update) < 0)\n+\t\treturn -EIO;\n+\n+\t/*\n+\t * Allocating rte mbuffs for configured rx queues.\n+\t * This requires queues being enabled before\n+\t */\n+\tif (nfp_net_rx_freelist_setup(dev) < 0) {\n+\t\tret = -ENOMEM;\n+\t\tgoto error;\n+\t}\n+\n+\thw->ctrl = new_ctrl;\n+\n+\treturn 0;\n+\n+error:\n+\t/*\n+\t * An error returned by this function should mean the app\n+\t * exiting and then the system releasing all the memory\n+\t * allocated even memory coming from hugepages.\n+\t *\n+\t * The device could be enabled at this point with some queues\n+\t * ready for getting packets. This is true if the call to\n+\t * nfp_net_rx_freelist_setup() succeeds for some queues but\n+\t * fails for subsequent queues.\n+\t *\n+\t * This should make the app exiting but better if we tell the\n+\t * device first.\n+\t */\n+\tnfp_net_disable_queues(dev);\n+\n+\treturn ret;\n+}\n+\n+/* Stop device: disable rx and tx functions to allow for reconfiguring. */\n+static void\n+nfp_net_stop(struct rte_eth_dev *dev)\n+{\n+\tint i;\n+\n+\tPMD_INIT_LOG(DEBUG, \"Stop\\n\");\n+\n+\tnfp_net_disable_queues(dev);\n+\n+\t/* Clear queues */\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\tnfp_net_reset_tx_queue(\n+\t\t\t(struct nfp_net_txq *)dev->data->tx_queues[i]);\n+\t}\n+\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\tnfp_net_reset_rx_queue(\n+\t\t\t(struct nfp_net_rxq *)dev->data->rx_queues[i]);\n+\t}\n+}\n+\n+/* Reset and stop device. The device can not be restarted. */\n+static void\n+nfp_net_close(struct rte_eth_dev *dev)\n+{\n+\tstruct nfp_net_hw *hw;\n+\n+\tPMD_INIT_LOG(DEBUG, \"Close\\n\");\n+\n+\thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\t/*\n+\t * We assume that the DPDK application is stopping all the\n+\t * threads/queues before calling the device close function.\n+\t */\n+\n+\tnfp_net_stop(dev);\n+\n+\tnn_cfg_writeb(hw, NFP_NET_CFG_LSC, 0xff);\n+\n+\t/*\n+\t * The ixgbe PMD driver disables the pcie master on the\n+\t * device. The i40e does not...\n+\t */\n+}\n+\n+/* Initialise and register driver with DPDK Application */\n+static struct eth_dev_ops nfp_net_eth_dev_ops = {\n+\t.dev_configure\t\t= nfp_net_configure,\n+\t.dev_start\t\t= nfp_net_start,\n+\t.dev_stop\t\t= nfp_net_stop,\n+\t.dev_close\t\t= nfp_net_close,\n+\t.promiscuous_enable\t= nfp_net_promisc_enable,\n+\t.promiscuous_disable\t= nfp_net_promisc_disable,\n+\t.link_update\t\t= nfp_net_link_update,\n+\t.stats_get\t\t= nfp_net_stats_get,\n+\t.stats_reset\t\t= nfp_net_stats_reset,\n+\t.dev_infos_get\t\t= nfp_net_infos_get,\n+\t.mtu_set\t\t= nfp_net_dev_mtu_set,\n+\t.vlan_offload_set\t= nfp_net_vlan_offload_set,\n+\t.reta_update\t\t= nfp_net_reta_update,\n+\t.reta_query\t\t= nfp_net_reta_query,\n+\t.rss_hash_update\t= nfp_net_rss_hash_update,\n+\t.rss_hash_conf_get\t= nfp_net_rss_hash_conf_get,\n+\t.rx_queue_setup\t\t= nfp_net_rx_queue_setup,\n+\t.rx_queue_release\t= nfp_net_rx_queue_release,\n+\t.rx_queue_count\t\t= nfp_net_rx_queue_count,\n+\t.tx_queue_setup\t\t= nfp_net_tx_queue_setup,\n+\t.tx_queue_release\t= nfp_net_tx_queue_release,\n+\t.mac_addr_add\t\t= NULL,\n+\t.mac_addr_remove\t= NULL,\n+};\n+\n+static int\n+nfp_net_init(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct rte_pci_device *pci_dev;\n+\tstruct nfp_net_hw *hw;\n+\n+\tuint32_t tx_bar_off, rx_bar_off;\n+\tuint32_t start_q;\n+\tint stride = 4;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\thw = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n+\n+\teth_dev->dev_ops = &nfp_net_eth_dev_ops;\n+\teth_dev->rx_pkt_burst = &nfp_net_recv_pkts;\n+\teth_dev->tx_pkt_burst = &nfp_net_xmit_pkts;\n+\n+\t/* For secondary processes, the primary has done all the work */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\tpci_dev = eth_dev->pci_dev;\n+\thw->device_id = pci_dev->id.device_id;\n+\thw->vendor_id = pci_dev->id.vendor_id;\n+\thw->subsystem_device_id = pci_dev->id.subsystem_device_id;\n+\thw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;\n+\n+\tPMD_INIT_LOG(DEBUG, \"nfp_net: device (%u:%u) %u:%u:%u:%u\\n\",\n+\t\t     pci_dev->id.vendor_id, pci_dev->id.device_id,\n+\t\t     pci_dev->addr.domain, pci_dev->addr.bus,\n+\t\t     pci_dev->addr.devid, pci_dev->addr.function);\n+\n+\thw->ctrl_bar = (uint8_t *)pci_dev->mem_resource[0].addr;\n+\tif (hw->ctrl_bar == NULL) {\n+\t\tRTE_LOG(ERR, PMD,\n+\t\t\t\"hw->ctrl_bar is NULL. BAR0 not configured\\n\");\n+\t\treturn -ENODEV;\n+\t}\n+\thw->max_rx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_RXRINGS);\n+\thw->max_tx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_TXRINGS);\n+\n+\t/* Work out where in the BAR the queues start. */\n+\tswitch (pci_dev->id.device_id) {\n+\tcase PCI_DEVICE_ID_NFP6000_VF_NIC:\n+\t\tstart_q = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ);\n+\t\ttx_bar_off = NFP_PCIE_QUEUE(start_q);\n+\t\tstart_q = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ);\n+\t\trx_bar_off = NFP_PCIE_QUEUE(start_q);\n+\t\tbreak;\n+\tdefault:\n+\t\tRTE_LOG(ERR, PMD, \"nfp_net: no device ID matching\\n\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tPMD_INIT_LOG(DEBUG, \"tx_bar_off: 0x%08x\\n\", tx_bar_off);\n+\tPMD_INIT_LOG(DEBUG, \"rx_bar_off: 0x%08x\\n\", rx_bar_off);\n+\n+\thw->tx_bar = (uint8_t *)pci_dev->mem_resource[2].addr + tx_bar_off;\n+\thw->rx_bar = (uint8_t *)pci_dev->mem_resource[2].addr + rx_bar_off;\n+\n+\tPMD_INIT_LOG(DEBUG, \"ctrl_bar: %p, tx_bar: %p, rx_bar: %p\\n\",\n+\t\t     hw->ctrl_bar, hw->tx_bar, hw->rx_bar);\n+\n+\tnfp_net_cfg_queue_setup(hw);\n+\n+\t/* Get some of the read-only fields from the config BAR */\n+\thw->ver = nn_cfg_readl(hw, NFP_NET_CFG_VERSION);\n+\thw->cap = nn_cfg_readl(hw, NFP_NET_CFG_CAP);\n+\thw->max_mtu = nn_cfg_readl(hw, NFP_NET_CFG_MAX_MTU);\n+\thw->mtu = hw->max_mtu;\n+\n+\tPMD_INIT_LOG(INFO, \"VER: %#x, Maximum supported MTU: %d\\n\",\n+\t\t     hw->ver, hw->max_mtu);\n+\tPMD_INIT_LOG(INFO, \"CAP: %#x, %s%s%s%s%s%s%s%s%s\\n\", hw->cap,\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_PROMISC ? \"PROMISC \" : \"\",\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_RXCSUM  ? \"RXCSUM \"  : \"\",\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_TXCSUM  ? \"TXCSUM \"  : \"\",\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_RXVLAN  ? \"RXVLAN \"  : \"\",\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_TXVLAN  ? \"TXVLAN \"  : \"\",\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_SCATTER ? \"SCATTER \" : \"\",\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_GATHER  ? \"GATHER \"  : \"\",\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_LSO     ? \"TSO \"     : \"\",\n+\t\t     hw->cap & NFP_NET_CFG_CTRL_RSS     ? \"RSS \"     : \"\");\n+\n+\tpci_dev = eth_dev->pci_dev;\n+\thw->ctrl = 0;\n+\n+\thw->stride_rx = stride;\n+\thw->stride_tx = stride;\n+\n+\tPMD_INIT_LOG(INFO, \"max_rx_queues: %u, max_tx_queues: %u\\n\",\n+\t\t     hw->max_rx_queues, hw->max_tx_queues);\n+\n+\t/* Allocating memory for mac addr */\n+\teth_dev->data->mac_addrs = rte_zmalloc(\"mac_addr\", ETHER_ADDR_LEN, 0);\n+\tif (eth_dev->data->mac_addrs == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to space for MAC address\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\t/* Using random mac addresses for VFs */\n+\teth_random_addr(&hw->mac_addr[0]);\n+\n+\t/* Copying mac address to DPDK eth_dev struct */\n+\tether_addr_copy(&eth_dev->data->mac_addrs[0],\n+\t\t\t(struct ether_addr *)hw->mac_addr);\n+\n+\tPMD_INIT_LOG(INFO, \"port %d VendorID=0x%x DeviceID=0x%x \"\n+\t\t     \"mac=%02x:%02x:%02x:%02x:%02x:%02x\",\n+\t\t     eth_dev->data->port_id, pci_dev->id.vendor_id,\n+\t\t     pci_dev->id.device_id,\n+\t\t     hw->mac_addr[0], hw->mac_addr[1], hw->mac_addr[2],\n+\t\t     hw->mac_addr[3], hw->mac_addr[4], hw->mac_addr[5]);\n+\n+\t/* Recording current stats counters values */\n+\tnfp_net_stats_reset(eth_dev);\n+\n+\treturn 0;\n+}\n+\n+static struct rte_pci_id pci_id_nfp_net_map[] = {\n+\t{\n+\t\t.vendor_id = PCI_VENDOR_ID_NETRONOME,\n+\t\t.device_id = PCI_DEVICE_ID_NFP6000_PF_NIC,\n+\t\t.subsystem_vendor_id = PCI_ANY_ID,\n+\t\t.subsystem_device_id = PCI_ANY_ID,\n+\t},\n+\t{\n+\t\t.vendor_id = PCI_VENDOR_ID_NETRONOME,\n+\t\t.device_id = PCI_DEVICE_ID_NFP6000_VF_NIC,\n+\t\t.subsystem_vendor_id = PCI_ANY_ID,\n+\t\t.subsystem_device_id = PCI_ANY_ID,\n+\t},\n+\t{\n+\t\t.vendor_id = 0,\n+\t},\n+};\n+\n+static struct eth_driver rte_nfp_net_pmd = {\n+\t{\n+\t\t.name = \"rte_nfp_net_pmd\",\n+\t\t.id_table = pci_id_nfp_net_map,\n+\t\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n+\t},\n+\t.eth_dev_init = nfp_net_init,\n+\t.dev_private_size = sizeof(struct nfp_net_adapter),\n+};\n+\n+static int\n+nfp_net_pmd_init(const char *name __rte_unused,\n+\t\t const char *params __rte_unused)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tPMD_INIT_LOG(INFO, \"librte_pmd_nfp_net version %s\\n\",\n+\t\t     NFP_NET_PMD_VERSION);\n+\n+\trte_eth_driver_register(&rte_nfp_net_pmd);\n+\treturn 0;\n+}\n+\n+static struct rte_driver rte_nfp_net_driver = {\n+\t.type = PMD_PDEV,\n+\t.init = nfp_net_pmd_init,\n+};\n+\n+PMD_REGISTER_DRIVER(rte_nfp_net_driver);\n+\n+/*\n+ * Local variables:\n+ * c-file-style: \"Linux\"\n+ * indent-tabs-mode: t\n+ * End:\n+ */\ndiff --git a/drivers/net/nfp/nfp_net_ctrl.h b/drivers/net/nfp/nfp_net_ctrl.h\nnew file mode 100644\nindex 0000000..8342500\n--- /dev/null\n+++ b/drivers/net/nfp/nfp_net_ctrl.h\n@@ -0,0 +1,290 @@\n+/*\n+ * Copyright (c) 2014, 2015 Netronome Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright notice,\n+ *  this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ *  notice, this list of conditions and the following disclaimer in the\n+ *  documentation and/or other materials provided with the distribution\n+ *\n+ * 3. Neither the name of the copyright holder nor the names of its\n+ *  contributors may be used to endorse or promote products derived from this\n+ *  software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE\n+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+/*\n+ * vim:shiftwidth=8:noexpandtab\n+ *\n+ * Netronome network device driver: Control BAR layout\n+ */\n+#ifndef _NFP_NET_CTRL_H_\n+#define _NFP_NET_CTRL_H_\n+\n+/*\n+ * Configuration BAR size.\n+ *\n+ * The configuration BAR is 8K in size, but on the NFP6000, due to\n+ * THB-350, 32k needs to be reserved.\n+ */\n+#ifdef __NFP_IS_6000\n+#define NFP_NET_CFG_BAR_SZ              (32 * 1024)\n+#else\n+#define NFP_NET_CFG_BAR_SZ              (8 * 1024)\n+#endif\n+\n+/* Offset in Freelist buffer where packet starts on RX */\n+#define NFP_NET_RX_OFFSET               32\n+\n+/* Hash type pre-pended when a RSS hash was computed */\n+#define NFP_NET_RSS_NONE                0\n+#define NFP_NET_RSS_IPV4                1\n+#define NFP_NET_RSS_IPV6                2\n+#define NFP_NET_RSS_IPV6_EX             3\n+#define NFP_NET_RSS_IPV4_TCP            4\n+#define NFP_NET_RSS_IPV6_TCP            5\n+#define NFP_NET_RSS_IPV6_EX_TCP         6\n+#define NFP_NET_RSS_IPV4_UDP            7\n+#define NFP_NET_RSS_IPV6_UDP            8\n+#define NFP_NET_RSS_IPV6_EX_UDP         9\n+\n+/*\n+ * @NFP_NET_TXR_MAX:         Maximum number of TX rings\n+ * @NFP_NET_TXR_MASK:        Mask for TX rings\n+ * @NFP_NET_RXR_MAX:         Maximum number of RX rings\n+ * @NFP_NET_RXR_MASK:        Mask for RX rings\n+ */\n+#define NFP_NET_TXR_MAX                 64\n+#define NFP_NET_TXR_MASK                (NFP_NET_TXR_MAX - 1)\n+#define NFP_NET_RXR_MAX                 64\n+#define NFP_NET_RXR_MASK                (NFP_NET_RXR_MAX - 1)\n+\n+/*\n+ * Read/Write config words (0x0000 - 0x002c)\n+ * @NFP_NET_CFG_CTRL:        Global control\n+ * @NFP_NET_CFG_UPDATE:      Indicate which fields are updated\n+ * @NFP_NET_CFG_TXRS_ENABLE: Bitmask of enabled TX rings\n+ * @NFP_NET_CFG_RXRS_ENABLE: Bitmask of enabled RX rings\n+ * @NFP_NET_CFG_MTU:         Set MTU size\n+ * @NFP_NET_CFG_FLBUFSZ:     Set freelist buffer size (must be larger than MTU)\n+ * @NFP_NET_CFG_EXN:         MSI-X table entry for exceptions\n+ * @NFP_NET_CFG_LSC:         MSI-X table entry for link state changes\n+ * @NFP_NET_CFG_MACADDR:     MAC address\n+ *\n+ * TODO:\n+ * - define Error details in UPDATE\n+ */\n+#define NFP_NET_CFG_CTRL                0x0000\n+#define   NFP_NET_CFG_CTRL_ENABLE         (0x1 <<  0) /* Global enable */\n+#define   NFP_NET_CFG_CTRL_PROMISC        (0x1 <<  1) /* Enable Promisc mode */\n+#define   NFP_NET_CFG_CTRL_L2BC           (0x1 <<  2) /* Allow L2 Broadcast */\n+#define   NFP_NET_CFG_CTRL_L2MC           (0x1 <<  3) /* Allow L2 Multicast */\n+#define   NFP_NET_CFG_CTRL_RXCSUM         (0x1 <<  4) /* Enable RX Checksum */\n+#define   NFP_NET_CFG_CTRL_TXCSUM         (0x1 <<  5) /* Enable TX Checksum */\n+#define   NFP_NET_CFG_CTRL_RXVLAN         (0x1 <<  6) /* Enable VLAN strip */\n+#define   NFP_NET_CFG_CTRL_TXVLAN         (0x1 <<  7) /* Enable VLAN insert */\n+#define   NFP_NET_CFG_CTRL_SCATTER        (0x1 <<  8) /* Scatter DMA */\n+#define   NFP_NET_CFG_CTRL_GATHER         (0x1 <<  9) /* Gather DMA */\n+#define   NFP_NET_CFG_CTRL_LSO            (0x1 << 10) /* LSO/TSO */\n+#define   NFP_NET_CFG_CTRL_RINGCFG        (0x1 << 16) /* Ring runtime changes */\n+#define   NFP_NET_CFG_CTRL_RSS            (0x1 << 17) /* RSS */\n+#define   NFP_NET_CFG_CTRL_IRQMOD         (0x1 << 18) /* Interrupt moderation */\n+#define   NFP_NET_CFG_CTRL_RINGPRIO       (0x1 << 19) /* Ring priorities */\n+#define   NFP_NET_CFG_CTRL_MSIXAUTO       (0x1 << 20) /* MSI-X auto-masking */\n+#define   NFP_NET_CFG_CTRL_TXRWB          (0x1 << 21) /* Write-back of TX ring*/\n+#define   NFP_NET_CFG_CTRL_L2SWITCH       (0x1 << 22) /* L2 Switch */\n+#define   NFP_NET_CFG_CTRL_L2SWITCH_LOCAL (0x1 << 23) /* Switch to local */\n+#define   NFP_NET_CFG_CTRL_VXLANO         (0x1 << 24) /* Enable VXLAN */\n+#define   NFP_NET_CFG_CTRL_NVGREO         (0x1 << 25) /* Enable NVGRE */\n+#define NFP_NET_CFG_UPDATE              0x0004\n+#define   NFP_NET_CFG_UPDATE_GEN          (0x1 <<  0) /* General update */\n+#define   NFP_NET_CFG_UPDATE_RING         (0x1 <<  1) /* Ring config change */\n+#define   NFP_NET_CFG_UPDATE_RSS          (0x1 <<  2) /* RSS config change */\n+#define   NFP_NET_CFG_UPDATE_TXRPRIO      (0x1 <<  3) /* TX Ring prio change */\n+#define   NFP_NET_CFG_UPDATE_RXRPRIO      (0x1 <<  4) /* RX Ring prio change */\n+#define   NFP_NET_CFG_UPDATE_MSIX         (0x1 <<  5) /* MSI-X change */\n+#define   NFP_NET_CFG_UPDATE_L2SWITCH     (0x1 <<  6) /* Switch changes */\n+#define   NFP_NET_CFG_UPDATE_RESET        (0x1 <<  7) /* Update due to FLR */\n+#define   NFP_NET_CFG_UPDATE_IRQMOD       (0x1 <<  8) /* IRQ mod change */\n+#define   NFP_NET_CFG_UPDATE_ERR          (0x1 << 31) /* A error occurred */\n+#define NFP_NET_CFG_TXRS_ENABLE         0x0008\n+#define NFP_NET_CFG_RXRS_ENABLE         0x0010\n+#define NFP_NET_CFG_MTU                 0x0018\n+#define NFP_NET_CFG_FLBUFSZ             0x001c\n+#define NFP_NET_CFG_EXN                 0x001f\n+#define NFP_NET_CFG_LSC                 0x0020\n+#define NFP_NET_CFG_MACADDR             0x0024\n+\n+/*\n+ * Read-only words (0x0030 - 0x0050):\n+ * @NFP_NET_CFG_VERSION:     Firmware version number\n+ * @NFP_NET_CFG_STS:         Status\n+ * @NFP_NET_CFG_CAP:         Capabilities (same bits as @NFP_NET_CFG_CTRL)\n+ * @NFP_NET_MAX_TXRINGS:     Maximum number of TX rings\n+ * @NFP_NET_MAX_RXRINGS:     Maximum number of RX rings\n+ * @NFP_NET_MAX_MTU:         Maximum support MTU\n+ * @NFP_NET_CFG_START_TXQ:   Start Queue Control Queue to use for TX (PF only)\n+ * @NFP_NET_CFG_START_RXQ:   Start Queue Control Queue to use for RX (PF only)\n+ *\n+ * TODO:\n+ * - define more STS bits\n+ */\n+#define NFP_NET_CFG_VERSION             0x0030\n+#define NFP_NET_CFG_STS                 0x0034\n+#define   NFP_NET_CFG_STS_LINK            (0x1 << 0) /* Link up or down */\n+#define NFP_NET_CFG_CAP                 0x0038\n+#define NFP_NET_CFG_MAX_TXRINGS         0x003c\n+#define NFP_NET_CFG_MAX_RXRINGS         0x0040\n+#define NFP_NET_CFG_MAX_MTU             0x0044\n+/* Next two words are being used by VFs for solving THB350 issue */\n+#define NFP_NET_CFG_START_TXQ           0x0048\n+#define NFP_NET_CFG_START_RXQ           0x004c\n+\n+/*\n+ * NFP-3200 workaround (0x0050 - 0x0058)\n+ * @NFP_NET_CFG_SPARE_ADDR:  DMA address for ME code to use (e.g. YDS-155 fix)\n+ */\n+#define NFP_NET_CFG_SPARE_ADDR          0x0050\n+\n+/* 64B reserved for future use (0x0080 - 0x00c0) */\n+#define NFP_NET_CFG_RESERVED            0x0080\n+#define NFP_NET_CFG_RESERVED_SZ         0x0040\n+\n+/*\n+ * RSS configuration (0x0100 - 0x01ac):\n+ * Used only when NFP_NET_CFG_CTRL_RSS is enabled\n+ * @NFP_NET_CFG_RSS_CFG:     RSS configuration word\n+ * @NFP_NET_CFG_RSS_KEY:     RSS \"secret\" key\n+ * @NFP_NET_CFG_RSS_ITBL:    RSS indirection table\n+ */\n+#define NFP_NET_CFG_RSS_BASE            0x0100\n+#define NFP_NET_CFG_RSS_CTRL            NFP_NET_CFG_RSS_BASE\n+#define   NFP_NET_CFG_RSS_MASK            (0x7f)\n+#define   NFP_NET_CFG_RSS_MASK_of(_x)     ((_x) & 0x7f)\n+#define   NFP_NET_CFG_RSS_IPV4            (1 <<  8) /* RSS for IPv4 */\n+#define   NFP_NET_CFG_RSS_IPV6            (1 <<  9) /* RSS for IPv6 */\n+#define   NFP_NET_CFG_RSS_IPV4_TCP        (1 << 10) /* RSS for IPv4/TCP */\n+#define   NFP_NET_CFG_RSS_IPV4_UDP        (1 << 11) /* RSS for IPv4/UDP */\n+#define   NFP_NET_CFG_RSS_IPV6_TCP        (1 << 12) /* RSS for IPv6/TCP */\n+#define   NFP_NET_CFG_RSS_IPV6_UDP        (1 << 13) /* RSS for IPv6/UDP */\n+#define   NFP_NET_CFG_RSS_TOEPLITZ        (1 << 24) /* Use Toeplitz hash */\n+#define NFP_NET_CFG_RSS_KEY             (NFP_NET_CFG_RSS_BASE + 0x4)\n+#define NFP_NET_CFG_RSS_KEY_SZ          0x28\n+#define NFP_NET_CFG_RSS_ITBL            (NFP_NET_CFG_RSS_BASE + 0x4 + \\\n+\t\t\t\t\t NFP_NET_CFG_RSS_KEY_SZ)\n+#define NFP_NET_CFG_RSS_ITBL_SZ         0x80\n+\n+/*\n+ * TX ring configuration (0x200 - 0x800)\n+ * @NFP_NET_CFG_TXR_BASE:    Base offset for TX ring configuration\n+ * @NFP_NET_CFG_TXR_ADDR:    Per TX ring DMA address (8B entries)\n+ * @NFP_NET_CFG_TXR_WB_ADDR: Per TX ring write back DMA address (8B entries)\n+ * @NFP_NET_CFG_TXR_SZ:      Per TX ring ring size (1B entries)\n+ * @NFP_NET_CFG_TXR_VEC:     Per TX ring MSI-X table entry (1B entries)\n+ * @NFP_NET_CFG_TXR_PRIO:    Per TX ring priority (1B entries)\n+ * @NFP_NET_CFG_TXR_IRQ_MOD: Per TX ring interrupt moderation (4B entries)\n+ */\n+#define NFP_NET_CFG_TXR_BASE            0x0200\n+#define NFP_NET_CFG_TXR_ADDR(_x)        (NFP_NET_CFG_TXR_BASE + ((_x) * 0x8))\n+#define NFP_NET_CFG_TXR_WB_ADDR(_x)     (NFP_NET_CFG_TXR_BASE + 0x200 + \\\n+\t\t\t\t\t ((_x) * 0x8))\n+#define NFP_NET_CFG_TXR_SZ(_x)          (NFP_NET_CFG_TXR_BASE + 0x400 + (_x))\n+#define NFP_NET_CFG_TXR_VEC(_x)         (NFP_NET_CFG_TXR_BASE + 0x440 + (_x))\n+#define NFP_NET_CFG_TXR_PRIO(_x)        (NFP_NET_CFG_TXR_BASE + 0x480 + (_x))\n+#define NFP_NET_CFG_TXR_IRQ_MOD(_x)     (NFP_NET_CFG_TXR_BASE + 0x500 + \\\n+\t\t\t\t\t ((_x) * 0x4))\n+\n+/*\n+ * RX ring configuration (0x0800 - 0x0c00)\n+ * @NFP_NET_CFG_RXR_BASE:    Base offset for RX ring configuration\n+ * @NFP_NET_CFG_RXR_ADDR:    Per TX ring DMA address (8B entries)\n+ * @NFP_NET_CFG_RXR_SZ:      Per TX ring ring size (1B entries)\n+ * @NFP_NET_CFG_RXR_VEC:     Per TX ring MSI-X table entry (1B entries)\n+ * @NFP_NET_CFG_RXR_PRIO:    Per TX ring priority (1B entries)\n+ * @NFP_NET_CFG_RXR_IRQ_MOD: Per TX ring interrupt moderation (4B entries)\n+ */\n+#define NFP_NET_CFG_RXR_BASE            0x0800\n+#define NFP_NET_CFG_RXR_ADDR(_x)        (NFP_NET_CFG_RXR_BASE + ((_x) * 0x8))\n+#define NFP_NET_CFG_RXR_SZ(_x)          (NFP_NET_CFG_RXR_BASE + 0x200 + (_x))\n+#define NFP_NET_CFG_RXR_VEC(_x)         (NFP_NET_CFG_RXR_BASE + 0x240 + (_x))\n+#define NFP_NET_CFG_RXR_PRIO(_x)        (NFP_NET_CFG_RXR_BASE + 0x280 + (_x))\n+#define NFP_NET_CFG_RXR_IRQ_MOD(_x)     (NFP_NET_CFG_RXR_BASE + 0x300 + \\\n+\t\t\t\t\t ((_x) * 0x4))\n+\n+/*\n+ * Interrupt Control/Cause registers (0x0c00 - 0x0d00)\n+ * These registers are only used when MSI-X auto-masking is not\n+ * enabled (@NFP_NET_CFG_CTRL_MSIXAUTO not set).  The array is index\n+ * by MSI-X entry and are 1B in size.  If an entry is zero, the\n+ * corresponding entry is enabled.  If the FW generates an interrupt,\n+ * it writes a cause into the corresponding field.  This also masks\n+ * the MSI-X entry and the host driver must clear the register to\n+ * re-enable the interrupt.\n+ */\n+#define NFP_NET_CFG_ICR_BASE            0x0c00\n+#define NFP_NET_CFG_ICR(_x)             (NFP_NET_CFG_ICR_BASE + (_x))\n+#define   NFP_NET_CFG_ICR_UNMASKED      0x0\n+#define   NFP_NET_CFG_ICR_RXTX          0x1\n+#define   NFP_NET_CFG_ICR_LSC           0x2\n+\n+/*\n+ * General device stats (0x0d00 - 0x0d90)\n+ * all counters are 64bit.\n+ */\n+#define NFP_NET_CFG_STATS_BASE          0x0d00\n+#define NFP_NET_CFG_STATS_RX_DISCARDS   (NFP_NET_CFG_STATS_BASE + 0x00)\n+#define NFP_NET_CFG_STATS_RX_ERRORS     (NFP_NET_CFG_STATS_BASE + 0x08)\n+#define NFP_NET_CFG_STATS_RX_OCTETS     (NFP_NET_CFG_STATS_BASE + 0x10)\n+#define NFP_NET_CFG_STATS_RX_UC_OCTETS  (NFP_NET_CFG_STATS_BASE + 0x18)\n+#define NFP_NET_CFG_STATS_RX_MC_OCTETS  (NFP_NET_CFG_STATS_BASE + 0x20)\n+#define NFP_NET_CFG_STATS_RX_BC_OCTETS  (NFP_NET_CFG_STATS_BASE + 0x28)\n+#define NFP_NET_CFG_STATS_RX_FRAMES     (NFP_NET_CFG_STATS_BASE + 0x30)\n+#define NFP_NET_CFG_STATS_RX_MC_FRAMES  (NFP_NET_CFG_STATS_BASE + 0x38)\n+#define NFP_NET_CFG_STATS_RX_BC_FRAMES  (NFP_NET_CFG_STATS_BASE + 0x40)\n+\n+#define NFP_NET_CFG_STATS_TX_DISCARDS   (NFP_NET_CFG_STATS_BASE + 0x48)\n+#define NFP_NET_CFG_STATS_TX_ERRORS     (NFP_NET_CFG_STATS_BASE + 0x50)\n+#define NFP_NET_CFG_STATS_TX_OCTETS     (NFP_NET_CFG_STATS_BASE + 0x58)\n+#define NFP_NET_CFG_STATS_TX_UC_OCTETS  (NFP_NET_CFG_STATS_BASE + 0x60)\n+#define NFP_NET_CFG_STATS_TX_MC_OCTETS  (NFP_NET_CFG_STATS_BASE + 0x68)\n+#define NFP_NET_CFG_STATS_TX_BC_OCTETS  (NFP_NET_CFG_STATS_BASE + 0x70)\n+#define NFP_NET_CFG_STATS_TX_FRAMES     (NFP_NET_CFG_STATS_BASE + 0x78)\n+#define NFP_NET_CFG_STATS_TX_MC_FRAMES  (NFP_NET_CFG_STATS_BASE + 0x80)\n+#define NFP_NET_CFG_STATS_TX_BC_FRAMES  (NFP_NET_CFG_STATS_BASE + 0x88)\n+\n+/*\n+ * Per ring stats (0x1000 - 0x1800)\n+ * options, 64bit per entry\n+ * @NFP_NET_CFG_TXR_STATS:   TX ring statistics (Packet and Byte count)\n+ * @NFP_NET_CFG_RXR_STATS:   RX ring statistics (Packet and Byte count)\n+ */\n+#define NFP_NET_CFG_TXR_STATS_BASE      0x1000\n+#define NFP_NET_CFG_TXR_STATS(_x)       (NFP_NET_CFG_TXR_STATS_BASE + \\\n+\t\t\t\t\t ((_x) * 0x10))\n+#define NFP_NET_CFG_RXR_STATS_BASE      0x1400\n+#define NFP_NET_CFG_RXR_STATS(_x)       (NFP_NET_CFG_RXR_STATS_BASE + \\\n+\t\t\t\t\t ((_x) * 0x10))\n+\n+#endif /* _NFP_NET_CTRL_H_ */\n+/*\n+ * Local variables:\n+ * c-file-style: \"Linux\"\n+ * indent-tabs-mode: t\n+ * End:\n+ */\ndiff --git a/drivers/net/nfp/nfp_net_logs.h b/drivers/net/nfp/nfp_net_logs.h\nnew file mode 100644\nindex 0000000..0b966e4\n--- /dev/null\n+++ b/drivers/net/nfp/nfp_net_logs.h\n@@ -0,0 +1,75 @@\n+/*\n+ * Copyright (c) 2014, 2015 Netronome Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright notice,\n+ *  this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ *  notice, this list of conditions and the following disclaimer in the\n+ *  documentation and/or other materials provided with the distribution\n+ *\n+ * 3. Neither the name of the copyright holder nor the names of its\n+ *  contributors may be used to endorse or promote products derived from this\n+ *  software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE\n+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _NFP_NET_LOGS_H_\n+#define _NFP_NET_LOGS_H_\n+\n+#include <rte_log.h>\n+\n+#define RTE_LIBRTE_NFP_NET_DEBUG_INIT 1\n+\n+#ifdef RTE_LIBRTE_NFP_NET_DEBUG_INIT\n+#define PMD_INIT_LOG(level, fmt, args...) \\\n+\tRTE_LOG(level, PMD, \"%s(): \" fmt \"\\n\", __func__, ## args)\n+#define PMD_INIT_FUNC_TRACE() PMD_INIT_LOG(DEBUG, \" >>\")\n+#else\n+#define PMD_INIT_LOG(level, fmt, args...) do { } while (0)\n+#define PMD_INIT_FUNC_TRACE() do { } while (0)\n+#endif\n+\n+#ifdef RTE_LIBRTE_NFP_NET_DEBUG_RX\n+#define PMD_RX_LOG(level, fmt, args...) \\\n+\tRTE_LOG(level, PMD, \"%s() rx: \" fmt, __func__, ## args)\n+#else\n+#define PMD_RX_LOG(level, fmt, args...) do { } while (0)\n+#endif\n+\n+#ifdef RTE_LIBRTE_NFP_NET_DEBUG_TX\n+#define PMD_TX_LOG(level, fmt, args...) \\\n+\tRTE_LOG(level, PMD, \"%s() tx: \" fmt, __func__, ## args)\n+#else\n+#define PMD_TX_LOG(level, fmt, args...) do { } while (0)\n+#endif\n+\n+#ifdef RTE_LIBRTE_NFP_NET_DEBUG_DRIVER\n+#define PMD_DRV_LOG(level, fmt, args...) \\\n+\tRTE_LOG(level, PMD, \"%s(): \" fmt, __func__, ## args)\n+#else\n+#define PMD_DRV_LOG(level, fmt, args...) do { } while (0)\n+#endif\n+\n+#ifdef RTE_LIBRTE_NFP_NET_DEBUG_INIT\n+#define ASSERT(x) if (!(x)) rte_panic(\"NFP_NET: x\")\n+#else\n+#define ASSERT(x) do { } while (0)\n+#endif\n+\n+#endif /* _NFP_NET_LOGS_H_ */\ndiff --git a/drivers/net/nfp/nfp_net_pmd.h b/drivers/net/nfp/nfp_net_pmd.h\nnew file mode 100644\nindex 0000000..0c2fbbb\n--- /dev/null\n+++ b/drivers/net/nfp/nfp_net_pmd.h\n@@ -0,0 +1,434 @@\n+/*\n+ * Copyright (c) 2014, 2015 Netronome Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright notice,\n+ *  this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ *  notice, this list of conditions and the following disclaimer in the\n+ *  documentation and/or other materials provided with the distribution\n+ *\n+ * 3. Neither the name of the copyright holder nor the names of its\n+ *  contributors may be used to endorse or promote products derived from this\n+ *  software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE\n+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+/*\n+ * vim:shiftwidth=8:noexpandtab\n+ *\n+ * @file dpdk/pmd/nfp_net_pmd.h\n+ *\n+ * Netronome NFP_NET PDM driver\n+ */\n+\n+#ifndef _NFP_NET_PMD_H_\n+#define _NFP_NET_PMD_H_\n+\n+#define NFP_NET_PMD_VERSION \"0.1\"\n+#define PCI_VENDOR_ID_NETRONOME         0x19ee\n+#define PCI_DEVICE_ID_NFP6000_PF_NIC    0x6000\n+#define PCI_DEVICE_ID_NFP6000_VF_NIC    0x6003\n+\n+/* Forward declaration */\n+struct nfp_net_adapter;\n+\n+/*\n+ * The maximum number of descriptors is limited by design as\n+ * DPDK uses uint16_t variables for these values\n+ */\n+#define NFP_NET_MAX_TX_DESC (32 * 1024)\n+#define NFP_NET_MIN_TX_DESC 64\n+\n+#define NFP_NET_MAX_RX_DESC (32 * 1024)\n+#define NFP_NET_MIN_RX_DESC 64\n+\n+/* Bar allocation */\n+#define NFP_NET_CRTL_BAR        0\n+#define NFP_NET_TX_BAR          2\n+#define NFP_NET_RX_BAR          2\n+\n+/* Macros for accessing the Queue Controller Peripheral 'CSRs' */\n+#define NFP_QCP_QUEUE_OFF(_x)                 ((_x) * 0x800)\n+#define NFP_QCP_QUEUE_ADD_RPTR                  0x0000\n+#define NFP_QCP_QUEUE_ADD_WPTR                  0x0004\n+#define NFP_QCP_QUEUE_STS_LO                    0x0008\n+#define NFP_QCP_QUEUE_STS_LO_READPTR_mask     (0x3ffff)\n+#define NFP_QCP_QUEUE_STS_HI                    0x000c\n+#define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask    (0x3ffff)\n+\n+/* Interrupt definitions */\n+#define NFP_NET_IRQ_LSC_IDX             0\n+\n+#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n+\t((uint64_t)((mb)->buf_physaddr + (mb)->data_off))\n+\n+/* Default values for RX/TX configuration */\n+#define DEFAULT_RX_FREE_THRESH  32\n+#define DEFAULT_RX_PTHRESH      8\n+#define DEFAULT_RX_HTHRESH      8\n+#define DEFAULT_RX_WTHRESH      0\n+\n+#define DEFAULT_TX_RS_THRESH\t32\n+#define DEFAULT_TX_FREE_THRESH  32\n+#define DEFAULT_TX_PTHRESH      32\n+#define DEFAULT_TX_HTHRESH      0\n+#define DEFAULT_TX_WTHRESH      0\n+#define DEFAULT_TX_RSBIT_THRESH 32\n+\n+/* Alignment for dma zones */\n+#define NFP_MEMZONE_ALIGN\t128\n+\n+/*\n+ * This is used by the reconfig protocol. It sets the maximum time waiting in\n+ * milliseconds before a reconfig timeout happens.\n+ */\n+#define NFP_NET_POLL_TIMEOUT    5000\n+\n+#define NFP_QCP_QUEUE_ADDR_SZ   (0x800)\n+\n+#define NFP_NET_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */\n+#define NFP_NET_LINK_UP_CHECK_TIMEOUT   1000 /* ms */\n+\n+#include <linux/types.h>\n+\n+static inline uint8_t nn_readb(volatile void *addr)\n+{\n+\treturn *((volatile uint8_t *)(addr));\n+}\n+\n+static inline void nn_writeb(__u8 val, volatile void *addr)\n+{\n+\t*((volatile uint8_t *)(addr)) = val;\n+}\n+\n+static inline uint32_t nn_readl(volatile const void *addr)\n+{\n+\treturn *((volatile const uint32_t *)(addr));\n+}\n+\n+static inline void nn_writel(uint32_t val, volatile void *addr)\n+{\n+\t*((volatile uint32_t *)(addr)) = val;\n+}\n+\n+static inline uint64_t nn_readq(volatile void *addr)\n+{\n+\tconst volatile uint32_t *p = addr;\n+\tuint32_t low, high;\n+\n+\thigh = nn_readl((volatile const void *)(p + 1));\n+\tlow = nn_readl((volatile const void *)p);\n+\n+\treturn low + ((uint64_t)high << 32);\n+}\n+\n+static inline void nn_writeq(uint64_t val, volatile void *addr)\n+{\n+\tnn_writel(val >> 32, (volatile char *)addr + 4);\n+\tnn_writel(val, addr);\n+}\n+\n+/* TX descriptor format */\n+#define PCIE_DESC_TX_EOP                (1 << 7)\n+#define PCIE_DESC_TX_OFFSET_MASK        (0x7f)\n+\n+/* Flags in the host TX descriptor */\n+#define PCIE_DESC_TX_CSUM               (1 << 7)\n+#define PCIE_DESC_TX_IP4_CSUM           (1 << 6)\n+#define PCIE_DESC_TX_TCP_CSUM           (1 << 5)\n+#define PCIE_DESC_TX_UDP_CSUM           (1 << 4)\n+#define PCIE_DESC_TX_VLAN               (1 << 3)\n+#define PCIE_DESC_TX_LSO                (1 << 2)\n+#define PCIE_DESC_TX_ENCAP_NONE         (0)\n+#define PCIE_DESC_TX_ENCAP_VXLAN        (1 << 1)\n+#define PCIE_DESC_TX_ENCAP_GRE          (1 << 0)\n+\n+struct nfp_net_tx_desc {\n+\tunion {\n+\t\tstruct {\n+\t\t\t__u8 dma_addr_hi;   /* High bits of host buf address */\n+\t\t\t__le16 dma_len;     /* Length to DMA for this desc */\n+\t\t\t__u8 offset_eop;    /* Offset in buf where pkt starts +\n+\t\t\t\t\t     * highest bit is eop flag.\n+\t\t\t\t\t     */\n+\t\t\t__le32 dma_addr_lo; /* Low 32bit of host buf addr */\n+\n+\t\t\t__le16 lso;         /* MSS to be used for LSO */\n+\t\t\t__u8 l4_offset;     /* LSO, where the L4 data starts */\n+\t\t\t__u8 flags;         /* TX Flags, see @PCIE_DESC_TX_* */\n+\n+\t\t\t__le16 vlan;        /* VLAN tag to add if indicated */\n+\t\t\t__le16 data_len;    /* Length of frame + meta data */\n+\t\t} __attribute__((__packed__));\n+\t\t__le32 vals[4];\n+\t};\n+};\n+\n+struct nfp_net_txq {\n+\tstruct nfp_net_hw *hw; /* Backpointer to nfp_net structure */\n+\n+\t/*\n+\t * Queue information: @qidx is the queue index from Linux's\n+\t * perspective.  @tx_qcidx is the index of the Queue\n+\t * Controller Peripheral queue relative to the TX queue BAR.\n+\t * @cnt is the size of the queue in number of\n+\t * descriptors. @qcp_q is a pointer to the base of the queue\n+\t * structure on the NFP\n+\t */\n+\t__u8 *qcp_q;\n+\n+\t/*\n+\t * Read and Write pointers.  @wr_p and @rd_p are host side pointer,\n+\t * they are free running and have little relation to the QCP pointers *\n+\t * @qcp_rd_p is a local copy queue controller peripheral read pointer\n+\t */\n+\n+\tuint32_t wr_p;\n+\tuint32_t rd_p;\n+\tuint32_t qcp_rd_p;\n+\n+\tuint32_t tx_count;\n+\n+\tuint32_t tx_free_thresh;\n+\tuint32_t tail;\n+\n+\t/*\n+\t * For each descriptor keep a reference to the mbuff and\n+\t * DMA address used until completion is signalled.\n+\t */\n+\tstruct {\n+\t\tstruct rte_mbuf *mbuf;\n+\t} *txbufs;\n+\n+\t/*\n+\t * Information about the host side queue location. @txds is\n+\t * the virtual address for the queue, @dma is the DMA address\n+\t * of the queue and @size is the size in bytes for the queue\n+\t * (needed for free)\n+\t */\n+\tstruct nfp_net_tx_desc *txds;\n+\n+\t/*\n+\t * At this point 56 bytes have been used for all the fields in the\n+\t * TX critical path. We have room for 8 bytes and still all placed\n+\t * in a cache line. We are not using the threshold values below nor\n+\t * the txq_flags but if we need to, we can add the most used in the\n+\t * remaining bytes.\n+\t */\n+\tuint32_t tx_rs_thresh; /* not used by now. Future? */\n+\tuint32_t tx_pthresh;   /* not used by now. Future? */\n+\tuint32_t tx_hthresh;   /* not used by now. Future? */\n+\tuint32_t tx_wthresh;   /* not used by now. Future? */\n+\tuint32_t txq_flags;    /* not used by now. Future? */\n+\t__u8  port_id;\n+\tint qidx;\n+\tint tx_qcidx;\n+\t__le64 dma;\n+} __attribute__ ((__aligned__(64)));\n+\n+/* RX and freelist descriptor format */\n+#define PCIE_DESC_RX_DD                 (1 << 7)\n+#define PCIE_DESC_RX_META_LEN_MASK      (0x7f)\n+\n+/* Flags in the RX descriptor */\n+#define PCIE_DESC_RX_RSS                (1 << 15)\n+#define PCIE_DESC_RX_I_IP4_CSUM         (1 << 14)\n+#define PCIE_DESC_RX_I_IP4_CSUM_OK      (1 << 13)\n+#define PCIE_DESC_RX_I_TCP_CSUM         (1 << 12)\n+#define PCIE_DESC_RX_I_TCP_CSUM_OK      (1 << 11)\n+#define PCIE_DESC_RX_I_UDP_CSUM         (1 << 10)\n+#define PCIE_DESC_RX_I_UDP_CSUM_OK      (1 <<  9)\n+#define PCIE_DESC_RX_INGRESS_PORT       (1 <<  8)\n+#define PCIE_DESC_RX_EOP                (1 <<  7)\n+#define PCIE_DESC_RX_IP4_CSUM           (1 <<  6)\n+#define PCIE_DESC_RX_IP4_CSUM_OK        (1 <<  5)\n+#define PCIE_DESC_RX_TCP_CSUM           (1 <<  4)\n+#define PCIE_DESC_RX_TCP_CSUM_OK        (1 <<  3)\n+#define PCIE_DESC_RX_UDP_CSUM           (1 <<  2)\n+#define PCIE_DESC_RX_UDP_CSUM_OK        (1 <<  1)\n+#define PCIE_DESC_RX_VLAN               (1 <<  0)\n+\n+struct nfp_net_rx_desc {\n+\tunion {\n+\t\t/* Freelist descriptor */\n+\t\tstruct {\n+\t\t\t__u8 dma_addr_hi;\n+\t\t\t__le16 spare;\n+\t\t\t__u8 dd;\n+\n+\t\t\t__le32 dma_addr_lo;\n+\t\t} __attribute__((__packed__)) fld;\n+\n+\t\t/* RX descriptor */\n+\t\tstruct {\n+\t\t\t__le16 data_len;\n+\t\t\t__u8 reserved;\n+\t\t\t__u8 meta_len_dd;\n+\n+\t\t\t__le16 flags;\n+\t\t\t__le16 vlan;\n+\t\t} __attribute__((__packed__)) rxd;\n+\n+\t\t__le32 vals[2];\n+\t};\n+};\n+\n+struct nfp_net_rx_buff {\n+\tstruct rte_mbuf *mbuf;\n+};\n+\n+struct nfp_net_rxq {\n+\tstruct nfp_net_hw *hw;\t/* Backpointer to nfp_net structure */\n+\n+\t /*\n+\t  * @qcp_fl and @qcp_rx are pointers to the base addresses of the\n+\t  * freelist and RX queue controller peripheral queue structures on the\n+\t  * NFP\n+\t  */\n+\t__u8 *qcp_fl;\n+\t__u8 *qcp_rx;\n+\n+\t/*\n+\t * Read and Write pointers.  @wr_p and @rd_p are host side\n+\t * pointer, they are free running and have little relation to\n+\t * the QCP pointers. @wr_p is where the driver adds new\n+\t * freelist descriptors and @rd_p is where the driver start\n+\t * reading descriptors for newly arrive packets from.\n+\t */\n+\tuint32_t wr_p;\n+\tuint32_t rd_p;\n+\n+\t/*\n+\t * For each buffer placed on the freelist, record the\n+\t * associated SKB\n+\t */\n+\tstruct nfp_net_rx_buff *rxbufs;\n+\n+\t/*\n+\t * Information about the host side queue location.  @rxds is\n+\t * the virtual address for the queue\n+\t */\n+\tstruct nfp_net_rx_desc *rxds;\n+\n+\t/*\n+\t * The mempool is created by the user specifying a mbuf size.\n+\t * We save here the reference of the mempool needed in the RX\n+\t * path and the mbuf size for checking received packets can be\n+\t * safely copied to the mbuf using the NFP_NET_RX_OFFSET\n+\t */\n+\tstruct rte_mempool *mem_pool;\n+\tuint16_t mbuf_size;\n+\n+\t/*\n+\t * Next two fields are used for giving more free descriptors\n+\t * to the NFP\n+\t */\n+\tuint16_t rx_free_thresh;\n+\tuint16_t nb_rx_hold;\n+\n+\t /* the size of the queue in number of descriptors */\n+\tuint16_t rx_count;\n+\n+\t/*\n+\t * Fields above this point fit in a single cache line and are all used\n+\t * in the RX critical path. Fields below this point are just used\n+\t * during queue configuration or not used at all (yet)\n+\t */\n+\n+\t/* referencing dev->data->port_id */\n+\tuint16_t port_id;\n+\n+\tuint8_t  crc_len; /* Not used by now */\n+\tuint8_t  drop_en; /* Not used by now */\n+\n+\t/* DMA address of the queue */\n+\t__le64 dma;\n+\n+\t/*\n+\t * Queue information: @qidx is the queue index from Linux's\n+\t * perspective.  @fl_qcidx is the index of the Queue\n+\t * Controller peripheral queue relative to the RX queue BAR\n+\t * used for the freelist and @rx_qcidx is the Queue Controller\n+\t * Peripheral index for the RX queue.\n+\t */\n+\tint qidx;\n+\tint fl_qcidx;\n+\tint rx_qcidx;\n+} __attribute__ ((__aligned__(64)));\n+\n+struct nfp_net_hw {\n+\t/* Info from the firmware */\n+\tuint32_t ver;\n+\tuint32_t cap;\n+\tuint32_t max_mtu;\n+\tuint32_t mtu;\n+\n+\t/* Current values for control */\n+\tuint32_t ctrl;\n+\n+\tuint8_t *ctrl_bar;\n+\tuint8_t *tx_bar;\n+\tuint8_t *rx_bar;\n+\n+\tint stride_rx;\n+\tint stride_tx;\n+\n+\t__u8 *qcp_cfg;\n+\n+\tuint32_t max_tx_queues;\n+\tuint32_t max_rx_queues;\n+\tuint16_t flbufsz;\n+\tuint16_t device_id;\n+\tuint16_t vendor_id;\n+\tuint16_t subsystem_device_id;\n+\tuint16_t subsystem_vendor_id;\n+#if defined(DSTQ_SELECTION)\n+#if DSTQ_SELECTION\n+\tuint16_t device_function;\n+#endif\n+#endif\n+\n+\tuint8_t mac_addr[ETHER_ADDR_LEN];\n+\n+\t/* Records starting point for counters */\n+\tstruct rte_eth_stats eth_stats_base;\n+\n+#ifdef NFP_NET_LIBNFP\n+\tstruct nfp_cpp *cpp;\n+\tstruct nfp_cpp_area *ctrl_area;\n+\tstruct nfp_cpp_area *tx_area;\n+\tstruct nfp_cpp_area *rx_area;\n+\tstruct nfp_cpp_area *msix_area;\n+#endif\n+};\n+\n+struct nfp_net_adapter {\n+\tstruct nfp_net_hw hw;\n+};\n+\n+#define NFP_NET_DEV_PRIVATE_TO_HW(adapter)\\\n+\t(&((struct nfp_net_adapter *)adapter)->hw)\n+\n+#endif /* _NFP_NET_PMD_H_ */\n+/*\n+ * Local variables:\n+ * c-file-style: \"Linux\"\n+ * indent-tabs-mode: t\n+ * End:\n+ */\n",
    "prefixes": [
        "dpdk-dev",
        "v5",
        "1/9"
    ]
}