Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/84766/?format=api
{ "id": 84766, "url": "https://patches.dpdk.org/api/patches/84766/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201204201646.51746-10-aboyer@pensando.io/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201204201646.51746-10-aboyer@pensando.io>", "list_archive_url": "https://inbox.dpdk.org/dev/20201204201646.51746-10-aboyer@pensando.io", "date": "2020-12-04T20:16:46", "name": "[v3,9/9] net/ionic: minor logging fixups", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "048452fdf218a9b8604dc22c16fc0f37947d419b", "submitter": { "id": 2036, "url": "https://patches.dpdk.org/api/people/2036/?format=api", "name": "Andrew Boyer", "email": "aboyer@pensando.io" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201204201646.51746-10-aboyer@pensando.io/mbox/", "series": [ { "id": 14190, "url": "https://patches.dpdk.org/api/series/14190/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=14190", "date": "2020-12-04T20:16:37", "name": "net/ionic: minor updates and documentation", "version": 3, "mbox": "https://patches.dpdk.org/series/14190/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/84766/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/84766/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0A276A09E3;\n\tFri, 4 Dec 2020 21:20:22 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9F3D0C9FC;\n\tFri, 4 Dec 2020 21:17:57 +0100 (CET)", "from mail-pf1-f195.google.com (mail-pf1-f195.google.com\n [209.85.210.195]) by dpdk.org (Postfix) with ESMTP id 9830ECA24\n for <dev@dpdk.org>; Fri, 4 Dec 2020 21:17:54 +0100 (CET)", "by mail-pf1-f195.google.com with SMTP id q10so4543255pfn.0\n for <dev@dpdk.org>; Fri, 04 Dec 2020 12:17:54 -0800 (PST)", "from driver-dev1.pensando.io ([12.226.153.42])\n by smtp.gmail.com with ESMTPSA id z20sm2911805pjq.16.2020.12.04.12.17.51\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 04 Dec 2020 12:17:51 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=pensando.io; s=google;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :in-reply-to:references;\n bh=WzvHzqAWIscoUrkRtvvm2D/Q+AlQGWNltOLKU+0mO6k=;\n b=CBmtpw/DdVDuRpvrkV+W9Bhzjz8asnzF0er+vZ1ApG5N8rxqgXUxERFIL2u3A/72HW\n GaVA+HSEF74ANFKOGWlxVFGGrELvLxpmX1ajspXreRHLkalcbqSZLsX/e/8y77dxn52a\n reD35xQlPAdeW0rWG5Wl0kHZgyr8665hrF6sodNMJ17lqcOXn8ERMFgHzNXgEs9FbqLR\n +PEbEPg2yR7W19IivgAkE200T705FbWtdGoidjiw9UfiWyY0cbrX0kEnat+/u+yc1a2F\n dDVtTJUUifRz9MKcgmtilAFpGer8cIKQbpyCCpuvDR8JnkhytSJc29zf4Q27ovgoic0J\n AMng==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:in-reply-to:references;\n bh=WzvHzqAWIscoUrkRtvvm2D/Q+AlQGWNltOLKU+0mO6k=;\n b=ianDEJqe3VUIQg1FkOVpLGYlS7fRZvb26g/IbPnYJP/ujGXx5reeuS5arNE0vMf4ph\n F6vWSx1cLQy8vpC9bqJn58UFVxTNXcsh02Nnvz8ptmd5CAHvxl6KDky+GN9H6hBDaRHP\n kp4RDsF7cLTaLAt62sYZgOOwfvKlS8Dk0r882yUpB7gMgQz17ZPpc58tUV3SO5kK3SN7\n XPz1Luidnw3kkByoZZMdf+YaXqw7/UCER5ZQyjv0tTbCYuW668sa2PoLHwBVvgWWO7oQ\n mbAT/3yMRBYCve9rXdTm9N1YHGjXJ6ms9528CxcmM9Tx8ZzAfjwh7lhCKXpuj2ddF82E\n SUIw==", "X-Gm-Message-State": "AOAM532hsJKyFQtcBwb3pvoLbTe2t76liBPCCvdyyhjjz00maRQ42cqf\n nEr8r/oEzBE7MyU0JAKtenEzht3SVUvxFQ==", "X-Google-Smtp-Source": "\n ABdhPJyU9JWXivXLhmHtPE7UgFGCeJeyGvtLhUe5S6H/Riw6nU/pSaBJCt6+SfclAv4j/zqovI9eCg==", "X-Received": "by 2002:a05:6a00:7c7:b029:19d:bab0:bc90 with SMTP id\n n7-20020a056a0007c7b029019dbab0bc90mr5451909pfu.62.1607113072303;\n Fri, 04 Dec 2020 12:17:52 -0800 (PST)", "From": "Andrew Boyer <aboyer@pensando.io>", "To": "dev@dpdk.org", "Cc": "Alfredo Cardigliano <cardigliano@ntop.org>,\n Andrew Boyer <aboyer@pensando.io>", "Date": "Fri, 4 Dec 2020 12:16:46 -0800", "Message-Id": "<20201204201646.51746-10-aboyer@pensando.io>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": [ "<20201204201646.51746-1-aboyer@pensando.io>", "<20201203203418.15064-1-aboyer@pensando.io>" ], "References": [ "<20201204201646.51746-1-aboyer@pensando.io>", "<20201203203418.15064-1-aboyer@pensando.io>" ], "Subject": "[dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Expose ionic_opcode_to_str() so it can be used for dev cmds, too.\nStore the device name in struct adapter.\n\nSwitch to memcpy() to work around gcc false positives.\n\nSigned-off-by: Andrew Boyer <aboyer@pensando.io>\n---\n drivers/net/ionic/ionic.h | 1 +\n drivers/net/ionic/ionic_dev.c | 5 +++\n drivers/net/ionic/ionic_dev.h | 2 +\n drivers/net/ionic/ionic_ethdev.c | 4 +-\n drivers/net/ionic/ionic_lif.c | 68 ++++++++++++++++---------------\n drivers/net/ionic/ionic_mac_api.c | 4 +-\n drivers/net/ionic/ionic_main.c | 32 ++++++++-------\n drivers/net/ionic/ionic_rxtx.c | 41 ++++++++-----------\n 8 files changed, 84 insertions(+), 73 deletions(-)", "diff": "diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h\nindex a93110326..7ad0ab69e 100644\n--- a/drivers/net/ionic/ionic.h\n+++ b/drivers/net/ionic/ionic.h\n@@ -48,6 +48,7 @@ struct ionic_hw {\n struct ionic_adapter {\n \tstruct ionic_hw hw;\n \tstruct ionic_dev idev;\n+\tconst char *name;\n \tstruct ionic_dev_bar bars[IONIC_BARS_MAX];\n \tstruct ionic_identity\tident;\n \tstruct ionic_lif *lifs[IONIC_LIFS_MAX];\ndiff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c\nindex fc68f5c74..f32966521 100644\n--- a/drivers/net/ionic/ionic_dev.c\n+++ b/drivers/net/ionic/ionic_dev.c\n@@ -102,6 +102,9 @@ ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd)\n \tuint32_t cmd_size = sizeof(cmd->words) /\n \t\tsizeof(cmd->words[0]);\n \n+\tIONIC_PRINT(DEBUG, \"Sending %s (%d) via dev_cmd\",\n+\t\t ionic_opcode_to_str(cmd->cmd.opcode), cmd->cmd.opcode);\n+\n \tfor (i = 0; i < cmd_size; i++)\n \t\tiowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]);\n \n@@ -348,6 +351,8 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,\n \t\t.q_init.cq_ring_base = cq->base_pa,\n \t};\n \n+\tIONIC_PRINT(DEBUG, \"adminq.q_init.ver %u\", cmd.q_init.ver);\n+\n \tionic_dev_cmd_go(idev, &cmd);\n }\n \ndiff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h\nindex 7150f7f2c..026c4a9f3 100644\n--- a/drivers/net/ionic/ionic_dev.h\n+++ b/drivers/net/ionic/ionic_dev.h\n@@ -205,6 +205,8 @@ struct ionic_qcq;\n void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr,\n \tunsigned long index);\n \n+const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode);\n+\n int ionic_dev_setup(struct ionic_adapter *adapter);\n \n void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);\ndiff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c\nindex a1c35ace3..d700aa745 100644\n--- a/drivers/net/ionic/ionic_ethdev.c\n+++ b/drivers/net/ionic/ionic_ethdev.c\n@@ -571,7 +571,7 @@ ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,\n \n \tif (reta_size != ident->lif.eth.rss_ind_tbl_sz) {\n \t\tIONIC_PRINT(ERR, \"The size of hash lookup table configured \"\n-\t\t\t\"(%d) doesn't match the number hardware can supported \"\n+\t\t\t\"(%d) does not match the number hardware can support \"\n \t\t\t\"(%d)\",\n \t\t\treta_size, ident->lif.eth.rss_ind_tbl_sz);\n \t\treturn -EINVAL;\n@@ -605,7 +605,7 @@ ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,\n \n \tif (reta_size != ident->lif.eth.rss_ind_tbl_sz) {\n \t\tIONIC_PRINT(ERR, \"The size of hash lookup table configured \"\n-\t\t\t\"(%d) doesn't match the number hardware can supported \"\n+\t\t\t\"(%d) does not match the number hardware can support \"\n \t\t\t\"(%d)\",\n \t\t\treta_size, ident->lif.eth.rss_ind_tbl_sz);\n \t\treturn -EINVAL;\ndiff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c\nindex 722a89565..112bd54fa 100644\n--- a/drivers/net/ionic/ionic_lif.c\n+++ b/drivers/net/ionic/ionic_lif.c\n@@ -84,7 +84,7 @@ ionic_lif_reset(struct ionic_lif *lif)\n \tionic_dev_cmd_lif_reset(idev, lif->index);\n \terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n \tif (err)\n-\t\tIONIC_PRINT(WARNING, \"Failed to reset lif\");\n+\t\tIONIC_PRINT(WARNING, \"Failed to reset %s\", lif->name);\n }\n \n static void\n@@ -554,7 +554,7 @@ ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)\n \t/*\n \t * Note: interrupt handler is called for index = 0 only\n \t * (we use interrupts for the notifyq only anyway,\n-\t * which hash index = 0)\n+\t * which has index = 0)\n \t */\n \n \tfor (index = 0; index < adapter->nintrs; index++)\n@@ -687,8 +687,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,\n \t\tionic_q_sg_map(&new->q, sg_base, sg_base_pa);\n \t}\n \n-\tIONIC_PRINT(DEBUG, \"Q-Base-PA = %ju CQ-Base-PA = %ju \"\n-\t\t\"SG-base-PA = %ju\",\n+\tIONIC_PRINT(DEBUG, \"Q-Base-PA = %#jx CQ-Base-PA = %#jx \"\n+\t\t\"SG-base-PA = %#jx\",\n \t\tq_base_pa, cq_base_pa, sg_base_pa);\n \n \tionic_q_map(&new->q, q_base, q_base_pa);\n@@ -827,7 +827,13 @@ ionic_lif_alloc(struct ionic_lif *lif)\n \tint dbpage_num;\n \tint err;\n \n-\tsnprintf(lif->name, sizeof(lif->name), \"lif%u\", lif->index);\n+\t/*\n+\t * lif->name was zeroed on allocation.\n+\t * Copy (sizeof() - 1) bytes to ensure that it is NULL terminated.\n+\t */\n+\tmemcpy(lif->name, lif->eth_dev->data->name, sizeof(lif->name) - 1);\n+\n+\tIONIC_PRINT(DEBUG, \"LIF: %s\", lif->name);\n \n \tIONIC_PRINT(DEBUG, \"Allocating Lif Info\");\n \n@@ -868,8 +874,6 @@ ionic_lif_alloc(struct ionic_lif *lif)\n \n \tIONIC_PRINT(DEBUG, \"Allocating Admin Queue\");\n \n-\tIONIC_PRINT(DEBUG, \"Allocating Admin Queue\");\n-\n \terr = ionic_admin_qcq_alloc(lif);\n \tif (err) {\n \t\tIONIC_PRINT(ERR, \"Cannot allocate admin queue\");\n@@ -1217,12 +1221,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)\n \t\t}\n \t};\n \n-\tIONIC_PRINT(DEBUG, \"notifyq_init.index %d\",\n-\t\tctx.cmd.q_init.index);\n-\tIONIC_PRINT(DEBUG, \"notifyq_init.ring_base 0x%\" PRIx64 \"\",\n-\t\tctx.cmd.q_init.ring_base);\n+\tIONIC_PRINT(DEBUG, \"notifyq_init.index %d\", q->index);\n+\tIONIC_PRINT(DEBUG, \"notifyq_init.ring_base %#jx\", q->base_pa);\n \tIONIC_PRINT(DEBUG, \"notifyq_init.ring_size %d\",\n \t\tctx.cmd.q_init.ring_size);\n+\tIONIC_PRINT(DEBUG, \"notifyq_init.ver %u\", ctx.cmd.q_init.ver);\n \n \terr = ionic_adminq_post_wait(lif, &ctx);\n \tif (err)\n@@ -1327,11 +1330,11 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)\n \t};\n \tint err;\n \n-\tIONIC_PRINT(DEBUG, \"txq_init.index %d\", ctx.cmd.q_init.index);\n-\tIONIC_PRINT(DEBUG, \"txq_init.ring_base 0x%\" PRIx64 \"\",\n-\t\tctx.cmd.q_init.ring_base);\n-\tIONIC_PRINT(DEBUG, \"txq_init.ring_size %d\",\n-\t\tctx.cmd.q_init.ring_size);\n+\n+\tIONIC_PRINT(DEBUG, \"txq_init.index %d\", q->index);\n+\tIONIC_PRINT(DEBUG, \"txq_init.ring_base %#jx\", q->base_pa);\n+\tIONIC_PRINT(DEBUG, \"txq_init.ring_size %d\", ctx.cmd.q_init.ring_size);\n+\tIONIC_PRINT(DEBUG, \"txq_init.ver %u\", ctx.cmd.q_init.ver);\n \n \terr = ionic_adminq_post_wait(qcq->lif, &ctx);\n \tif (err)\n@@ -1373,11 +1376,10 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)\n \t};\n \tint err;\n \n-\tIONIC_PRINT(DEBUG, \"rxq_init.index %d\", ctx.cmd.q_init.index);\n-\tIONIC_PRINT(DEBUG, \"rxq_init.ring_base 0x%\" PRIx64 \"\",\n-\t\tctx.cmd.q_init.ring_base);\n-\tIONIC_PRINT(DEBUG, \"rxq_init.ring_size %d\",\n-\t\tctx.cmd.q_init.ring_size);\n+\tIONIC_PRINT(DEBUG, \"rxq_init.index %d\", q->index);\n+\tIONIC_PRINT(DEBUG, \"rxq_init.ring_base %#jx\", q->base_pa);\n+\tIONIC_PRINT(DEBUG, \"rxq_init.ring_size %d\", ctx.cmd.q_init.ring_size);\n+\tIONIC_PRINT(DEBUG, \"rxq_init.ver %u\", ctx.cmd.q_init.ver);\n \n \terr = ionic_adminq_post_wait(qcq->lif, &ctx);\n \tif (err)\n@@ -1448,8 +1450,9 @@ ionic_lif_set_name(struct ionic_lif *lif)\n \t\t},\n \t};\n \n-\tsnprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),\n-\t\t\"%d\", lif->port_id);\n+\t/* FW is responsible for NULL terminating this field */\n+\tmemcpy(ctx.cmd.lif_setattr.name, lif->name,\n+\t\tsizeof(ctx.cmd.lif_setattr.name));\n \n \tionic_adminq_post_wait(lif, &ctx);\n }\n@@ -1643,23 +1646,23 @@ ionic_lif_identify(struct ionic_adapter *adapter)\n \tfor (i = 0; i < nwords; i++)\n \t\tident->lif.words[i] = ioread32(&idev->dev_cmd->data[i]);\n \n-\tIONIC_PRINT(INFO, \"capabilities 0x%\" PRIx64 \" \",\n+\tIONIC_PRINT(INFO, \"capabilities %#jx\",\n \t\tident->lif.capabilities);\n \n-\tIONIC_PRINT(INFO, \"eth.max_ucast_filters 0x%\" PRIx32 \" \",\n+\tIONIC_PRINT(INFO, \"eth.max_ucast_filters %#x\",\n \t\tident->lif.eth.max_ucast_filters);\n-\tIONIC_PRINT(INFO, \"eth.max_mcast_filters 0x%\" PRIx32 \" \",\n+\tIONIC_PRINT(INFO, \"eth.max_mcast_filters %#x\",\n \t\tident->lif.eth.max_mcast_filters);\n \n-\tIONIC_PRINT(INFO, \"eth.features 0x%\" PRIx64 \" \",\n+\tIONIC_PRINT(INFO, \"eth.features %#jx\",\n \t\tident->lif.eth.config.features);\n-\tIONIC_PRINT(INFO, \"eth.queue_count[IONIC_QTYPE_ADMINQ] 0x%\" PRIx32 \" \",\n+\tIONIC_PRINT(INFO, \"eth.queue_count[IONIC_QTYPE_ADMINQ] %#x\",\n \t\tident->lif.eth.config.queue_count[IONIC_QTYPE_ADMINQ]);\n-\tIONIC_PRINT(INFO, \"eth.queue_count[IONIC_QTYPE_NOTIFYQ] 0x%\" PRIx32 \" \",\n+\tIONIC_PRINT(INFO, \"eth.queue_count[IONIC_QTYPE_NOTIFYQ] %#x\",\n \t\tident->lif.eth.config.queue_count[IONIC_QTYPE_NOTIFYQ]);\n-\tIONIC_PRINT(INFO, \"eth.queue_count[IONIC_QTYPE_RXQ] 0x%\" PRIx32 \" \",\n+\tIONIC_PRINT(INFO, \"eth.queue_count[IONIC_QTYPE_RXQ] %#x\",\n \t\tident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ]);\n-\tIONIC_PRINT(INFO, \"eth.queue_count[IONIC_QTYPE_TXQ] 0x%\" PRIx32 \" \",\n+\tIONIC_PRINT(INFO, \"eth.queue_count[IONIC_QTYPE_TXQ] %#x\",\n \t\tident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ]);\n \n \treturn 0;\n@@ -1680,7 +1683,8 @@ ionic_lifs_size(struct ionic_adapter *adapter)\n \tnintrs = nlifs * 1 /* notifyq */;\n \n \tif (nintrs > dev_nintrs) {\n-\t\tIONIC_PRINT(ERR, \"At most %d intr queues supported, minimum required is %u\",\n+\t\tIONIC_PRINT(ERR,\n+\t\t\t\"At most %d intr supported, minimum req'd is %u\",\n \t\t\tdev_nintrs, nintrs);\n \t\treturn -ENOSPC;\n \t}\ndiff --git a/drivers/net/ionic/ionic_mac_api.c b/drivers/net/ionic/ionic_mac_api.c\nindex c0ea042bc..7817b33e4 100644\n--- a/drivers/net/ionic/ionic_mac_api.c\n+++ b/drivers/net/ionic/ionic_mac_api.c\n@@ -37,7 +37,7 @@ ionic_set_mac_type(struct ionic_hw *hw)\n \tIONIC_PRINT_CALL();\n \n \tif (hw->vendor_id != IONIC_PENSANDO_VENDOR_ID) {\n-\t\tIONIC_PRINT(ERR, \"Unsupported vendor id: %\" PRIx32 \"\",\n+\t\tIONIC_PRINT(ERR, \"Unsupported vendor id: %#x\",\n \t\t\thw->vendor_id);\n \t\treturn -EINVAL;\n \t}\n@@ -50,7 +50,7 @@ ionic_set_mac_type(struct ionic_hw *hw)\n \t\tbreak;\n \tdefault:\n \t\terr = -EINVAL;\n-\t\tIONIC_PRINT(ERR, \"Unsupported device id: %\" PRIx32 \"\",\n+\t\tIONIC_PRINT(ERR, \"Unsupported device id: %#x\",\n \t\t\thw->device_id);\n \t\tbreak;\n \t}\ndiff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c\nindex 92cf0f398..ce5d11311 100644\n--- a/drivers/net/ionic/ionic_main.c\n+++ b/drivers/net/ionic/ionic_main.c\n@@ -61,7 +61,7 @@ ionic_error_to_str(enum ionic_status_code code)\n \t}\n }\n \n-static const char *\n+const char *\n ionic_opcode_to_str(enum ionic_cmd_opcode opcode)\n {\n \tswitch (opcode) {\n@@ -107,6 +107,8 @@ ionic_opcode_to_str(enum ionic_cmd_opcode opcode)\n \t\treturn \"IONIC_CMD_Q_INIT\";\n \tcase IONIC_CMD_Q_CONTROL:\n \t\treturn \"IONIC_CMD_Q_CONTROL\";\n+\tcase IONIC_CMD_Q_IDENTIFY:\n+\t\treturn \"IONIC_CMD_Q_IDENTIFY\";\n \tcase IONIC_CMD_RDMA_RESET_LIF:\n \t\treturn \"IONIC_CMD_RDMA_RESET_LIF\";\n \tcase IONIC_CMD_RDMA_CREATE_EQ:\n@@ -126,8 +128,9 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)\n \tconst char *name;\n \tconst char *status;\n \n+\tname = ionic_opcode_to_str(ctx->cmd.cmd.opcode);\n+\n \tif (ctx->comp.comp.status || timeout) {\n-\t\tname = ionic_opcode_to_str(ctx->cmd.cmd.opcode);\n \t\tstatus = ionic_error_to_str(ctx->comp.comp.status);\n \t\tIONIC_PRINT(ERR, \"%s (%d) failed: %s (%d)\",\n \t\t\tname,\n@@ -137,6 +140,8 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)\n \t\treturn -EIO;\n \t}\n \n+\tIONIC_PRINT(DEBUG, \"%s (%d) succeeded\", name, ctx->cmd.cmd.opcode);\n+\n \treturn 0;\n }\n \n@@ -174,14 +179,13 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)\n \tbool done;\n \tint err;\n \n-\tIONIC_PRINT(DEBUG, \"Sending %s to the admin queue\",\n-\t\tionic_opcode_to_str(ctx->cmd.cmd.opcode));\n+\tIONIC_PRINT(DEBUG, \"Sending %s (%d) via the admin queue\",\n+\t\tionic_opcode_to_str(ctx->cmd.cmd.opcode), ctx->cmd.cmd.opcode);\n \n \terr = ionic_adminq_post(lif, ctx);\n \tif (err) {\n-\t\tIONIC_PRINT(ERR, \"Failure posting to the admin queue %d (%d)\",\n+\t\tIONIC_PRINT(ERR, \"Failure posting %d to the admin queue (%d)\",\n \t\t\tctx->cmd.cmd.opcode, err);\n-\n \t\treturn err;\n \t}\n \n@@ -244,6 +248,7 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)\n \tif (!err)\n \t\terr = ionic_dev_cmd_check_error(idev);\n \n+\tIONIC_PRINT(DEBUG, \"dev_cmd returned %d\", err);\n \treturn err;\n }\n \n@@ -335,12 +340,12 @@ ionic_port_identify(struct ionic_adapter *adapter)\n \t\t\t\tioread32(&idev->dev_cmd->data[i]);\n \t}\n \n-\tIONIC_PRINT(INFO, \"speed %d \", ident->port.config.speed);\n-\tIONIC_PRINT(INFO, \"mtu %d \", ident->port.config.mtu);\n-\tIONIC_PRINT(INFO, \"state %d \", ident->port.config.state);\n-\tIONIC_PRINT(INFO, \"an_enable %d \", ident->port.config.an_enable);\n-\tIONIC_PRINT(INFO, \"fec_type %d \", ident->port.config.fec_type);\n-\tIONIC_PRINT(INFO, \"pause_type %d \", ident->port.config.pause_type);\n+\tIONIC_PRINT(INFO, \"speed %d\", ident->port.config.speed);\n+\tIONIC_PRINT(INFO, \"mtu %d\", ident->port.config.mtu);\n+\tIONIC_PRINT(INFO, \"state %d\", ident->port.config.state);\n+\tIONIC_PRINT(INFO, \"an_enable %d\", ident->port.config.an_enable);\n+\tIONIC_PRINT(INFO, \"fec_type %d\", ident->port.config.fec_type);\n+\tIONIC_PRINT(INFO, \"pause_type %d\", ident->port.config.pause_type);\n \tIONIC_PRINT(INFO, \"loopback_mode %d\",\n \t\tident->port.config.loopback_mode);\n \n@@ -381,8 +386,7 @@ ionic_port_init(struct ionic_adapter *adapter)\n \tidev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE);\n \n \tsnprintf(z_name, sizeof(z_name), \"%s_port_%s_info\",\n-\t\tIONIC_DRV_NAME,\n-\t\tadapter->pci_dev->device.name);\n+\t\tIONIC_DRV_NAME, adapter->name);\n \n \tidev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz,\n \t\tSOCKET_ID_ANY);\ndiff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c\nindex b953aff49..b689c8381 100644\n--- a/drivers/net/ionic/ionic_rxtx.c\n+++ b/drivers/net/ionic/ionic_rxtx.c\n@@ -133,7 +133,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)\n {\n \tstruct ionic_qcq *txq;\n \n-\tIONIC_PRINT_CALL();\n+\tIONIC_PRINT(DEBUG, \"Stopping TX queue %u\", tx_queue_id);\n \n \ttxq = eth_dev->data->tx_queues[tx_queue_id];\n \n@@ -156,7 +156,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)\n \n int __rte_cold\n ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,\n-\t\tuint16_t nb_desc, uint32_t socket_id __rte_unused,\n+\t\tuint16_t nb_desc, uint32_t socket_id,\n \t\tconst struct rte_eth_txconf *tx_conf)\n {\n \tstruct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);\n@@ -164,11 +164,6 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,\n \tuint64_t offloads;\n \tint err;\n \n-\tIONIC_PRINT_CALL();\n-\n-\tIONIC_PRINT(DEBUG, \"Configuring TX queue %u with %u buffers\",\n-\t\ttx_queue_id, nb_desc);\n-\n \tif (tx_queue_id >= lif->ntxqcqs) {\n \t\tIONIC_PRINT(DEBUG, \"Queue index %u not available \"\n \t\t\t\"(max %u queues)\",\n@@ -177,6 +172,9 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,\n \t}\n \n \toffloads = tx_conf->offloads | eth_dev->data->dev_conf.txmode.offloads;\n+\tIONIC_PRINT(DEBUG,\n+\t\t\"Configuring skt %u TX queue %u with %u buffers, offloads %jx\",\n+\t\tsocket_id, tx_queue_id, nb_desc, offloads);\n \n \t/* Validate number of receive descriptors */\n \tif (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC)\n@@ -215,10 +213,11 @@ ionic_dev_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)\n \tstruct ionic_qcq *txq;\n \tint err;\n \n-\tIONIC_PRINT_CALL();\n-\n \ttxq = eth_dev->data->tx_queues[tx_queue_id];\n \n+\tIONIC_PRINT(DEBUG, \"Starting TX queue %u, %u descs\",\n+\t\ttx_queue_id, txq->q.num_descs);\n+\n \terr = ionic_lif_txq_init(txq);\n \tif (err)\n \t\treturn err;\n@@ -642,7 +641,7 @@ int __rte_cold\n ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,\n \t\tuint16_t rx_queue_id,\n \t\tuint16_t nb_desc,\n-\t\tuint32_t socket_id __rte_unused,\n+\t\tuint32_t socket_id,\n \t\tconst struct rte_eth_rxconf *rx_conf,\n \t\tstruct rte_mempool *mp)\n {\n@@ -651,11 +650,6 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,\n \tuint64_t offloads;\n \tint err;\n \n-\tIONIC_PRINT_CALL();\n-\n-\tIONIC_PRINT(DEBUG, \"Configuring RX queue %u with %u buffers\",\n-\t\trx_queue_id, nb_desc);\n-\n \tif (rx_queue_id >= lif->nrxqcqs) {\n \t\tIONIC_PRINT(ERR,\n \t\t\t\"Queue index %u not available (max %u queues)\",\n@@ -664,13 +658,16 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,\n \t}\n \n \toffloads = rx_conf->offloads | eth_dev->data->dev_conf.rxmode.offloads;\n+\tIONIC_PRINT(DEBUG,\n+\t\t\"Configuring skt %u RX queue %u with %u buffers, offloads %jx\",\n+\t\tsocket_id, rx_queue_id, nb_desc, offloads);\n \n \t/* Validate number of receive descriptors */\n \tif (!rte_is_power_of_2(nb_desc) ||\n \t\t\tnb_desc < IONIC_MIN_RING_DESC ||\n \t\t\tnb_desc > IONIC_MAX_RING_DESC) {\n \t\tIONIC_PRINT(ERR,\n-\t\t\t\"Bad number of descriptors (%u) for queue %u (min: %u)\",\n+\t\t\t\"Bad descriptor count (%u) for queue %u (min: %u)\",\n \t\t\tnb_desc, rx_queue_id, IONIC_MIN_RING_DESC);\n \t\treturn -EINVAL; /* or use IONIC_DEFAULT_RING_DESC */\n \t}\n@@ -687,7 +684,7 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,\n \n \terr = ionic_rx_qcq_alloc(lif, rx_queue_id, nb_desc, &rxq);\n \tif (err) {\n-\t\tIONIC_PRINT(ERR, \"Queue allocation failure\");\n+\t\tIONIC_PRINT(ERR, \"Queue %d allocation failure\", rx_queue_id);\n \t\treturn -EINVAL;\n \t}\n \n@@ -959,13 +956,11 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)\n \tstruct ionic_qcq *rxq;\n \tint err;\n \n-\tIONIC_PRINT_CALL();\n-\n-\tIONIC_PRINT(DEBUG, \"Allocating RX queue buffers (size: %u)\",\n-\t\tframe_size);\n-\n \trxq = eth_dev->data->rx_queues[rx_queue_id];\n \n+\tIONIC_PRINT(DEBUG, \"Starting RX queue %u, %u descs (size: %u)\",\n+\t\trx_queue_id, rxq->q.num_descs, frame_size);\n+\n \terr = ionic_lif_rxq_init(rxq);\n \tif (err)\n \t\treturn err;\n@@ -1045,7 +1040,7 @@ ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)\n {\n \tstruct ionic_qcq *rxq;\n \n-\tIONIC_PRINT_CALL();\n+\tIONIC_PRINT(DEBUG, \"Stopping RX queue %u\", rx_queue_id);\n \n \trxq = eth_dev->data->rx_queues[rx_queue_id];\n \n", "prefixes": [ "v3", "9/9" ] }